1; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5
2; END.
3
4define void @test(i8* %stack) {
5entry:
6	%tmp9 = icmp eq i32 0, 0		; <i1> [#uses=1]
7	%tmp30 = icmp eq i32 0, 0		; <i1> [#uses=1]
8	br i1 %tmp30, label %cond_next54, label %cond_true31
9cond_true860:		; preds = %bb855
10	%tmp879 = tail call <4 x float> @llvm.ppc.altivec.vmaddfp( <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x float> zeroinitializer )		; <<4 x float>> [#uses=1]
11	%tmp880 = bitcast <4 x float> %tmp879 to <4 x i32>		; <<4 x i32>> [#uses=2]
12	%tmp883 = shufflevector <4 x i32> %tmp880, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 >		; <<4 x i32>> [#uses=1]
13	%tmp883.upgrd.1 = bitcast <4 x i32> %tmp883 to <4 x float>		; <<4 x float>> [#uses=1]
14	%tmp885 = shufflevector <4 x i32> %tmp880, <4 x i32> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 >		; <<4 x i32>> [#uses=1]
15	%tmp885.upgrd.2 = bitcast <4 x i32> %tmp885 to <4 x float>		; <<4 x float>> [#uses=1]
16	br label %cond_next905
17cond_true31:		; preds = %entry
18	ret void
19cond_next54:		; preds = %entry
20	br i1 %tmp9, label %cond_false385, label %bb279
21bb279:		; preds = %cond_next54
22	ret void
23cond_false385:		; preds = %cond_next54
24	%tmp388 = icmp eq i32 0, 0		; <i1> [#uses=1]
25	br i1 %tmp388, label %cond_next463, label %cond_true389
26cond_true389:		; preds = %cond_false385
27	ret void
28cond_next463:		; preds = %cond_false385
29	%tmp1208107 = icmp ugt i8* null, %stack		; <i1> [#uses=1]
30	br i1 %tmp1208107, label %cond_true1209.preheader, label %bb1212
31cond_true498:		; preds = %cond_true1209.preheader
32	ret void
33cond_true519:		; preds = %cond_true1209.preheader
34	%bothcond = or i1 false, false		; <i1> [#uses=1]
35	br i1 %bothcond, label %bb855, label %bb980
36cond_false548:		; preds = %cond_true1209.preheader
37	ret void
38bb855:		; preds = %cond_true519
39	%tmp859 = icmp eq i32 0, 0		; <i1> [#uses=1]
40	br i1 %tmp859, label %cond_true860, label %cond_next905
41cond_next905:		; preds = %bb855, %cond_true860
42	%vfpw2.4 = phi <4 x float> [ %tmp885.upgrd.2, %cond_true860 ], [ undef, %bb855 ]		; <<4 x float>> [#uses=0]
43	%vfpw1.4 = phi <4 x float> [ %tmp883.upgrd.1, %cond_true860 ], [ undef, %bb855 ]		; <<4 x float>> [#uses=0]
44	%tmp930 = bitcast <4 x float> zeroinitializer to <4 x i32>		; <<4 x i32>> [#uses=0]
45	ret void
46bb980:		; preds = %cond_true519
47	ret void
48cond_true1209.preheader:		; preds = %cond_next463
49	%tmp496 = and i32 0, 12288		; <i32> [#uses=1]
50	switch i32 %tmp496, label %cond_false548 [
51		 i32 0, label %cond_true498
52		 i32 4096, label %cond_true519
53	]
54bb1212:		; preds = %cond_next463
55	ret void
56}
57
58declare <4 x float> @llvm.ppc.altivec.vmaddfp(<4 x float>, <4 x float>, <4 x float>)
59