1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \
3; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck --check-prefix=CHECK-PWR8 %s
4; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
5; RUN:   -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck --check-prefix=CHECK-PWR9 %s
6
7
8declare signext i32 @callee(i32 signext) local_unnamed_addr
9
10define dso_local signext i32 @caller1(i32 signext %a, i32 signext %b) local_unnamed_addr {
11; CHECK-PWR8-LABEL: caller1:
12; CHECK-PWR8:       # %bb.0: # %entry
13; CHECK-PWR8-NEXT:    mflr r0
14; CHECK-PWR8-NEXT:    .cfi_def_cfa_offset 176
15; CHECK-PWR8-NEXT:    .cfi_offset lr, 16
16; CHECK-PWR8-NEXT:    .cfi_offset r14, -144
17; CHECK-PWR8-NEXT:    .cfi_offset r15, -136
18; CHECK-PWR8-NEXT:    std r14, -144(r1) # 8-byte Folded Spill
19; CHECK-PWR8-NEXT:    std r15, -136(r1) # 8-byte Folded Spill
20; CHECK-PWR8-NEXT:    std r0, 16(r1)
21; CHECK-PWR8-NEXT:    stdu r1, -176(r1)
22; CHECK-PWR8-NEXT:    #APP
23; CHECK-PWR8-NEXT:    add r3, r3, r4
24; CHECK-PWR8-NEXT:    #NO_APP
25; CHECK-PWR8-NEXT:    extsw r3, r3
26; CHECK-PWR8-NEXT:    bl callee
27; CHECK-PWR8-NEXT:    nop
28; CHECK-PWR8-NEXT:    addi r1, r1, 176
29; CHECK-PWR8-NEXT:    ld r0, 16(r1)
30; CHECK-PWR8-NEXT:    ld r15, -136(r1) # 8-byte Folded Reload
31; CHECK-PWR8-NEXT:    ld r14, -144(r1) # 8-byte Folded Reload
32; CHECK-PWR8-NEXT:    mtlr r0
33; CHECK-PWR8-NEXT:    blr
34;
35; CHECK-PWR9-LABEL: caller1:
36; CHECK-PWR9:       # %bb.0: # %entry
37; CHECK-PWR9-NEXT:    mflr r0
38; CHECK-PWR9-NEXT:    .cfi_def_cfa_offset 176
39; CHECK-PWR9-NEXT:    .cfi_offset lr, 16
40; CHECK-PWR9-NEXT:    .cfi_offset r14, -144
41; CHECK-PWR9-NEXT:    .cfi_offset r15, -136
42; CHECK-PWR9-NEXT:    std r14, -144(r1) # 8-byte Folded Spill
43; CHECK-PWR9-NEXT:    std r15, -136(r1) # 8-byte Folded Spill
44; CHECK-PWR9-NEXT:    std r0, 16(r1)
45; CHECK-PWR9-NEXT:    stdu r1, -176(r1)
46; CHECK-PWR9-NEXT:    #APP
47; CHECK-PWR9-NEXT:    add r3, r3, r4
48; CHECK-PWR9-NEXT:    #NO_APP
49; CHECK-PWR9-NEXT:    extsw r3, r3
50; CHECK-PWR9-NEXT:    bl callee
51; CHECK-PWR9-NEXT:    nop
52; CHECK-PWR9-NEXT:    addi r1, r1, 176
53; CHECK-PWR9-NEXT:    ld r0, 16(r1)
54; CHECK-PWR9-NEXT:    ld r15, -136(r1) # 8-byte Folded Reload
55; CHECK-PWR9-NEXT:    ld r14, -144(r1) # 8-byte Folded Reload
56; CHECK-PWR9-NEXT:    mtlr r0
57; CHECK-PWR9-NEXT:    blr
58entry:
59  %0 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{r14},~{r15}"(i32 %a, i32 %b)
60  %call = tail call signext i32 @callee(i32 signext %0)
61  ret i32 %call
62}
63
64define dso_local signext i32 @caller2(i32 signext %a, i32 signext %b) local_unnamed_addr {
65; CHECK-PWR8-LABEL: caller2:
66; CHECK-PWR8:       # %bb.0: # %entry
67; CHECK-PWR8-NEXT:    mflr r0
68; CHECK-PWR8-NEXT:    .cfi_def_cfa_offset 176
69; CHECK-PWR8-NEXT:    .cfi_offset lr, 16
70; CHECK-PWR8-NEXT:    .cfi_offset f14, -144
71; CHECK-PWR8-NEXT:    .cfi_offset f15, -136
72; CHECK-PWR8-NEXT:    stfd f14, -144(r1) # 8-byte Folded Spill
73; CHECK-PWR8-NEXT:    stfd f15, -136(r1) # 8-byte Folded Spill
74; CHECK-PWR8-NEXT:    std r0, 16(r1)
75; CHECK-PWR8-NEXT:    stdu r1, -176(r1)
76; CHECK-PWR8-NEXT:    #APP
77; CHECK-PWR8-NEXT:    add r3, r3, r4
78; CHECK-PWR8-NEXT:    #NO_APP
79; CHECK-PWR8-NEXT:    extsw r3, r3
80; CHECK-PWR8-NEXT:    bl callee
81; CHECK-PWR8-NEXT:    nop
82; CHECK-PWR8-NEXT:    addi r1, r1, 176
83; CHECK-PWR8-NEXT:    ld r0, 16(r1)
84; CHECK-PWR8-NEXT:    lfd f15, -136(r1) # 8-byte Folded Reload
85; CHECK-PWR8-NEXT:    lfd f14, -144(r1) # 8-byte Folded Reload
86; CHECK-PWR8-NEXT:    mtlr r0
87; CHECK-PWR8-NEXT:    blr
88;
89; CHECK-PWR9-LABEL: caller2:
90; CHECK-PWR9:       # %bb.0: # %entry
91; CHECK-PWR9-NEXT:    mflr r0
92; CHECK-PWR9-NEXT:    .cfi_def_cfa_offset 176
93; CHECK-PWR9-NEXT:    .cfi_offset lr, 16
94; CHECK-PWR9-NEXT:    .cfi_offset f14, -144
95; CHECK-PWR9-NEXT:    .cfi_offset f15, -136
96; CHECK-PWR9-NEXT:    stfd f14, -144(r1) # 8-byte Folded Spill
97; CHECK-PWR9-NEXT:    stfd f15, -136(r1) # 8-byte Folded Spill
98; CHECK-PWR9-NEXT:    std r0, 16(r1)
99; CHECK-PWR9-NEXT:    stdu r1, -176(r1)
100; CHECK-PWR9-NEXT:    #APP
101; CHECK-PWR9-NEXT:    add r3, r3, r4
102; CHECK-PWR9-NEXT:    #NO_APP
103; CHECK-PWR9-NEXT:    extsw r3, r3
104; CHECK-PWR9-NEXT:    bl callee
105; CHECK-PWR9-NEXT:    nop
106; CHECK-PWR9-NEXT:    addi r1, r1, 176
107; CHECK-PWR9-NEXT:    ld r0, 16(r1)
108; CHECK-PWR9-NEXT:    lfd f15, -136(r1) # 8-byte Folded Reload
109; CHECK-PWR9-NEXT:    lfd f14, -144(r1) # 8-byte Folded Reload
110; CHECK-PWR9-NEXT:    mtlr r0
111; CHECK-PWR9-NEXT:    blr
112entry:
113  %0 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{f14},~{f15}"(i32 %a, i32 %b)
114  %call = tail call signext i32 @callee(i32 signext %0)
115  ret i32 %call
116}
117
118define dso_local signext i32 @caller3(i32 signext %a, i32 signext %b) local_unnamed_addr {
119; CHECK-PWR8-LABEL: caller3:
120; CHECK-PWR8:       # %bb.0: # %entry
121; CHECK-PWR8-NEXT:    mflr r0
122; CHECK-PWR8-NEXT:    std r0, 16(r1)
123; CHECK-PWR8-NEXT:    stdu r1, -240(r1)
124; CHECK-PWR8-NEXT:    .cfi_def_cfa_offset 240
125; CHECK-PWR8-NEXT:    .cfi_offset lr, 16
126; CHECK-PWR8-NEXT:    .cfi_offset v20, -192
127; CHECK-PWR8-NEXT:    .cfi_offset v21, -176
128; CHECK-PWR8-NEXT:    li r5, 48
129; CHECK-PWR8-NEXT:    stvx v20, r1, r5 # 16-byte Folded Spill
130; CHECK-PWR8-NEXT:    li r5, 64
131; CHECK-PWR8-NEXT:    stvx v21, r1, r5 # 16-byte Folded Spill
132; CHECK-PWR8-NEXT:    #APP
133; CHECK-PWR8-NEXT:    add r3, r3, r4
134; CHECK-PWR8-NEXT:    #NO_APP
135; CHECK-PWR8-NEXT:    extsw r3, r3
136; CHECK-PWR8-NEXT:    bl callee
137; CHECK-PWR8-NEXT:    nop
138; CHECK-PWR8-NEXT:    li r4, 64
139; CHECK-PWR8-NEXT:    lvx v21, r1, r4 # 16-byte Folded Reload
140; CHECK-PWR8-NEXT:    li r4, 48
141; CHECK-PWR8-NEXT:    lvx v20, r1, r4 # 16-byte Folded Reload
142; CHECK-PWR8-NEXT:    addi r1, r1, 240
143; CHECK-PWR8-NEXT:    ld r0, 16(r1)
144; CHECK-PWR8-NEXT:    mtlr r0
145; CHECK-PWR8-NEXT:    blr
146;
147; CHECK-PWR9-LABEL: caller3:
148; CHECK-PWR9:       # %bb.0: # %entry
149; CHECK-PWR9-NEXT:    mflr r0
150; CHECK-PWR9-NEXT:    std r0, 16(r1)
151; CHECK-PWR9-NEXT:    stdu r1, -224(r1)
152; CHECK-PWR9-NEXT:    .cfi_def_cfa_offset 224
153; CHECK-PWR9-NEXT:    .cfi_offset lr, 16
154; CHECK-PWR9-NEXT:    .cfi_offset v20, -192
155; CHECK-PWR9-NEXT:    .cfi_offset v21, -176
156; CHECK-PWR9-NEXT:    stxv v20, 32(r1) # 16-byte Folded Spill
157; CHECK-PWR9-NEXT:    stxv v21, 48(r1) # 16-byte Folded Spill
158; CHECK-PWR9-NEXT:    #APP
159; CHECK-PWR9-NEXT:    add r3, r3, r4
160; CHECK-PWR9-NEXT:    #NO_APP
161; CHECK-PWR9-NEXT:    extsw r3, r3
162; CHECK-PWR9-NEXT:    bl callee
163; CHECK-PWR9-NEXT:    nop
164; CHECK-PWR9-NEXT:    lxv v21, 48(r1) # 16-byte Folded Reload
165; CHECK-PWR9-NEXT:    lxv v20, 32(r1) # 16-byte Folded Reload
166; CHECK-PWR9-NEXT:    addi r1, r1, 224
167; CHECK-PWR9-NEXT:    ld r0, 16(r1)
168; CHECK-PWR9-NEXT:    mtlr r0
169; CHECK-PWR9-NEXT:    blr
170entry:
171  %0 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{v20},~{v21}"(i32 %a, i32 %b)
172  %call = tail call signext i32 @callee(i32 signext %0)
173  ret i32 %call
174}
175
176define dso_local signext i32 @caller4(i32 signext %a, i32 signext %b) local_unnamed_addr {
177; CHECK-PWR8-LABEL: caller4:
178; CHECK-PWR8:       # %bb.0: # %entry
179; CHECK-PWR8-NEXT:    mflr r0
180; CHECK-PWR8-NEXT:    std r0, 16(r1)
181; CHECK-PWR8-NEXT:    stdu r1, -240(r1)
182; CHECK-PWR8-NEXT:    .cfi_def_cfa_offset 240
183; CHECK-PWR8-NEXT:    .cfi_offset lr, 16
184; CHECK-PWR8-NEXT:    .cfi_offset v20, -192
185; CHECK-PWR8-NEXT:    .cfi_offset v21, -176
186; CHECK-PWR8-NEXT:    li r5, 48
187; CHECK-PWR8-NEXT:    stvx v20, r1, r5 # 16-byte Folded Spill
188; CHECK-PWR8-NEXT:    li r5, 64
189; CHECK-PWR8-NEXT:    stvx v21, r1, r5 # 16-byte Folded Spill
190; CHECK-PWR8-NEXT:    #APP
191; CHECK-PWR8-NEXT:    add r3, r3, r4
192; CHECK-PWR8-NEXT:    #NO_APP
193; CHECK-PWR8-NEXT:    extsw r3, r3
194; CHECK-PWR8-NEXT:    bl callee
195; CHECK-PWR8-NEXT:    nop
196; CHECK-PWR8-NEXT:    li r4, 64
197; CHECK-PWR8-NEXT:    lvx v21, r1, r4 # 16-byte Folded Reload
198; CHECK-PWR8-NEXT:    li r4, 48
199; CHECK-PWR8-NEXT:    lvx v20, r1, r4 # 16-byte Folded Reload
200; CHECK-PWR8-NEXT:    addi r1, r1, 240
201; CHECK-PWR8-NEXT:    ld r0, 16(r1)
202; CHECK-PWR8-NEXT:    mtlr r0
203; CHECK-PWR8-NEXT:    blr
204;
205; CHECK-PWR9-LABEL: caller4:
206; CHECK-PWR9:       # %bb.0: # %entry
207; CHECK-PWR9-NEXT:    mflr r0
208; CHECK-PWR9-NEXT:    std r0, 16(r1)
209; CHECK-PWR9-NEXT:    stdu r1, -224(r1)
210; CHECK-PWR9-NEXT:    .cfi_def_cfa_offset 224
211; CHECK-PWR9-NEXT:    .cfi_offset lr, 16
212; CHECK-PWR9-NEXT:    .cfi_offset v20, -192
213; CHECK-PWR9-NEXT:    .cfi_offset v21, -176
214; CHECK-PWR9-NEXT:    stxv v20, 32(r1) # 16-byte Folded Spill
215; CHECK-PWR9-NEXT:    stxv v21, 48(r1) # 16-byte Folded Spill
216; CHECK-PWR9-NEXT:    #APP
217; CHECK-PWR9-NEXT:    add r3, r3, r4
218; CHECK-PWR9-NEXT:    #NO_APP
219; CHECK-PWR9-NEXT:    extsw r3, r3
220; CHECK-PWR9-NEXT:    bl callee
221; CHECK-PWR9-NEXT:    nop
222; CHECK-PWR9-NEXT:    lxv v21, 48(r1) # 16-byte Folded Reload
223; CHECK-PWR9-NEXT:    lxv v20, 32(r1) # 16-byte Folded Reload
224; CHECK-PWR9-NEXT:    addi r1, r1, 224
225; CHECK-PWR9-NEXT:    ld r0, 16(r1)
226; CHECK-PWR9-NEXT:    mtlr r0
227; CHECK-PWR9-NEXT:    blr
228entry:
229  %0 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{vs52},~{vs53}"(i32 %a, i32 %b)
230  %call = tail call signext i32 @callee(i32 signext %0)
231  ret i32 %call
232}
233
234define dso_local signext i32 @caller_mixed(i32 signext %a, i32 signext %b) local_unnamed_addr {
235; CHECK-PWR8-LABEL: caller_mixed:
236; CHECK-PWR8:       # %bb.0: # %entry
237; CHECK-PWR8-NEXT:    mflr r0
238; CHECK-PWR8-NEXT:    std r0, 16(r1)
239; CHECK-PWR8-NEXT:    stdu r1, -528(r1)
240; CHECK-PWR8-NEXT:    .cfi_def_cfa_offset 528
241; CHECK-PWR8-NEXT:    .cfi_offset lr, 16
242; CHECK-PWR8-NEXT:    .cfi_offset r14, -288
243; CHECK-PWR8-NEXT:    .cfi_offset f14, -144
244; CHECK-PWR8-NEXT:    .cfi_offset v20, -480
245; CHECK-PWR8-NEXT:    .cfi_offset v21, -464
246; CHECK-PWR8-NEXT:    li r5, 48
247; CHECK-PWR8-NEXT:    std r14, 240(r1) # 8-byte Folded Spill
248; CHECK-PWR8-NEXT:    stfd f14, 384(r1) # 8-byte Folded Spill
249; CHECK-PWR8-NEXT:    stvx v20, r1, r5 # 16-byte Folded Spill
250; CHECK-PWR8-NEXT:    li r5, 64
251; CHECK-PWR8-NEXT:    stvx v21, r1, r5 # 16-byte Folded Spill
252; CHECK-PWR8-NEXT:    #APP
253; CHECK-PWR8-NEXT:    add r3, r3, r4
254; CHECK-PWR8-NEXT:    #NO_APP
255; CHECK-PWR8-NEXT:    extsw r3, r3
256; CHECK-PWR8-NEXT:    bl callee
257; CHECK-PWR8-NEXT:    nop
258; CHECK-PWR8-NEXT:    li r4, 64
259; CHECK-PWR8-NEXT:    lfd f14, 384(r1) # 8-byte Folded Reload
260; CHECK-PWR8-NEXT:    ld r14, 240(r1) # 8-byte Folded Reload
261; CHECK-PWR8-NEXT:    lvx v21, r1, r4 # 16-byte Folded Reload
262; CHECK-PWR8-NEXT:    li r4, 48
263; CHECK-PWR8-NEXT:    lvx v20, r1, r4 # 16-byte Folded Reload
264; CHECK-PWR8-NEXT:    addi r1, r1, 528
265; CHECK-PWR8-NEXT:    ld r0, 16(r1)
266; CHECK-PWR8-NEXT:    mtlr r0
267; CHECK-PWR8-NEXT:    blr
268;
269; CHECK-PWR9-LABEL: caller_mixed:
270; CHECK-PWR9:       # %bb.0: # %entry
271; CHECK-PWR9-NEXT:    mflr r0
272; CHECK-PWR9-NEXT:    std r0, 16(r1)
273; CHECK-PWR9-NEXT:    stdu r1, -512(r1)
274; CHECK-PWR9-NEXT:    .cfi_def_cfa_offset 512
275; CHECK-PWR9-NEXT:    .cfi_offset lr, 16
276; CHECK-PWR9-NEXT:    .cfi_offset r14, -288
277; CHECK-PWR9-NEXT:    .cfi_offset f14, -144
278; CHECK-PWR9-NEXT:    .cfi_offset v20, -480
279; CHECK-PWR9-NEXT:    .cfi_offset v21, -464
280; CHECK-PWR9-NEXT:    std r14, 224(r1) # 8-byte Folded Spill
281; CHECK-PWR9-NEXT:    stfd f14, 368(r1) # 8-byte Folded Spill
282; CHECK-PWR9-NEXT:    stxv v20, 32(r1) # 16-byte Folded Spill
283; CHECK-PWR9-NEXT:    stxv v21, 48(r1) # 16-byte Folded Spill
284; CHECK-PWR9-NEXT:    #APP
285; CHECK-PWR9-NEXT:    add r3, r3, r4
286; CHECK-PWR9-NEXT:    #NO_APP
287; CHECK-PWR9-NEXT:    extsw r3, r3
288; CHECK-PWR9-NEXT:    bl callee
289; CHECK-PWR9-NEXT:    nop
290; CHECK-PWR9-NEXT:    lxv v21, 48(r1) # 16-byte Folded Reload
291; CHECK-PWR9-NEXT:    lxv v20, 32(r1) # 16-byte Folded Reload
292; CHECK-PWR9-NEXT:    lfd f14, 368(r1) # 8-byte Folded Reload
293; CHECK-PWR9-NEXT:    ld r14, 224(r1) # 8-byte Folded Reload
294; CHECK-PWR9-NEXT:    addi r1, r1, 512
295; CHECK-PWR9-NEXT:    ld r0, 16(r1)
296; CHECK-PWR9-NEXT:    mtlr r0
297; CHECK-PWR9-NEXT:    blr
298entry:
299  %0 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{r14},~{f14},~{v20},~{vs53}"(i32 %a, i32 %b)
300  %call = tail call signext i32 @callee(i32 signext %0)
301  ret i32 %call
302}
303
304
305