1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \
7; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8@glob = dso_local local_unnamed_addr global i64 0, align 8
9
10define dso_local signext i32 @test_igesll(i64 %a, i64 %b) {
11; CHECK-LABEL: test_igesll:
12; CHECK:       # %bb.0: # %entry
13; CHECK-NEXT:    sradi r5, r3, 63
14; CHECK-NEXT:    rldicl r6, r4, 1, 63
15; CHECK-NEXT:    subfc r3, r4, r3
16; CHECK-NEXT:    adde r3, r5, r6
17; CHECK-NEXT:    blr
18; CHECK-BE-LABEL: test_igesll:
19; CHECK-BE:       # %bb.0: # %entry
20; CHECK-BE-NEXT:    sradi r5, r3, 63
21; CHECK-BE-NEXT:    rldicl r6, r4, 1, 63
22; CHECK-BE-NEXT:    subc r3, r3, r4
23; CHECK-BE-NEXT:    adde r3, r5, r6
24; CHECK-BE-NEXT:    blr
25;
26; CHECK-LE-LABEL: test_igesll:
27; CHECK-LE:       # %bb.0: # %entry
28; CHECK-LE-NEXT:    sradi r5, r3, 63
29; CHECK-LE-NEXT:    rldicl r6, r4, 1, 63
30; CHECK-LE-NEXT:    subc r3, r3, r4
31; CHECK-LE-NEXT:    adde r3, r5, r6
32; CHECK-LE-NEXT:    blr
33entry:
34  %cmp = icmp sge i64 %a, %b
35  %conv = zext i1 %cmp to i32
36  ret i32 %conv
37}
38
39define dso_local signext i32 @test_igesll_sext(i64 %a, i64 %b) {
40; CHECK-LABEL: test_igesll_sext:
41; CHECK:       # %bb.0: # %entry
42; CHECK-NEXT:    sradi r5, r3, 63
43; CHECK-NEXT:    rldicl r6, r4, 1, 63
44; CHECK-NEXT:    subfc r3, r4, r3
45; CHECK-NEXT:    adde r3, r5, r6
46; CHECK-NEXT:    neg r3, r3
47; CHECK-NEXT:    blr
48; CHECK-BE-LABEL: test_igesll_sext:
49; CHECK-BE:       # %bb.0: # %entry
50; CHECK-BE-NEXT:    sradi r5, r3, 63
51; CHECK-BE-NEXT:    rldicl r6, r4, 1, 63
52; CHECK-BE-NEXT:    subc r3, r3, r4
53; CHECK-BE-NEXT:    adde r3, r5, r6
54; CHECK-BE-NEXT:    neg r3, r3
55; CHECK-BE-NEXT:    blr
56;
57; CHECK-LE-LABEL: test_igesll_sext:
58; CHECK-LE:       # %bb.0: # %entry
59; CHECK-LE-NEXT:    sradi r5, r3, 63
60; CHECK-LE-NEXT:    rldicl r6, r4, 1, 63
61; CHECK-LE-NEXT:    subc r3, r3, r4
62; CHECK-LE-NEXT:    adde r3, r5, r6
63; CHECK-LE-NEXT:    neg r3, r3
64; CHECK-LE-NEXT:    blr
65entry:
66  %cmp = icmp sge i64 %a, %b
67  %sub = sext i1 %cmp to i32
68  ret i32 %sub
69}
70
71define dso_local signext i32 @test_igesll_z(i64 %a) {
72; CHECK-LABEL: test_igesll_z:
73; CHECK:       # %bb.0: # %entry
74; CHECK-NEXT:    not r3, r3
75; CHECK-NEXT:    rldicl r3, r3, 1, 63
76; CHECK-NEXT:    blr
77; CHECK-BE-LABEL: test_igesll_z:
78; CHECK-BE:       # %bb.0: # %entry
79; CHECK-BE-NEXT:    not r3, r3
80; CHECK-BE-NEXT:    rldicl r3, r3, 1, 63
81; CHECK-BE-NEXT:    blr
82;
83; CHECK-LE-LABEL: test_igesll_z:
84; CHECK-LE:       # %bb.0: # %entry
85; CHECK-LE-NEXT:    not r3, r3
86; CHECK-LE-NEXT:    rldicl r3, r3, 1, 63
87; CHECK-LE-NEXT:    blr
88entry:
89  %cmp = icmp sgt i64 %a, -1
90  %conv = zext i1 %cmp to i32
91  ret i32 %conv
92}
93
94define dso_local signext i32 @test_igesll_sext_z(i64 %a) {
95; CHECK-LABEL: test_igesll_sext_z:
96; CHECK:       # %bb.0: # %entry
97; CHECK-NEXT:    sradi r3, r3, 63
98; CHECK-NEXT:    not r3, r3
99; CHECK-NEXT:    blr
100; CHECK-BE-LABEL: test_igesll_sext_z:
101; CHECK-BE:       # %bb.0: # %entry
102; CHECK-BE-NEXT:    not r3, r3
103; CHECK-BE-NEXT:    sradi r3, r3, 63
104; CHECK-BE-NEXT:    blr
105;
106; CHECK-LE-LABEL: test_igesll_sext_z:
107; CHECK-LE:       # %bb.0: # %entry
108; CHECK-LE-NEXT:    not r3, r3
109; CHECK-LE-NEXT:    sradi r3, r3, 63
110; CHECK-LE-NEXT:    blr
111entry:
112  %cmp = icmp sgt i64 %a, -1
113  %sub = sext i1 %cmp to i32
114  ret i32 %sub
115}
116
117define dso_local void @test_igesll_store(i64 %a, i64 %b) {
118; CHECK-LABEL: test_igesll_store:
119; CHECK:       # %bb.0: # %entry
120; CHECK-NEXT:    sradi r6, r3, 63
121; CHECK-NEXT:    addis r5, r2, glob@toc@ha
122; CHECK-NEXT:    subfc r3, r4, r3
123; CHECK-NEXT:    rldicl r3, r4, 1, 63
124; CHECK-NEXT:    adde r3, r6, r3
125; CHECK-NEXT:    std r3, glob@toc@l(r5)
126; CHECK-NEXT:    blr
127; CHECK-BE-LABEL: test_igesll_store:
128; CHECK-BE:       # %bb.0: # %entry
129; CHECK-BE-NEXT:    sradi r6, r3, 63
130; CHECK-BE-NEXT:    addis r5, r2, glob@toc@ha
131; CHECK-BE-NEXT:    subc r3, r3, r4
132; CHECK-BE-NEXT:    rldicl r3, r4, 1, 63
133; CHECK-BE-NEXT:    adde r3, r6, r3
134; CHECK-BE-NEXT:    std r3, glob@toc@l(r5)
135; CHECK-BE-NEXT:    blr
136;
137; CHECK-LE-LABEL: test_igesll_store:
138; CHECK-LE:       # %bb.0: # %entry
139; CHECK-LE-NEXT:    sradi r6, r3, 63
140; CHECK-LE-NEXT:    addis r5, r2, glob@toc@ha
141; CHECK-LE-NEXT:    subc r3, r3, r4
142; CHECK-LE-NEXT:    rldicl r3, r4, 1, 63
143; CHECK-LE-NEXT:    adde r3, r6, r3
144; CHECK-LE-NEXT:    std r3, glob@toc@l(r5)
145; CHECK-LE-NEXT:    blr
146entry:
147  %cmp = icmp sge i64 %a, %b
148  %conv1 = zext i1 %cmp to i64
149  store i64 %conv1, i64* @glob, align 8
150  ret void
151}
152
153define dso_local void @test_igesll_sext_store(i64 %a, i64 %b) {
154; CHECK-LABEL: test_igesll_sext_store:
155; CHECK:       # %bb.0: # %entry
156; CHECK-NEXT:    sradi r6, r3, 63
157; CHECK-NEXT:    addis r5, r2, glob@toc@ha
158; CHECK-NEXT:    subfc r3, r4, r3
159; CHECK-NEXT:    rldicl r3, r4, 1, 63
160; CHECK-NEXT:    adde r3, r6, r3
161; CHECK-NEXT:    neg r3, r3
162; CHECK-NEXT:    std r3, glob@toc@l(r5)
163; CHECK-NEXT:    blr
164; CHECK-BE-LABEL: test_igesll_sext_store:
165; CHECK-BE:       # %bb.0: # %entry
166; CHECK-BE-NEXT:    sradi r6, r3, 63
167; CHECK-BE-NEXT:    addis r5, r2, glob@toc@ha
168; CHECK-BE-NEXT:    subc r3, r3, r4
169; CHECK-BE-NEXT:    rldicl r3, r4, 1, 63
170; CHECK-BE-NEXT:    adde r3, r6, r3
171; CHECK-BE-NEXT:    neg r3, r3
172; CHECK-BE-NEXT:    std r3, glob@toc@l(r5)
173; CHECK-BE-NEXT:    blr
174;
175; CHECK-LE-LABEL: test_igesll_sext_store:
176; CHECK-LE:       # %bb.0: # %entry
177; CHECK-LE-NEXT:    sradi r6, r3, 63
178; CHECK-LE-NEXT:    addis r5, r2, glob@toc@ha
179; CHECK-LE-NEXT:    subc r3, r3, r4
180; CHECK-LE-NEXT:    rldicl r3, r4, 1, 63
181; CHECK-LE-NEXT:    adde r3, r6, r3
182; CHECK-LE-NEXT:    neg r3, r3
183; CHECK-LE-NEXT:    std r3, glob@toc@l(r5)
184; CHECK-LE-NEXT:    blr
185entry:
186  %cmp = icmp sge i64 %a, %b
187  %conv1 = sext i1 %cmp to i64
188  store i64 %conv1, i64* @glob, align 8
189  ret void
190}
191
192define dso_local void @test_igesll_z_store(i64 %a) {
193; CHECK-LABEL: test_igesll_z_store:
194; CHECK:       # %bb.0: # %entry
195; CHECK-NEXT:    not r3, r3
196; CHECK-NEXT:    addis r4, r2, glob@toc@ha
197; CHECK-NEXT:    rldicl r3, r3, 1, 63
198; CHECK-NEXT:    std r3, glob@toc@l(r4)
199; CHECK-NEXT:    blr
200; CHECK-BE-LABEL: test_igesll_z_store:
201; CHECK-BE:       # %bb.0: # %entry
202; CHECK-BE-NEXT:    not r3, r3
203; CHECK-BE-NEXT:    addis r4, r2, glob@toc@ha
204; CHECK-BE-NEXT:    rldicl r3, r3, 1, 63
205; CHECK-BE-NEXT:    std r3, glob@toc@l(r4)
206; CHECK-BE-NEXT:    blr
207;
208; CHECK-LE-LABEL: test_igesll_z_store:
209; CHECK-LE:       # %bb.0: # %entry
210; CHECK-LE-NEXT:    not r3, r3
211; CHECK-LE-NEXT:    addis r4, r2, glob@toc@ha
212; CHECK-LE-NEXT:    rldicl r3, r3, 1, 63
213; CHECK-LE-NEXT:    std r3, glob@toc@l(r4)
214; CHECK-LE-NEXT:    blr
215entry:
216  %cmp = icmp sgt i64 %a, -1
217  %conv1 = zext i1 %cmp to i64
218  store i64 %conv1, i64* @glob, align 8
219  ret void
220}
221
222define dso_local void @test_igesll_sext_z_store(i64 %a) {
223; CHECK-LABEL: test_igesll_sext_z_store:
224; CHECK:       # %bb.0: # %entry
225; CHECK-NEXT:    not r3, r3
226; CHECK-NEXT:    addis r4, r2, glob@toc@ha
227; CHECK-NEXT:    sradi r3, r3, 63
228; CHECK-NEXT:    std r3, glob@toc@l(r4)
229; CHECK-NEXT:    blr
230; CHECK-BE-LABEL: test_igesll_sext_z_store:
231; CHECK-BE:       # %bb.0: # %entry
232; CHECK-BE-NEXT:    not r3, r3
233; CHECK-BE-NEXT:    addis r4, r2, glob@toc@ha
234; CHECK-BE-NEXT:    sradi r3, r3, 63
235; CHECK-BE-NEXT:    std r3, glob@toc@l(r4)
236; CHECK-BE-NEXT:    blr
237;
238; CHECK-LE-LABEL: test_igesll_sext_z_store:
239; CHECK-LE:       # %bb.0: # %entry
240; CHECK-LE-NEXT:    not r3, r3
241; CHECK-LE-NEXT:    addis r4, r2, glob@toc@ha
242; CHECK-LE-NEXT:    sradi r3, r3, 63
243; CHECK-LE-NEXT:    std r3, glob@toc@l(r4)
244; CHECK-LE-NEXT:    blr
245entry:
246  %cmp = icmp sgt i64 %a, -1
247  %conv1 = sext i1 %cmp to i64
248  store i64 %conv1, i64* @glob, align 8
249  ret void
250}
251