1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \
4; RUN:   --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \
7; RUN:   --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8
9@glob = dso_local local_unnamed_addr global i16 0, align 2
10
11define i64 @test_llless(i16 signext %a, i16 signext %b)  {
12; CHECK-LABEL: test_llless:
13; CHECK:       # %bb.0: # %entry
14; CHECK-NEXT:    sub r3, r4, r3
15; CHECK-NEXT:    rldicl r3, r3, 1, 63
16; CHECK-NEXT:    xori r3, r3, 1
17; CHECK-NEXT:    blr
18; CHECK-BE-LABEL: test_llless:
19; CHECK-BE:       # %bb.0: # %entry
20; CHECK-BE-NEXT:    sub r3, r4, r3
21; CHECK-BE-NEXT:    rldicl r3, r3, 1, 63
22; CHECK-BE-NEXT:    xori r3, r3, 1
23; CHECK-BE-NEXT:    blr
24;
25; CHECK-LE-LABEL: test_llless:
26; CHECK-LE:       # %bb.0: # %entry
27; CHECK-LE-NEXT:    sub r3, r4, r3
28; CHECK-LE-NEXT:    rldicl r3, r3, 1, 63
29; CHECK-LE-NEXT:    xori r3, r3, 1
30; CHECK-LE-NEXT:    blr
31entry:
32  %cmp = icmp sle i16 %a, %b
33  %conv3 = zext i1 %cmp to i64
34  ret i64 %conv3
35}
36
37define i64 @test_llless_sext(i16 signext %a, i16 signext %b)  {
38; CHECK-LABEL: test_llless_sext:
39; CHECK:       # %bb.0: # %entry
40; CHECK-NEXT:    sub r3, r4, r3
41; CHECK-NEXT:    rldicl r3, r3, 1, 63
42; CHECK-NEXT:    addi r3, r3, -1
43; CHECK-NEXT:    blr
44; CHECK-BE-LABEL: test_llless_sext:
45; CHECK-BE:       # %bb.0: # %entry
46; CHECK-BE-NEXT:    sub r3, r4, r3
47; CHECK-BE-NEXT:    rldicl r3, r3, 1, 63
48; CHECK-BE-NEXT:    addi r3, r3, -1
49; CHECK-BE-NEXT:    blr
50;
51; CHECK-LE-LABEL: test_llless_sext:
52; CHECK-LE:       # %bb.0: # %entry
53; CHECK-LE-NEXT:    sub r3, r4, r3
54; CHECK-LE-NEXT:    rldicl r3, r3, 1, 63
55; CHECK-LE-NEXT:    addi r3, r3, -1
56; CHECK-LE-NEXT:    blr
57entry:
58  %cmp = icmp sle i16 %a, %b
59  %conv3 = sext i1 %cmp to i64
60  ret i64 %conv3
61}
62
63define dso_local void @test_llless_store(i16 signext %a, i16 signext %b) {
64; CHECK-LABEL: test_llless_store:
65; CHECK:       # %bb.0: # %entry
66; CHECK-NEXT:    sub r3, r4, r3
67; CHECK-NEXT:    addis r5, r2, glob@toc@ha
68; CHECK-NEXT:    rldicl r3, r3, 1, 63
69; CHECK-NEXT:    xori r3, r3, 1
70; CHECK-NEXT:    sth r3, glob@toc@l(r5)
71; CHECK-NEXT:    blr
72; CHECK-BE-LABEL: test_llless_store:
73; CHECK-BE:       # %bb.0: # %entry
74; CHECK-BE-NEXT:    sub r3, r4, r3
75; CHECK-BE-NEXT:    addis r5, r2, glob@toc@ha
76; CHECK-BE-NEXT:    rldicl r3, r3, 1, 63
77; CHECK-BE-NEXT:    xori r3, r3, 1
78; CHECK-BE-NEXT:    sth r3, glob@toc@l(r5)
79; CHECK-BE-NEXT:    blr
80;
81; CHECK-LE-LABEL: test_llless_store:
82; CHECK-LE:       # %bb.0: # %entry
83; CHECK-LE-NEXT:    sub r3, r4, r3
84; CHECK-LE-NEXT:    addis r5, r2, glob@toc@ha
85; CHECK-LE-NEXT:    rldicl r3, r3, 1, 63
86; CHECK-LE-NEXT:    xori r3, r3, 1
87; CHECK-LE-NEXT:    sth r3, glob@toc@l(r5)
88; CHECK-LE-NEXT:    blr
89entry:
90  %cmp = icmp sle i16 %a, %b
91  %conv3 = zext i1 %cmp to i16
92  store i16 %conv3, i16* @glob, align 2
93  ret void
94}
95
96define dso_local void @test_llless_sext_store(i16 signext %a, i16 signext %b) {
97; CHECK-LABEL: test_llless_sext_store:
98; CHECK:       # %bb.0: # %entry
99; CHECK-NEXT:    sub r3, r4, r3
100; CHECK-NEXT:    addis r5, r2, glob@toc@ha
101; CHECK-NEXT:    rldicl r3, r3, 1, 63
102; CHECK-NEXT:    addi r3, r3, -1
103; CHECK-NEXT:    sth r3, glob@toc@l(r5)
104; CHECK-NEXT:    blr
105; CHECK-BE-LABEL: test_llless_sext_store:
106; CHECK-BE:       # %bb.0: # %entry
107; CHECK-BE-NEXT:    sub r3, r4, r3
108; CHECK-BE-NEXT:    addis r5, r2, glob@toc@ha
109; CHECK-BE-NEXT:    rldicl r3, r3, 1, 63
110; CHECK-BE-NEXT:    addi r3, r3, -1
111; CHECK-BE-NEXT:    sth r3, glob@toc@l(r5)
112; CHECK-BE-NEXT:    blr
113;
114; CHECK-LE-LABEL: test_llless_sext_store:
115; CHECK-LE:       # %bb.0: # %entry
116; CHECK-LE-NEXT:    sub r3, r4, r3
117; CHECK-LE-NEXT:    addis r5, r2, glob@toc@ha
118; CHECK-LE-NEXT:    rldicl r3, r3, 1, 63
119; CHECK-LE-NEXT:    addi r3, r3, -1
120; CHECK-LE-NEXT:    sth r3, glob@toc@l(r5)
121; CHECK-LE-NEXT:    blr
122entry:
123  %cmp = icmp sle i16 %a, %b
124  %conv3 = sext i1 %cmp to i16
125  store i16 %conv3, i16* @glob, align 2
126  ret void
127}
128