1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
7; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8
9@glob = dso_local local_unnamed_addr global i8 0, align 1
10
11; Function Attrs: norecurse nounwind readnone
12define i64 @test_llleuc(i8 zeroext %a, i8 zeroext %b) {
13; CHECK-LABEL: test_llleuc:
14; CHECK:       # %bb.0: # %entry
15; CHECK-NEXT:    sub r3, r4, r3
16; CHECK-NEXT:    not r3, r3
17; CHECK-NEXT:    rldicl r3, r3, 1, 63
18; CHECK-NEXT:    blr
19entry:
20  %cmp = icmp ule i8 %a, %b
21  %conv3 = zext i1 %cmp to i64
22  ret i64 %conv3
23}
24
25; Function Attrs: norecurse nounwind readnone
26define i64 @test_llleuc_sext(i8 zeroext %a, i8 zeroext %b) {
27; CHECK-LABEL: test_llleuc_sext:
28; CHECK:       # %bb.0: # %entry
29; CHECK-NEXT:    sub r3, r4, r3
30; CHECK-NEXT:    rldicl r3, r3, 1, 63
31; CHECK-NEXT:    addi r3, r3, -1
32; CHECK-NEXT:    blr
33entry:
34  %cmp = icmp ule i8 %a, %b
35  %conv3 = sext i1 %cmp to i64
36  ret i64 %conv3
37}
38
39; Function Attrs: norecurse nounwind readnone
40define i64 @test_llleuc_z(i8 zeroext %a) {
41; CHECK-LABEL: test_llleuc_z:
42; CHECK:       # %bb.0: # %entry
43; CHECK-NEXT:    cntlzw r3, r3
44; CHECK-NEXT:    srwi r3, r3, 5
45; CHECK-NEXT:    blr
46entry:
47  %cmp = icmp ule i8 %a, 0
48  %conv2 = zext i1 %cmp to i64
49  ret i64 %conv2
50}
51
52; Function Attrs: norecurse nounwind readnone
53define i64 @test_llleuc_sext_z(i8 zeroext %a) {
54; CHECK-LABEL: test_llleuc_sext_z:
55; CHECK:       # %bb.0: # %entry
56; CHECK-NEXT:    cntlzw r3, r3
57; CHECK-NEXT:    srwi r3, r3, 5
58; CHECK-NEXT:    neg r3, r3
59; CHECK-NEXT:    blr
60entry:
61  %cmp = icmp ule i8 %a, 0
62  %conv2 = sext i1 %cmp to i64
63  ret i64 %conv2
64}
65
66; Function Attrs: norecurse nounwind
67define dso_local void @test_llleuc_store(i8 zeroext %a, i8 zeroext %b) {
68; CHECK-LABEL: test_llleuc_store:
69; CHECK:       # %bb.0: # %entry
70; CHECK-NEXT:    sub r3, r4, r3
71; CHECK-NEXT:    addis r5, r2, glob@toc@ha
72; CHECK-NEXT:    not r3, r3
73; CHECK-NEXT:    rldicl r3, r3, 1, 63
74; CHECK-NEXT:    stb r3, glob@toc@l(r5)
75; CHECK-NEXT:    blr
76entry:
77  %cmp = icmp ule i8 %a, %b
78  %conv3 = zext i1 %cmp to i8
79  store i8 %conv3, i8* @glob
80  ret void
81}
82
83; Function Attrs: norecurse nounwind
84define dso_local void @test_llleuc_sext_store(i8 zeroext %a, i8 zeroext %b) {
85; CHECK-LABEL: test_llleuc_sext_store:
86; CHECK:       # %bb.0: # %entry
87; CHECK-NEXT:    sub r3, r4, r3
88; CHECK-NEXT:    addis r5, r2, glob@toc@ha
89; CHECK-NEXT:    rldicl r3, r3, 1, 63
90; CHECK-NEXT:    addi r3, r3, -1
91; CHECK-NEXT:    stb r3, glob@toc@l(r5)
92; CHECK-NEXT:    blr
93entry:
94  %cmp = icmp ule i8 %a, %b
95  %conv3 = sext i1 %cmp to i8
96  store i8 %conv3, i8* @glob
97  ret void
98}
99
100; Function Attrs: norecurse nounwind
101define dso_local void @test_llleuc_z_store(i8 zeroext %a) {
102; CHECK-LABEL: test_llleuc_z_store:
103; CHECK:       # %bb.0: # %entry
104; CHECK-NEXT:    cntlzw r3, r3
105; CHECK-NEXT:    addis r4, r2, glob@toc@ha
106; CHECK-NEXT:    srwi r3, r3, 5
107; CHECK-NEXT:    stb r3, glob@toc@l(r4)
108; CHECK-NEXT:    blr
109entry:
110  %cmp = icmp ule i8 %a, 0
111  %conv2 = zext i1 %cmp to i8
112  store i8 %conv2, i8* @glob
113  ret void
114}
115
116; Function Attrs: norecurse nounwind
117define dso_local void @test_llleuc_sext_z_store(i8 zeroext %a) {
118; CHECK-LABEL: test_llleuc_sext_z_store:
119; CHECK:       # %bb.0: # %entry
120; CHECK-NEXT:    cntlzw r3, r3
121; CHECK-NEXT:    addis r4, r2, glob@toc@ha
122; CHECK-NEXT:    srwi r3, r3, 5
123; CHECK-NEXT:    neg r3, r3
124; CHECK-NEXT:    stb r3, glob@toc@l(r4)
125; CHECK-NEXT:    blr
126entry:
127  %cmp = icmp ule i8 %a, 0
128  %conv2 = sext i1 %cmp to i8
129  store i8 %conv2, i8* @glob
130  ret void
131}
132