1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK2
5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK4
8
9 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
11 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
14
15 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK8
16 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
17 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9
18 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK10
19 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11
21
22 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
23 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
25 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
26 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
28 // expected-no-diagnostics
29 #ifndef HEADER
30 #define HEADER
31
32 template <class T>
33 struct S {
34 T f;
SS35 S(T a) : f(a) {}
SS36 S() : f() {}
operator TS37 operator T() { return T(); }
~SS38 ~S() {}
39 };
40
41 template <typename T>
tmain()42 T tmain() {
43 S<T> test;
44 T t_var = T();
45 T vec[] = {1, 2};
46 S<T> s_arr[] = {1, 2};
47 S<T> &var = test;
48 #pragma omp target
49 #pragma omp teams
50 #pragma omp distribute parallel for firstprivate(t_var, vec, s_arr, s_arr, var, var)
51 for (int i = 0; i < 2; ++i) {
52 vec[i] = t_var;
53 s_arr[i] = var;
54 }
55 return T();
56 }
57
main()58 int main() {
59 static int svar;
60 volatile double g;
61 volatile double &g1 = g;
62
63 #ifdef LAMBDA
64 [&]() {
65 static float sfvar;
66
67 #pragma omp target
68 #pragma omp teams
69 #pragma omp distribute parallel for firstprivate(g, g1, svar, sfvar)
70 for (int i = 0; i < 2; ++i) {
71
72 // addr alloca's
73
74 // private alloca's
75
76 // transfer input parameters into addr alloca's
77
78
79 // init private alloca's with addr alloca's
80 // g
81
82 // g1
83
84 // svar
85
86 // sfvar
87
88 // pass firstprivate parameters to parallel outlined function
89 // g
90
91 // g1
92
93 // svar
94
95 // sfvar
96
97
98
99 // skip initial params
100
101 // addr alloca's
102
103 // private alloca's (only for 32-bit)
104
105 // transfer input parameters into addr alloca's
106
107 // prepare parameters for lambda
108 // g
109
110 // g1
111
112 // svar
113
114 // sfvar
115
116 g = 1;
117 g1 = 1;
118 svar = 3;
119 sfvar = 4.0;
120
121 // pass params to inner lambda
122 [&]() {
123 g = 2;
124 g1 = 2;
125 svar = 4;
126 sfvar = 8.0;
127
128 }();
129 }
130 }();
131 return 0;
132 #else
133 S<float> test;
134 int t_var = 0;
135 int vec[] = {1, 2};
136 S<float> s_arr[] = {1, 2};
137 S<float> &var = test;
138
139 #pragma omp target
140 #pragma omp teams
141 #pragma omp distribute parallel for firstprivate(t_var, vec, s_arr, s_arr, var, var, svar)
142 for (int i = 0; i < 2; ++i) {
143 vec[i] = t_var;
144 s_arr[i] = var;
145 }
146 return tmain<int>();
147 #endif
148 }
149
150
151
152
153 // addr alloca's
154
155 // skip loop alloca's
156
157 // private alloca's
158
159
160 // init addr alloca's with input values
161
162 // init private alloca's with addr alloca's
163 // t-var
164
165 // vec
166
167 // s_arr
168
169 // var
170
171 // svar
172
173 // pass private alloca's to fork
174 // not dag to distinguish with S_VAR_CAST
175
176 // call destructors: var..
177
178 // ..and s_arr
179
180
181 // By OpenMP specifications, 'firstprivate' applies to both distribute and parallel for.
182 // However, the support for 'firstprivate' of 'parallel' is only used when 'parallel'
183 // is found alone. Therefore we only have one 'firstprivate' support for 'parallel for'
184 // in combination
185
186 // addr alloca's
187
188 // skip loop alloca's
189
190 // private alloca's
191
192
193 // init addr alloca's with input values
194
195 // init private alloca's with addr alloca's
196 // vec
197
198 // s_arr
199
200 // var
201
202
203 // call destructors: var..
204
205 // ..and s_arr
206
207
208 // template tmain with S_INT_TY
209
210
211
212 // addr alloca's
213
214 // skip loop alloca's
215
216 // private alloca's
217
218
219 // init addr alloca's with input values
220
221 // init private alloca's with addr alloca's
222 // t-var
223
224 // vec
225
226 // s_arr
227
228 // var
229
230 // pass private alloca's to fork
231 // not dag to distinguish with S_VAR_CAST
232
233 // call destructors: var..
234
235 // ..and s_arr
236
237
238 // By OpenMP specifications, 'firstprivate' applies to both distribute and parallel for.
239 // However, the support for 'firstprivate' of 'parallel' is only used when 'parallel'
240 // is found alone. Therefore we only have one 'firstprivate' support for 'parallel for'
241 // in combination
242
243 // addr alloca's
244
245 // skip loop alloca's
246
247 // private alloca's
248
249
250 // init addr alloca's with input values
251
252 // init private alloca's with addr alloca's
253 // vec
254
255 // s_arr
256
257 // var
258
259
260 // call destructors: var..
261
262 // ..and s_arr
263
264
265 #endif
266 // CHECK1-LABEL: define {{[^@]+}}@main
267 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
268 // CHECK1-NEXT: entry:
269 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
270 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8
271 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8
272 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
273 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
274 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8
275 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
276 // CHECK1-NEXT: store double* [[G]], double** [[TMP0]], align 8
277 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
278 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8
279 // CHECK1-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8
280 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]])
281 // CHECK1-NEXT: ret i32 0
282 //
283 //
284 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67
285 // CHECK1-SAME: (i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
286 // CHECK1-NEXT: entry:
287 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
288 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
289 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
290 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
291 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
292 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8
293 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8
294 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
295 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
296 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
297 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
298 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
299 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
300 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8
301 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
302 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]])
303 // CHECK1-NEXT: ret void
304 //
305 //
306 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
307 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
308 // CHECK1-NEXT: entry:
309 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
310 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
311 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8
312 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8
313 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
314 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8
315 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
316 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8
317 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
318 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
319 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
320 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
321 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
322 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
323 // CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8
324 // CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8
325 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca double*, align 8
326 // CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
327 // CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
328 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
329 // CHECK1-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8
330 // CHECK1-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8
331 // CHECK1-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
332 // CHECK1-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8
333 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
334 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
335 // CHECK1-NEXT: store double* [[G]], double** [[G_ADDR]], align 8
336 // CHECK1-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8
337 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
338 // CHECK1-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8
339 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8
340 // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8
341 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
342 // CHECK1-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8
343 // CHECK1-NEXT: store double* [[TMP1]], double** [[TMP]], align 8
344 // CHECK1-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8
345 // CHECK1-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8
346 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
347 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
348 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
349 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
350 // CHECK1-NEXT: [[TMP5:%.*]] = load double, double* [[TMP0]], align 8
351 // CHECK1-NEXT: store double [[TMP5]], double* [[G3]], align 8
352 // CHECK1-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 8
353 // CHECK1-NEXT: [[TMP7:%.*]] = load double, double* [[TMP6]], align 8
354 // CHECK1-NEXT: store double [[TMP7]], double* [[G14]], align 8
355 // CHECK1-NEXT: store double* [[G14]], double** [[_TMP5]], align 8
356 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4
357 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4
358 // CHECK1-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4
359 // CHECK1-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4
360 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
361 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
362 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
363 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
364 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1
365 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
366 // CHECK1: cond.true:
367 // CHECK1-NEXT: br label [[COND_END:%.*]]
368 // CHECK1: cond.false:
369 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
370 // CHECK1-NEXT: br label [[COND_END]]
371 // CHECK1: cond.end:
372 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
373 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
374 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
375 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
376 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
377 // CHECK1: omp.inner.for.cond:
378 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
379 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
380 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
381 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
382 // CHECK1: omp.inner.for.body:
383 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
384 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
385 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
386 // CHECK1-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
387 // CHECK1-NEXT: [[TMP21:%.*]] = load double, double* [[G3]], align 8
388 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_CASTED]] to double*
389 // CHECK1-NEXT: store double [[TMP21]], double* [[CONV]], align 8
390 // CHECK1-NEXT: [[TMP22:%.*]] = load i64, i64* [[G_CASTED]], align 8
391 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP5]], align 8
392 // CHECK1-NEXT: [[TMP24:%.*]] = load volatile double, double* [[TMP23]], align 8
393 // CHECK1-NEXT: [[CONV9:%.*]] = bitcast i64* [[G1_CASTED]] to double*
394 // CHECK1-NEXT: store double [[TMP24]], double* [[CONV9]], align 8
395 // CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[G1_CASTED]], align 8
396 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[SVAR6]], align 4
397 // CHECK1-NEXT: [[CONV10:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
398 // CHECK1-NEXT: store i32 [[TMP26]], i32* [[CONV10]], align 4
399 // CHECK1-NEXT: [[TMP27:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
400 // CHECK1-NEXT: [[TMP28:%.*]] = load float, float* [[SFVAR7]], align 4
401 // CHECK1-NEXT: [[CONV11:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float*
402 // CHECK1-NEXT: store float [[TMP28]], float* [[CONV11]], align 4
403 // CHECK1-NEXT: [[TMP29:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8
404 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP22]], i64 [[TMP25]], i64 [[TMP27]], i64 [[TMP29]])
405 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
406 // CHECK1: omp.inner.for.inc:
407 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
408 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
409 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
410 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
411 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
412 // CHECK1: omp.inner.for.end:
413 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
414 // CHECK1: omp.loop.exit:
415 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]])
416 // CHECK1-NEXT: ret void
417 //
418 //
419 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
420 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2]] {
421 // CHECK1-NEXT: entry:
422 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
423 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
424 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
425 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
426 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
427 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
428 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
429 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
430 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
431 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
432 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
433 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
434 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
435 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
436 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
437 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
438 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
439 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
440 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
441 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
442 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
443 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8
444 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8
445 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
446 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
447 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
448 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
449 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
450 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
451 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8
452 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
453 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
454 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
455 // CHECK1-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP0]] to i32
456 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
457 // CHECK1-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP1]] to i32
458 // CHECK1-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
459 // CHECK1-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
460 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
461 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
462 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
463 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
464 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
465 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
466 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
467 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
468 // CHECK1: cond.true:
469 // CHECK1-NEXT: br label [[COND_END:%.*]]
470 // CHECK1: cond.false:
471 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
472 // CHECK1-NEXT: br label [[COND_END]]
473 // CHECK1: cond.end:
474 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
475 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
476 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
477 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
478 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
479 // CHECK1: omp.inner.for.cond:
480 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
481 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
482 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
483 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
484 // CHECK1: omp.inner.for.body:
485 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
486 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
487 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
488 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
489 // CHECK1-NEXT: store double 1.000000e+00, double* [[CONV]], align 8
490 // CHECK1-NEXT: [[TMP10:%.*]] = load double*, double** [[TMP]], align 8
491 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 8
492 // CHECK1-NEXT: store i32 3, i32* [[CONV2]], align 8
493 // CHECK1-NEXT: store float 4.000000e+00, float* [[CONV3]], align 8
494 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
495 // CHECK1-NEXT: store double* [[CONV]], double** [[TMP11]], align 8
496 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
497 // CHECK1-NEXT: [[TMP13:%.*]] = load double*, double** [[TMP]], align 8
498 // CHECK1-NEXT: store double* [[TMP13]], double** [[TMP12]], align 8
499 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
500 // CHECK1-NEXT: store i32* [[CONV2]], i32** [[TMP14]], align 8
501 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
502 // CHECK1-NEXT: store float* [[CONV3]], float** [[TMP15]], align 8
503 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]])
504 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
505 // CHECK1: omp.body.continue:
506 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
507 // CHECK1: omp.inner.for.inc:
508 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
509 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP16]], 1
510 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
511 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
512 // CHECK1: omp.inner.for.end:
513 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
514 // CHECK1: omp.loop.exit:
515 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
516 // CHECK1-NEXT: ret void
517 //
518 //
519 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
520 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
521 // CHECK1-NEXT: entry:
522 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
523 // CHECK1-NEXT: ret void
524 //
525 //
526 // CHECK2-LABEL: define {{[^@]+}}@main
527 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
528 // CHECK2-NEXT: entry:
529 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
530 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8
531 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8
532 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
533 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4
534 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8
535 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
536 // CHECK2-NEXT: store double* [[G]], double** [[TMP0]], align 8
537 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
538 // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8
539 // CHECK2-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8
540 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]])
541 // CHECK2-NEXT: ret i32 0
542 //
543 //
544 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67
545 // CHECK2-SAME: (i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
546 // CHECK2-NEXT: entry:
547 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
548 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
549 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
550 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
551 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8
552 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8
553 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8
554 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
555 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
556 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
557 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
558 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
559 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
560 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8
561 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
562 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]])
563 // CHECK2-NEXT: ret void
564 //
565 //
566 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
567 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
568 // CHECK2-NEXT: entry:
569 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
570 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
571 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8
572 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8
573 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
574 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8
575 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8
576 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8
577 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
578 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
579 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
580 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
581 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
582 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
583 // CHECK2-NEXT: [[G3:%.*]] = alloca double, align 8
584 // CHECK2-NEXT: [[G14:%.*]] = alloca double, align 8
585 // CHECK2-NEXT: [[_TMP5:%.*]] = alloca double*, align 8
586 // CHECK2-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
587 // CHECK2-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
588 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
589 // CHECK2-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8
590 // CHECK2-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8
591 // CHECK2-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
592 // CHECK2-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8
593 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
594 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
595 // CHECK2-NEXT: store double* [[G]], double** [[G_ADDR]], align 8
596 // CHECK2-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8
597 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
598 // CHECK2-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8
599 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8
600 // CHECK2-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8
601 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
602 // CHECK2-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8
603 // CHECK2-NEXT: store double* [[TMP1]], double** [[TMP]], align 8
604 // CHECK2-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8
605 // CHECK2-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8
606 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
607 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
608 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
609 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
610 // CHECK2-NEXT: [[TMP5:%.*]] = load double, double* [[TMP0]], align 8
611 // CHECK2-NEXT: store double [[TMP5]], double* [[G3]], align 8
612 // CHECK2-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 8
613 // CHECK2-NEXT: [[TMP7:%.*]] = load double, double* [[TMP6]], align 8
614 // CHECK2-NEXT: store double [[TMP7]], double* [[G14]], align 8
615 // CHECK2-NEXT: store double* [[G14]], double** [[_TMP5]], align 8
616 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4
617 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4
618 // CHECK2-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4
619 // CHECK2-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4
620 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
621 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
622 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
623 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
624 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1
625 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
626 // CHECK2: cond.true:
627 // CHECK2-NEXT: br label [[COND_END:%.*]]
628 // CHECK2: cond.false:
629 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
630 // CHECK2-NEXT: br label [[COND_END]]
631 // CHECK2: cond.end:
632 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
633 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
634 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
635 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
636 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
637 // CHECK2: omp.inner.for.cond:
638 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
639 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
640 // CHECK2-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
641 // CHECK2-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
642 // CHECK2: omp.inner.for.body:
643 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
644 // CHECK2-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
645 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
646 // CHECK2-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
647 // CHECK2-NEXT: [[TMP21:%.*]] = load double, double* [[G3]], align 8
648 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_CASTED]] to double*
649 // CHECK2-NEXT: store double [[TMP21]], double* [[CONV]], align 8
650 // CHECK2-NEXT: [[TMP22:%.*]] = load i64, i64* [[G_CASTED]], align 8
651 // CHECK2-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP5]], align 8
652 // CHECK2-NEXT: [[TMP24:%.*]] = load volatile double, double* [[TMP23]], align 8
653 // CHECK2-NEXT: [[CONV9:%.*]] = bitcast i64* [[G1_CASTED]] to double*
654 // CHECK2-NEXT: store double [[TMP24]], double* [[CONV9]], align 8
655 // CHECK2-NEXT: [[TMP25:%.*]] = load i64, i64* [[G1_CASTED]], align 8
656 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[SVAR6]], align 4
657 // CHECK2-NEXT: [[CONV10:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
658 // CHECK2-NEXT: store i32 [[TMP26]], i32* [[CONV10]], align 4
659 // CHECK2-NEXT: [[TMP27:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
660 // CHECK2-NEXT: [[TMP28:%.*]] = load float, float* [[SFVAR7]], align 4
661 // CHECK2-NEXT: [[CONV11:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float*
662 // CHECK2-NEXT: store float [[TMP28]], float* [[CONV11]], align 4
663 // CHECK2-NEXT: [[TMP29:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8
664 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP22]], i64 [[TMP25]], i64 [[TMP27]], i64 [[TMP29]])
665 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
666 // CHECK2: omp.inner.for.inc:
667 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
668 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
669 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
670 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
671 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
672 // CHECK2: omp.inner.for.end:
673 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
674 // CHECK2: omp.loop.exit:
675 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]])
676 // CHECK2-NEXT: ret void
677 //
678 //
679 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
680 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2]] {
681 // CHECK2-NEXT: entry:
682 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
683 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
684 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
685 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
686 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
687 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
688 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
689 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
690 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8
691 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
692 // CHECK2-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
693 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
694 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
695 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
696 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
697 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
698 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
699 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
700 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
701 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
702 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
703 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8
704 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8
705 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
706 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
707 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
708 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
709 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
710 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
711 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8
712 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
713 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
714 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
715 // CHECK2-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP0]] to i32
716 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
717 // CHECK2-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP1]] to i32
718 // CHECK2-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
719 // CHECK2-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
720 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
721 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
722 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
723 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
724 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
725 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
726 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
727 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
728 // CHECK2: cond.true:
729 // CHECK2-NEXT: br label [[COND_END:%.*]]
730 // CHECK2: cond.false:
731 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
732 // CHECK2-NEXT: br label [[COND_END]]
733 // CHECK2: cond.end:
734 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
735 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
736 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
737 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
738 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
739 // CHECK2: omp.inner.for.cond:
740 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
741 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
742 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
743 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
744 // CHECK2: omp.inner.for.body:
745 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
746 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
747 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
748 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
749 // CHECK2-NEXT: store double 1.000000e+00, double* [[CONV]], align 8
750 // CHECK2-NEXT: [[TMP10:%.*]] = load double*, double** [[TMP]], align 8
751 // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 8
752 // CHECK2-NEXT: store i32 3, i32* [[CONV2]], align 8
753 // CHECK2-NEXT: store float 4.000000e+00, float* [[CONV3]], align 8
754 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
755 // CHECK2-NEXT: store double* [[CONV]], double** [[TMP11]], align 8
756 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
757 // CHECK2-NEXT: [[TMP13:%.*]] = load double*, double** [[TMP]], align 8
758 // CHECK2-NEXT: store double* [[TMP13]], double** [[TMP12]], align 8
759 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
760 // CHECK2-NEXT: store i32* [[CONV2]], i32** [[TMP14]], align 8
761 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
762 // CHECK2-NEXT: store float* [[CONV3]], float** [[TMP15]], align 8
763 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]])
764 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
765 // CHECK2: omp.body.continue:
766 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
767 // CHECK2: omp.inner.for.inc:
768 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
769 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP16]], 1
770 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
771 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
772 // CHECK2: omp.inner.for.end:
773 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
774 // CHECK2: omp.loop.exit:
775 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
776 // CHECK2-NEXT: ret void
777 //
778 //
779 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
780 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] {
781 // CHECK2-NEXT: entry:
782 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
783 // CHECK2-NEXT: ret void
784 //
785 //
786 // CHECK3-LABEL: define {{[^@]+}}@main
787 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
788 // CHECK3-NEXT: entry:
789 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
790 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8
791 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4
792 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
793 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
794 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4
795 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
796 // CHECK3-NEXT: store double* [[G]], double** [[TMP0]], align 4
797 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
798 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4
799 // CHECK3-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4
800 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]])
801 // CHECK3-NEXT: ret i32 0
802 //
803 //
804 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67
805 // CHECK3-SAME: (double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
806 // CHECK3-NEXT: entry:
807 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
808 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
809 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
810 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
811 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
812 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8
813 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8
814 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4
815 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
816 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
817 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
818 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
819 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
820 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
821 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
822 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
823 // CHECK3-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8
824 // CHECK3-NEXT: store double [[TMP2]], double* [[G2]], align 8
825 // CHECK3-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4
826 // CHECK3-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4
827 // CHECK3-NEXT: store double [[TMP4]], double* [[G13]], align 8
828 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4
829 // CHECK3-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4
830 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]])
831 // CHECK3-NEXT: ret void
832 //
833 //
834 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
835 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
836 // CHECK3-NEXT: entry:
837 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
838 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
839 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
840 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
841 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
842 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4
843 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
844 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4
845 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
846 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
847 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
848 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
849 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
850 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
851 // CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8
852 // CHECK3-NEXT: [[G14:%.*]] = alloca double, align 8
853 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca double*, align 4
854 // CHECK3-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
855 // CHECK3-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
856 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
857 // CHECK3-NEXT: [[G1_CASTED:%.*]] = alloca i32, align 4
858 // CHECK3-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
859 // CHECK3-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4
860 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
861 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
862 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
863 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
864 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
865 // CHECK3-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4
866 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
867 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
868 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
869 // CHECK3-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4
870 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
871 // CHECK3-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4
872 // CHECK3-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4
873 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
874 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
875 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
876 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
877 // CHECK3-NEXT: [[TMP5:%.*]] = load double, double* [[TMP0]], align 8
878 // CHECK3-NEXT: store double [[TMP5]], double* [[G3]], align 8
879 // CHECK3-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 4
880 // CHECK3-NEXT: [[TMP7:%.*]] = load double, double* [[TMP6]], align 4
881 // CHECK3-NEXT: store double [[TMP7]], double* [[G14]], align 8
882 // CHECK3-NEXT: store double* [[G14]], double** [[_TMP5]], align 4
883 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4
884 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4
885 // CHECK3-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4
886 // CHECK3-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4
887 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
888 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
889 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
890 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
891 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1
892 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
893 // CHECK3: cond.true:
894 // CHECK3-NEXT: br label [[COND_END:%.*]]
895 // CHECK3: cond.false:
896 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
897 // CHECK3-NEXT: br label [[COND_END]]
898 // CHECK3: cond.end:
899 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
900 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
901 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
902 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
903 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
904 // CHECK3: omp.inner.for.cond:
905 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
906 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
907 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
908 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
909 // CHECK3: omp.inner.for.body:
910 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
911 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
912 // CHECK3-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 4
913 // CHECK3-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 4
914 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[G1_CASTED]] to double*
915 // CHECK3-NEXT: store double [[TMP20]], double* [[CONV]], align 4
916 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[G1_CASTED]], align 4
917 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[SVAR6]], align 4
918 // CHECK3-NEXT: store i32 [[TMP22]], i32* [[SVAR_CASTED]], align 4
919 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
920 // CHECK3-NEXT: [[TMP24:%.*]] = load float, float* [[SFVAR7]], align 4
921 // CHECK3-NEXT: [[CONV9:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float*
922 // CHECK3-NEXT: store float [[TMP24]], float* [[CONV9]], align 4
923 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4
924 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, double*, i32, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], double* [[G3]], i32 [[TMP21]], i32 [[TMP23]], i32 [[TMP25]])
925 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
926 // CHECK3: omp.inner.for.inc:
927 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
928 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
929 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
930 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
931 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
932 // CHECK3: omp.inner.for.end:
933 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
934 // CHECK3: omp.loop.exit:
935 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]])
936 // CHECK3-NEXT: ret void
937 //
938 //
939 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
940 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], i32 [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2]] {
941 // CHECK3-NEXT: entry:
942 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
943 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
944 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
945 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
946 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
947 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca i32, align 4
948 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
949 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
950 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
951 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
952 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
953 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
954 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
955 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
956 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
957 // CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8
958 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
959 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
960 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
961 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
962 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
963 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
964 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
965 // CHECK3-NEXT: store i32 [[G1]], i32* [[G1_ADDR]], align 4
966 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
967 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
968 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
969 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[G1_ADDR]] to double*
970 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
971 // CHECK3-NEXT: store double* [[CONV]], double** [[TMP]], align 4
972 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
973 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
974 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
975 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
976 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
977 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
978 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
979 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
980 // CHECK3-NEXT: [[TMP3:%.*]] = load double, double* [[TMP0]], align 8
981 // CHECK3-NEXT: store double [[TMP3]], double* [[G3]], align 8
982 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
983 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
984 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
985 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
986 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
987 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
988 // CHECK3: cond.true:
989 // CHECK3-NEXT: br label [[COND_END:%.*]]
990 // CHECK3: cond.false:
991 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
992 // CHECK3-NEXT: br label [[COND_END]]
993 // CHECK3: cond.end:
994 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
995 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
996 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
997 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
998 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
999 // CHECK3: omp.inner.for.cond:
1000 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1001 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1002 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1003 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1004 // CHECK3: omp.inner.for.body:
1005 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1006 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1007 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1008 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1009 // CHECK3-NEXT: store double 1.000000e+00, double* [[G3]], align 8
1010 // CHECK3-NEXT: [[TMP12:%.*]] = load double*, double** [[TMP]], align 4
1011 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP12]], align 4
1012 // CHECK3-NEXT: store i32 3, i32* [[SVAR_ADDR]], align 4
1013 // CHECK3-NEXT: store float 4.000000e+00, float* [[CONV1]], align 4
1014 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
1015 // CHECK3-NEXT: store double* [[G3]], double** [[TMP13]], align 4
1016 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
1017 // CHECK3-NEXT: [[TMP15:%.*]] = load double*, double** [[TMP]], align 4
1018 // CHECK3-NEXT: store double* [[TMP15]], double** [[TMP14]], align 4
1019 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
1020 // CHECK3-NEXT: store i32* [[SVAR_ADDR]], i32** [[TMP16]], align 4
1021 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
1022 // CHECK3-NEXT: store float* [[CONV1]], float** [[TMP17]], align 4
1023 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]])
1024 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1025 // CHECK3: omp.body.continue:
1026 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1027 // CHECK3: omp.inner.for.inc:
1028 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1029 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP18]], 1
1030 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
1031 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1032 // CHECK3: omp.inner.for.end:
1033 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1034 // CHECK3: omp.loop.exit:
1035 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
1036 // CHECK3-NEXT: ret void
1037 //
1038 //
1039 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1040 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
1041 // CHECK3-NEXT: entry:
1042 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
1043 // CHECK3-NEXT: ret void
1044 //
1045 //
1046 // CHECK4-LABEL: define {{[^@]+}}@main
1047 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
1048 // CHECK4-NEXT: entry:
1049 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1050 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8
1051 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4
1052 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
1053 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4
1054 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4
1055 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
1056 // CHECK4-NEXT: store double* [[G]], double** [[TMP0]], align 4
1057 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
1058 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4
1059 // CHECK4-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4
1060 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]])
1061 // CHECK4-NEXT: ret i32 0
1062 //
1063 //
1064 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67
1065 // CHECK4-SAME: (double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
1066 // CHECK4-NEXT: entry:
1067 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
1068 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
1069 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
1070 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
1071 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4
1072 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8
1073 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8
1074 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4
1075 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
1076 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
1077 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
1078 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
1079 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
1080 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
1081 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
1082 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
1083 // CHECK4-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8
1084 // CHECK4-NEXT: store double [[TMP2]], double* [[G2]], align 8
1085 // CHECK4-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4
1086 // CHECK4-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4
1087 // CHECK4-NEXT: store double [[TMP4]], double* [[G13]], align 8
1088 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4
1089 // CHECK4-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4
1090 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]])
1091 // CHECK4-NEXT: ret void
1092 //
1093 //
1094 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
1095 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
1096 // CHECK4-NEXT: entry:
1097 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1098 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1099 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
1100 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
1101 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
1102 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4
1103 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4
1104 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4
1105 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1106 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1107 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1108 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1109 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1110 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1111 // CHECK4-NEXT: [[G3:%.*]] = alloca double, align 8
1112 // CHECK4-NEXT: [[G14:%.*]] = alloca double, align 8
1113 // CHECK4-NEXT: [[_TMP5:%.*]] = alloca double*, align 4
1114 // CHECK4-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
1115 // CHECK4-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
1116 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1117 // CHECK4-NEXT: [[G1_CASTED:%.*]] = alloca i32, align 4
1118 // CHECK4-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
1119 // CHECK4-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4
1120 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1121 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1122 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
1123 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
1124 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
1125 // CHECK4-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4
1126 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
1127 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
1128 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
1129 // CHECK4-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4
1130 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
1131 // CHECK4-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4
1132 // CHECK4-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4
1133 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1134 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1135 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1136 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1137 // CHECK4-NEXT: [[TMP5:%.*]] = load double, double* [[TMP0]], align 8
1138 // CHECK4-NEXT: store double [[TMP5]], double* [[G3]], align 8
1139 // CHECK4-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 4
1140 // CHECK4-NEXT: [[TMP7:%.*]] = load double, double* [[TMP6]], align 4
1141 // CHECK4-NEXT: store double [[TMP7]], double* [[G14]], align 8
1142 // CHECK4-NEXT: store double* [[G14]], double** [[_TMP5]], align 4
1143 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4
1144 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4
1145 // CHECK4-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4
1146 // CHECK4-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4
1147 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1148 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
1149 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1150 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1151 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1
1152 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1153 // CHECK4: cond.true:
1154 // CHECK4-NEXT: br label [[COND_END:%.*]]
1155 // CHECK4: cond.false:
1156 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1157 // CHECK4-NEXT: br label [[COND_END]]
1158 // CHECK4: cond.end:
1159 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
1160 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1161 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1162 // CHECK4-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
1163 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1164 // CHECK4: omp.inner.for.cond:
1165 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1166 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1167 // CHECK4-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
1168 // CHECK4-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1169 // CHECK4: omp.inner.for.body:
1170 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1171 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1172 // CHECK4-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 4
1173 // CHECK4-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 4
1174 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[G1_CASTED]] to double*
1175 // CHECK4-NEXT: store double [[TMP20]], double* [[CONV]], align 4
1176 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[G1_CASTED]], align 4
1177 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[SVAR6]], align 4
1178 // CHECK4-NEXT: store i32 [[TMP22]], i32* [[SVAR_CASTED]], align 4
1179 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
1180 // CHECK4-NEXT: [[TMP24:%.*]] = load float, float* [[SFVAR7]], align 4
1181 // CHECK4-NEXT: [[CONV9:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float*
1182 // CHECK4-NEXT: store float [[TMP24]], float* [[CONV9]], align 4
1183 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4
1184 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, double*, i32, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], double* [[G3]], i32 [[TMP21]], i32 [[TMP23]], i32 [[TMP25]])
1185 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1186 // CHECK4: omp.inner.for.inc:
1187 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1188 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1189 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
1190 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1191 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
1192 // CHECK4: omp.inner.for.end:
1193 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1194 // CHECK4: omp.loop.exit:
1195 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]])
1196 // CHECK4-NEXT: ret void
1197 //
1198 //
1199 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
1200 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], i32 [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2]] {
1201 // CHECK4-NEXT: entry:
1202 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1203 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1204 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1205 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1206 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
1207 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca i32, align 4
1208 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
1209 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
1210 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4
1211 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1212 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1213 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1214 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1215 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1216 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1217 // CHECK4-NEXT: [[G3:%.*]] = alloca double, align 8
1218 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1219 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
1220 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1221 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1222 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1223 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1224 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
1225 // CHECK4-NEXT: store i32 [[G1]], i32* [[G1_ADDR]], align 4
1226 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
1227 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
1228 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
1229 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[G1_ADDR]] to double*
1230 // CHECK4-NEXT: [[CONV1:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
1231 // CHECK4-NEXT: store double* [[CONV]], double** [[TMP]], align 4
1232 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1233 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1234 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1235 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1236 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1237 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1238 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1239 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1240 // CHECK4-NEXT: [[TMP3:%.*]] = load double, double* [[TMP0]], align 8
1241 // CHECK4-NEXT: store double [[TMP3]], double* [[G3]], align 8
1242 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1243 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
1244 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1245 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1246 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
1247 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1248 // CHECK4: cond.true:
1249 // CHECK4-NEXT: br label [[COND_END:%.*]]
1250 // CHECK4: cond.false:
1251 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1252 // CHECK4-NEXT: br label [[COND_END]]
1253 // CHECK4: cond.end:
1254 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
1255 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1256 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1257 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1258 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1259 // CHECK4: omp.inner.for.cond:
1260 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1261 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1262 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1263 // CHECK4-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1264 // CHECK4: omp.inner.for.body:
1265 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1266 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1267 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1268 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1269 // CHECK4-NEXT: store double 1.000000e+00, double* [[G3]], align 8
1270 // CHECK4-NEXT: [[TMP12:%.*]] = load double*, double** [[TMP]], align 4
1271 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP12]], align 4
1272 // CHECK4-NEXT: store i32 3, i32* [[SVAR_ADDR]], align 4
1273 // CHECK4-NEXT: store float 4.000000e+00, float* [[CONV1]], align 4
1274 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
1275 // CHECK4-NEXT: store double* [[G3]], double** [[TMP13]], align 4
1276 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
1277 // CHECK4-NEXT: [[TMP15:%.*]] = load double*, double** [[TMP]], align 4
1278 // CHECK4-NEXT: store double* [[TMP15]], double** [[TMP14]], align 4
1279 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
1280 // CHECK4-NEXT: store i32* [[SVAR_ADDR]], i32** [[TMP16]], align 4
1281 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
1282 // CHECK4-NEXT: store float* [[CONV1]], float** [[TMP17]], align 4
1283 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]])
1284 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1285 // CHECK4: omp.body.continue:
1286 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1287 // CHECK4: omp.inner.for.inc:
1288 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1289 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP18]], 1
1290 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
1291 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
1292 // CHECK4: omp.inner.for.end:
1293 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1294 // CHECK4: omp.loop.exit:
1295 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
1296 // CHECK4-NEXT: ret void
1297 //
1298 //
1299 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1300 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] {
1301 // CHECK4-NEXT: entry:
1302 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
1303 // CHECK4-NEXT: ret void
1304 //
1305 //
1306 // CHECK8-LABEL: define {{[^@]+}}@main
1307 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
1308 // CHECK8-NEXT: entry:
1309 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1310 // CHECK8-NEXT: [[G:%.*]] = alloca double, align 8
1311 // CHECK8-NEXT: [[G1:%.*]] = alloca double*, align 8
1312 // CHECK8-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1313 // CHECK8-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1314 // CHECK8-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1315 // CHECK8-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1316 // CHECK8-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8
1317 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
1318 // CHECK8-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1319 // CHECK8-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
1320 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
1321 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
1322 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
1323 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1324 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4
1325 // CHECK8-NEXT: store double* [[G]], double** [[G1]], align 8
1326 // CHECK8-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
1327 // CHECK8-NEXT: store i32 0, i32* [[T_VAR]], align 4
1328 // CHECK8-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1329 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
1330 // CHECK8-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
1331 // CHECK8-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
1332 // CHECK8-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
1333 // CHECK8-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
1334 // CHECK8-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
1335 // CHECK8-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
1336 // CHECK8-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
1337 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1338 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1339 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
1340 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1341 // CHECK8-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1342 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
1343 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
1344 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
1345 // CHECK8-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
1346 // CHECK8-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1347 // CHECK8-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1348 // CHECK8-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1349 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1350 // CHECK8-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
1351 // CHECK8-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1352 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
1353 // CHECK8-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8
1354 // CHECK8-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1355 // CHECK8-NEXT: store i8* null, i8** [[TMP13]], align 8
1356 // CHECK8-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1357 // CHECK8-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1358 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
1359 // CHECK8-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1360 // CHECK8-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
1361 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8
1362 // CHECK8-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1363 // CHECK8-NEXT: store i8* null, i8** [[TMP18]], align 8
1364 // CHECK8-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1365 // CHECK8-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
1366 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8
1367 // CHECK8-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1368 // CHECK8-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
1369 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8
1370 // CHECK8-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1371 // CHECK8-NEXT: store i8* null, i8** [[TMP23]], align 8
1372 // CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1373 // CHECK8-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
1374 // CHECK8-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8
1375 // CHECK8-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1376 // CHECK8-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
1377 // CHECK8-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8
1378 // CHECK8-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1379 // CHECK8-NEXT: store i8* null, i8** [[TMP28]], align 8
1380 // CHECK8-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1381 // CHECK8-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
1382 // CHECK8-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8
1383 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1384 // CHECK8-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
1385 // CHECK8-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8
1386 // CHECK8-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
1387 // CHECK8-NEXT: store i8* null, i8** [[TMP33]], align 8
1388 // CHECK8-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1389 // CHECK8-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1390 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
1391 // CHECK8-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1392 // CHECK8-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
1393 // CHECK8-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1394 // CHECK8: omp_offload.failed:
1395 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]
1396 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT]]
1397 // CHECK8: omp_offload.cont:
1398 // CHECK8-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
1399 // CHECK8-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1400 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1401 // CHECK8-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1402 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1403 // CHECK8: arraydestroy.body:
1404 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1405 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1406 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1407 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1408 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
1409 // CHECK8: arraydestroy.done3:
1410 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1411 // CHECK8-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
1412 // CHECK8-NEXT: ret i32 [[TMP39]]
1413 //
1414 //
1415 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1416 // CHECK8-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1417 // CHECK8-NEXT: entry:
1418 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1419 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1420 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1421 // CHECK8-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
1422 // CHECK8-NEXT: ret void
1423 //
1424 //
1425 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1426 // CHECK8-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1427 // CHECK8-NEXT: entry:
1428 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1429 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1430 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1431 // CHECK8-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1432 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1433 // CHECK8-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1434 // CHECK8-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
1435 // CHECK8-NEXT: ret void
1436 //
1437 //
1438 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
1439 // CHECK8-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1440 // CHECK8-NEXT: entry:
1441 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1442 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1443 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1444 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1445 // CHECK8-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
1446 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
1447 // CHECK8-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1448 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1449 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1450 // CHECK8-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1451 // CHECK8-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
1452 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1453 // CHECK8-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1454 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1455 // CHECK8-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1456 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
1457 // CHECK8-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
1458 // CHECK8-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1459 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]])
1460 // CHECK8-NEXT: ret void
1461 //
1462 //
1463 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined.
1464 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
1465 // CHECK8-NEXT: entry:
1466 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1467 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1468 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1469 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1470 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1471 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1472 // CHECK8-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
1473 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
1474 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8
1475 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1476 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1477 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1478 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1479 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1480 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1481 // CHECK8-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1482 // CHECK8-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1483 // CHECK8-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
1484 // CHECK8-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1485 // CHECK8-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 8
1486 // CHECK8-NEXT: [[SVAR9:%.*]] = alloca i32, align 4
1487 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
1488 // CHECK8-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1489 // CHECK8-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
1490 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1491 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1492 // CHECK8-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1493 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1494 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1495 // CHECK8-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1496 // CHECK8-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
1497 // CHECK8-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1498 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1499 // CHECK8-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1500 // CHECK8-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1501 // CHECK8-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
1502 // CHECK8-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8
1503 // CHECK8-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1504 // CHECK8-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8
1505 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1506 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1507 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1508 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1509 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4
1510 // CHECK8-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4
1511 // CHECK8-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1512 // CHECK8-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1513 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 8, i1 false)
1514 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1515 // CHECK8-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S*
1516 // CHECK8-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1517 // CHECK8-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]]
1518 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1519 // CHECK8: omp.arraycpy.body:
1520 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1521 // CHECK8-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1522 // CHECK8-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1523 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1524 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 4, i1 false)
1525 // CHECK8-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1526 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1527 // CHECK8-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]]
1528 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
1529 // CHECK8: omp.arraycpy.done6:
1530 // CHECK8-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8
1531 // CHECK8-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8*
1532 // CHECK8-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
1533 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false)
1534 // CHECK8-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 8
1535 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4
1536 // CHECK8-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4
1537 // CHECK8-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1538 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
1539 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1540 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1541 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1
1542 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1543 // CHECK8: cond.true:
1544 // CHECK8-NEXT: br label [[COND_END:%.*]]
1545 // CHECK8: cond.false:
1546 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1547 // CHECK8-NEXT: br label [[COND_END]]
1548 // CHECK8: cond.end:
1549 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ]
1550 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1551 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1552 // CHECK8-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4
1553 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1554 // CHECK8: omp.inner.for.cond:
1555 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1556 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1557 // CHECK8-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]]
1558 // CHECK8-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1559 // CHECK8: omp.inner.for.cond.cleanup:
1560 // CHECK8-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1561 // CHECK8: omp.inner.for.body:
1562 // CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1563 // CHECK8-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64
1564 // CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1565 // CHECK8-NEXT: [[TMP27:%.*]] = zext i32 [[TMP26]] to i64
1566 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[T_VAR3]], align 4
1567 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1568 // CHECK8-NEXT: store i32 [[TMP28]], i32* [[CONV]], align 4
1569 // CHECK8-NEXT: [[TMP29:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1570 // CHECK8-NEXT: [[TMP30:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8
1571 // CHECK8-NEXT: [[TMP31:%.*]] = load i32, i32* [[SVAR9]], align 4
1572 // CHECK8-NEXT: [[CONV11:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
1573 // CHECK8-NEXT: store i32 [[TMP31]], i32* [[CONV11]], align 4
1574 // CHECK8-NEXT: [[TMP32:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
1575 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP25]], i64 [[TMP27]], [2 x i32]* [[VEC4]], i64 [[TMP29]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP30]], i64 [[TMP32]])
1576 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1577 // CHECK8: omp.inner.for.inc:
1578 // CHECK8-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1579 // CHECK8-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1580 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
1581 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1582 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
1583 // CHECK8: omp.inner.for.end:
1584 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1585 // CHECK8: omp.loop.exit:
1586 // CHECK8-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1587 // CHECK8-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
1588 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]])
1589 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
1590 // CHECK8-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1591 // CHECK8-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2
1592 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1593 // CHECK8: arraydestroy.body:
1594 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP37]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1595 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1596 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1597 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
1598 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
1599 // CHECK8: arraydestroy.done13:
1600 // CHECK8-NEXT: ret void
1601 //
1602 //
1603 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..1
1604 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3]] {
1605 // CHECK8-NEXT: entry:
1606 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1607 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1608 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1609 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1610 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1611 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1612 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1613 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1614 // CHECK8-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
1615 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
1616 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1617 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1618 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1619 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1620 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1621 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1622 // CHECK8-NEXT: [[VEC5:%.*]] = alloca [2 x i32], align 4
1623 // CHECK8-NEXT: [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 4
1624 // CHECK8-NEXT: [[VAR8:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1625 // CHECK8-NEXT: [[_TMP9:%.*]] = alloca %struct.S*, align 8
1626 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
1627 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1628 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1629 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1630 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1631 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1632 // CHECK8-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1633 // CHECK8-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1634 // CHECK8-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1635 // CHECK8-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
1636 // CHECK8-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1637 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1638 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1639 // CHECK8-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1640 // CHECK8-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
1641 // CHECK8-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
1642 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1643 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1644 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1645 // CHECK8-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP3]] to i32
1646 // CHECK8-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1647 // CHECK8-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP4]] to i32
1648 // CHECK8-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
1649 // CHECK8-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
1650 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1651 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1652 // CHECK8-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC5]] to i8*
1653 // CHECK8-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
1654 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i64 8, i1 false)
1655 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0
1656 // CHECK8-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S]* [[TMP1]] to %struct.S*
1657 // CHECK8-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1658 // CHECK8-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP8]]
1659 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1660 // CHECK8: omp.arraycpy.body:
1661 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1662 // CHECK8-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1663 // CHECK8-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1664 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1665 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false)
1666 // CHECK8-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1667 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1668 // CHECK8-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]]
1669 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]]
1670 // CHECK8: omp.arraycpy.done7:
1671 // CHECK8-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1672 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR8]] to i8*
1673 // CHECK8-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP11]] to i8*
1674 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false)
1675 // CHECK8-NEXT: store %struct.S* [[VAR8]], %struct.S** [[_TMP9]], align 8
1676 // CHECK8-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1677 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
1678 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1679 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1680 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1
1681 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1682 // CHECK8: cond.true:
1683 // CHECK8-NEXT: br label [[COND_END:%.*]]
1684 // CHECK8: cond.false:
1685 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1686 // CHECK8-NEXT: br label [[COND_END]]
1687 // CHECK8: cond.end:
1688 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
1689 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1690 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1691 // CHECK8-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4
1692 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1693 // CHECK8: omp.inner.for.cond:
1694 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1695 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1696 // CHECK8-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
1697 // CHECK8-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1698 // CHECK8: omp.inner.for.cond.cleanup:
1699 // CHECK8-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1700 // CHECK8: omp.inner.for.body:
1701 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1702 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1
1703 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1704 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1705 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV]], align 8
1706 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4
1707 // CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
1708 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC5]], i64 0, i64 [[IDXPROM]]
1709 // CHECK8-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4
1710 // CHECK8-NEXT: [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP9]], align 8
1711 // CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4
1712 // CHECK8-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP25]] to i64
1713 // CHECK8-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i64 0, i64 [[IDXPROM11]]
1714 // CHECK8-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[ARRAYIDX12]] to i8*
1715 // CHECK8-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[TMP24]] to i8*
1716 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false)
1717 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1718 // CHECK8: omp.body.continue:
1719 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1720 // CHECK8: omp.inner.for.inc:
1721 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1722 // CHECK8-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP28]], 1
1723 // CHECK8-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
1724 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
1725 // CHECK8: omp.inner.for.end:
1726 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1727 // CHECK8: omp.loop.exit:
1728 // CHECK8-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1729 // CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
1730 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
1731 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR8]]) #[[ATTR4]]
1732 // CHECK8-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0
1733 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2
1734 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1735 // CHECK8: arraydestroy.body:
1736 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1737 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1738 // CHECK8-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1739 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
1740 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
1741 // CHECK8: arraydestroy.done15:
1742 // CHECK8-NEXT: ret void
1743 //
1744 //
1745 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1746 // CHECK8-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1747 // CHECK8-NEXT: entry:
1748 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1749 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1750 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1751 // CHECK8-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1752 // CHECK8-NEXT: ret void
1753 //
1754 //
1755 // CHECK8-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1756 // CHECK8-SAME: () #[[ATTR5:[0-9]+]] comdat {
1757 // CHECK8-NEXT: entry:
1758 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1759 // CHECK8-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1760 // CHECK8-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1761 // CHECK8-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1762 // CHECK8-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1763 // CHECK8-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8
1764 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1765 // CHECK8-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1766 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
1767 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
1768 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
1769 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1770 // CHECK8-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
1771 // CHECK8-NEXT: store i32 0, i32* [[T_VAR]], align 4
1772 // CHECK8-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1773 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1774 // CHECK8-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1775 // CHECK8-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1)
1776 // CHECK8-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1777 // CHECK8-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2)
1778 // CHECK8-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
1779 // CHECK8-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
1780 // CHECK8-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
1781 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1782 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1783 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
1784 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1785 // CHECK8-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1786 // CHECK8-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1787 // CHECK8-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1788 // CHECK8-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1789 // CHECK8-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
1790 // CHECK8-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8
1791 // CHECK8-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1792 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1793 // CHECK8-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
1794 // CHECK8-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1795 // CHECK8-NEXT: store i8* null, i8** [[TMP11]], align 8
1796 // CHECK8-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1797 // CHECK8-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
1798 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8
1799 // CHECK8-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1800 // CHECK8-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1801 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
1802 // CHECK8-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1803 // CHECK8-NEXT: store i8* null, i8** [[TMP16]], align 8
1804 // CHECK8-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1805 // CHECK8-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
1806 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8
1807 // CHECK8-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1808 // CHECK8-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
1809 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8
1810 // CHECK8-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1811 // CHECK8-NEXT: store i8* null, i8** [[TMP21]], align 8
1812 // CHECK8-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1813 // CHECK8-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
1814 // CHECK8-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8
1815 // CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1816 // CHECK8-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
1817 // CHECK8-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8
1818 // CHECK8-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1819 // CHECK8-NEXT: store i8* null, i8** [[TMP26]], align 8
1820 // CHECK8-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1821 // CHECK8-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1822 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
1823 // CHECK8-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1824 // CHECK8-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
1825 // CHECK8-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1826 // CHECK8: omp_offload.failed:
1827 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
1828 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT]]
1829 // CHECK8: omp_offload.cont:
1830 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4
1831 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1832 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1833 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1834 // CHECK8: arraydestroy.body:
1835 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1836 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1837 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1838 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1839 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1840 // CHECK8: arraydestroy.done2:
1841 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1842 // CHECK8-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
1843 // CHECK8-NEXT: ret i32 [[TMP32]]
1844 //
1845 //
1846 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1847 // CHECK8-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1848 // CHECK8-NEXT: entry:
1849 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1850 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1851 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1852 // CHECK8-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1853 // CHECK8-NEXT: store float 0.000000e+00, float* [[F]], align 4
1854 // CHECK8-NEXT: ret void
1855 //
1856 //
1857 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1858 // CHECK8-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1859 // CHECK8-NEXT: entry:
1860 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1861 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1862 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1863 // CHECK8-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1864 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1865 // CHECK8-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1866 // CHECK8-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1867 // CHECK8-NEXT: store float [[TMP0]], float* [[F]], align 4
1868 // CHECK8-NEXT: ret void
1869 //
1870 //
1871 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1872 // CHECK8-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1873 // CHECK8-NEXT: entry:
1874 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1875 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1876 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1877 // CHECK8-NEXT: ret void
1878 //
1879 //
1880 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1881 // CHECK8-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1882 // CHECK8-NEXT: entry:
1883 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1884 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1885 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1886 // CHECK8-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
1887 // CHECK8-NEXT: ret void
1888 //
1889 //
1890 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1891 // CHECK8-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1892 // CHECK8-NEXT: entry:
1893 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1894 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1895 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1896 // CHECK8-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1897 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1898 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1899 // CHECK8-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]])
1900 // CHECK8-NEXT: ret void
1901 //
1902 //
1903 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48
1904 // CHECK8-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1905 // CHECK8-NEXT: entry:
1906 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1907 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1908 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1909 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1910 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1911 // CHECK8-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1912 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1913 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1914 // CHECK8-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1915 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1916 // CHECK8-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1917 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1918 // CHECK8-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1919 // CHECK8-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
1920 // CHECK8-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1921 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
1922 // CHECK8-NEXT: ret void
1923 //
1924 //
1925 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..2
1926 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1927 // CHECK8-NEXT: entry:
1928 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1929 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1930 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1931 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1932 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1933 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1934 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1935 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1936 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1937 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1938 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1939 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1940 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1941 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1942 // CHECK8-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1943 // CHECK8-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1944 // CHECK8-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
1945 // CHECK8-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1946 // CHECK8-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8
1947 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
1948 // CHECK8-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1949 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1950 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1951 // CHECK8-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1952 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1953 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1954 // CHECK8-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1955 // CHECK8-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1956 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1957 // CHECK8-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1958 // CHECK8-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1959 // CHECK8-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
1960 // CHECK8-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1961 // CHECK8-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8
1962 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1963 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1964 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1965 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1966 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
1967 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4
1968 // CHECK8-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1969 // CHECK8-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1970 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 8, i1 false)
1971 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1972 // CHECK8-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0*
1973 // CHECK8-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1974 // CHECK8-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]]
1975 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1976 // CHECK8: omp.arraycpy.body:
1977 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1978 // CHECK8-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1979 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1980 // CHECK8-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1981 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false)
1982 // CHECK8-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1983 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1984 // CHECK8-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
1985 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
1986 // CHECK8: omp.arraycpy.done6:
1987 // CHECK8-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
1988 // CHECK8-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8*
1989 // CHECK8-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
1990 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false)
1991 // CHECK8-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8
1992 // CHECK8-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1993 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
1994 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1995 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1996 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1
1997 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1998 // CHECK8: cond.true:
1999 // CHECK8-NEXT: br label [[COND_END:%.*]]
2000 // CHECK8: cond.false:
2001 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2002 // CHECK8-NEXT: br label [[COND_END]]
2003 // CHECK8: cond.end:
2004 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
2005 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2006 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2007 // CHECK8-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
2008 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2009 // CHECK8: omp.inner.for.cond:
2010 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2011 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2012 // CHECK8-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
2013 // CHECK8-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2014 // CHECK8: omp.inner.for.cond.cleanup:
2015 // CHECK8-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2016 // CHECK8: omp.inner.for.body:
2017 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2018 // CHECK8-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
2019 // CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2020 // CHECK8-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64
2021 // CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4
2022 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
2023 // CHECK8-NEXT: store i32 [[TMP26]], i32* [[CONV]], align 4
2024 // CHECK8-NEXT: [[TMP27:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
2025 // CHECK8-NEXT: [[TMP28:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8
2026 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP23]], i64 [[TMP25]], [2 x i32]* [[VEC4]], i64 [[TMP27]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP28]])
2027 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2028 // CHECK8: omp.inner.for.inc:
2029 // CHECK8-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2030 // CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2031 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
2032 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2033 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
2034 // CHECK8: omp.inner.for.end:
2035 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2036 // CHECK8: omp.loop.exit:
2037 // CHECK8-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2038 // CHECK8-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
2039 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]])
2040 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
2041 // CHECK8-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2042 // CHECK8-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2
2043 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2044 // CHECK8: arraydestroy.body:
2045 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2046 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2047 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2048 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
2049 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
2050 // CHECK8: arraydestroy.done11:
2051 // CHECK8-NEXT: ret void
2052 //
2053 //
2054 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..3
2055 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2056 // CHECK8-NEXT: entry:
2057 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2058 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2059 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2060 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2061 // CHECK8-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2062 // CHECK8-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
2063 // CHECK8-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
2064 // CHECK8-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
2065 // CHECK8-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
2066 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2067 // CHECK8-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2068 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2069 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2070 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2071 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2072 // CHECK8-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
2073 // CHECK8-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
2074 // CHECK8-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2075 // CHECK8-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8
2076 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
2077 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2078 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2079 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2080 // CHECK8-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2081 // CHECK8-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2082 // CHECK8-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
2083 // CHECK8-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2084 // CHECK8-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
2085 // CHECK8-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2086 // CHECK8-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
2087 // CHECK8-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2088 // CHECK8-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
2089 // CHECK8-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
2090 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2091 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2092 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2093 // CHECK8-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP3]] to i32
2094 // CHECK8-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2095 // CHECK8-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP4]] to i32
2096 // CHECK8-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4
2097 // CHECK8-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
2098 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2099 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2100 // CHECK8-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2101 // CHECK8-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
2102 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i64 8, i1 false)
2103 // CHECK8-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2104 // CHECK8-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S.0]* [[TMP1]] to %struct.S.0*
2105 // CHECK8-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2106 // CHECK8-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP8]]
2107 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2108 // CHECK8: omp.arraycpy.body:
2109 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2110 // CHECK8-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2111 // CHECK8-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2112 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2113 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false)
2114 // CHECK8-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2115 // CHECK8-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2116 // CHECK8-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]]
2117 // CHECK8-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
2118 // CHECK8: omp.arraycpy.done6:
2119 // CHECK8-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2120 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8*
2121 // CHECK8-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8*
2122 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false)
2123 // CHECK8-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8
2124 // CHECK8-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2125 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
2126 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2127 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2128 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1
2129 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2130 // CHECK8: cond.true:
2131 // CHECK8-NEXT: br label [[COND_END:%.*]]
2132 // CHECK8: cond.false:
2133 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2134 // CHECK8-NEXT: br label [[COND_END]]
2135 // CHECK8: cond.end:
2136 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
2137 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2138 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2139 // CHECK8-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4
2140 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2141 // CHECK8: omp.inner.for.cond:
2142 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2143 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2144 // CHECK8-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
2145 // CHECK8-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2146 // CHECK8: omp.inner.for.cond.cleanup:
2147 // CHECK8-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2148 // CHECK8: omp.inner.for.body:
2149 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2150 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1
2151 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2152 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2153 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV]], align 8
2154 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4
2155 // CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
2156 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
2157 // CHECK8-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4
2158 // CHECK8-NEXT: [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8
2159 // CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4
2160 // CHECK8-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP25]] to i64
2161 // CHECK8-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]]
2162 // CHECK8-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[ARRAYIDX11]] to i8*
2163 // CHECK8-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8*
2164 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false)
2165 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2166 // CHECK8: omp.body.continue:
2167 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2168 // CHECK8: omp.inner.for.inc:
2169 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2170 // CHECK8-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1
2171 // CHECK8-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
2172 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]]
2173 // CHECK8: omp.inner.for.end:
2174 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2175 // CHECK8: omp.loop.exit:
2176 // CHECK8-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2177 // CHECK8-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
2178 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
2179 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
2180 // CHECK8-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2181 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2
2182 // CHECK8-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2183 // CHECK8: arraydestroy.body:
2184 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2185 // CHECK8-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2186 // CHECK8-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2187 // CHECK8-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
2188 // CHECK8-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
2189 // CHECK8: arraydestroy.done14:
2190 // CHECK8-NEXT: ret void
2191 //
2192 //
2193 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2194 // CHECK8-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2195 // CHECK8-NEXT: entry:
2196 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2197 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2198 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2199 // CHECK8-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2200 // CHECK8-NEXT: ret void
2201 //
2202 //
2203 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2204 // CHECK8-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2205 // CHECK8-NEXT: entry:
2206 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2207 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2208 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2209 // CHECK8-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2210 // CHECK8-NEXT: store i32 0, i32* [[F]], align 4
2211 // CHECK8-NEXT: ret void
2212 //
2213 //
2214 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2215 // CHECK8-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2216 // CHECK8-NEXT: entry:
2217 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2218 // CHECK8-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2219 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2220 // CHECK8-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2221 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2222 // CHECK8-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2223 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2224 // CHECK8-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
2225 // CHECK8-NEXT: ret void
2226 //
2227 //
2228 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2229 // CHECK8-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2230 // CHECK8-NEXT: entry:
2231 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2232 // CHECK8-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2233 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2234 // CHECK8-NEXT: ret void
2235 //
2236 //
2237 // CHECK8-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2238 // CHECK8-SAME: () #[[ATTR6:[0-9]+]] {
2239 // CHECK8-NEXT: entry:
2240 // CHECK8-NEXT: call void @__tgt_register_requires(i64 1)
2241 // CHECK8-NEXT: ret void
2242 //
2243 //
2244 // CHECK9-LABEL: define {{[^@]+}}@main
2245 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
2246 // CHECK9-NEXT: entry:
2247 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2248 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8
2249 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8
2250 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2251 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2252 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2253 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2254 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8
2255 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
2256 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
2257 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
2258 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
2259 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
2260 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
2261 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
2262 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
2263 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8
2264 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
2265 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4
2266 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2267 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
2268 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
2269 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
2270 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
2271 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
2272 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
2273 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
2274 // CHECK9-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
2275 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
2276 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
2277 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
2278 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
2279 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
2280 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
2281 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
2282 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
2283 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
2284 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
2285 // CHECK9-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
2286 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2287 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
2288 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
2289 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2290 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
2291 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8
2292 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2293 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8
2294 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2295 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
2296 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
2297 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2298 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
2299 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8
2300 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
2301 // CHECK9-NEXT: store i8* null, i8** [[TMP18]], align 8
2302 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2303 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
2304 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8
2305 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2306 // CHECK9-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
2307 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8
2308 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
2309 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8
2310 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2311 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
2312 // CHECK9-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8
2313 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2314 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
2315 // CHECK9-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8
2316 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
2317 // CHECK9-NEXT: store i8* null, i8** [[TMP28]], align 8
2318 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
2319 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
2320 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8
2321 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
2322 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
2323 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8
2324 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
2325 // CHECK9-NEXT: store i8* null, i8** [[TMP33]], align 8
2326 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2327 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2328 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
2329 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2330 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
2331 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2332 // CHECK9: omp_offload.failed:
2333 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]
2334 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
2335 // CHECK9: omp_offload.cont:
2336 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
2337 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2338 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2339 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
2340 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2341 // CHECK9: arraydestroy.body:
2342 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2343 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2344 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2345 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2346 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
2347 // CHECK9: arraydestroy.done3:
2348 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2349 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
2350 // CHECK9-NEXT: ret i32 [[TMP39]]
2351 //
2352 //
2353 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2354 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2355 // CHECK9-NEXT: entry:
2356 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2357 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2358 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2359 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
2360 // CHECK9-NEXT: ret void
2361 //
2362 //
2363 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2364 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2365 // CHECK9-NEXT: entry:
2366 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2367 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2368 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2369 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2370 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2371 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2372 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
2373 // CHECK9-NEXT: ret void
2374 //
2375 //
2376 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
2377 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
2378 // CHECK9-NEXT: entry:
2379 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
2380 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2381 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
2382 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
2383 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
2384 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
2385 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
2386 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2387 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
2388 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
2389 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
2390 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
2391 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2392 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
2393 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
2394 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
2395 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
2396 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
2397 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]])
2398 // CHECK9-NEXT: ret void
2399 //
2400 //
2401 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
2402 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
2403 // CHECK9-NEXT: entry:
2404 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2405 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2406 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
2407 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2408 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
2409 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
2410 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
2411 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
2412 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8
2413 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2414 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
2415 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2416 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2417 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2418 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2419 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
2420 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
2421 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
2422 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2423 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 8
2424 // CHECK9-NEXT: [[SVAR9:%.*]] = alloca i32, align 4
2425 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2426 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
2427 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
2428 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2429 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2430 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
2431 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2432 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
2433 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
2434 // CHECK9-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
2435 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
2436 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2437 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
2438 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
2439 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
2440 // CHECK9-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8
2441 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
2442 // CHECK9-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8
2443 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2444 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
2445 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2446 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2447 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4
2448 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4
2449 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2450 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2451 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 8, i1 false)
2452 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
2453 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S*
2454 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
2455 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]]
2456 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2457 // CHECK9: omp.arraycpy.body:
2458 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2459 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2460 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2461 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2462 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 4, i1 false)
2463 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2464 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2465 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]]
2466 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
2467 // CHECK9: omp.arraycpy.done6:
2468 // CHECK9-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8
2469 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8*
2470 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
2471 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false)
2472 // CHECK9-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 8
2473 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4
2474 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4
2475 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2476 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
2477 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2478 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2479 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1
2480 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2481 // CHECK9: cond.true:
2482 // CHECK9-NEXT: br label [[COND_END:%.*]]
2483 // CHECK9: cond.false:
2484 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2485 // CHECK9-NEXT: br label [[COND_END]]
2486 // CHECK9: cond.end:
2487 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ]
2488 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2489 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2490 // CHECK9-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4
2491 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2492 // CHECK9: omp.inner.for.cond:
2493 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2494 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2495 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]]
2496 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2497 // CHECK9: omp.inner.for.cond.cleanup:
2498 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2499 // CHECK9: omp.inner.for.body:
2500 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2501 // CHECK9-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64
2502 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2503 // CHECK9-NEXT: [[TMP27:%.*]] = zext i32 [[TMP26]] to i64
2504 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[T_VAR3]], align 4
2505 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
2506 // CHECK9-NEXT: store i32 [[TMP28]], i32* [[CONV]], align 4
2507 // CHECK9-NEXT: [[TMP29:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
2508 // CHECK9-NEXT: [[TMP30:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8
2509 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[SVAR9]], align 4
2510 // CHECK9-NEXT: [[CONV11:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
2511 // CHECK9-NEXT: store i32 [[TMP31]], i32* [[CONV11]], align 4
2512 // CHECK9-NEXT: [[TMP32:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
2513 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP25]], i64 [[TMP27]], [2 x i32]* [[VEC4]], i64 [[TMP29]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP30]], i64 [[TMP32]])
2514 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2515 // CHECK9: omp.inner.for.inc:
2516 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2517 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2518 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
2519 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2520 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
2521 // CHECK9: omp.inner.for.end:
2522 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2523 // CHECK9: omp.loop.exit:
2524 // CHECK9-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2525 // CHECK9-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
2526 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]])
2527 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
2528 // CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
2529 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2
2530 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2531 // CHECK9: arraydestroy.body:
2532 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP37]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2533 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2534 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2535 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
2536 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
2537 // CHECK9: arraydestroy.done13:
2538 // CHECK9-NEXT: ret void
2539 //
2540 //
2541 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
2542 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3]] {
2543 // CHECK9-NEXT: entry:
2544 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2545 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2546 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2547 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2548 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2549 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
2550 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
2551 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
2552 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
2553 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
2554 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2555 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
2556 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2557 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2558 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2559 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2560 // CHECK9-NEXT: [[VEC5:%.*]] = alloca [2 x i32], align 4
2561 // CHECK9-NEXT: [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 4
2562 // CHECK9-NEXT: [[VAR8:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2563 // CHECK9-NEXT: [[_TMP9:%.*]] = alloca %struct.S*, align 8
2564 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2565 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2566 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2567 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2568 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2569 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2570 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
2571 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
2572 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
2573 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
2574 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2575 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
2576 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
2577 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
2578 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
2579 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
2580 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2581 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2582 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2583 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP3]] to i32
2584 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2585 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP4]] to i32
2586 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
2587 // CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
2588 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2589 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2590 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC5]] to i8*
2591 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
2592 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i64 8, i1 false)
2593 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0
2594 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S]* [[TMP1]] to %struct.S*
2595 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
2596 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP8]]
2597 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2598 // CHECK9: omp.arraycpy.body:
2599 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2600 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2601 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2602 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2603 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false)
2604 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2605 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2606 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]]
2607 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]]
2608 // CHECK9: omp.arraycpy.done7:
2609 // CHECK9-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
2610 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR8]] to i8*
2611 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP11]] to i8*
2612 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false)
2613 // CHECK9-NEXT: store %struct.S* [[VAR8]], %struct.S** [[_TMP9]], align 8
2614 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2615 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
2616 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2617 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2618 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1
2619 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2620 // CHECK9: cond.true:
2621 // CHECK9-NEXT: br label [[COND_END:%.*]]
2622 // CHECK9: cond.false:
2623 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2624 // CHECK9-NEXT: br label [[COND_END]]
2625 // CHECK9: cond.end:
2626 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
2627 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2628 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2629 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4
2630 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2631 // CHECK9: omp.inner.for.cond:
2632 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2633 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2634 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
2635 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2636 // CHECK9: omp.inner.for.cond.cleanup:
2637 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2638 // CHECK9: omp.inner.for.body:
2639 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2640 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1
2641 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2642 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2643 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV]], align 8
2644 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4
2645 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
2646 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC5]], i64 0, i64 [[IDXPROM]]
2647 // CHECK9-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4
2648 // CHECK9-NEXT: [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP9]], align 8
2649 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4
2650 // CHECK9-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP25]] to i64
2651 // CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i64 0, i64 [[IDXPROM11]]
2652 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[ARRAYIDX12]] to i8*
2653 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[TMP24]] to i8*
2654 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false)
2655 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2656 // CHECK9: omp.body.continue:
2657 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2658 // CHECK9: omp.inner.for.inc:
2659 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2660 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP28]], 1
2661 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
2662 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
2663 // CHECK9: omp.inner.for.end:
2664 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2665 // CHECK9: omp.loop.exit:
2666 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2667 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
2668 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
2669 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR8]]) #[[ATTR4]]
2670 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR6]], i32 0, i32 0
2671 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2
2672 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2673 // CHECK9: arraydestroy.body:
2674 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2675 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2676 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2677 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
2678 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
2679 // CHECK9: arraydestroy.done15:
2680 // CHECK9-NEXT: ret void
2681 //
2682 //
2683 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2684 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2685 // CHECK9-NEXT: entry:
2686 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2687 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2688 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2689 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2690 // CHECK9-NEXT: ret void
2691 //
2692 //
2693 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2694 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat {
2695 // CHECK9-NEXT: entry:
2696 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2697 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2698 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2699 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2700 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2701 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8
2702 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
2703 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
2704 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
2705 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
2706 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
2707 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2708 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
2709 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4
2710 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2711 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
2712 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
2713 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1)
2714 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
2715 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2)
2716 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
2717 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
2718 // CHECK9-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
2719 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
2720 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
2721 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
2722 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
2723 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2724 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2725 // CHECK9-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2726 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2727 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
2728 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8
2729 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2730 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
2731 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
2732 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2733 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8
2734 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2735 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
2736 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8
2737 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2738 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
2739 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
2740 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
2741 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8
2742 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2743 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
2744 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8
2745 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2746 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
2747 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8
2748 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
2749 // CHECK9-NEXT: store i8* null, i8** [[TMP21]], align 8
2750 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2751 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
2752 // CHECK9-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8
2753 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2754 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
2755 // CHECK9-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8
2756 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
2757 // CHECK9-NEXT: store i8* null, i8** [[TMP26]], align 8
2758 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2759 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2760 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
2761 // CHECK9-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2762 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
2763 // CHECK9-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2764 // CHECK9: omp_offload.failed:
2765 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
2766 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
2767 // CHECK9: omp_offload.cont:
2768 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
2769 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2770 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2771 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2772 // CHECK9: arraydestroy.body:
2773 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2774 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2775 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2776 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2777 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2778 // CHECK9: arraydestroy.done2:
2779 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2780 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
2781 // CHECK9-NEXT: ret i32 [[TMP32]]
2782 //
2783 //
2784 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2785 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2786 // CHECK9-NEXT: entry:
2787 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2788 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2789 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2790 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2791 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4
2792 // CHECK9-NEXT: ret void
2793 //
2794 //
2795 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2796 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2797 // CHECK9-NEXT: entry:
2798 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2799 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2800 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2801 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2802 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2803 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2804 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2805 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4
2806 // CHECK9-NEXT: ret void
2807 //
2808 //
2809 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2810 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2811 // CHECK9-NEXT: entry:
2812 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2813 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2814 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2815 // CHECK9-NEXT: ret void
2816 //
2817 //
2818 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2819 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2820 // CHECK9-NEXT: entry:
2821 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2822 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2823 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2824 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
2825 // CHECK9-NEXT: ret void
2826 //
2827 //
2828 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2829 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2830 // CHECK9-NEXT: entry:
2831 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2832 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2833 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2834 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2835 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2836 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2837 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]])
2838 // CHECK9-NEXT: ret void
2839 //
2840 //
2841 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48
2842 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2843 // CHECK9-NEXT: entry:
2844 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
2845 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2846 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
2847 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
2848 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
2849 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
2850 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2851 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2852 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
2853 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
2854 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2855 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2856 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
2857 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
2858 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2859 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
2860 // CHECK9-NEXT: ret void
2861 //
2862 //
2863 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
2864 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2865 // CHECK9-NEXT: entry:
2866 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2867 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2868 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
2869 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2870 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
2871 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
2872 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
2873 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
2874 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2875 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
2876 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2877 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2878 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2879 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2880 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
2881 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
2882 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
2883 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2884 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8
2885 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2886 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
2887 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2888 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2889 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
2890 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2891 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2892 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
2893 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
2894 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2895 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2896 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
2897 // CHECK9-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
2898 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2899 // CHECK9-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8
2900 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2901 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
2902 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2903 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2904 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
2905 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4
2906 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2907 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2908 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 8, i1 false)
2909 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2910 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0*
2911 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2912 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]]
2913 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2914 // CHECK9: omp.arraycpy.body:
2915 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2916 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2917 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2918 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2919 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false)
2920 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2921 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2922 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
2923 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
2924 // CHECK9: omp.arraycpy.done6:
2925 // CHECK9-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
2926 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8*
2927 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
2928 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false)
2929 // CHECK9-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8
2930 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2931 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
2932 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2933 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2934 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1
2935 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2936 // CHECK9: cond.true:
2937 // CHECK9-NEXT: br label [[COND_END:%.*]]
2938 // CHECK9: cond.false:
2939 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2940 // CHECK9-NEXT: br label [[COND_END]]
2941 // CHECK9: cond.end:
2942 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
2943 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2944 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2945 // CHECK9-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
2946 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2947 // CHECK9: omp.inner.for.cond:
2948 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2949 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2950 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
2951 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2952 // CHECK9: omp.inner.for.cond.cleanup:
2953 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2954 // CHECK9: omp.inner.for.body:
2955 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2956 // CHECK9-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
2957 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2958 // CHECK9-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64
2959 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4
2960 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
2961 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[CONV]], align 4
2962 // CHECK9-NEXT: [[TMP27:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
2963 // CHECK9-NEXT: [[TMP28:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8
2964 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP23]], i64 [[TMP25]], [2 x i32]* [[VEC4]], i64 [[TMP27]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP28]])
2965 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2966 // CHECK9: omp.inner.for.inc:
2967 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2968 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2969 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
2970 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2971 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
2972 // CHECK9: omp.inner.for.end:
2973 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2974 // CHECK9: omp.loop.exit:
2975 // CHECK9-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2976 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
2977 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]])
2978 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
2979 // CHECK9-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2980 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2
2981 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2982 // CHECK9: arraydestroy.body:
2983 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP33]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2984 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2985 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2986 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
2987 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
2988 // CHECK9: arraydestroy.done11:
2989 // CHECK9-NEXT: ret void
2990 //
2991 //
2992 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
2993 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2994 // CHECK9-NEXT: entry:
2995 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2996 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2997 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2998 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2999 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
3000 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
3001 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
3002 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
3003 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
3004 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3005 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3006 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3007 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3008 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3009 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3010 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
3011 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
3012 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3013 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8
3014 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3015 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3016 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3017 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3018 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3019 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
3020 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
3021 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
3022 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
3023 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
3024 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
3025 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
3026 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
3027 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
3028 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3029 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3030 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3031 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP3]] to i32
3032 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3033 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP4]] to i32
3034 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4
3035 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
3036 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3037 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3038 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
3039 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
3040 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i64 8, i1 false)
3041 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
3042 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S.0]* [[TMP1]] to %struct.S.0*
3043 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
3044 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP8]]
3045 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3046 // CHECK9: omp.arraycpy.body:
3047 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3048 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3049 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3050 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3051 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i64 4, i1 false)
3052 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3053 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3054 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]]
3055 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
3056 // CHECK9: omp.arraycpy.done6:
3057 // CHECK9-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
3058 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8*
3059 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8*
3060 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false)
3061 // CHECK9-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8
3062 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3063 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
3064 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3065 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3066 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1
3067 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3068 // CHECK9: cond.true:
3069 // CHECK9-NEXT: br label [[COND_END:%.*]]
3070 // CHECK9: cond.false:
3071 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3072 // CHECK9-NEXT: br label [[COND_END]]
3073 // CHECK9: cond.end:
3074 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
3075 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3076 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3077 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4
3078 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3079 // CHECK9: omp.inner.for.cond:
3080 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3081 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3082 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
3083 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3084 // CHECK9: omp.inner.for.cond.cleanup:
3085 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3086 // CHECK9: omp.inner.for.body:
3087 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3088 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1
3089 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3090 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3091 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV]], align 8
3092 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4
3093 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
3094 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
3095 // CHECK9-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4
3096 // CHECK9-NEXT: [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8
3097 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4
3098 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP25]] to i64
3099 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]]
3100 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[ARRAYIDX11]] to i8*
3101 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8*
3102 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false)
3103 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3104 // CHECK9: omp.body.continue:
3105 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3106 // CHECK9: omp.inner.for.inc:
3107 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3108 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], 1
3109 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
3110 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
3111 // CHECK9: omp.inner.for.end:
3112 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3113 // CHECK9: omp.loop.exit:
3114 // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3115 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
3116 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
3117 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
3118 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
3119 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2
3120 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3121 // CHECK9: arraydestroy.body:
3122 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3123 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
3124 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3125 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
3126 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
3127 // CHECK9: arraydestroy.done14:
3128 // CHECK9-NEXT: ret void
3129 //
3130 //
3131 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
3132 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3133 // CHECK9-NEXT: entry:
3134 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
3135 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
3136 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
3137 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3138 // CHECK9-NEXT: ret void
3139 //
3140 //
3141 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
3142 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3143 // CHECK9-NEXT: entry:
3144 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
3145 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
3146 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
3147 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3148 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4
3149 // CHECK9-NEXT: ret void
3150 //
3151 //
3152 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
3153 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3154 // CHECK9-NEXT: entry:
3155 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
3156 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
3157 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
3158 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
3159 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
3160 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3161 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3162 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
3163 // CHECK9-NEXT: ret void
3164 //
3165 //
3166 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
3167 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3168 // CHECK9-NEXT: entry:
3169 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
3170 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
3171 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
3172 // CHECK9-NEXT: ret void
3173 //
3174 //
3175 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3176 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
3177 // CHECK9-NEXT: entry:
3178 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
3179 // CHECK9-NEXT: ret void
3180 //
3181 //
3182 // CHECK10-LABEL: define {{[^@]+}}@main
3183 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
3184 // CHECK10-NEXT: entry:
3185 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3186 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8
3187 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 4
3188 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3189 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
3190 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
3191 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
3192 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4
3193 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
3194 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
3195 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
3196 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
3197 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
3198 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
3199 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3200 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
3201 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 4
3202 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
3203 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4
3204 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3205 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
3206 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3207 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
3208 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
3209 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
3210 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
3211 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
3212 // CHECK10-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
3213 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
3214 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
3215 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
3216 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3217 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
3218 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4
3219 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
3220 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3221 // CHECK10-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3222 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3223 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
3224 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
3225 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3226 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
3227 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4
3228 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3229 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 4
3230 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3231 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
3232 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
3233 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3234 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
3235 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4
3236 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3237 // CHECK10-NEXT: store i8* null, i8** [[TMP18]], align 4
3238 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3239 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
3240 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4
3241 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3242 // CHECK10-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
3243 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4
3244 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3245 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 4
3246 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
3247 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
3248 // CHECK10-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4
3249 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
3250 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
3251 // CHECK10-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4
3252 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
3253 // CHECK10-NEXT: store i8* null, i8** [[TMP28]], align 4
3254 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
3255 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
3256 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4
3257 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
3258 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
3259 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4
3260 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
3261 // CHECK10-NEXT: store i8* null, i8** [[TMP33]], align 4
3262 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3263 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3264 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
3265 // CHECK10-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3266 // CHECK10-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
3267 // CHECK10-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3268 // CHECK10: omp_offload.failed:
3269 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]]
3270 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
3271 // CHECK10: omp_offload.cont:
3272 // CHECK10-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
3273 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
3274 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3275 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
3276 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3277 // CHECK10: arraydestroy.body:
3278 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3279 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3280 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3281 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
3282 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
3283 // CHECK10: arraydestroy.done2:
3284 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3285 // CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
3286 // CHECK10-NEXT: ret i32 [[TMP39]]
3287 //
3288 //
3289 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
3290 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3291 // CHECK10-NEXT: entry:
3292 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3293 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3294 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3295 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
3296 // CHECK10-NEXT: ret void
3297 //
3298 //
3299 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
3300 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3301 // CHECK10-NEXT: entry:
3302 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3303 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
3304 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3305 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4
3306 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3307 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3308 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
3309 // CHECK10-NEXT: ret void
3310 //
3311 //
3312 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
3313 // CHECK10-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
3314 // CHECK10-NEXT: entry:
3315 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
3316 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3317 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
3318 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
3319 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
3320 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
3321 // CHECK10-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
3322 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3323 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3324 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
3325 // CHECK10-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
3326 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3327 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3328 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
3329 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
3330 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3331 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]])
3332 // CHECK10-NEXT: ret void
3333 //
3334 //
3335 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
3336 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
3337 // CHECK10-NEXT: entry:
3338 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3339 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3340 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
3341 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3342 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
3343 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
3344 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
3345 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
3346 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4
3347 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3348 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3349 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3350 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3351 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3352 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3353 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
3354 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
3355 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
3356 // CHECK10-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3357 // CHECK10-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 4
3358 // CHECK10-NEXT: [[SVAR9:%.*]] = alloca i32, align 4
3359 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
3360 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
3361 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
3362 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3363 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3364 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
3365 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3366 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3367 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
3368 // CHECK10-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
3369 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
3370 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3371 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3372 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
3373 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
3374 // CHECK10-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4
3375 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3376 // CHECK10-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4
3377 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3378 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
3379 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3380 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3381 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4
3382 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4
3383 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
3384 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
3385 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 8, i1 false)
3386 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
3387 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S*
3388 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
3389 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]]
3390 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3391 // CHECK10: omp.arraycpy.body:
3392 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3393 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3394 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3395 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3396 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 4, i1 false)
3397 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3398 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3399 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]]
3400 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
3401 // CHECK10: omp.arraycpy.done6:
3402 // CHECK10-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4
3403 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8*
3404 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
3405 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false)
3406 // CHECK10-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 4
3407 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4
3408 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4
3409 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3410 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
3411 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3412 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3413 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1
3414 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3415 // CHECK10: cond.true:
3416 // CHECK10-NEXT: br label [[COND_END:%.*]]
3417 // CHECK10: cond.false:
3418 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3419 // CHECK10-NEXT: br label [[COND_END]]
3420 // CHECK10: cond.end:
3421 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ]
3422 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3423 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3424 // CHECK10-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4
3425 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3426 // CHECK10: omp.inner.for.cond:
3427 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3428 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3429 // CHECK10-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]]
3430 // CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3431 // CHECK10: omp.inner.for.cond.cleanup:
3432 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3433 // CHECK10: omp.inner.for.body:
3434 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3435 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3436 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4
3437 // CHECK10-NEXT: store i32 [[TMP26]], i32* [[T_VAR_CASTED]], align 4
3438 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
3439 // CHECK10-NEXT: [[TMP28:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4
3440 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[SVAR9]], align 4
3441 // CHECK10-NEXT: store i32 [[TMP29]], i32* [[SVAR_CASTED]], align 4
3442 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
3443 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP24]], i32 [[TMP25]], [2 x i32]* [[VEC4]], i32 [[TMP27]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP28]], i32 [[TMP30]])
3444 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3445 // CHECK10: omp.inner.for.inc:
3446 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3447 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3448 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
3449 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3450 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
3451 // CHECK10: omp.inner.for.end:
3452 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3453 // CHECK10: omp.loop.exit:
3454 // CHECK10-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3455 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
3456 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
3457 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
3458 // CHECK10-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
3459 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2
3460 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3461 // CHECK10: arraydestroy.body:
3462 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP35]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3463 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3464 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3465 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
3466 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
3467 // CHECK10: arraydestroy.done12:
3468 // CHECK10-NEXT: ret void
3469 //
3470 //
3471 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
3472 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3]] {
3473 // CHECK10-NEXT: entry:
3474 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3475 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3476 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3477 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3478 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3479 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
3480 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
3481 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
3482 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
3483 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
3484 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3485 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3486 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3487 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3488 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3489 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3490 // CHECK10-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4
3491 // CHECK10-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4
3492 // CHECK10-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3493 // CHECK10-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4
3494 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
3495 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3496 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3497 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3498 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3499 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3500 // CHECK10-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
3501 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3502 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
3503 // CHECK10-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
3504 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3505 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3506 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
3507 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
3508 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3509 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3510 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3511 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3512 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4
3513 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
3514 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3515 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3516 // CHECK10-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
3517 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
3518 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i32 8, i1 false)
3519 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
3520 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S]* [[TMP1]] to %struct.S*
3521 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
3522 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP8]]
3523 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3524 // CHECK10: omp.arraycpy.body:
3525 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3526 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3527 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3528 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3529 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false)
3530 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3531 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3532 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]]
3533 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
3534 // CHECK10: omp.arraycpy.done4:
3535 // CHECK10-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3536 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR5]] to i8*
3537 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP11]] to i8*
3538 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false)
3539 // CHECK10-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4
3540 // CHECK10-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3541 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
3542 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3543 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3544 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1
3545 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3546 // CHECK10: cond.true:
3547 // CHECK10-NEXT: br label [[COND_END:%.*]]
3548 // CHECK10: cond.false:
3549 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3550 // CHECK10-NEXT: br label [[COND_END]]
3551 // CHECK10: cond.end:
3552 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
3553 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3554 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3555 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4
3556 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3557 // CHECK10: omp.inner.for.cond:
3558 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3559 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3560 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
3561 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3562 // CHECK10: omp.inner.for.cond.cleanup:
3563 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3564 // CHECK10: omp.inner.for.body:
3565 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3566 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1
3567 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3568 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3569 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4
3570 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4
3571 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP23]]
3572 // CHECK10-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4
3573 // CHECK10-NEXT: [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4
3574 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4
3575 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 [[TMP25]]
3576 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[ARRAYIDX8]] to i8*
3577 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[TMP24]] to i8*
3578 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 4, i1 false)
3579 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3580 // CHECK10: omp.body.continue:
3581 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3582 // CHECK10: omp.inner.for.inc:
3583 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3584 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1
3585 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
3586 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
3587 // CHECK10: omp.inner.for.end:
3588 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3589 // CHECK10: omp.loop.exit:
3590 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3591 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
3592 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
3593 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
3594 // CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
3595 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i32 2
3596 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3597 // CHECK10: arraydestroy.body:
3598 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3599 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3600 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3601 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
3602 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
3603 // CHECK10: arraydestroy.done11:
3604 // CHECK10-NEXT: ret void
3605 //
3606 //
3607 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3608 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3609 // CHECK10-NEXT: entry:
3610 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3611 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3612 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3613 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3614 // CHECK10-NEXT: ret void
3615 //
3616 //
3617 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
3618 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat {
3619 // CHECK10-NEXT: entry:
3620 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3621 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3622 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
3623 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
3624 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3625 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4
3626 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
3627 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
3628 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
3629 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
3630 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
3631 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3632 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
3633 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4
3634 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3635 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
3636 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3637 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
3638 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
3639 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
3640 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
3641 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
3642 // CHECK10-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
3643 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
3644 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
3645 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
3646 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3647 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3648 // CHECK10-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3649 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3650 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
3651 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
3652 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3653 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
3654 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
3655 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3656 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 4
3657 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3658 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
3659 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4
3660 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3661 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
3662 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
3663 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3664 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 4
3665 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3666 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
3667 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4
3668 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3669 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
3670 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4
3671 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3672 // CHECK10-NEXT: store i8* null, i8** [[TMP21]], align 4
3673 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
3674 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
3675 // CHECK10-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4
3676 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
3677 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
3678 // CHECK10-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4
3679 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
3680 // CHECK10-NEXT: store i8* null, i8** [[TMP26]], align 4
3681 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3682 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3683 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
3684 // CHECK10-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3685 // CHECK10-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
3686 // CHECK10-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3687 // CHECK10: omp_offload.failed:
3688 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
3689 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
3690 // CHECK10: omp_offload.cont:
3691 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
3692 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3693 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3694 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3695 // CHECK10: arraydestroy.body:
3696 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3697 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3698 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3699 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
3700 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
3701 // CHECK10: arraydestroy.done2:
3702 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3703 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
3704 // CHECK10-NEXT: ret i32 [[TMP32]]
3705 //
3706 //
3707 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3708 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3709 // CHECK10-NEXT: entry:
3710 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3711 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3712 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3713 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3714 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4
3715 // CHECK10-NEXT: ret void
3716 //
3717 //
3718 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3719 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3720 // CHECK10-NEXT: entry:
3721 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3722 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
3723 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3724 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4
3725 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3726 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3727 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3728 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4
3729 // CHECK10-NEXT: ret void
3730 //
3731 //
3732 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3733 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3734 // CHECK10-NEXT: entry:
3735 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3736 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3737 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3738 // CHECK10-NEXT: ret void
3739 //
3740 //
3741 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
3742 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3743 // CHECK10-NEXT: entry:
3744 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3745 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3746 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3747 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
3748 // CHECK10-NEXT: ret void
3749 //
3750 //
3751 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
3752 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3753 // CHECK10-NEXT: entry:
3754 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3755 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
3756 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3757 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
3758 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3759 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3760 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
3761 // CHECK10-NEXT: ret void
3762 //
3763 //
3764 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48
3765 // CHECK10-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
3766 // CHECK10-NEXT: entry:
3767 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
3768 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3769 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
3770 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
3771 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
3772 // CHECK10-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
3773 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3774 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3775 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
3776 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3777 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3778 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
3779 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
3780 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3781 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
3782 // CHECK10-NEXT: ret void
3783 //
3784 //
3785 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2
3786 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
3787 // CHECK10-NEXT: entry:
3788 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3789 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3790 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
3791 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3792 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
3793 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
3794 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
3795 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
3796 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3797 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3798 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3799 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3800 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3801 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3802 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
3803 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
3804 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
3805 // CHECK10-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3806 // CHECK10-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 4
3807 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
3808 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
3809 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3810 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3811 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
3812 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3813 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3814 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
3815 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
3816 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3817 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3818 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
3819 // CHECK10-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4
3820 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3821 // CHECK10-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4
3822 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3823 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
3824 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3825 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3826 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
3827 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4
3828 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
3829 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
3830 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 8, i1 false)
3831 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
3832 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0*
3833 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3834 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]]
3835 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3836 // CHECK10: omp.arraycpy.body:
3837 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3838 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3839 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3840 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3841 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false)
3842 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3843 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3844 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
3845 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
3846 // CHECK10: omp.arraycpy.done6:
3847 // CHECK10-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4
3848 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8*
3849 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
3850 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false)
3851 // CHECK10-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 4
3852 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3853 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
3854 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3855 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3856 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1
3857 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3858 // CHECK10: cond.true:
3859 // CHECK10-NEXT: br label [[COND_END:%.*]]
3860 // CHECK10: cond.false:
3861 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3862 // CHECK10-NEXT: br label [[COND_END]]
3863 // CHECK10: cond.end:
3864 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
3865 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3866 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3867 // CHECK10-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
3868 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3869 // CHECK10: omp.inner.for.cond:
3870 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3871 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3872 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
3873 // CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3874 // CHECK10: omp.inner.for.cond.cleanup:
3875 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3876 // CHECK10: omp.inner.for.body:
3877 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3878 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3879 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR3]], align 4
3880 // CHECK10-NEXT: store i32 [[TMP24]], i32* [[T_VAR_CASTED]], align 4
3881 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
3882 // CHECK10-NEXT: [[TMP26:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4
3883 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP22]], i32 [[TMP23]], [2 x i32]* [[VEC4]], i32 [[TMP25]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP26]])
3884 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3885 // CHECK10: omp.inner.for.inc:
3886 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3887 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3888 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
3889 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3890 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
3891 // CHECK10: omp.inner.for.end:
3892 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3893 // CHECK10: omp.loop.exit:
3894 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3895 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
3896 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
3897 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
3898 // CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
3899 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2
3900 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3901 // CHECK10: arraydestroy.body:
3902 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3903 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3904 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3905 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
3906 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
3907 // CHECK10: arraydestroy.done11:
3908 // CHECK10-NEXT: ret void
3909 //
3910 //
3911 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
3912 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
3913 // CHECK10-NEXT: entry:
3914 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3915 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3916 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3917 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3918 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3919 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
3920 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
3921 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
3922 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
3923 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3924 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3925 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3926 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3927 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3928 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3929 // CHECK10-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4
3930 // CHECK10-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4
3931 // CHECK10-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3932 // CHECK10-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4
3933 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
3934 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3935 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3936 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3937 // CHECK10-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3938 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3939 // CHECK10-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
3940 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3941 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
3942 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3943 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3944 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
3945 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
3946 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3947 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3948 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3949 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3950 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4
3951 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
3952 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3953 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3954 // CHECK10-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
3955 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
3956 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i32 8, i1 false)
3957 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0
3958 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S.0]* [[TMP1]] to %struct.S.0*
3959 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3960 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP8]]
3961 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3962 // CHECK10: omp.arraycpy.body:
3963 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3964 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3965 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3966 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3967 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false)
3968 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3969 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3970 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]]
3971 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
3972 // CHECK10: omp.arraycpy.done4:
3973 // CHECK10-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3974 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR5]] to i8*
3975 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8*
3976 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false)
3977 // CHECK10-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4
3978 // CHECK10-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3979 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
3980 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3981 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3982 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1
3983 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3984 // CHECK10: cond.true:
3985 // CHECK10-NEXT: br label [[COND_END:%.*]]
3986 // CHECK10: cond.false:
3987 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3988 // CHECK10-NEXT: br label [[COND_END]]
3989 // CHECK10: cond.end:
3990 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
3991 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3992 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3993 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4
3994 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3995 // CHECK10: omp.inner.for.cond:
3996 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3997 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3998 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
3999 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4000 // CHECK10: omp.inner.for.cond.cleanup:
4001 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
4002 // CHECK10: omp.inner.for.body:
4003 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4004 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1
4005 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4006 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4007 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4
4008 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4
4009 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP23]]
4010 // CHECK10-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4
4011 // CHECK10-NEXT: [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4
4012 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4
4013 // CHECK10-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 [[TMP25]]
4014 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8*
4015 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8*
4016 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 4, i1 false)
4017 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4018 // CHECK10: omp.body.continue:
4019 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4020 // CHECK10: omp.inner.for.inc:
4021 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4022 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1
4023 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
4024 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
4025 // CHECK10: omp.inner.for.end:
4026 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4027 // CHECK10: omp.loop.exit:
4028 // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4029 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
4030 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
4031 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
4032 // CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0
4033 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2
4034 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
4035 // CHECK10: arraydestroy.body:
4036 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4037 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4038 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4039 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
4040 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
4041 // CHECK10: arraydestroy.done11:
4042 // CHECK10-NEXT: ret void
4043 //
4044 //
4045 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
4046 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4047 // CHECK10-NEXT: entry:
4048 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4049 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4050 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4051 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
4052 // CHECK10-NEXT: ret void
4053 //
4054 //
4055 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
4056 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4057 // CHECK10-NEXT: entry:
4058 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4059 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4060 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4061 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4062 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4
4063 // CHECK10-NEXT: ret void
4064 //
4065 //
4066 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
4067 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4068 // CHECK10-NEXT: entry:
4069 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4070 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
4071 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4072 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
4073 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4074 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4075 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4076 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
4077 // CHECK10-NEXT: ret void
4078 //
4079 //
4080 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
4081 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4082 // CHECK10-NEXT: entry:
4083 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4084 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4085 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4086 // CHECK10-NEXT: ret void
4087 //
4088 //
4089 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4090 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] {
4091 // CHECK10-NEXT: entry:
4092 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1)
4093 // CHECK10-NEXT: ret void
4094 //
4095 //
4096 // CHECK11-LABEL: define {{[^@]+}}@main
4097 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
4098 // CHECK11-NEXT: entry:
4099 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4100 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8
4101 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4
4102 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
4103 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
4104 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
4105 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
4106 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4
4107 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
4108 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
4109 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
4110 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
4111 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
4112 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
4113 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4114 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
4115 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4
4116 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
4117 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4
4118 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4119 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
4120 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4121 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
4122 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
4123 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
4124 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
4125 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
4126 // CHECK11-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
4127 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
4128 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
4129 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
4130 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
4131 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
4132 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4
4133 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
4134 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
4135 // CHECK11-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
4136 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4137 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
4138 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
4139 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4140 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
4141 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4
4142 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4143 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4
4144 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4145 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
4146 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
4147 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4148 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
4149 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4
4150 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4151 // CHECK11-NEXT: store i8* null, i8** [[TMP18]], align 4
4152 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4153 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
4154 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4
4155 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4156 // CHECK11-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
4157 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4
4158 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4159 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4
4160 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
4161 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
4162 // CHECK11-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4
4163 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
4164 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
4165 // CHECK11-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4
4166 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
4167 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 4
4168 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
4169 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
4170 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4
4171 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
4172 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
4173 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4
4174 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
4175 // CHECK11-NEXT: store i8* null, i8** [[TMP33]], align 4
4176 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4177 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4178 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
4179 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4180 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
4181 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4182 // CHECK11: omp_offload.failed:
4183 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]]
4184 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
4185 // CHECK11: omp_offload.cont:
4186 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
4187 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
4188 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4189 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
4190 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
4191 // CHECK11: arraydestroy.body:
4192 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4193 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4194 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4195 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
4196 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
4197 // CHECK11: arraydestroy.done2:
4198 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
4199 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
4200 // CHECK11-NEXT: ret i32 [[TMP39]]
4201 //
4202 //
4203 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
4204 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
4205 // CHECK11-NEXT: entry:
4206 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4207 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4208 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4209 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
4210 // CHECK11-NEXT: ret void
4211 //
4212 //
4213 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
4214 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4215 // CHECK11-NEXT: entry:
4216 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4217 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
4218 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4219 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4
4220 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4221 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4222 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
4223 // CHECK11-NEXT: ret void
4224 //
4225 //
4226 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
4227 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
4228 // CHECK11-NEXT: entry:
4229 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
4230 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
4231 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
4232 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
4233 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
4234 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
4235 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
4236 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
4237 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
4238 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
4239 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
4240 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
4241 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
4242 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
4243 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
4244 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
4245 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]])
4246 // CHECK11-NEXT: ret void
4247 //
4248 //
4249 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
4250 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
4251 // CHECK11-NEXT: entry:
4252 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4253 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4254 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
4255 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
4256 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
4257 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
4258 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
4259 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
4260 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4
4261 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4262 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
4263 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4264 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4265 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4266 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4267 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
4268 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
4269 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
4270 // CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4
4271 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 4
4272 // CHECK11-NEXT: [[SVAR9:%.*]] = alloca i32, align 4
4273 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4274 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
4275 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
4276 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4277 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4278 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
4279 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
4280 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
4281 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
4282 // CHECK11-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
4283 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
4284 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
4285 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
4286 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
4287 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
4288 // CHECK11-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4
4289 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
4290 // CHECK11-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4
4291 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4292 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
4293 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4294 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4295 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4
4296 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4
4297 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
4298 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
4299 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 8, i1 false)
4300 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
4301 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S*
4302 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
4303 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]]
4304 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4305 // CHECK11: omp.arraycpy.body:
4306 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4307 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4308 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4309 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4310 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 4, i1 false)
4311 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4312 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4313 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]]
4314 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
4315 // CHECK11: omp.arraycpy.done6:
4316 // CHECK11-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4
4317 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8*
4318 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
4319 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false)
4320 // CHECK11-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 4
4321 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4
4322 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4
4323 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4324 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
4325 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4326 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4327 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1
4328 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4329 // CHECK11: cond.true:
4330 // CHECK11-NEXT: br label [[COND_END:%.*]]
4331 // CHECK11: cond.false:
4332 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4333 // CHECK11-NEXT: br label [[COND_END]]
4334 // CHECK11: cond.end:
4335 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ]
4336 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4337 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4338 // CHECK11-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4
4339 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4340 // CHECK11: omp.inner.for.cond:
4341 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4342 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4343 // CHECK11-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]]
4344 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4345 // CHECK11: omp.inner.for.cond.cleanup:
4346 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
4347 // CHECK11: omp.inner.for.body:
4348 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4349 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4350 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4
4351 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[T_VAR_CASTED]], align 4
4352 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
4353 // CHECK11-NEXT: [[TMP28:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4
4354 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[SVAR9]], align 4
4355 // CHECK11-NEXT: store i32 [[TMP29]], i32* [[SVAR_CASTED]], align 4
4356 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
4357 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP24]], i32 [[TMP25]], [2 x i32]* [[VEC4]], i32 [[TMP27]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP28]], i32 [[TMP30]])
4358 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4359 // CHECK11: omp.inner.for.inc:
4360 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4361 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4362 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
4363 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4364 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
4365 // CHECK11: omp.inner.for.end:
4366 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4367 // CHECK11: omp.loop.exit:
4368 // CHECK11-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4369 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
4370 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
4371 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
4372 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
4373 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2
4374 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
4375 // CHECK11: arraydestroy.body:
4376 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP35]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4377 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4378 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4379 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
4380 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
4381 // CHECK11: arraydestroy.done12:
4382 // CHECK11-NEXT: ret void
4383 //
4384 //
4385 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
4386 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3]] {
4387 // CHECK11-NEXT: entry:
4388 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4389 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4390 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4391 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4392 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
4393 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
4394 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
4395 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
4396 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
4397 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
4398 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4399 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4400 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4401 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4402 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4403 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4404 // CHECK11-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4
4405 // CHECK11-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4
4406 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
4407 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4
4408 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4409 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4410 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4411 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4412 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4413 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
4414 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
4415 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
4416 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
4417 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
4418 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
4419 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
4420 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
4421 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
4422 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4423 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
4424 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4425 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4426 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4
4427 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
4428 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4429 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4430 // CHECK11-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
4431 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
4432 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i32 8, i1 false)
4433 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
4434 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S]* [[TMP1]] to %struct.S*
4435 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
4436 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP8]]
4437 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4438 // CHECK11: omp.arraycpy.body:
4439 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4440 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4441 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4442 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4443 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false)
4444 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4445 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4446 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]]
4447 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
4448 // CHECK11: omp.arraycpy.done4:
4449 // CHECK11-NEXT: [[TMP11:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
4450 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR5]] to i8*
4451 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP11]] to i8*
4452 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false)
4453 // CHECK11-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4
4454 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4455 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
4456 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4457 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4458 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1
4459 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4460 // CHECK11: cond.true:
4461 // CHECK11-NEXT: br label [[COND_END:%.*]]
4462 // CHECK11: cond.false:
4463 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4464 // CHECK11-NEXT: br label [[COND_END]]
4465 // CHECK11: cond.end:
4466 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
4467 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4468 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4469 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4
4470 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4471 // CHECK11: omp.inner.for.cond:
4472 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4473 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4474 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
4475 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4476 // CHECK11: omp.inner.for.cond.cleanup:
4477 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
4478 // CHECK11: omp.inner.for.body:
4479 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4480 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1
4481 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4482 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4483 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4
4484 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4
4485 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP23]]
4486 // CHECK11-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4
4487 // CHECK11-NEXT: [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4
4488 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4
4489 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 [[TMP25]]
4490 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[ARRAYIDX8]] to i8*
4491 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[TMP24]] to i8*
4492 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 4, i1 false)
4493 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4494 // CHECK11: omp.body.continue:
4495 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4496 // CHECK11: omp.inner.for.inc:
4497 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4498 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1
4499 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
4500 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
4501 // CHECK11: omp.inner.for.end:
4502 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4503 // CHECK11: omp.loop.exit:
4504 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4505 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
4506 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
4507 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
4508 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0
4509 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i32 2
4510 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
4511 // CHECK11: arraydestroy.body:
4512 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4513 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4514 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4515 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
4516 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
4517 // CHECK11: arraydestroy.done11:
4518 // CHECK11-NEXT: ret void
4519 //
4520 //
4521 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
4522 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4523 // CHECK11-NEXT: entry:
4524 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4525 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4526 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4527 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
4528 // CHECK11-NEXT: ret void
4529 //
4530 //
4531 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
4532 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat {
4533 // CHECK11-NEXT: entry:
4534 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4535 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
4536 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
4537 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
4538 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
4539 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4
4540 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
4541 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
4542 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
4543 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
4544 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
4545 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4546 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
4547 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4
4548 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4549 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
4550 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4551 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
4552 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
4553 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
4554 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
4555 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
4556 // CHECK11-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
4557 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
4558 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
4559 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
4560 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
4561 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
4562 // CHECK11-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
4563 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4564 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
4565 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
4566 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4567 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
4568 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
4569 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4570 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4
4571 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4572 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
4573 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4
4574 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4575 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
4576 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
4577 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4578 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4
4579 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4580 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
4581 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4
4582 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4583 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
4584 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4
4585 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4586 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4
4587 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
4588 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
4589 // CHECK11-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4
4590 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
4591 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
4592 // CHECK11-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4
4593 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
4594 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4
4595 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4596 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4597 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
4598 // CHECK11-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4599 // CHECK11-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
4600 // CHECK11-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4601 // CHECK11: omp_offload.failed:
4602 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
4603 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
4604 // CHECK11: omp_offload.cont:
4605 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
4606 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4607 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
4608 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
4609 // CHECK11: arraydestroy.body:
4610 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4611 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4612 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4613 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
4614 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
4615 // CHECK11: arraydestroy.done2:
4616 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
4617 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
4618 // CHECK11-NEXT: ret i32 [[TMP32]]
4619 //
4620 //
4621 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
4622 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4623 // CHECK11-NEXT: entry:
4624 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4625 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4626 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4627 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4628 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4
4629 // CHECK11-NEXT: ret void
4630 //
4631 //
4632 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
4633 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4634 // CHECK11-NEXT: entry:
4635 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4636 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
4637 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4638 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4
4639 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4640 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4641 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4642 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4
4643 // CHECK11-NEXT: ret void
4644 //
4645 //
4646 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
4647 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4648 // CHECK11-NEXT: entry:
4649 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4650 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4651 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4652 // CHECK11-NEXT: ret void
4653 //
4654 //
4655 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
4656 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4657 // CHECK11-NEXT: entry:
4658 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4659 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4660 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4661 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
4662 // CHECK11-NEXT: ret void
4663 //
4664 //
4665 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
4666 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4667 // CHECK11-NEXT: entry:
4668 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4669 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
4670 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4671 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
4672 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4673 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4674 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
4675 // CHECK11-NEXT: ret void
4676 //
4677 //
4678 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48
4679 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
4680 // CHECK11-NEXT: entry:
4681 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
4682 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
4683 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
4684 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
4685 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
4686 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
4687 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
4688 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
4689 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
4690 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
4691 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
4692 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
4693 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
4694 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
4695 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
4696 // CHECK11-NEXT: ret void
4697 //
4698 //
4699 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
4700 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
4701 // CHECK11-NEXT: entry:
4702 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4703 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4704 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
4705 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
4706 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
4707 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
4708 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
4709 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
4710 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4711 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
4712 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4713 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4714 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4715 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4716 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
4717 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
4718 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
4719 // CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
4720 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 4
4721 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4722 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
4723 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4724 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4725 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
4726 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
4727 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
4728 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
4729 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
4730 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
4731 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
4732 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
4733 // CHECK11-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4
4734 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
4735 // CHECK11-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4
4736 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4737 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
4738 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4739 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4740 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
4741 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4
4742 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
4743 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
4744 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 8, i1 false)
4745 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
4746 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0*
4747 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
4748 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]]
4749 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4750 // CHECK11: omp.arraycpy.body:
4751 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4752 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4753 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4754 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4755 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false)
4756 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4757 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4758 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
4759 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
4760 // CHECK11: omp.arraycpy.done6:
4761 // CHECK11-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4
4762 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8*
4763 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
4764 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false)
4765 // CHECK11-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 4
4766 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4767 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
4768 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4769 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4770 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1
4771 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4772 // CHECK11: cond.true:
4773 // CHECK11-NEXT: br label [[COND_END:%.*]]
4774 // CHECK11: cond.false:
4775 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4776 // CHECK11-NEXT: br label [[COND_END]]
4777 // CHECK11: cond.end:
4778 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
4779 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4780 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4781 // CHECK11-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
4782 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4783 // CHECK11: omp.inner.for.cond:
4784 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4785 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4786 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
4787 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4788 // CHECK11: omp.inner.for.cond.cleanup:
4789 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
4790 // CHECK11: omp.inner.for.body:
4791 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4792 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4793 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR3]], align 4
4794 // CHECK11-NEXT: store i32 [[TMP24]], i32* [[T_VAR_CASTED]], align 4
4795 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
4796 // CHECK11-NEXT: [[TMP26:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4
4797 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP22]], i32 [[TMP23]], [2 x i32]* [[VEC4]], i32 [[TMP25]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP26]])
4798 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4799 // CHECK11: omp.inner.for.inc:
4800 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4801 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4802 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
4803 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4804 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
4805 // CHECK11: omp.inner.for.end:
4806 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4807 // CHECK11: omp.loop.exit:
4808 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4809 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
4810 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
4811 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
4812 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
4813 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2
4814 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
4815 // CHECK11: arraydestroy.body:
4816 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4817 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4818 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4819 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
4820 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
4821 // CHECK11: arraydestroy.done11:
4822 // CHECK11-NEXT: ret void
4823 //
4824 //
4825 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
4826 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
4827 // CHECK11-NEXT: entry:
4828 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4829 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4830 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4831 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4832 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
4833 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
4834 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
4835 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
4836 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
4837 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4838 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4839 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4840 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4841 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4842 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4843 // CHECK11-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4
4844 // CHECK11-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4
4845 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
4846 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4
4847 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4848 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4849 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4850 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4851 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4852 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
4853 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
4854 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
4855 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
4856 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
4857 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
4858 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
4859 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
4860 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4861 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
4862 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4863 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4864 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4
4865 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
4866 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4867 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4868 // CHECK11-NEXT: [[TMP5:%.*]] = bitcast [2 x i32]* [[VEC2]] to i8*
4869 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
4870 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i32 8, i1 false)
4871 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0
4872 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x %struct.S.0]* [[TMP1]] to %struct.S.0*
4873 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
4874 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP8]]
4875 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4876 // CHECK11: omp.arraycpy.body:
4877 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4878 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4879 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4880 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4881 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP9]], i8* align 4 [[TMP10]], i32 4, i1 false)
4882 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4883 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4884 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP8]]
4885 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
4886 // CHECK11: omp.arraycpy.done4:
4887 // CHECK11-NEXT: [[TMP11:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
4888 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR5]] to i8*
4889 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP11]] to i8*
4890 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i32 4, i1 false)
4891 // CHECK11-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4
4892 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4893 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
4894 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4895 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4896 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP16]], 1
4897 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4898 // CHECK11: cond.true:
4899 // CHECK11-NEXT: br label [[COND_END:%.*]]
4900 // CHECK11: cond.false:
4901 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4902 // CHECK11-NEXT: br label [[COND_END]]
4903 // CHECK11: cond.end:
4904 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
4905 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4906 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4907 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4
4908 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4909 // CHECK11: omp.inner.for.cond:
4910 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4911 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4912 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
4913 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4914 // CHECK11: omp.inner.for.cond.cleanup:
4915 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
4916 // CHECK11: omp.inner.for.body:
4917 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4918 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1
4919 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4920 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4921 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4
4922 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[I]], align 4
4923 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i32 0, i32 [[TMP23]]
4924 // CHECK11-NEXT: store i32 [[TMP22]], i32* [[ARRAYIDX]], align 4
4925 // CHECK11-NEXT: [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4
4926 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[I]], align 4
4927 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 [[TMP25]]
4928 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8*
4929 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8*
4930 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i32 4, i1 false)
4931 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4932 // CHECK11: omp.body.continue:
4933 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4934 // CHECK11: omp.inner.for.inc:
4935 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4936 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP28]], 1
4937 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
4938 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
4939 // CHECK11: omp.inner.for.end:
4940 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4941 // CHECK11: omp.loop.exit:
4942 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4943 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
4944 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
4945 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
4946 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0
4947 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2
4948 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
4949 // CHECK11: arraydestroy.body:
4950 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4951 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4952 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4953 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
4954 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
4955 // CHECK11: arraydestroy.done11:
4956 // CHECK11-NEXT: ret void
4957 //
4958 //
4959 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
4960 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4961 // CHECK11-NEXT: entry:
4962 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4963 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4964 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4965 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
4966 // CHECK11-NEXT: ret void
4967 //
4968 //
4969 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
4970 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4971 // CHECK11-NEXT: entry:
4972 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4973 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4974 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4975 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4976 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4
4977 // CHECK11-NEXT: ret void
4978 //
4979 //
4980 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
4981 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4982 // CHECK11-NEXT: entry:
4983 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4984 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
4985 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4986 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
4987 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4988 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4989 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4990 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
4991 // CHECK11-NEXT: ret void
4992 //
4993 //
4994 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
4995 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4996 // CHECK11-NEXT: entry:
4997 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4998 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4999 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5000 // CHECK11-NEXT: ret void
5001 //
5002 //
5003 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5004 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
5005 // CHECK11-NEXT: entry:
5006 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
5007 // CHECK11-NEXT: ret void
5008 //
5009 //