1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK2
5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK4
8
9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15
16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK10
19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11
20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK12
22
23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
29 // expected-no-diagnostics
30 #ifndef HEADER
31 #define HEADER
32
33 template <class T>
34 struct S {
35 T f;
SS36 S(T a) : f(a) {}
SS37 S() : f() {}
operator TS38 operator T() { return T(); }
~SS39 ~S() {}
40 };
41
42 template <typename T>
tmain()43 T tmain() {
44 S<T> test;
45 T t_var = T();
46 T vec[] = {1, 2};
47 S<T> s_arr[] = {1, 2};
48 S<T> &var = test;
49 #pragma omp target
50 #pragma omp teams
51 #pragma omp distribute parallel for lastprivate(t_var, vec, s_arr, s_arr, var, var)
52 for (int i = 0; i < 2; ++i) {
53 vec[i] = t_var;
54 s_arr[i] = var;
55 }
56 return T();
57 }
58
main()59 int main() {
60 static int svar;
61 volatile double g;
62 volatile double &g1 = g;
63
64 #ifdef LAMBDA
65 [&]() {
66 static float sfvar;
67
68 #pragma omp target
69 #pragma omp teams
70 #pragma omp distribute parallel for lastprivate(g, g1, svar, sfvar)
71 for (int i = 0; i < 2; ++i) {
72 // loop variables
73
74 // init addr alloca's
75
76 // init private variables
77
78
79 // lastprivate
80
81
82
83 g = 1;
84 g1 = 1;
85 svar = 3;
86 sfvar = 4.0;
87 // outlined function for 'parallel for'
88
89 // addr alloca's
90
91 // loop variables
92
93 // private alloca's
94
95 // init addr alloca's
96
97 // init private variables
98
99
100
101 // loop body
102
103
104 // lastprivate
105
106 [&]() {
107 g = 2;
108 g1 = 2;
109 svar = 4;
110 sfvar = 8.0;
111
112 }();
113 }
114 }();
115 return 0;
116 #else
117 S<float> test;
118 int t_var = 0;
119 int vec[] = {1, 2};
120 S<float> s_arr[] = {1, 2};
121 S<float> &var = test;
122
123 #pragma omp target
124 #pragma omp teams
125 #pragma omp distribute parallel for lastprivate(t_var, vec, s_arr, s_arr, var, var, svar)
126 for (int i = 0; i < 2; ++i) {
127 vec[i] = t_var;
128 s_arr[i] = var;
129 }
130 int i;
131
132 return tmain<int>();
133 #endif
134 }
135
136
137 // skip loop variables
138
139 // copy from parameters to local address variables
140
141 // load content of local address variables
142
143 // call constructor for s_arr
144
145 // the distribute loop
146
147
148 // lastprivates
149
150
151 // outlined function for 'parallel for'
152
153 // skip loop variables
154
155 // copy from parameters to local address variables
156
157 // load content of local address variables
158
159 // call constructor for s_arr
160
161
162 // loop body
163 // assignment: vec[i] = t_var;
164
165 // assignment: s_arr[i] = var;
166
167
168 // lastprivates
169
170
171 // template tmain
172
173
174 // skip alloca of global_tid and bound_tid
175 // skip loop variables
176
177 // skip init of bound and global tid
178 // copy from parameters to local address variables
179
180 // load content of local address variables
181
182
183
184 // lastprivates
185
186
187 // outlined function for 'parallel for'
188
189 // skip loop variables
190
191 // copy from parameters to local address variables
192
193 // load content of local address variables
194
195 // call constructor for s_arr
196
197
198 // assignment: vec[i] = t_var;
199
200 // assignment: s_arr[i] = var;
201
202
203 // lastprivates
204
205
206 #endif
207 // CHECK1-LABEL: define {{[^@]+}}@main
208 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
209 // CHECK1-NEXT: entry:
210 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
211 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8
212 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8
213 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
214 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
215 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8
216 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
217 // CHECK1-NEXT: store double* [[G]], double** [[TMP0]], align 8
218 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
219 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8
220 // CHECK1-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8
221 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]])
222 // CHECK1-NEXT: ret i32 0
223 //
224 //
225 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
226 // CHECK1-SAME: (i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
227 // CHECK1-NEXT: entry:
228 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
229 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
230 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
231 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
232 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
233 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8
234 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8
235 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
236 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
237 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
238 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
239 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
240 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
241 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8
242 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
243 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]])
244 // CHECK1-NEXT: ret void
245 //
246 //
247 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
248 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
249 // CHECK1-NEXT: entry:
250 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
251 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
252 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8
253 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8
254 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
255 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8
256 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
257 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8
258 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
259 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
260 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
261 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
262 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
263 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
264 // CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8
265 // CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8
266 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca double*, align 8
267 // CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
268 // CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
269 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
270 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
271 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
272 // CHECK1-NEXT: store double* [[G]], double** [[G_ADDR]], align 8
273 // CHECK1-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8
274 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
275 // CHECK1-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8
276 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8
277 // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8
278 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
279 // CHECK1-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8
280 // CHECK1-NEXT: store double* [[TMP1]], double** [[TMP]], align 8
281 // CHECK1-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8
282 // CHECK1-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8
283 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
284 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
285 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
286 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
287 // CHECK1-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP1]], align 8
288 // CHECK1-NEXT: store double* [[G14]], double** [[_TMP5]], align 8
289 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
290 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
291 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
292 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
293 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
294 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
295 // CHECK1: cond.true:
296 // CHECK1-NEXT: br label [[COND_END:%.*]]
297 // CHECK1: cond.false:
298 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
299 // CHECK1-NEXT: br label [[COND_END]]
300 // CHECK1: cond.end:
301 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
302 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
303 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
304 // CHECK1-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
305 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
306 // CHECK1: omp.inner.for.cond:
307 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
308 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
309 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
310 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
311 // CHECK1: omp.inner.for.body:
312 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
313 // CHECK1-NEXT: [[TMP14:%.*]] = zext i32 [[TMP13]] to i64
314 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
315 // CHECK1-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
316 // CHECK1-NEXT: [[TMP17:%.*]] = load double*, double** [[_TMP5]], align 8
317 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, double*, double*, i32*, float*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP14]], i64 [[TMP16]], double* [[G3]], double* [[TMP17]], i32* [[SVAR6]], float* [[SFVAR7]])
318 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
319 // CHECK1: omp.inner.for.inc:
320 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
321 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
322 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
323 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
324 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
325 // CHECK1: omp.inner.for.end:
326 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
327 // CHECK1: omp.loop.exit:
328 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]])
329 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
330 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
331 // CHECK1-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
332 // CHECK1: .omp.lastprivate.then:
333 // CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[G3]], align 8
334 // CHECK1-NEXT: store volatile double [[TMP22]], double* [[TMP0]], align 8
335 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP5]], align 8
336 // CHECK1-NEXT: [[TMP24:%.*]] = load double, double* [[TMP23]], align 8
337 // CHECK1-NEXT: store volatile double [[TMP24]], double* [[TMP5]], align 8
338 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[SVAR6]], align 4
339 // CHECK1-NEXT: store i32 [[TMP25]], i32* [[TMP2]], align 4
340 // CHECK1-NEXT: [[TMP26:%.*]] = load float, float* [[SFVAR7]], align 4
341 // CHECK1-NEXT: store float [[TMP26]], float* [[TMP3]], align 4
342 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
343 // CHECK1: .omp.lastprivate.done:
344 // CHECK1-NEXT: ret void
345 //
346 //
347 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
348 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
349 // CHECK1-NEXT: entry:
350 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
351 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
352 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
353 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
354 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8
355 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8
356 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
357 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8
358 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
359 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
360 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
361 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
362 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
363 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
364 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
365 // CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8
366 // CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8
367 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca double*, align 8
368 // CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
369 // CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
370 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
371 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
372 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
373 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
374 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
375 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
376 // CHECK1-NEXT: store double* [[G]], double** [[G_ADDR]], align 8
377 // CHECK1-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8
378 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
379 // CHECK1-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8
380 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8
381 // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8
382 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
383 // CHECK1-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8
384 // CHECK1-NEXT: store double* [[TMP1]], double** [[TMP]], align 8
385 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
386 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
387 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
388 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP4]] to i32
389 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
390 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP5]] to i32
391 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
392 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
393 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
394 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
395 // CHECK1-NEXT: [[TMP6:%.*]] = load double*, double** [[TMP]], align 8
396 // CHECK1-NEXT: store double* [[G14]], double** [[_TMP5]], align 8
397 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
398 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
399 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
400 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
401 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
402 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
403 // CHECK1: cond.true:
404 // CHECK1-NEXT: br label [[COND_END:%.*]]
405 // CHECK1: cond.false:
406 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
407 // CHECK1-NEXT: br label [[COND_END]]
408 // CHECK1: cond.end:
409 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
410 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
411 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
412 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
413 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
414 // CHECK1: omp.inner.for.cond:
415 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
416 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
417 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
418 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
419 // CHECK1: omp.inner.for.body:
420 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
421 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
422 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
423 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
424 // CHECK1-NEXT: store double 1.000000e+00, double* [[G3]], align 8
425 // CHECK1-NEXT: [[TMP15:%.*]] = load double*, double** [[_TMP5]], align 8
426 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP15]], align 8
427 // CHECK1-NEXT: store i32 3, i32* [[SVAR6]], align 4
428 // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR7]], align 4
429 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
430 // CHECK1-NEXT: store double* [[G3]], double** [[TMP16]], align 8
431 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
432 // CHECK1-NEXT: [[TMP18:%.*]] = load double*, double** [[_TMP5]], align 8
433 // CHECK1-NEXT: store double* [[TMP18]], double** [[TMP17]], align 8
434 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
435 // CHECK1-NEXT: store i32* [[SVAR6]], i32** [[TMP19]], align 8
436 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
437 // CHECK1-NEXT: store float* [[SFVAR7]], float** [[TMP20]], align 8
438 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]])
439 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
440 // CHECK1: omp.body.continue:
441 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
442 // CHECK1: omp.inner.for.inc:
443 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
444 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1
445 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
446 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
447 // CHECK1: omp.inner.for.end:
448 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
449 // CHECK1: omp.loop.exit:
450 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]])
451 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
452 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
453 // CHECK1-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
454 // CHECK1: .omp.lastprivate.then:
455 // CHECK1-NEXT: [[TMP24:%.*]] = load double, double* [[G3]], align 8
456 // CHECK1-NEXT: store volatile double [[TMP24]], double* [[TMP0]], align 8
457 // CHECK1-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 8
458 // CHECK1-NEXT: [[TMP26:%.*]] = load double, double* [[TMP25]], align 8
459 // CHECK1-NEXT: store volatile double [[TMP26]], double* [[TMP6]], align 8
460 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[SVAR6]], align 4
461 // CHECK1-NEXT: store i32 [[TMP27]], i32* [[TMP2]], align 4
462 // CHECK1-NEXT: [[TMP28:%.*]] = load float, float* [[SFVAR7]], align 4
463 // CHECK1-NEXT: store float [[TMP28]], float* [[TMP3]], align 4
464 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
465 // CHECK1: .omp.lastprivate.done:
466 // CHECK1-NEXT: ret void
467 //
468 //
469 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
470 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
471 // CHECK1-NEXT: entry:
472 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
473 // CHECK1-NEXT: ret void
474 //
475 //
476 // CHECK2-LABEL: define {{[^@]+}}@main
477 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
478 // CHECK2-NEXT: entry:
479 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
480 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8
481 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8
482 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
483 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4
484 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8
485 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
486 // CHECK2-NEXT: store double* [[G]], double** [[TMP0]], align 8
487 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
488 // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8
489 // CHECK2-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8
490 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]])
491 // CHECK2-NEXT: ret i32 0
492 //
493 //
494 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
495 // CHECK2-SAME: (i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
496 // CHECK2-NEXT: entry:
497 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
498 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
499 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
500 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
501 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8
502 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8
503 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8
504 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
505 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
506 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
507 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
508 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
509 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
510 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8
511 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
512 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]])
513 // CHECK2-NEXT: ret void
514 //
515 //
516 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
517 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
518 // CHECK2-NEXT: entry:
519 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
520 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
521 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8
522 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8
523 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
524 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8
525 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8
526 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8
527 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
528 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
529 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
530 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
531 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
532 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
533 // CHECK2-NEXT: [[G3:%.*]] = alloca double, align 8
534 // CHECK2-NEXT: [[G14:%.*]] = alloca double, align 8
535 // CHECK2-NEXT: [[_TMP5:%.*]] = alloca double*, align 8
536 // CHECK2-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
537 // CHECK2-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
538 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
539 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
540 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
541 // CHECK2-NEXT: store double* [[G]], double** [[G_ADDR]], align 8
542 // CHECK2-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8
543 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
544 // CHECK2-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8
545 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8
546 // CHECK2-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8
547 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
548 // CHECK2-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8
549 // CHECK2-NEXT: store double* [[TMP1]], double** [[TMP]], align 8
550 // CHECK2-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8
551 // CHECK2-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8
552 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
553 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
554 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
555 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
556 // CHECK2-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP1]], align 8
557 // CHECK2-NEXT: store double* [[G14]], double** [[_TMP5]], align 8
558 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
559 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
560 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
561 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
562 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
563 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
564 // CHECK2: cond.true:
565 // CHECK2-NEXT: br label [[COND_END:%.*]]
566 // CHECK2: cond.false:
567 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
568 // CHECK2-NEXT: br label [[COND_END]]
569 // CHECK2: cond.end:
570 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
571 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
572 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
573 // CHECK2-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
574 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
575 // CHECK2: omp.inner.for.cond:
576 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
577 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
578 // CHECK2-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
579 // CHECK2-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
580 // CHECK2: omp.inner.for.body:
581 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
582 // CHECK2-NEXT: [[TMP14:%.*]] = zext i32 [[TMP13]] to i64
583 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
584 // CHECK2-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
585 // CHECK2-NEXT: [[TMP17:%.*]] = load double*, double** [[_TMP5]], align 8
586 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, double*, double*, i32*, float*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP14]], i64 [[TMP16]], double* [[G3]], double* [[TMP17]], i32* [[SVAR6]], float* [[SFVAR7]])
587 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
588 // CHECK2: omp.inner.for.inc:
589 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
590 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
591 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
592 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
593 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
594 // CHECK2: omp.inner.for.end:
595 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
596 // CHECK2: omp.loop.exit:
597 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]])
598 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
599 // CHECK2-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
600 // CHECK2-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
601 // CHECK2: .omp.lastprivate.then:
602 // CHECK2-NEXT: [[TMP22:%.*]] = load double, double* [[G3]], align 8
603 // CHECK2-NEXT: store volatile double [[TMP22]], double* [[TMP0]], align 8
604 // CHECK2-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP5]], align 8
605 // CHECK2-NEXT: [[TMP24:%.*]] = load double, double* [[TMP23]], align 8
606 // CHECK2-NEXT: store volatile double [[TMP24]], double* [[TMP5]], align 8
607 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[SVAR6]], align 4
608 // CHECK2-NEXT: store i32 [[TMP25]], i32* [[TMP2]], align 4
609 // CHECK2-NEXT: [[TMP26:%.*]] = load float, float* [[SFVAR7]], align 4
610 // CHECK2-NEXT: store float [[TMP26]], float* [[TMP3]], align 4
611 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
612 // CHECK2: .omp.lastprivate.done:
613 // CHECK2-NEXT: ret void
614 //
615 //
616 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
617 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
618 // CHECK2-NEXT: entry:
619 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
620 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
621 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
622 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
623 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8
624 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8
625 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
626 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8
627 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8
628 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
629 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
630 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
631 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
632 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
633 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
634 // CHECK2-NEXT: [[G3:%.*]] = alloca double, align 8
635 // CHECK2-NEXT: [[G14:%.*]] = alloca double, align 8
636 // CHECK2-NEXT: [[_TMP5:%.*]] = alloca double*, align 8
637 // CHECK2-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
638 // CHECK2-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
639 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
640 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
641 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
642 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
643 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
644 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
645 // CHECK2-NEXT: store double* [[G]], double** [[G_ADDR]], align 8
646 // CHECK2-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8
647 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
648 // CHECK2-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8
649 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8
650 // CHECK2-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8
651 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
652 // CHECK2-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8
653 // CHECK2-NEXT: store double* [[TMP1]], double** [[TMP]], align 8
654 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
655 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
656 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
657 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP4]] to i32
658 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
659 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP5]] to i32
660 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
661 // CHECK2-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
662 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
663 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
664 // CHECK2-NEXT: [[TMP6:%.*]] = load double*, double** [[TMP]], align 8
665 // CHECK2-NEXT: store double* [[G14]], double** [[_TMP5]], align 8
666 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
667 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
668 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
669 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
670 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
671 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
672 // CHECK2: cond.true:
673 // CHECK2-NEXT: br label [[COND_END:%.*]]
674 // CHECK2: cond.false:
675 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
676 // CHECK2-NEXT: br label [[COND_END]]
677 // CHECK2: cond.end:
678 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
679 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
680 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
681 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
682 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
683 // CHECK2: omp.inner.for.cond:
684 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
685 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
686 // CHECK2-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
687 // CHECK2-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
688 // CHECK2: omp.inner.for.body:
689 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
690 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
691 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
692 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
693 // CHECK2-NEXT: store double 1.000000e+00, double* [[G3]], align 8
694 // CHECK2-NEXT: [[TMP15:%.*]] = load double*, double** [[_TMP5]], align 8
695 // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP15]], align 8
696 // CHECK2-NEXT: store i32 3, i32* [[SVAR6]], align 4
697 // CHECK2-NEXT: store float 4.000000e+00, float* [[SFVAR7]], align 4
698 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
699 // CHECK2-NEXT: store double* [[G3]], double** [[TMP16]], align 8
700 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
701 // CHECK2-NEXT: [[TMP18:%.*]] = load double*, double** [[_TMP5]], align 8
702 // CHECK2-NEXT: store double* [[TMP18]], double** [[TMP17]], align 8
703 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
704 // CHECK2-NEXT: store i32* [[SVAR6]], i32** [[TMP19]], align 8
705 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
706 // CHECK2-NEXT: store float* [[SFVAR7]], float** [[TMP20]], align 8
707 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]])
708 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
709 // CHECK2: omp.body.continue:
710 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
711 // CHECK2: omp.inner.for.inc:
712 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
713 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1
714 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
715 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
716 // CHECK2: omp.inner.for.end:
717 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
718 // CHECK2: omp.loop.exit:
719 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]])
720 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
721 // CHECK2-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
722 // CHECK2-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
723 // CHECK2: .omp.lastprivate.then:
724 // CHECK2-NEXT: [[TMP24:%.*]] = load double, double* [[G3]], align 8
725 // CHECK2-NEXT: store volatile double [[TMP24]], double* [[TMP0]], align 8
726 // CHECK2-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 8
727 // CHECK2-NEXT: [[TMP26:%.*]] = load double, double* [[TMP25]], align 8
728 // CHECK2-NEXT: store volatile double [[TMP26]], double* [[TMP6]], align 8
729 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[SVAR6]], align 4
730 // CHECK2-NEXT: store i32 [[TMP27]], i32* [[TMP2]], align 4
731 // CHECK2-NEXT: [[TMP28:%.*]] = load float, float* [[SFVAR7]], align 4
732 // CHECK2-NEXT: store float [[TMP28]], float* [[TMP3]], align 4
733 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
734 // CHECK2: .omp.lastprivate.done:
735 // CHECK2-NEXT: ret void
736 //
737 //
738 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
739 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] {
740 // CHECK2-NEXT: entry:
741 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
742 // CHECK2-NEXT: ret void
743 //
744 //
745 // CHECK3-LABEL: define {{[^@]+}}@main
746 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
747 // CHECK3-NEXT: entry:
748 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
749 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8
750 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4
751 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
752 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
753 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4
754 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
755 // CHECK3-NEXT: store double* [[G]], double** [[TMP0]], align 4
756 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
757 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4
758 // CHECK3-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4
759 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]])
760 // CHECK3-NEXT: ret i32 0
761 //
762 //
763 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
764 // CHECK3-SAME: (double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
765 // CHECK3-NEXT: entry:
766 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
767 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
768 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
769 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
770 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
771 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8
772 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8
773 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4
774 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
775 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
776 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
777 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
778 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
779 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
780 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
781 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
782 // CHECK3-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8
783 // CHECK3-NEXT: store double [[TMP2]], double* [[G2]], align 8
784 // CHECK3-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4
785 // CHECK3-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4
786 // CHECK3-NEXT: store double [[TMP4]], double* [[G13]], align 8
787 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4
788 // CHECK3-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4
789 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]])
790 // CHECK3-NEXT: ret void
791 //
792 //
793 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
794 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
795 // CHECK3-NEXT: entry:
796 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
797 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
798 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
799 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
800 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
801 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4
802 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
803 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4
804 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
805 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
806 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
807 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
808 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
809 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
810 // CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8
811 // CHECK3-NEXT: [[G14:%.*]] = alloca double, align 8
812 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca double*, align 4
813 // CHECK3-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
814 // CHECK3-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
815 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
816 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
817 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
818 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
819 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
820 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
821 // CHECK3-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4
822 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
823 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
824 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
825 // CHECK3-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4
826 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
827 // CHECK3-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4
828 // CHECK3-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4
829 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
830 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
831 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
832 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
833 // CHECK3-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP1]], align 4
834 // CHECK3-NEXT: store double* [[G14]], double** [[_TMP5]], align 4
835 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
836 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
837 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
838 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
839 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
840 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
841 // CHECK3: cond.true:
842 // CHECK3-NEXT: br label [[COND_END:%.*]]
843 // CHECK3: cond.false:
844 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
845 // CHECK3-NEXT: br label [[COND_END]]
846 // CHECK3: cond.end:
847 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
848 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
849 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
850 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
851 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
852 // CHECK3: omp.inner.for.cond:
853 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
854 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
855 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
856 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
857 // CHECK3: omp.inner.for.body:
858 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
859 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
860 // CHECK3-NEXT: [[TMP15:%.*]] = load double*, double** [[_TMP5]], align 4
861 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, double*, double*, i32*, float*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP13]], i32 [[TMP14]], double* [[G3]], double* [[TMP15]], i32* [[SVAR6]], float* [[SFVAR7]])
862 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
863 // CHECK3: omp.inner.for.inc:
864 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
865 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
866 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
867 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
868 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
869 // CHECK3: omp.inner.for.end:
870 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
871 // CHECK3: omp.loop.exit:
872 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]])
873 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
874 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
875 // CHECK3-NEXT: br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
876 // CHECK3: .omp.lastprivate.then:
877 // CHECK3-NEXT: [[TMP20:%.*]] = load double, double* [[G3]], align 8
878 // CHECK3-NEXT: store volatile double [[TMP20]], double* [[TMP0]], align 8
879 // CHECK3-NEXT: [[TMP21:%.*]] = load double*, double** [[_TMP5]], align 4
880 // CHECK3-NEXT: [[TMP22:%.*]] = load double, double* [[TMP21]], align 4
881 // CHECK3-NEXT: store volatile double [[TMP22]], double* [[TMP5]], align 4
882 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[SVAR6]], align 4
883 // CHECK3-NEXT: store i32 [[TMP23]], i32* [[TMP2]], align 4
884 // CHECK3-NEXT: [[TMP24:%.*]] = load float, float* [[SFVAR7]], align 4
885 // CHECK3-NEXT: store float [[TMP24]], float* [[TMP3]], align 4
886 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
887 // CHECK3: .omp.lastprivate.done:
888 // CHECK3-NEXT: ret void
889 //
890 //
891 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
892 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
893 // CHECK3-NEXT: entry:
894 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
895 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
896 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
897 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
898 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
899 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
900 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
901 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4
902 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
903 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
904 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
905 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
906 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
907 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
908 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
909 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8
910 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8
911 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4
912 // CHECK3-NEXT: [[SVAR5:%.*]] = alloca i32, align 4
913 // CHECK3-NEXT: [[SFVAR6:%.*]] = alloca float, align 4
914 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
915 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
916 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
917 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
918 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
919 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
920 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
921 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
922 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
923 // CHECK3-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4
924 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
925 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
926 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
927 // CHECK3-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4
928 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
929 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
930 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
931 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
932 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
933 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_LB]], align 4
934 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
935 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
936 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
937 // CHECK3-NEXT: [[TMP6:%.*]] = load double*, double** [[TMP]], align 4
938 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4
939 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
940 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
941 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
942 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
943 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
944 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
945 // CHECK3: cond.true:
946 // CHECK3-NEXT: br label [[COND_END:%.*]]
947 // CHECK3: cond.false:
948 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
949 // CHECK3-NEXT: br label [[COND_END]]
950 // CHECK3: cond.end:
951 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
952 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
953 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
954 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
955 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
956 // CHECK3: omp.inner.for.cond:
957 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
958 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
959 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
960 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
961 // CHECK3: omp.inner.for.body:
962 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
963 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
964 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
965 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
966 // CHECK3-NEXT: store double 1.000000e+00, double* [[G2]], align 8
967 // CHECK3-NEXT: [[TMP15:%.*]] = load double*, double** [[_TMP4]], align 4
968 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP15]], align 4
969 // CHECK3-NEXT: store i32 3, i32* [[SVAR5]], align 4
970 // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4
971 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
972 // CHECK3-NEXT: store double* [[G2]], double** [[TMP16]], align 4
973 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
974 // CHECK3-NEXT: [[TMP18:%.*]] = load double*, double** [[_TMP4]], align 4
975 // CHECK3-NEXT: store double* [[TMP18]], double** [[TMP17]], align 4
976 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
977 // CHECK3-NEXT: store i32* [[SVAR5]], i32** [[TMP19]], align 4
978 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
979 // CHECK3-NEXT: store float* [[SFVAR6]], float** [[TMP20]], align 4
980 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]])
981 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
982 // CHECK3: omp.body.continue:
983 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
984 // CHECK3: omp.inner.for.inc:
985 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
986 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1
987 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
988 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
989 // CHECK3: omp.inner.for.end:
990 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
991 // CHECK3: omp.loop.exit:
992 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]])
993 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
994 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
995 // CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
996 // CHECK3: .omp.lastprivate.then:
997 // CHECK3-NEXT: [[TMP24:%.*]] = load double, double* [[G2]], align 8
998 // CHECK3-NEXT: store volatile double [[TMP24]], double* [[TMP0]], align 8
999 // CHECK3-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP4]], align 4
1000 // CHECK3-NEXT: [[TMP26:%.*]] = load double, double* [[TMP25]], align 4
1001 // CHECK3-NEXT: store volatile double [[TMP26]], double* [[TMP6]], align 4
1002 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[SVAR5]], align 4
1003 // CHECK3-NEXT: store i32 [[TMP27]], i32* [[TMP2]], align 4
1004 // CHECK3-NEXT: [[TMP28:%.*]] = load float, float* [[SFVAR6]], align 4
1005 // CHECK3-NEXT: store float [[TMP28]], float* [[TMP3]], align 4
1006 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1007 // CHECK3: .omp.lastprivate.done:
1008 // CHECK3-NEXT: ret void
1009 //
1010 //
1011 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1012 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
1013 // CHECK3-NEXT: entry:
1014 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
1015 // CHECK3-NEXT: ret void
1016 //
1017 //
1018 // CHECK4-LABEL: define {{[^@]+}}@main
1019 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
1020 // CHECK4-NEXT: entry:
1021 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1022 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8
1023 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4
1024 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
1025 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4
1026 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4
1027 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
1028 // CHECK4-NEXT: store double* [[G]], double** [[TMP0]], align 4
1029 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
1030 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4
1031 // CHECK4-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4
1032 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]])
1033 // CHECK4-NEXT: ret i32 0
1034 //
1035 //
1036 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
1037 // CHECK4-SAME: (double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
1038 // CHECK4-NEXT: entry:
1039 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
1040 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
1041 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
1042 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
1043 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4
1044 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8
1045 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8
1046 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4
1047 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
1048 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
1049 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
1050 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
1051 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
1052 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
1053 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
1054 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
1055 // CHECK4-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8
1056 // CHECK4-NEXT: store double [[TMP2]], double* [[G2]], align 8
1057 // CHECK4-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4
1058 // CHECK4-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4
1059 // CHECK4-NEXT: store double [[TMP4]], double* [[G13]], align 8
1060 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4
1061 // CHECK4-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4
1062 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]])
1063 // CHECK4-NEXT: ret void
1064 //
1065 //
1066 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
1067 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
1068 // CHECK4-NEXT: entry:
1069 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1070 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1071 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
1072 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
1073 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
1074 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4
1075 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4
1076 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4
1077 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1078 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1079 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1080 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1081 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1082 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1083 // CHECK4-NEXT: [[G3:%.*]] = alloca double, align 8
1084 // CHECK4-NEXT: [[G14:%.*]] = alloca double, align 8
1085 // CHECK4-NEXT: [[_TMP5:%.*]] = alloca double*, align 4
1086 // CHECK4-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
1087 // CHECK4-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
1088 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1089 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1090 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1091 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
1092 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
1093 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
1094 // CHECK4-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4
1095 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
1096 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
1097 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
1098 // CHECK4-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4
1099 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
1100 // CHECK4-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4
1101 // CHECK4-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4
1102 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1103 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1104 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1105 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1106 // CHECK4-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP1]], align 4
1107 // CHECK4-NEXT: store double* [[G14]], double** [[_TMP5]], align 4
1108 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1109 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1110 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1111 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1112 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
1113 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1114 // CHECK4: cond.true:
1115 // CHECK4-NEXT: br label [[COND_END:%.*]]
1116 // CHECK4: cond.false:
1117 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1118 // CHECK4-NEXT: br label [[COND_END]]
1119 // CHECK4: cond.end:
1120 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
1121 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1122 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1123 // CHECK4-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
1124 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1125 // CHECK4: omp.inner.for.cond:
1126 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1127 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1128 // CHECK4-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
1129 // CHECK4-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1130 // CHECK4: omp.inner.for.body:
1131 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1132 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1133 // CHECK4-NEXT: [[TMP15:%.*]] = load double*, double** [[_TMP5]], align 4
1134 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, double*, double*, i32*, float*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP13]], i32 [[TMP14]], double* [[G3]], double* [[TMP15]], i32* [[SVAR6]], float* [[SFVAR7]])
1135 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1136 // CHECK4: omp.inner.for.inc:
1137 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1138 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1139 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
1140 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1141 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
1142 // CHECK4: omp.inner.for.end:
1143 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1144 // CHECK4: omp.loop.exit:
1145 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]])
1146 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1147 // CHECK4-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
1148 // CHECK4-NEXT: br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1149 // CHECK4: .omp.lastprivate.then:
1150 // CHECK4-NEXT: [[TMP20:%.*]] = load double, double* [[G3]], align 8
1151 // CHECK4-NEXT: store volatile double [[TMP20]], double* [[TMP0]], align 8
1152 // CHECK4-NEXT: [[TMP21:%.*]] = load double*, double** [[_TMP5]], align 4
1153 // CHECK4-NEXT: [[TMP22:%.*]] = load double, double* [[TMP21]], align 4
1154 // CHECK4-NEXT: store volatile double [[TMP22]], double* [[TMP5]], align 4
1155 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[SVAR6]], align 4
1156 // CHECK4-NEXT: store i32 [[TMP23]], i32* [[TMP2]], align 4
1157 // CHECK4-NEXT: [[TMP24:%.*]] = load float, float* [[SFVAR7]], align 4
1158 // CHECK4-NEXT: store float [[TMP24]], float* [[TMP3]], align 4
1159 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1160 // CHECK4: .omp.lastprivate.done:
1161 // CHECK4-NEXT: ret void
1162 //
1163 //
1164 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
1165 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
1166 // CHECK4-NEXT: entry:
1167 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1168 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1169 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1170 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1171 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
1172 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
1173 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
1174 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4
1175 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4
1176 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1177 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1178 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1179 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1180 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1181 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1182 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8
1183 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8
1184 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4
1185 // CHECK4-NEXT: [[SVAR5:%.*]] = alloca i32, align 4
1186 // CHECK4-NEXT: [[SFVAR6:%.*]] = alloca float, align 4
1187 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1188 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
1189 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1190 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1191 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1192 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1193 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
1194 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
1195 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
1196 // CHECK4-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4
1197 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
1198 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
1199 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
1200 // CHECK4-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4
1201 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
1202 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1203 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1204 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1205 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1206 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_LB]], align 4
1207 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
1208 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1209 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1210 // CHECK4-NEXT: [[TMP6:%.*]] = load double*, double** [[TMP]], align 4
1211 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4
1212 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1213 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1214 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1215 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1216 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
1217 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1218 // CHECK4: cond.true:
1219 // CHECK4-NEXT: br label [[COND_END:%.*]]
1220 // CHECK4: cond.false:
1221 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1222 // CHECK4-NEXT: br label [[COND_END]]
1223 // CHECK4: cond.end:
1224 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1225 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1226 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1227 // CHECK4-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
1228 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1229 // CHECK4: omp.inner.for.cond:
1230 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1231 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1232 // CHECK4-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1233 // CHECK4-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1234 // CHECK4: omp.inner.for.body:
1235 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1236 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1237 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1238 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1239 // CHECK4-NEXT: store double 1.000000e+00, double* [[G2]], align 8
1240 // CHECK4-NEXT: [[TMP15:%.*]] = load double*, double** [[_TMP4]], align 4
1241 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP15]], align 4
1242 // CHECK4-NEXT: store i32 3, i32* [[SVAR5]], align 4
1243 // CHECK4-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4
1244 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
1245 // CHECK4-NEXT: store double* [[G2]], double** [[TMP16]], align 4
1246 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
1247 // CHECK4-NEXT: [[TMP18:%.*]] = load double*, double** [[_TMP4]], align 4
1248 // CHECK4-NEXT: store double* [[TMP18]], double** [[TMP17]], align 4
1249 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
1250 // CHECK4-NEXT: store i32* [[SVAR5]], i32** [[TMP19]], align 4
1251 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
1252 // CHECK4-NEXT: store float* [[SFVAR6]], float** [[TMP20]], align 4
1253 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]])
1254 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1255 // CHECK4: omp.body.continue:
1256 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1257 // CHECK4: omp.inner.for.inc:
1258 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1259 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1
1260 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
1261 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
1262 // CHECK4: omp.inner.for.end:
1263 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1264 // CHECK4: omp.loop.exit:
1265 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]])
1266 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1267 // CHECK4-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
1268 // CHECK4-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1269 // CHECK4: .omp.lastprivate.then:
1270 // CHECK4-NEXT: [[TMP24:%.*]] = load double, double* [[G2]], align 8
1271 // CHECK4-NEXT: store volatile double [[TMP24]], double* [[TMP0]], align 8
1272 // CHECK4-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP4]], align 4
1273 // CHECK4-NEXT: [[TMP26:%.*]] = load double, double* [[TMP25]], align 4
1274 // CHECK4-NEXT: store volatile double [[TMP26]], double* [[TMP6]], align 4
1275 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[SVAR5]], align 4
1276 // CHECK4-NEXT: store i32 [[TMP27]], i32* [[TMP2]], align 4
1277 // CHECK4-NEXT: [[TMP28:%.*]] = load float, float* [[SFVAR6]], align 4
1278 // CHECK4-NEXT: store float [[TMP28]], float* [[TMP3]], align 4
1279 // CHECK4-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1280 // CHECK4: .omp.lastprivate.done:
1281 // CHECK4-NEXT: ret void
1282 //
1283 //
1284 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1285 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] {
1286 // CHECK4-NEXT: entry:
1287 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
1288 // CHECK4-NEXT: ret void
1289 //
1290 //
1291 // CHECK9-LABEL: define {{[^@]+}}@main
1292 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
1293 // CHECK9-NEXT: entry:
1294 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1295 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8
1296 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8
1297 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1298 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1299 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1300 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1301 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8
1302 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
1303 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1304 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
1305 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
1306 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
1307 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
1308 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1309 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1310 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
1311 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8
1312 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
1313 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4
1314 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1315 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
1316 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
1317 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
1318 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
1319 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
1320 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
1321 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
1322 // CHECK9-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
1323 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1324 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1325 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
1326 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1327 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1328 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
1329 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
1330 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
1331 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
1332 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1333 // CHECK9-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1334 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1335 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1336 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
1337 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1338 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
1339 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8
1340 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1341 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8
1342 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1343 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1344 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
1345 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1346 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
1347 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8
1348 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1349 // CHECK9-NEXT: store i8* null, i8** [[TMP18]], align 8
1350 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1351 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
1352 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8
1353 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1354 // CHECK9-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
1355 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8
1356 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1357 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8
1358 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1359 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
1360 // CHECK9-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8
1361 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1362 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
1363 // CHECK9-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8
1364 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1365 // CHECK9-NEXT: store i8* null, i8** [[TMP28]], align 8
1366 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1367 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
1368 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8
1369 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1370 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
1371 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8
1372 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
1373 // CHECK9-NEXT: store i8* null, i8** [[TMP33]], align 8
1374 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1375 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1376 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
1377 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1378 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
1379 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1380 // CHECK9: omp_offload.failed:
1381 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]
1382 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1383 // CHECK9: omp_offload.cont:
1384 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
1385 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1386 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1387 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1388 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1389 // CHECK9: arraydestroy.body:
1390 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1391 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1392 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1393 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1394 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
1395 // CHECK9: arraydestroy.done3:
1396 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1397 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
1398 // CHECK9-NEXT: ret i32 [[TMP39]]
1399 //
1400 //
1401 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1402 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1403 // CHECK9-NEXT: entry:
1404 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1405 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1406 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1407 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
1408 // CHECK9-NEXT: ret void
1409 //
1410 //
1411 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1412 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1413 // CHECK9-NEXT: entry:
1414 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1415 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1416 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1417 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1418 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1419 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1420 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
1421 // CHECK9-NEXT: ret void
1422 //
1423 //
1424 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123
1425 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1426 // CHECK9-NEXT: entry:
1427 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1428 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1429 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1430 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1431 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
1432 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
1433 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1434 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1435 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1436 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1437 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
1438 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1439 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1440 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1441 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1442 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
1443 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
1444 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1445 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]])
1446 // CHECK9-NEXT: ret void
1447 //
1448 //
1449 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
1450 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
1451 // CHECK9-NEXT: entry:
1452 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1453 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1454 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1455 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1456 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1457 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1458 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
1459 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
1460 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8
1461 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1462 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1463 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1464 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1465 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1466 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1467 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1468 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1469 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
1470 // CHECK9-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1471 // CHECK9-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 8
1472 // CHECK9-NEXT: [[SVAR8:%.*]] = alloca i32, align 4
1473 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1474 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1475 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1476 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1477 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1478 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1479 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1480 // CHECK9-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
1481 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1482 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1483 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1484 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1485 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
1486 // CHECK9-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8
1487 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1488 // CHECK9-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8
1489 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1490 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1491 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1492 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1493 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1494 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1495 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1496 // CHECK9: arrayctor.loop:
1497 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1498 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1499 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1500 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1501 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1502 // CHECK9: arrayctor.cont:
1503 // CHECK9-NEXT: [[TMP6:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8
1504 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]])
1505 // CHECK9-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8
1506 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1507 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1508 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1509 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1510 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
1511 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1512 // CHECK9: cond.true:
1513 // CHECK9-NEXT: br label [[COND_END:%.*]]
1514 // CHECK9: cond.false:
1515 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1516 // CHECK9-NEXT: br label [[COND_END]]
1517 // CHECK9: cond.end:
1518 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1519 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1520 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1521 // CHECK9-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
1522 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1523 // CHECK9: omp.inner.for.cond:
1524 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1525 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1526 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1527 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1528 // CHECK9: omp.inner.for.cond.cleanup:
1529 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1530 // CHECK9: omp.inner.for.body:
1531 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1532 // CHECK9-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
1533 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1534 // CHECK9-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
1535 // CHECK9-NEXT: [[TMP18:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
1536 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], [2 x i32]* [[VEC4]], i32* [[T_VAR3]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP18]], i32* [[SVAR8]])
1537 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1538 // CHECK9: omp.inner.for.inc:
1539 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1540 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1541 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1542 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1543 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1544 // CHECK9: omp.inner.for.end:
1545 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1546 // CHECK9: omp.loop.exit:
1547 // CHECK9-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1548 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
1549 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
1550 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1551 // CHECK9-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1552 // CHECK9-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1553 // CHECK9: .omp.lastprivate.then:
1554 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4
1555 // CHECK9-NEXT: store i32 [[TMP25]], i32* [[TMP0]], align 4
1556 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1557 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1558 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 8, i1 false)
1559 // CHECK9-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
1560 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
1561 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i64 2
1562 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN10]], [[TMP29]]
1563 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1564 // CHECK9: omp.arraycpy.body:
1565 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1566 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1567 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1568 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1569 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i64 4, i1 false)
1570 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1571 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1572 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]]
1573 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
1574 // CHECK9: omp.arraycpy.done11:
1575 // CHECK9-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
1576 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
1577 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8*
1578 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false)
1579 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR8]], align 4
1580 // CHECK9-NEXT: store i32 [[TMP35]], i32* [[TMP4]], align 4
1581 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1582 // CHECK9: .omp.lastprivate.done:
1583 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1584 // CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1585 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2
1586 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1587 // CHECK9: arraydestroy.body:
1588 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1589 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1590 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1591 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
1592 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
1593 // CHECK9: arraydestroy.done13:
1594 // CHECK9-NEXT: ret void
1595 //
1596 //
1597 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1598 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
1599 // CHECK9-NEXT: entry:
1600 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1601 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1602 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1603 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1604 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1605 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1606 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1607 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1608 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
1609 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
1610 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1611 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1612 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1613 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1614 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1615 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1616 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1617 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1618 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
1619 // CHECK9-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1620 // CHECK9-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 8
1621 // CHECK9-NEXT: [[SVAR8:%.*]] = alloca i32, align 4
1622 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1623 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1624 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1625 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1626 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1627 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1628 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1629 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1630 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1631 // CHECK9-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
1632 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1633 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1634 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1635 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1636 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
1637 // CHECK9-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8
1638 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1639 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1640 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1641 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i32
1642 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1643 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
1644 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1645 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
1646 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1647 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1648 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1649 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1650 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1651 // CHECK9: arrayctor.loop:
1652 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1653 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1654 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1655 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1656 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1657 // CHECK9: arrayctor.cont:
1658 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1659 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]])
1660 // CHECK9-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8
1661 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1662 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
1663 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1664 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1665 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1
1666 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1667 // CHECK9: cond.true:
1668 // CHECK9-NEXT: br label [[COND_END:%.*]]
1669 // CHECK9: cond.false:
1670 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1671 // CHECK9-NEXT: br label [[COND_END]]
1672 // CHECK9: cond.end:
1673 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1674 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1675 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1676 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
1677 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1678 // CHECK9: omp.inner.for.cond:
1679 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1680 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1681 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1682 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1683 // CHECK9: omp.inner.for.cond.cleanup:
1684 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1685 // CHECK9: omp.inner.for.body:
1686 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1687 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
1688 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1689 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1690 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[T_VAR3]], align 4
1691 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4
1692 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
1693 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
1694 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[ARRAYIDX]], align 4
1695 // CHECK9-NEXT: [[TMP18:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
1696 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I]], align 4
1697 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP19]] to i64
1698 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]]
1699 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8*
1700 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast %struct.S* [[TMP18]] to i8*
1701 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP20]], i8* align 4 [[TMP21]], i64 4, i1 false)
1702 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1703 // CHECK9: omp.body.continue:
1704 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1705 // CHECK9: omp.inner.for.inc:
1706 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1707 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP22]], 1
1708 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
1709 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1710 // CHECK9: omp.inner.for.end:
1711 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1712 // CHECK9: omp.loop.exit:
1713 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1714 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
1715 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
1716 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1717 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1718 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1719 // CHECK9: .omp.lastprivate.then:
1720 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR3]], align 4
1721 // CHECK9-NEXT: store i32 [[TMP27]], i32* [[TMP1]], align 4
1722 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
1723 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1724 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 8, i1 false)
1725 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
1726 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
1727 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i64 2
1728 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN13]], [[TMP31]]
1729 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1730 // CHECK9: omp.arraycpy.body:
1731 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1732 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1733 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1734 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1735 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false)
1736 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1737 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1738 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]]
1739 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
1740 // CHECK9: omp.arraycpy.done14:
1741 // CHECK9-NEXT: [[TMP34:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
1742 // CHECK9-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
1743 // CHECK9-NEXT: [[TMP36:%.*]] = bitcast %struct.S* [[TMP34]] to i8*
1744 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false)
1745 // CHECK9-NEXT: [[TMP37:%.*]] = load i32, i32* [[SVAR8]], align 4
1746 // CHECK9-NEXT: store i32 [[TMP37]], i32* [[TMP4]], align 4
1747 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1748 // CHECK9: .omp.lastprivate.done:
1749 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1750 // CHECK9-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1751 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2
1752 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1753 // CHECK9: arraydestroy.body:
1754 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1755 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1756 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1757 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
1758 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
1759 // CHECK9: arraydestroy.done16:
1760 // CHECK9-NEXT: ret void
1761 //
1762 //
1763 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1764 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1765 // CHECK9-NEXT: entry:
1766 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1767 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1768 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1769 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1770 // CHECK9-NEXT: ret void
1771 //
1772 //
1773 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1774 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat {
1775 // CHECK9-NEXT: entry:
1776 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1777 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1778 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1779 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1780 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1781 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8
1782 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1783 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1784 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
1785 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
1786 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
1787 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1788 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
1789 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4
1790 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1791 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1792 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1793 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1)
1794 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1795 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2)
1796 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
1797 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
1798 // CHECK9-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
1799 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1800 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1801 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
1802 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1803 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1804 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1805 // CHECK9-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1806 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1807 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
1808 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8
1809 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1810 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1811 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
1812 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1813 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8
1814 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1815 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
1816 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8
1817 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1818 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1819 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
1820 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1821 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8
1822 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1823 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
1824 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8
1825 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1826 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
1827 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8
1828 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1829 // CHECK9-NEXT: store i8* null, i8** [[TMP21]], align 8
1830 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1831 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
1832 // CHECK9-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8
1833 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1834 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
1835 // CHECK9-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8
1836 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1837 // CHECK9-NEXT: store i8* null, i8** [[TMP26]], align 8
1838 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1839 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1840 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
1841 // CHECK9-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1842 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
1843 // CHECK9-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1844 // CHECK9: omp_offload.failed:
1845 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
1846 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1847 // CHECK9: omp_offload.cont:
1848 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
1849 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1850 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1851 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1852 // CHECK9: arraydestroy.body:
1853 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1854 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1855 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1856 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1857 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1858 // CHECK9: arraydestroy.done2:
1859 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1860 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
1861 // CHECK9-NEXT: ret i32 [[TMP32]]
1862 //
1863 //
1864 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1865 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1866 // CHECK9-NEXT: entry:
1867 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1868 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1869 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1870 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1871 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4
1872 // CHECK9-NEXT: ret void
1873 //
1874 //
1875 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1876 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1877 // CHECK9-NEXT: entry:
1878 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1879 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1880 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1881 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1882 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1883 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1884 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1885 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4
1886 // CHECK9-NEXT: ret void
1887 //
1888 //
1889 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1890 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1891 // CHECK9-NEXT: entry:
1892 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1893 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1894 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1895 // CHECK9-NEXT: ret void
1896 //
1897 //
1898 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1899 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1900 // CHECK9-NEXT: entry:
1901 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1902 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1903 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1904 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
1905 // CHECK9-NEXT: ret void
1906 //
1907 //
1908 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1909 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1910 // CHECK9-NEXT: entry:
1911 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1912 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1913 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1914 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1915 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1916 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1917 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]])
1918 // CHECK9-NEXT: ret void
1919 //
1920 //
1921 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1922 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1923 // CHECK9-NEXT: entry:
1924 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1925 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1926 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1927 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1928 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1929 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1930 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1931 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1932 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1933 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1934 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1935 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1936 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1937 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
1938 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1939 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
1940 // CHECK9-NEXT: ret void
1941 //
1942 //
1943 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
1944 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1945 // CHECK9-NEXT: entry:
1946 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1947 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1948 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1949 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1950 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1951 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1952 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1953 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1954 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1955 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1956 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1957 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1958 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1959 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1960 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1961 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1962 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
1963 // CHECK9-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1964 // CHECK9-NEXT: [[_TMP7:%.*]] = alloca %struct.S.0*, align 8
1965 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1966 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1967 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1968 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1969 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1970 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1971 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1972 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1973 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1974 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1975 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1976 // CHECK9-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
1977 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1978 // CHECK9-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8
1979 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1980 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1981 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1982 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1983 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1984 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1985 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1986 // CHECK9: arrayctor.loop:
1987 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1988 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1989 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
1990 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1991 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1992 // CHECK9: arrayctor.cont:
1993 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
1994 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]])
1995 // CHECK9-NEXT: store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8
1996 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1997 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1998 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1999 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2000 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
2001 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2002 // CHECK9: cond.true:
2003 // CHECK9-NEXT: br label [[COND_END:%.*]]
2004 // CHECK9: cond.false:
2005 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2006 // CHECK9-NEXT: br label [[COND_END]]
2007 // CHECK9: cond.end:
2008 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
2009 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2010 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2011 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
2012 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2013 // CHECK9: omp.inner.for.cond:
2014 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2015 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2016 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
2017 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2018 // CHECK9: omp.inner.for.cond.cleanup:
2019 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2020 // CHECK9: omp.inner.for.body:
2021 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2022 // CHECK9-NEXT: [[TMP14:%.*]] = zext i32 [[TMP13]] to i64
2023 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2024 // CHECK9-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
2025 // CHECK9-NEXT: [[TMP17:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
2026 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP14]], i64 [[TMP16]], [2 x i32]* [[VEC4]], i32* [[T_VAR3]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP17]])
2027 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2028 // CHECK9: omp.inner.for.inc:
2029 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2030 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2031 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2032 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2033 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
2034 // CHECK9: omp.inner.for.end:
2035 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2036 // CHECK9: omp.loop.exit:
2037 // CHECK9-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2038 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
2039 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
2040 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2041 // CHECK9-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
2042 // CHECK9-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2043 // CHECK9: .omp.lastprivate.then:
2044 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR3]], align 4
2045 // CHECK9-NEXT: store i32 [[TMP24]], i32* [[TMP0]], align 4
2046 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2047 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2048 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i64 8, i1 false)
2049 // CHECK9-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
2050 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
2051 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i64 2
2052 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN9]], [[TMP28]]
2053 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2054 // CHECK9: omp.arraycpy.body:
2055 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2056 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN9]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2057 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2058 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2059 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 4, i1 false)
2060 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2061 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2062 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]]
2063 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]]
2064 // CHECK9: omp.arraycpy.done10:
2065 // CHECK9-NEXT: [[TMP31:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
2066 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
2067 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP31]] to i8*
2068 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false)
2069 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2070 // CHECK9: .omp.lastprivate.done:
2071 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
2072 // CHECK9-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2073 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2
2074 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2075 // CHECK9: arraydestroy.body:
2076 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2077 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2078 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2079 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
2080 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
2081 // CHECK9: arraydestroy.done12:
2082 // CHECK9-NEXT: ret void
2083 //
2084 //
2085 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
2086 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2087 // CHECK9-NEXT: entry:
2088 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2089 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2090 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2091 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2092 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2093 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
2094 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
2095 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
2096 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
2097 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2098 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2099 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2100 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2101 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2102 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2103 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
2104 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
2105 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
2106 // CHECK9-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2107 // CHECK9-NEXT: [[_TMP7:%.*]] = alloca %struct.S.0*, align 8
2108 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2109 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2110 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2111 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2112 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2113 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2114 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
2115 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2116 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
2117 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2118 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
2119 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2120 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
2121 // CHECK9-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
2122 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2123 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2124 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2125 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP4]] to i32
2126 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2127 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP5]] to i32
2128 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2129 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
2130 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2131 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2132 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2133 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2134 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2135 // CHECK9: arrayctor.loop:
2136 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2137 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2138 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
2139 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2140 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2141 // CHECK9: arrayctor.cont:
2142 // CHECK9-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2143 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]])
2144 // CHECK9-NEXT: store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8
2145 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2146 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2147 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2148 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2149 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
2150 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2151 // CHECK9: cond.true:
2152 // CHECK9-NEXT: br label [[COND_END:%.*]]
2153 // CHECK9: cond.false:
2154 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2155 // CHECK9-NEXT: br label [[COND_END]]
2156 // CHECK9: cond.end:
2157 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2158 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2159 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2160 // CHECK9-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
2161 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2162 // CHECK9: omp.inner.for.cond:
2163 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2164 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2165 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2166 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2167 // CHECK9: omp.inner.for.cond.cleanup:
2168 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2169 // CHECK9: omp.inner.for.body:
2170 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2171 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
2172 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2173 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2174 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR3]], align 4
2175 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
2176 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
2177 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
2178 // CHECK9-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4
2179 // CHECK9-NEXT: [[TMP17:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
2180 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[I]], align 4
2181 // CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP18]] to i64
2182 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM9]]
2183 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8*
2184 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast %struct.S.0* [[TMP17]] to i8*
2185 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP19]], i8* align 4 [[TMP20]], i64 4, i1 false)
2186 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2187 // CHECK9: omp.body.continue:
2188 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2189 // CHECK9: omp.inner.for.inc:
2190 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2191 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1
2192 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
2193 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
2194 // CHECK9: omp.inner.for.end:
2195 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2196 // CHECK9: omp.loop.exit:
2197 // CHECK9-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2198 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
2199 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
2200 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2201 // CHECK9-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
2202 // CHECK9-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2203 // CHECK9: .omp.lastprivate.then:
2204 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4
2205 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[TMP1]], align 4
2206 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
2207 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2208 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i64 8, i1 false)
2209 // CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
2210 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
2211 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
2212 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN12]], [[TMP30]]
2213 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2214 // CHECK9: omp.arraycpy.body:
2215 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2216 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2217 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2218 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2219 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false)
2220 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2221 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2222 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]]
2223 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
2224 // CHECK9: omp.arraycpy.done13:
2225 // CHECK9-NEXT: [[TMP33:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
2226 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP6]] to i8*
2227 // CHECK9-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP33]] to i8*
2228 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i64 4, i1 false)
2229 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2230 // CHECK9: .omp.lastprivate.done:
2231 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
2232 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2233 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN14]], i64 2
2234 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2235 // CHECK9: arraydestroy.body:
2236 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2237 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2238 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2239 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
2240 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
2241 // CHECK9: arraydestroy.done15:
2242 // CHECK9-NEXT: ret void
2243 //
2244 //
2245 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2246 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2247 // CHECK9-NEXT: entry:
2248 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2249 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2250 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2251 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2252 // CHECK9-NEXT: ret void
2253 //
2254 //
2255 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2256 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2257 // CHECK9-NEXT: entry:
2258 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2259 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2260 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2261 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2262 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4
2263 // CHECK9-NEXT: ret void
2264 //
2265 //
2266 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2267 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2268 // CHECK9-NEXT: entry:
2269 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2270 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2271 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2272 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2273 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2274 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2275 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2276 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
2277 // CHECK9-NEXT: ret void
2278 //
2279 //
2280 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2281 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2282 // CHECK9-NEXT: entry:
2283 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2284 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2285 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2286 // CHECK9-NEXT: ret void
2287 //
2288 //
2289 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2290 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
2291 // CHECK9-NEXT: entry:
2292 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
2293 // CHECK9-NEXT: ret void
2294 //
2295 //
2296 // CHECK10-LABEL: define {{[^@]+}}@main
2297 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
2298 // CHECK10-NEXT: entry:
2299 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2300 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8
2301 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 8
2302 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2303 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2304 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2305 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2306 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8
2307 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
2308 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
2309 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
2310 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
2311 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
2312 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
2313 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
2314 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2315 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
2316 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 8
2317 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
2318 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4
2319 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2320 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
2321 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
2322 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
2323 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
2324 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
2325 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
2326 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
2327 // CHECK10-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
2328 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
2329 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
2330 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
2331 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
2332 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
2333 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
2334 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
2335 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
2336 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
2337 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
2338 // CHECK10-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
2339 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2340 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
2341 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
2342 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2343 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
2344 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8
2345 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2346 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 8
2347 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2348 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
2349 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
2350 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2351 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
2352 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8
2353 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
2354 // CHECK10-NEXT: store i8* null, i8** [[TMP18]], align 8
2355 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2356 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
2357 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8
2358 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2359 // CHECK10-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
2360 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8
2361 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
2362 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 8
2363 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2364 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
2365 // CHECK10-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8
2366 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2367 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
2368 // CHECK10-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8
2369 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
2370 // CHECK10-NEXT: store i8* null, i8** [[TMP28]], align 8
2371 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
2372 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
2373 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8
2374 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
2375 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
2376 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8
2377 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
2378 // CHECK10-NEXT: store i8* null, i8** [[TMP33]], align 8
2379 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2380 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2381 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
2382 // CHECK10-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2383 // CHECK10-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
2384 // CHECK10-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2385 // CHECK10: omp_offload.failed:
2386 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]
2387 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
2388 // CHECK10: omp_offload.cont:
2389 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
2390 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2391 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2392 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
2393 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2394 // CHECK10: arraydestroy.body:
2395 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2396 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2397 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2398 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2399 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
2400 // CHECK10: arraydestroy.done3:
2401 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2402 // CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
2403 // CHECK10-NEXT: ret i32 [[TMP39]]
2404 //
2405 //
2406 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2407 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2408 // CHECK10-NEXT: entry:
2409 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2410 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2411 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2412 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
2413 // CHECK10-NEXT: ret void
2414 //
2415 //
2416 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2417 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2418 // CHECK10-NEXT: entry:
2419 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2420 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2421 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2422 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2423 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2424 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2425 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
2426 // CHECK10-NEXT: ret void
2427 //
2428 //
2429 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123
2430 // CHECK10-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
2431 // CHECK10-NEXT: entry:
2432 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
2433 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2434 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
2435 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
2436 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
2437 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
2438 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
2439 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2440 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
2441 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
2442 // CHECK10-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
2443 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
2444 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2445 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
2446 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
2447 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
2448 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
2449 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
2450 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]])
2451 // CHECK10-NEXT: ret void
2452 //
2453 //
2454 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
2455 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
2456 // CHECK10-NEXT: entry:
2457 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2458 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2459 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
2460 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2461 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
2462 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
2463 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
2464 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
2465 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8
2466 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2467 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
2468 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2469 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2470 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2471 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2472 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
2473 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
2474 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
2475 // CHECK10-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2476 // CHECK10-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 8
2477 // CHECK10-NEXT: [[SVAR8:%.*]] = alloca i32, align 4
2478 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2479 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2480 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2481 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
2482 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2483 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
2484 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
2485 // CHECK10-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
2486 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
2487 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2488 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
2489 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
2490 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
2491 // CHECK10-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8
2492 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
2493 // CHECK10-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8
2494 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2495 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
2496 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2497 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2498 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
2499 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
2500 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2501 // CHECK10: arrayctor.loop:
2502 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2503 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2504 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
2505 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2506 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2507 // CHECK10: arrayctor.cont:
2508 // CHECK10-NEXT: [[TMP6:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8
2509 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]])
2510 // CHECK10-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8
2511 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2512 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2513 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2514 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2515 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
2516 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2517 // CHECK10: cond.true:
2518 // CHECK10-NEXT: br label [[COND_END:%.*]]
2519 // CHECK10: cond.false:
2520 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2521 // CHECK10-NEXT: br label [[COND_END]]
2522 // CHECK10: cond.end:
2523 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2524 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2525 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2526 // CHECK10-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
2527 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2528 // CHECK10: omp.inner.for.cond:
2529 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2530 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2531 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2532 // CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2533 // CHECK10: omp.inner.for.cond.cleanup:
2534 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2535 // CHECK10: omp.inner.for.body:
2536 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2537 // CHECK10-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
2538 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2539 // CHECK10-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
2540 // CHECK10-NEXT: [[TMP18:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
2541 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], [2 x i32]* [[VEC4]], i32* [[T_VAR3]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP18]], i32* [[SVAR8]])
2542 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2543 // CHECK10: omp.inner.for.inc:
2544 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2545 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2546 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
2547 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2548 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
2549 // CHECK10: omp.inner.for.end:
2550 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2551 // CHECK10: omp.loop.exit:
2552 // CHECK10-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2553 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2554 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2555 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2556 // CHECK10-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2557 // CHECK10-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2558 // CHECK10: .omp.lastprivate.then:
2559 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4
2560 // CHECK10-NEXT: store i32 [[TMP25]], i32* [[TMP0]], align 4
2561 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2562 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2563 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 8, i1 false)
2564 // CHECK10-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
2565 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
2566 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i64 2
2567 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN10]], [[TMP29]]
2568 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2569 // CHECK10: omp.arraycpy.body:
2570 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2571 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2572 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2573 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2574 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i64 4, i1 false)
2575 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2576 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2577 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP29]]
2578 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
2579 // CHECK10: omp.arraycpy.done11:
2580 // CHECK10-NEXT: [[TMP32:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
2581 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
2582 // CHECK10-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP32]] to i8*
2583 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false)
2584 // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[SVAR8]], align 4
2585 // CHECK10-NEXT: store i32 [[TMP35]], i32* [[TMP4]], align 4
2586 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2587 // CHECK10: .omp.lastprivate.done:
2588 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
2589 // CHECK10-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
2590 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2
2591 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2592 // CHECK10: arraydestroy.body:
2593 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2594 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2595 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2596 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
2597 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
2598 // CHECK10: arraydestroy.done13:
2599 // CHECK10-NEXT: ret void
2600 //
2601 //
2602 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
2603 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
2604 // CHECK10-NEXT: entry:
2605 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2606 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2607 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2608 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2609 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2610 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
2611 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
2612 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
2613 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
2614 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
2615 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2616 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2617 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2618 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2619 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2620 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2621 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
2622 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
2623 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
2624 // CHECK10-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2625 // CHECK10-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 8
2626 // CHECK10-NEXT: [[SVAR8:%.*]] = alloca i32, align 4
2627 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2628 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2629 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2630 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2631 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2632 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2633 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
2634 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
2635 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
2636 // CHECK10-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
2637 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2638 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
2639 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
2640 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
2641 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
2642 // CHECK10-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8
2643 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2644 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2645 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2646 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP5]] to i32
2647 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2648 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
2649 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2650 // CHECK10-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
2651 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2652 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2653 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
2654 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
2655 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2656 // CHECK10: arrayctor.loop:
2657 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2658 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2659 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
2660 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2661 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2662 // CHECK10: arrayctor.cont:
2663 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
2664 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]])
2665 // CHECK10-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8
2666 // CHECK10-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2667 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
2668 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2669 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2670 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1
2671 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2672 // CHECK10: cond.true:
2673 // CHECK10-NEXT: br label [[COND_END:%.*]]
2674 // CHECK10: cond.false:
2675 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2676 // CHECK10-NEXT: br label [[COND_END]]
2677 // CHECK10: cond.end:
2678 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2679 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2680 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2681 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
2682 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2683 // CHECK10: omp.inner.for.cond:
2684 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2685 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2686 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2687 // CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2688 // CHECK10: omp.inner.for.cond.cleanup:
2689 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2690 // CHECK10: omp.inner.for.body:
2691 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2692 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
2693 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2694 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2695 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[T_VAR3]], align 4
2696 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4
2697 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
2698 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
2699 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[ARRAYIDX]], align 4
2700 // CHECK10-NEXT: [[TMP18:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
2701 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[I]], align 4
2702 // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP19]] to i64
2703 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]]
2704 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8*
2705 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast %struct.S* [[TMP18]] to i8*
2706 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP20]], i8* align 4 [[TMP21]], i64 4, i1 false)
2707 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2708 // CHECK10: omp.body.continue:
2709 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2710 // CHECK10: omp.inner.for.inc:
2711 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2712 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP22]], 1
2713 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
2714 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
2715 // CHECK10: omp.inner.for.end:
2716 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2717 // CHECK10: omp.loop.exit:
2718 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2719 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
2720 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
2721 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2722 // CHECK10-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2723 // CHECK10-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2724 // CHECK10: .omp.lastprivate.then:
2725 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR3]], align 4
2726 // CHECK10-NEXT: store i32 [[TMP27]], i32* [[TMP1]], align 4
2727 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
2728 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2729 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 8, i1 false)
2730 // CHECK10-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
2731 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
2732 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i64 2
2733 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN13]], [[TMP31]]
2734 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2735 // CHECK10: omp.arraycpy.body:
2736 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2737 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2738 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2739 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2740 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false)
2741 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2742 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2743 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]]
2744 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
2745 // CHECK10: omp.arraycpy.done14:
2746 // CHECK10-NEXT: [[TMP34:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
2747 // CHECK10-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
2748 // CHECK10-NEXT: [[TMP36:%.*]] = bitcast %struct.S* [[TMP34]] to i8*
2749 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false)
2750 // CHECK10-NEXT: [[TMP37:%.*]] = load i32, i32* [[SVAR8]], align 4
2751 // CHECK10-NEXT: store i32 [[TMP37]], i32* [[TMP4]], align 4
2752 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2753 // CHECK10: .omp.lastprivate.done:
2754 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
2755 // CHECK10-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
2756 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2
2757 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2758 // CHECK10: arraydestroy.body:
2759 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2760 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2761 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2762 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
2763 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
2764 // CHECK10: arraydestroy.done16:
2765 // CHECK10-NEXT: ret void
2766 //
2767 //
2768 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2769 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2770 // CHECK10-NEXT: entry:
2771 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2772 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2773 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2774 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2775 // CHECK10-NEXT: ret void
2776 //
2777 //
2778 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2779 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat {
2780 // CHECK10-NEXT: entry:
2781 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2782 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2783 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2784 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2785 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2786 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8
2787 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
2788 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
2789 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
2790 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
2791 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
2792 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2793 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
2794 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4
2795 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2796 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
2797 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
2798 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1)
2799 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
2800 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2)
2801 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
2802 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
2803 // CHECK10-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
2804 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
2805 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
2806 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
2807 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
2808 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2809 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2810 // CHECK10-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2811 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2812 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
2813 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8
2814 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2815 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
2816 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
2817 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2818 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8
2819 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2820 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
2821 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8
2822 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2823 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
2824 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
2825 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
2826 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 8
2827 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2828 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
2829 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8
2830 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2831 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
2832 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8
2833 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
2834 // CHECK10-NEXT: store i8* null, i8** [[TMP21]], align 8
2835 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2836 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
2837 // CHECK10-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8
2838 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2839 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
2840 // CHECK10-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8
2841 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
2842 // CHECK10-NEXT: store i8* null, i8** [[TMP26]], align 8
2843 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2844 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2845 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
2846 // CHECK10-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2847 // CHECK10-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
2848 // CHECK10-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2849 // CHECK10: omp_offload.failed:
2850 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
2851 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
2852 // CHECK10: omp_offload.cont:
2853 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
2854 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2855 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2856 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2857 // CHECK10: arraydestroy.body:
2858 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2859 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2860 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2861 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2862 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2863 // CHECK10: arraydestroy.done2:
2864 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2865 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
2866 // CHECK10-NEXT: ret i32 [[TMP32]]
2867 //
2868 //
2869 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2870 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2871 // CHECK10-NEXT: entry:
2872 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2873 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2874 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2875 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2876 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4
2877 // CHECK10-NEXT: ret void
2878 //
2879 //
2880 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2881 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2882 // CHECK10-NEXT: entry:
2883 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2884 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2885 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2886 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2887 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2888 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2889 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2890 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4
2891 // CHECK10-NEXT: ret void
2892 //
2893 //
2894 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2895 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2896 // CHECK10-NEXT: entry:
2897 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2898 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2899 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2900 // CHECK10-NEXT: ret void
2901 //
2902 //
2903 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2904 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2905 // CHECK10-NEXT: entry:
2906 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2907 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2908 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2909 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
2910 // CHECK10-NEXT: ret void
2911 //
2912 //
2913 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2914 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2915 // CHECK10-NEXT: entry:
2916 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2917 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2918 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2919 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2920 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2921 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2922 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]])
2923 // CHECK10-NEXT: ret void
2924 //
2925 //
2926 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
2927 // CHECK10-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2928 // CHECK10-NEXT: entry:
2929 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
2930 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2931 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
2932 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
2933 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
2934 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
2935 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2936 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2937 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
2938 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
2939 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2940 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2941 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
2942 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
2943 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2944 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
2945 // CHECK10-NEXT: ret void
2946 //
2947 //
2948 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2
2949 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2950 // CHECK10-NEXT: entry:
2951 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2952 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2953 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
2954 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
2955 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
2956 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
2957 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
2958 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
2959 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2960 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
2961 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2962 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2963 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2964 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2965 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
2966 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
2967 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
2968 // CHECK10-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2969 // CHECK10-NEXT: [[_TMP7:%.*]] = alloca %struct.S.0*, align 8
2970 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2971 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2972 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2973 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
2974 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
2975 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2976 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
2977 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
2978 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2979 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2980 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
2981 // CHECK10-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
2982 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2983 // CHECK10-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8
2984 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2985 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
2986 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2987 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2988 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2989 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2990 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2991 // CHECK10: arrayctor.loop:
2992 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2993 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2994 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
2995 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2996 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2997 // CHECK10: arrayctor.cont:
2998 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
2999 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]])
3000 // CHECK10-NEXT: store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8
3001 // CHECK10-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3002 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
3003 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3004 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3005 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
3006 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3007 // CHECK10: cond.true:
3008 // CHECK10-NEXT: br label [[COND_END:%.*]]
3009 // CHECK10: cond.false:
3010 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3011 // CHECK10-NEXT: br label [[COND_END]]
3012 // CHECK10: cond.end:
3013 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
3014 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3015 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3016 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
3017 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3018 // CHECK10: omp.inner.for.cond:
3019 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3020 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3021 // CHECK10-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
3022 // CHECK10-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3023 // CHECK10: omp.inner.for.cond.cleanup:
3024 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3025 // CHECK10: omp.inner.for.body:
3026 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3027 // CHECK10-NEXT: [[TMP14:%.*]] = zext i32 [[TMP13]] to i64
3028 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3029 // CHECK10-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
3030 // CHECK10-NEXT: [[TMP17:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
3031 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP14]], i64 [[TMP16]], [2 x i32]* [[VEC4]], i32* [[T_VAR3]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP17]])
3032 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3033 // CHECK10: omp.inner.for.inc:
3034 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3035 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3036 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
3037 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3038 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
3039 // CHECK10: omp.inner.for.end:
3040 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3041 // CHECK10: omp.loop.exit:
3042 // CHECK10-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3043 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
3044 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
3045 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3046 // CHECK10-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
3047 // CHECK10-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3048 // CHECK10: .omp.lastprivate.then:
3049 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR3]], align 4
3050 // CHECK10-NEXT: store i32 [[TMP24]], i32* [[TMP0]], align 4
3051 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
3052 // CHECK10-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
3053 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i64 8, i1 false)
3054 // CHECK10-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
3055 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
3056 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i64 2
3057 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN9]], [[TMP28]]
3058 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3059 // CHECK10: omp.arraycpy.body:
3060 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3061 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN9]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3062 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3063 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3064 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 4, i1 false)
3065 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3066 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3067 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]]
3068 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]]
3069 // CHECK10: omp.arraycpy.done10:
3070 // CHECK10-NEXT: [[TMP31:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
3071 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
3072 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP31]] to i8*
3073 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false)
3074 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
3075 // CHECK10: .omp.lastprivate.done:
3076 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
3077 // CHECK10-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
3078 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2
3079 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3080 // CHECK10: arraydestroy.body:
3081 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3082 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
3083 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3084 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
3085 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
3086 // CHECK10: arraydestroy.done12:
3087 // CHECK10-NEXT: ret void
3088 //
3089 //
3090 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
3091 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
3092 // CHECK10-NEXT: entry:
3093 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3094 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3095 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3096 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3097 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
3098 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
3099 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
3100 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
3101 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
3102 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3103 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3104 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3105 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3106 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3107 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3108 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
3109 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
3110 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
3111 // CHECK10-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3112 // CHECK10-NEXT: [[_TMP7:%.*]] = alloca %struct.S.0*, align 8
3113 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
3114 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3115 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3116 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3117 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3118 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
3119 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
3120 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
3121 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
3122 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
3123 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
3124 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
3125 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
3126 // CHECK10-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
3127 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3128 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3129 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3130 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP4]] to i32
3131 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3132 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP5]] to i32
3133 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3134 // CHECK10-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
3135 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3136 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3137 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
3138 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
3139 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
3140 // CHECK10: arrayctor.loop:
3141 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3142 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3143 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
3144 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3145 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3146 // CHECK10: arrayctor.cont:
3147 // CHECK10-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
3148 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]])
3149 // CHECK10-NEXT: store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 8
3150 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3151 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3152 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3153 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3154 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
3155 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3156 // CHECK10: cond.true:
3157 // CHECK10-NEXT: br label [[COND_END:%.*]]
3158 // CHECK10: cond.false:
3159 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3160 // CHECK10-NEXT: br label [[COND_END]]
3161 // CHECK10: cond.end:
3162 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
3163 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3164 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3165 // CHECK10-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
3166 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3167 // CHECK10: omp.inner.for.cond:
3168 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3169 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3170 // CHECK10-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3171 // CHECK10-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3172 // CHECK10: omp.inner.for.cond.cleanup:
3173 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3174 // CHECK10: omp.inner.for.body:
3175 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3176 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
3177 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3178 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3179 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR3]], align 4
3180 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
3181 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
3182 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
3183 // CHECK10-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4
3184 // CHECK10-NEXT: [[TMP17:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
3185 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[I]], align 4
3186 // CHECK10-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP18]] to i64
3187 // CHECK10-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM9]]
3188 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8*
3189 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast %struct.S.0* [[TMP17]] to i8*
3190 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP19]], i8* align 4 [[TMP20]], i64 4, i1 false)
3191 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3192 // CHECK10: omp.body.continue:
3193 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3194 // CHECK10: omp.inner.for.inc:
3195 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3196 // CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1
3197 // CHECK10-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
3198 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
3199 // CHECK10: omp.inner.for.end:
3200 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3201 // CHECK10: omp.loop.exit:
3202 // CHECK10-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3203 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
3204 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
3205 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3206 // CHECK10-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
3207 // CHECK10-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3208 // CHECK10: .omp.lastprivate.then:
3209 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR3]], align 4
3210 // CHECK10-NEXT: store i32 [[TMP26]], i32* [[TMP1]], align 4
3211 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
3212 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
3213 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i64 8, i1 false)
3214 // CHECK10-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
3215 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
3216 // CHECK10-NEXT: [[TMP30:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
3217 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN12]], [[TMP30]]
3218 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3219 // CHECK10: omp.arraycpy.body:
3220 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3221 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3222 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3223 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3224 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false)
3225 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3226 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3227 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]]
3228 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
3229 // CHECK10: omp.arraycpy.done13:
3230 // CHECK10-NEXT: [[TMP33:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 8
3231 // CHECK10-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP6]] to i8*
3232 // CHECK10-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP33]] to i8*
3233 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i64 4, i1 false)
3234 // CHECK10-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
3235 // CHECK10: .omp.lastprivate.done:
3236 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
3237 // CHECK10-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
3238 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN14]], i64 2
3239 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3240 // CHECK10: arraydestroy.body:
3241 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3242 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
3243 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3244 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
3245 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
3246 // CHECK10: arraydestroy.done15:
3247 // CHECK10-NEXT: ret void
3248 //
3249 //
3250 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
3251 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3252 // CHECK10-NEXT: entry:
3253 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
3254 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
3255 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
3256 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3257 // CHECK10-NEXT: ret void
3258 //
3259 //
3260 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
3261 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3262 // CHECK10-NEXT: entry:
3263 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
3264 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
3265 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
3266 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3267 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4
3268 // CHECK10-NEXT: ret void
3269 //
3270 //
3271 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
3272 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3273 // CHECK10-NEXT: entry:
3274 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
3275 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
3276 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
3277 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
3278 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
3279 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3280 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3281 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
3282 // CHECK10-NEXT: ret void
3283 //
3284 //
3285 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
3286 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3287 // CHECK10-NEXT: entry:
3288 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
3289 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
3290 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
3291 // CHECK10-NEXT: ret void
3292 //
3293 //
3294 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3295 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] {
3296 // CHECK10-NEXT: entry:
3297 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1)
3298 // CHECK10-NEXT: ret void
3299 //
3300 //
3301 // CHECK11-LABEL: define {{[^@]+}}@main
3302 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
3303 // CHECK11-NEXT: entry:
3304 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3305 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8
3306 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4
3307 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3308 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
3309 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
3310 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
3311 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4
3312 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
3313 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
3314 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
3315 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
3316 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
3317 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
3318 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3319 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
3320 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
3321 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4
3322 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
3323 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4
3324 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3325 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
3326 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3327 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
3328 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
3329 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
3330 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
3331 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
3332 // CHECK11-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
3333 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
3334 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
3335 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
3336 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3337 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
3338 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4
3339 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
3340 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3341 // CHECK11-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3342 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3343 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
3344 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
3345 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3346 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
3347 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4
3348 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3349 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4
3350 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3351 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
3352 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
3353 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3354 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
3355 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4
3356 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3357 // CHECK11-NEXT: store i8* null, i8** [[TMP18]], align 4
3358 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3359 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
3360 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4
3361 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3362 // CHECK11-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
3363 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4
3364 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3365 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4
3366 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
3367 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
3368 // CHECK11-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4
3369 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
3370 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
3371 // CHECK11-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4
3372 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
3373 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 4
3374 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
3375 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
3376 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4
3377 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
3378 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
3379 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4
3380 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
3381 // CHECK11-NEXT: store i8* null, i8** [[TMP33]], align 4
3382 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3383 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3384 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
3385 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3386 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
3387 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3388 // CHECK11: omp_offload.failed:
3389 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]]
3390 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
3391 // CHECK11: omp_offload.cont:
3392 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
3393 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
3394 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3395 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
3396 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3397 // CHECK11: arraydestroy.body:
3398 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3399 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3400 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3401 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
3402 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
3403 // CHECK11: arraydestroy.done2:
3404 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3405 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
3406 // CHECK11-NEXT: ret i32 [[TMP39]]
3407 //
3408 //
3409 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
3410 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3411 // CHECK11-NEXT: entry:
3412 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3413 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3414 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3415 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
3416 // CHECK11-NEXT: ret void
3417 //
3418 //
3419 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
3420 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3421 // CHECK11-NEXT: entry:
3422 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3423 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
3424 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3425 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4
3426 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3427 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3428 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
3429 // CHECK11-NEXT: ret void
3430 //
3431 //
3432 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123
3433 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
3434 // CHECK11-NEXT: entry:
3435 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
3436 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3437 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
3438 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
3439 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
3440 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
3441 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
3442 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3443 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3444 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
3445 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
3446 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3447 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3448 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
3449 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
3450 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3451 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]])
3452 // CHECK11-NEXT: ret void
3453 //
3454 //
3455 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
3456 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
3457 // CHECK11-NEXT: entry:
3458 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3459 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3460 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
3461 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3462 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
3463 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
3464 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
3465 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
3466 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4
3467 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3468 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3469 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3470 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3471 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3472 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3473 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
3474 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
3475 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
3476 // CHECK11-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3477 // CHECK11-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 4
3478 // CHECK11-NEXT: [[SVAR8:%.*]] = alloca i32, align 4
3479 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
3480 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3481 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3482 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
3483 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3484 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3485 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
3486 // CHECK11-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
3487 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
3488 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3489 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3490 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
3491 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
3492 // CHECK11-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4
3493 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3494 // CHECK11-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4
3495 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3496 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
3497 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3498 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3499 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
3500 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
3501 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
3502 // CHECK11: arrayctor.loop:
3503 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3504 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3505 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
3506 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3507 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3508 // CHECK11: arrayctor.cont:
3509 // CHECK11-NEXT: [[TMP6:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4
3510 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]])
3511 // CHECK11-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 4
3512 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3513 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3514 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3515 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3516 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
3517 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3518 // CHECK11: cond.true:
3519 // CHECK11-NEXT: br label [[COND_END:%.*]]
3520 // CHECK11: cond.false:
3521 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3522 // CHECK11-NEXT: br label [[COND_END]]
3523 // CHECK11: cond.end:
3524 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
3525 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3526 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3527 // CHECK11-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
3528 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3529 // CHECK11: omp.inner.for.cond:
3530 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3531 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3532 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3533 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3534 // CHECK11: omp.inner.for.cond.cleanup:
3535 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3536 // CHECK11: omp.inner.for.body:
3537 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3538 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3539 // CHECK11-NEXT: [[TMP16:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 4
3540 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], [2 x i32]* [[VEC4]], i32* [[T_VAR3]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP16]], i32* [[SVAR8]])
3541 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3542 // CHECK11: omp.inner.for.inc:
3543 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3544 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3545 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
3546 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3547 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
3548 // CHECK11: omp.inner.for.end:
3549 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3550 // CHECK11: omp.loop.exit:
3551 // CHECK11-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3552 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
3553 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
3554 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3555 // CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
3556 // CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3557 // CHECK11: .omp.lastprivate.then:
3558 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4
3559 // CHECK11-NEXT: store i32 [[TMP23]], i32* [[TMP0]], align 4
3560 // CHECK11-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
3561 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
3562 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 8, i1 false)
3563 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
3564 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
3565 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i32 2
3566 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN10]], [[TMP27]]
3567 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3568 // CHECK11: omp.arraycpy.body:
3569 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3570 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3571 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3572 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3573 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 4, i1 false)
3574 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3575 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3576 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
3577 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
3578 // CHECK11: omp.arraycpy.done11:
3579 // CHECK11-NEXT: [[TMP30:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 4
3580 // CHECK11-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
3581 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[TMP30]] to i8*
3582 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false)
3583 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[SVAR8]], align 4
3584 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[TMP4]], align 4
3585 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
3586 // CHECK11: .omp.lastprivate.done:
3587 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
3588 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
3589 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i32 2
3590 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3591 // CHECK11: arraydestroy.body:
3592 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3593 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3594 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3595 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
3596 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
3597 // CHECK11: arraydestroy.done13:
3598 // CHECK11-NEXT: ret void
3599 //
3600 //
3601 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
3602 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
3603 // CHECK11-NEXT: entry:
3604 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3605 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3606 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3607 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3608 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3609 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
3610 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
3611 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
3612 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
3613 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
3614 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3615 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3616 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3617 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3618 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3619 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3620 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
3621 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
3622 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
3623 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3624 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4
3625 // CHECK11-NEXT: [[SVAR7:%.*]] = alloca i32, align 4
3626 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
3627 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3628 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3629 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3630 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3631 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3632 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
3633 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3634 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
3635 // CHECK11-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
3636 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3637 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
3638 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
3639 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
3640 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
3641 // CHECK11-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4
3642 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3643 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3644 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3645 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3646 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
3647 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
3648 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3649 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3650 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
3651 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
3652 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
3653 // CHECK11: arrayctor.loop:
3654 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3655 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3656 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
3657 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3658 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3659 // CHECK11: arrayctor.cont:
3660 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3661 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]])
3662 // CHECK11-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4
3663 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3664 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
3665 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3666 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3667 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1
3668 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3669 // CHECK11: cond.true:
3670 // CHECK11-NEXT: br label [[COND_END:%.*]]
3671 // CHECK11: cond.false:
3672 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3673 // CHECK11-NEXT: br label [[COND_END]]
3674 // CHECK11: cond.end:
3675 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
3676 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3677 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3678 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
3679 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3680 // CHECK11: omp.inner.for.cond:
3681 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3682 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3683 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
3684 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3685 // CHECK11: omp.inner.for.cond.cleanup:
3686 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3687 // CHECK11: omp.inner.for.body:
3688 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3689 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
3690 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3691 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3692 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[T_VAR2]], align 4
3693 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4
3694 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP17]]
3695 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[ARRAYIDX]], align 4
3696 // CHECK11-NEXT: [[TMP18:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4
3697 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I]], align 4
3698 // CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP19]]
3699 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8*
3700 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast %struct.S* [[TMP18]] to i8*
3701 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP20]], i8* align 4 [[TMP21]], i32 4, i1 false)
3702 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3703 // CHECK11: omp.body.continue:
3704 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3705 // CHECK11: omp.inner.for.inc:
3706 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3707 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP22]], 1
3708 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
3709 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
3710 // CHECK11: omp.inner.for.end:
3711 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3712 // CHECK11: omp.loop.exit:
3713 // CHECK11-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3714 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
3715 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
3716 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3717 // CHECK11-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3718 // CHECK11-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3719 // CHECK11: .omp.lastprivate.then:
3720 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR2]], align 4
3721 // CHECK11-NEXT: store i32 [[TMP27]], i32* [[TMP1]], align 4
3722 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
3723 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
3724 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 8, i1 false)
3725 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
3726 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S*
3727 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2
3728 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP31]]
3729 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3730 // CHECK11: omp.arraycpy.body:
3731 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3732 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3733 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3734 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3735 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i32 4, i1 false)
3736 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3737 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3738 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]]
3739 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
3740 // CHECK11: omp.arraycpy.done12:
3741 // CHECK11-NEXT: [[TMP34:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4
3742 // CHECK11-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
3743 // CHECK11-NEXT: [[TMP36:%.*]] = bitcast %struct.S* [[TMP34]] to i8*
3744 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i32 4, i1 false)
3745 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[SVAR7]], align 4
3746 // CHECK11-NEXT: store i32 [[TMP37]], i32* [[TMP4]], align 4
3747 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
3748 // CHECK11: .omp.lastprivate.done:
3749 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
3750 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
3751 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2
3752 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3753 // CHECK11: arraydestroy.body:
3754 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3755 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3756 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3757 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
3758 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
3759 // CHECK11: arraydestroy.done14:
3760 // CHECK11-NEXT: ret void
3761 //
3762 //
3763 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3764 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3765 // CHECK11-NEXT: entry:
3766 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3767 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3768 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3769 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3770 // CHECK11-NEXT: ret void
3771 //
3772 //
3773 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
3774 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat {
3775 // CHECK11-NEXT: entry:
3776 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3777 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3778 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
3779 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
3780 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3781 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4
3782 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
3783 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
3784 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
3785 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
3786 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
3787 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3788 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
3789 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4
3790 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3791 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
3792 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3793 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
3794 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
3795 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
3796 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
3797 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
3798 // CHECK11-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
3799 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
3800 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
3801 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
3802 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3803 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3804 // CHECK11-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3805 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3806 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
3807 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
3808 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3809 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
3810 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
3811 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3812 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4
3813 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3814 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
3815 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4
3816 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3817 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
3818 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
3819 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3820 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4
3821 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3822 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
3823 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4
3824 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3825 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
3826 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4
3827 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3828 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4
3829 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
3830 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
3831 // CHECK11-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4
3832 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
3833 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
3834 // CHECK11-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4
3835 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
3836 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4
3837 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3838 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3839 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
3840 // CHECK11-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3841 // CHECK11-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
3842 // CHECK11-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3843 // CHECK11: omp_offload.failed:
3844 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
3845 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
3846 // CHECK11: omp_offload.cont:
3847 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
3848 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3849 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3850 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3851 // CHECK11: arraydestroy.body:
3852 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3853 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3854 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3855 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
3856 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
3857 // CHECK11: arraydestroy.done2:
3858 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3859 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
3860 // CHECK11-NEXT: ret i32 [[TMP32]]
3861 //
3862 //
3863 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3864 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3865 // CHECK11-NEXT: entry:
3866 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3867 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3868 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3869 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3870 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4
3871 // CHECK11-NEXT: ret void
3872 //
3873 //
3874 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3875 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3876 // CHECK11-NEXT: entry:
3877 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3878 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
3879 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3880 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4
3881 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3882 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3883 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3884 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4
3885 // CHECK11-NEXT: ret void
3886 //
3887 //
3888 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3889 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3890 // CHECK11-NEXT: entry:
3891 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3892 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3893 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3894 // CHECK11-NEXT: ret void
3895 //
3896 //
3897 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
3898 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3899 // CHECK11-NEXT: entry:
3900 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3901 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3902 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3903 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
3904 // CHECK11-NEXT: ret void
3905 //
3906 //
3907 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
3908 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3909 // CHECK11-NEXT: entry:
3910 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3911 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
3912 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3913 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
3914 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3915 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3916 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
3917 // CHECK11-NEXT: ret void
3918 //
3919 //
3920 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
3921 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
3922 // CHECK11-NEXT: entry:
3923 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
3924 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3925 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
3926 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
3927 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
3928 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
3929 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3930 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3931 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
3932 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3933 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3934 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
3935 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
3936 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3937 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
3938 // CHECK11-NEXT: ret void
3939 //
3940 //
3941 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
3942 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
3943 // CHECK11-NEXT: entry:
3944 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3945 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3946 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
3947 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3948 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
3949 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
3950 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
3951 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
3952 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3953 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3954 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3955 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3956 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3957 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3958 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
3959 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
3960 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
3961 // CHECK11-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3962 // CHECK11-NEXT: [[_TMP7:%.*]] = alloca %struct.S.0*, align 4
3963 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
3964 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3965 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3966 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
3967 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3968 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3969 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
3970 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
3971 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3972 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3973 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
3974 // CHECK11-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4
3975 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3976 // CHECK11-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4
3977 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3978 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
3979 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3980 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3981 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
3982 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3983 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
3984 // CHECK11: arrayctor.loop:
3985 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3986 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3987 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
3988 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3989 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3990 // CHECK11: arrayctor.cont:
3991 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4
3992 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]])
3993 // CHECK11-NEXT: store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 4
3994 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3995 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
3996 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3997 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3998 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
3999 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4000 // CHECK11: cond.true:
4001 // CHECK11-NEXT: br label [[COND_END:%.*]]
4002 // CHECK11: cond.false:
4003 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4004 // CHECK11-NEXT: br label [[COND_END]]
4005 // CHECK11: cond.end:
4006 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
4007 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4008 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4009 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
4010 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4011 // CHECK11: omp.inner.for.cond:
4012 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4013 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4014 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
4015 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4016 // CHECK11: omp.inner.for.cond.cleanup:
4017 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
4018 // CHECK11: omp.inner.for.body:
4019 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4020 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4021 // CHECK11-NEXT: [[TMP15:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 4
4022 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP13]], i32 [[TMP14]], [2 x i32]* [[VEC4]], i32* [[T_VAR3]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP15]])
4023 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4024 // CHECK11: omp.inner.for.inc:
4025 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4026 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4027 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
4028 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4029 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
4030 // CHECK11: omp.inner.for.end:
4031 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4032 // CHECK11: omp.loop.exit:
4033 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4034 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
4035 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
4036 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4037 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
4038 // CHECK11-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
4039 // CHECK11: .omp.lastprivate.then:
4040 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR3]], align 4
4041 // CHECK11-NEXT: store i32 [[TMP22]], i32* [[TMP0]], align 4
4042 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
4043 // CHECK11-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
4044 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP23]], i8* align 4 [[TMP24]], i32 8, i1 false)
4045 // CHECK11-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
4046 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
4047 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i32 2
4048 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN9]], [[TMP26]]
4049 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4050 // CHECK11: omp.arraycpy.body:
4051 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP25]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4052 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN9]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4053 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4054 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4055 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 4, i1 false)
4056 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4057 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4058 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP26]]
4059 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]]
4060 // CHECK11: omp.arraycpy.done10:
4061 // CHECK11-NEXT: [[TMP29:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 4
4062 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
4063 // CHECK11-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[TMP29]] to i8*
4064 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i32 4, i1 false)
4065 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
4066 // CHECK11: .omp.lastprivate.done:
4067 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
4068 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
4069 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2
4070 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
4071 // CHECK11: arraydestroy.body:
4072 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP32]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4073 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4074 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4075 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
4076 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
4077 // CHECK11: arraydestroy.done12:
4078 // CHECK11-NEXT: ret void
4079 //
4080 //
4081 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
4082 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
4083 // CHECK11-NEXT: entry:
4084 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4085 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4086 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4087 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4088 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
4089 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
4090 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
4091 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
4092 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
4093 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4094 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4095 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4096 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4097 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4098 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4099 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
4100 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
4101 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
4102 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
4103 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4
4104 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4105 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4106 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4107 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4108 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4109 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
4110 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
4111 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
4112 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
4113 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
4114 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
4115 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
4116 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
4117 // CHECK11-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4
4118 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4119 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
4120 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4121 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4122 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_LB]], align 4
4123 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
4124 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4125 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4126 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
4127 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
4128 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
4129 // CHECK11: arrayctor.loop:
4130 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4131 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
4132 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
4133 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4134 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4135 // CHECK11: arrayctor.cont:
4136 // CHECK11-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
4137 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]])
4138 // CHECK11-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4
4139 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4140 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
4141 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4142 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4143 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
4144 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4145 // CHECK11: cond.true:
4146 // CHECK11-NEXT: br label [[COND_END:%.*]]
4147 // CHECK11: cond.false:
4148 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4149 // CHECK11-NEXT: br label [[COND_END]]
4150 // CHECK11: cond.end:
4151 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
4152 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4153 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4154 // CHECK11-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
4155 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4156 // CHECK11: omp.inner.for.cond:
4157 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4158 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4159 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
4160 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4161 // CHECK11: omp.inner.for.cond.cleanup:
4162 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
4163 // CHECK11: omp.inner.for.body:
4164 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4165 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
4166 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4167 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4168 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR2]], align 4
4169 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
4170 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP16]]
4171 // CHECK11-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4
4172 // CHECK11-NEXT: [[TMP17:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4
4173 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[I]], align 4
4174 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP18]]
4175 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8*
4176 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast %struct.S.0* [[TMP17]] to i8*
4177 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP19]], i8* align 4 [[TMP20]], i32 4, i1 false)
4178 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4179 // CHECK11: omp.body.continue:
4180 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4181 // CHECK11: omp.inner.for.inc:
4182 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4183 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1
4184 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
4185 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
4186 // CHECK11: omp.inner.for.end:
4187 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4188 // CHECK11: omp.loop.exit:
4189 // CHECK11-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4190 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
4191 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
4192 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4193 // CHECK11-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
4194 // CHECK11-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
4195 // CHECK11: .omp.lastprivate.then:
4196 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR2]], align 4
4197 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[TMP1]], align 4
4198 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
4199 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
4200 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 8, i1 false)
4201 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
4202 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0*
4203 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2
4204 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP30]]
4205 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4206 // CHECK11: omp.arraycpy.body:
4207 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4208 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4209 // CHECK11-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4210 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4211 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false)
4212 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4213 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4214 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]]
4215 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
4216 // CHECK11: omp.arraycpy.done11:
4217 // CHECK11-NEXT: [[TMP33:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4
4218 // CHECK11-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP6]] to i8*
4219 // CHECK11-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP33]] to i8*
4220 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i32 4, i1 false)
4221 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
4222 // CHECK11: .omp.lastprivate.done:
4223 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
4224 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
4225 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2
4226 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
4227 // CHECK11: arraydestroy.body:
4228 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4229 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4230 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4231 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
4232 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
4233 // CHECK11: arraydestroy.done13:
4234 // CHECK11-NEXT: ret void
4235 //
4236 //
4237 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
4238 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4239 // CHECK11-NEXT: entry:
4240 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4241 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4242 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4243 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
4244 // CHECK11-NEXT: ret void
4245 //
4246 //
4247 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
4248 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4249 // CHECK11-NEXT: entry:
4250 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4251 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4252 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4253 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4254 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4
4255 // CHECK11-NEXT: ret void
4256 //
4257 //
4258 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
4259 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4260 // CHECK11-NEXT: entry:
4261 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4262 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
4263 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4264 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
4265 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4266 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
4267 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4268 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
4269 // CHECK11-NEXT: ret void
4270 //
4271 //
4272 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
4273 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4274 // CHECK11-NEXT: entry:
4275 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4276 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4277 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4278 // CHECK11-NEXT: ret void
4279 //
4280 //
4281 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4282 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
4283 // CHECK11-NEXT: entry:
4284 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
4285 // CHECK11-NEXT: ret void
4286 //
4287 //
4288 // CHECK12-LABEL: define {{[^@]+}}@main
4289 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] {
4290 // CHECK12-NEXT: entry:
4291 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4292 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8
4293 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 4
4294 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
4295 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
4296 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
4297 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
4298 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4
4299 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
4300 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
4301 // CHECK12-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
4302 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
4303 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
4304 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
4305 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4306 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
4307 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4
4308 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 4
4309 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
4310 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4
4311 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4312 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
4313 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4314 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
4315 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
4316 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
4317 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
4318 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
4319 // CHECK12-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
4320 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
4321 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
4322 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
4323 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
4324 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
4325 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4
4326 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
4327 // CHECK12-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
4328 // CHECK12-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
4329 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4330 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
4331 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
4332 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4333 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
4334 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4
4335 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4336 // CHECK12-NEXT: store i8* null, i8** [[TMP13]], align 4
4337 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4338 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
4339 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
4340 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4341 // CHECK12-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
4342 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4
4343 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4344 // CHECK12-NEXT: store i8* null, i8** [[TMP18]], align 4
4345 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4346 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
4347 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4
4348 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4349 // CHECK12-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
4350 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4
4351 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4352 // CHECK12-NEXT: store i8* null, i8** [[TMP23]], align 4
4353 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
4354 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
4355 // CHECK12-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4
4356 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
4357 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
4358 // CHECK12-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4
4359 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
4360 // CHECK12-NEXT: store i8* null, i8** [[TMP28]], align 4
4361 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
4362 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
4363 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4
4364 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
4365 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
4366 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4
4367 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
4368 // CHECK12-NEXT: store i8* null, i8** [[TMP33]], align 4
4369 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4370 // CHECK12-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4371 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
4372 // CHECK12-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4373 // CHECK12-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
4374 // CHECK12-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4375 // CHECK12: omp_offload.failed:
4376 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]]
4377 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
4378 // CHECK12: omp_offload.cont:
4379 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
4380 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
4381 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
4382 // CHECK12-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
4383 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
4384 // CHECK12: arraydestroy.body:
4385 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4386 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4387 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4388 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
4389 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
4390 // CHECK12: arraydestroy.done2:
4391 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
4392 // CHECK12-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
4393 // CHECK12-NEXT: ret i32 [[TMP39]]
4394 //
4395 //
4396 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
4397 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
4398 // CHECK12-NEXT: entry:
4399 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4400 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4401 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4402 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
4403 // CHECK12-NEXT: ret void
4404 //
4405 //
4406 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
4407 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4408 // CHECK12-NEXT: entry:
4409 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4410 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
4411 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4412 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4
4413 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4414 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4415 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
4416 // CHECK12-NEXT: ret void
4417 //
4418 //
4419 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l123
4420 // CHECK12-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
4421 // CHECK12-NEXT: entry:
4422 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
4423 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
4424 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
4425 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
4426 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
4427 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
4428 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
4429 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
4430 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
4431 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
4432 // CHECK12-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
4433 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
4434 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
4435 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
4436 // CHECK12-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
4437 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
4438 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]])
4439 // CHECK12-NEXT: ret void
4440 //
4441 //
4442 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
4443 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
4444 // CHECK12-NEXT: entry:
4445 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4446 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4447 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
4448 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
4449 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
4450 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
4451 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
4452 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
4453 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4
4454 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4455 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
4456 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4457 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4458 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4459 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4460 // CHECK12-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
4461 // CHECK12-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
4462 // CHECK12-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
4463 // CHECK12-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
4464 // CHECK12-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 4
4465 // CHECK12-NEXT: [[SVAR8:%.*]] = alloca i32, align 4
4466 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
4467 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4468 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4469 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
4470 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
4471 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
4472 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
4473 // CHECK12-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
4474 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
4475 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
4476 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
4477 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
4478 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
4479 // CHECK12-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4
4480 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
4481 // CHECK12-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4
4482 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4483 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
4484 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4485 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4486 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
4487 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
4488 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
4489 // CHECK12: arrayctor.loop:
4490 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4491 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
4492 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
4493 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4494 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4495 // CHECK12: arrayctor.cont:
4496 // CHECK12-NEXT: [[TMP6:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4
4497 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]])
4498 // CHECK12-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 4
4499 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4500 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
4501 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4502 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4503 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
4504 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4505 // CHECK12: cond.true:
4506 // CHECK12-NEXT: br label [[COND_END:%.*]]
4507 // CHECK12: cond.false:
4508 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4509 // CHECK12-NEXT: br label [[COND_END]]
4510 // CHECK12: cond.end:
4511 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
4512 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4513 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4514 // CHECK12-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
4515 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4516 // CHECK12: omp.inner.for.cond:
4517 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4518 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4519 // CHECK12-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
4520 // CHECK12-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4521 // CHECK12: omp.inner.for.cond.cleanup:
4522 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
4523 // CHECK12: omp.inner.for.body:
4524 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4525 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4526 // CHECK12-NEXT: [[TMP16:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 4
4527 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], [2 x i32]* [[VEC4]], i32* [[T_VAR3]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP16]], i32* [[SVAR8]])
4528 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4529 // CHECK12: omp.inner.for.inc:
4530 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4531 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4532 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
4533 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4534 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
4535 // CHECK12: omp.inner.for.end:
4536 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4537 // CHECK12: omp.loop.exit:
4538 // CHECK12-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4539 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
4540 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
4541 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4542 // CHECK12-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
4543 // CHECK12-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
4544 // CHECK12: .omp.lastprivate.then:
4545 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4
4546 // CHECK12-NEXT: store i32 [[TMP23]], i32* [[TMP0]], align 4
4547 // CHECK12-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
4548 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
4549 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP24]], i8* align 4 [[TMP25]], i32 8, i1 false)
4550 // CHECK12-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
4551 // CHECK12-NEXT: [[TMP26:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
4552 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i32 2
4553 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN10]], [[TMP27]]
4554 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4555 // CHECK12: omp.arraycpy.body:
4556 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP26]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4557 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4558 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4559 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4560 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 4, i1 false)
4561 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4562 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4563 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
4564 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
4565 // CHECK12: omp.arraycpy.done11:
4566 // CHECK12-NEXT: [[TMP30:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 4
4567 // CHECK12-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
4568 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[TMP30]] to i8*
4569 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false)
4570 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[SVAR8]], align 4
4571 // CHECK12-NEXT: store i32 [[TMP33]], i32* [[TMP4]], align 4
4572 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
4573 // CHECK12: .omp.lastprivate.done:
4574 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
4575 // CHECK12-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
4576 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i32 2
4577 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
4578 // CHECK12: arraydestroy.body:
4579 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4580 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4581 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4582 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
4583 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
4584 // CHECK12: arraydestroy.done13:
4585 // CHECK12-NEXT: ret void
4586 //
4587 //
4588 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
4589 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
4590 // CHECK12-NEXT: entry:
4591 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4592 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4593 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4594 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4595 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
4596 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
4597 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
4598 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
4599 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
4600 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
4601 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4602 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4603 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4604 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4605 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4606 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4607 // CHECK12-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
4608 // CHECK12-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
4609 // CHECK12-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
4610 // CHECK12-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
4611 // CHECK12-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4
4612 // CHECK12-NEXT: [[SVAR7:%.*]] = alloca i32, align 4
4613 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
4614 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4615 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4616 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4617 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4618 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
4619 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
4620 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
4621 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
4622 // CHECK12-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
4623 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
4624 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
4625 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
4626 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
4627 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
4628 // CHECK12-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4
4629 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4630 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
4631 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4632 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4633 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
4634 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
4635 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4636 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4637 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
4638 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
4639 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
4640 // CHECK12: arrayctor.loop:
4641 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4642 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
4643 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
4644 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4645 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4646 // CHECK12: arrayctor.cont:
4647 // CHECK12-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
4648 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]])
4649 // CHECK12-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4
4650 // CHECK12-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4651 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
4652 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4653 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4654 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1
4655 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4656 // CHECK12: cond.true:
4657 // CHECK12-NEXT: br label [[COND_END:%.*]]
4658 // CHECK12: cond.false:
4659 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4660 // CHECK12-NEXT: br label [[COND_END]]
4661 // CHECK12: cond.end:
4662 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
4663 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4664 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4665 // CHECK12-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
4666 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4667 // CHECK12: omp.inner.for.cond:
4668 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4669 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4670 // CHECK12-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
4671 // CHECK12-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
4672 // CHECK12: omp.inner.for.cond.cleanup:
4673 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
4674 // CHECK12: omp.inner.for.body:
4675 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4676 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
4677 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4678 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4679 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[T_VAR2]], align 4
4680 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4
4681 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP17]]
4682 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[ARRAYIDX]], align 4
4683 // CHECK12-NEXT: [[TMP18:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4
4684 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[I]], align 4
4685 // CHECK12-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP19]]
4686 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8*
4687 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast %struct.S* [[TMP18]] to i8*
4688 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP20]], i8* align 4 [[TMP21]], i32 4, i1 false)
4689 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4690 // CHECK12: omp.body.continue:
4691 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4692 // CHECK12: omp.inner.for.inc:
4693 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4694 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP22]], 1
4695 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
4696 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
4697 // CHECK12: omp.inner.for.end:
4698 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4699 // CHECK12: omp.loop.exit:
4700 // CHECK12-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4701 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
4702 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
4703 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4704 // CHECK12-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
4705 // CHECK12-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
4706 // CHECK12: .omp.lastprivate.then:
4707 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR2]], align 4
4708 // CHECK12-NEXT: store i32 [[TMP27]], i32* [[TMP1]], align 4
4709 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
4710 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
4711 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 8, i1 false)
4712 // CHECK12-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i32 0, i32 0
4713 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S*
4714 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2
4715 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP31]]
4716 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
4717 // CHECK12: omp.arraycpy.body:
4718 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4719 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
4720 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
4721 // CHECK12-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
4722 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i32 4, i1 false)
4723 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
4724 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
4725 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]]
4726 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
4727 // CHECK12: omp.arraycpy.done12:
4728 // CHECK12-NEXT: [[TMP34:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4
4729 // CHECK12-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP7]] to i8*
4730 // CHECK12-NEXT: [[TMP36:%.*]] = bitcast %struct.S* [[TMP34]] to i8*
4731 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i32 4, i1 false)
4732 // CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[SVAR7]], align 4
4733 // CHECK12-NEXT: store i32 [[TMP37]], i32* [[TMP4]], align 4
4734 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
4735 // CHECK12: .omp.lastprivate.done:
4736 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
4737 // CHECK12-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
4738 // CHECK12-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2
4739 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
4740 // CHECK12: arraydestroy.body:
4741 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4742 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4743 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4744 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
4745 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
4746 // CHECK12: arraydestroy.done14:
4747 // CHECK12-NEXT: ret void
4748 //
4749 //
4750 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
4751 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4752 // CHECK12-NEXT: entry:
4753 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4754 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4755 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4756 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
4757 // CHECK12-NEXT: ret void
4758 //
4759 //
4760 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
4761 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat {
4762 // CHECK12-NEXT: entry:
4763 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4764 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
4765 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
4766 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
4767 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
4768 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4
4769 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
4770 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
4771 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
4772 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
4773 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
4774 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4775 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
4776 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4
4777 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
4778 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
4779 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4780 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
4781 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
4782 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
4783 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
4784 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
4785 // CHECK12-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
4786 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
4787 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
4788 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
4789 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
4790 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
4791 // CHECK12-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
4792 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4793 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
4794 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
4795 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4796 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
4797 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
4798 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4799 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4
4800 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4801 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
4802 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4
4803 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4804 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
4805 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
4806 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4807 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4
4808 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4809 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
4810 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4
4811 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4812 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
4813 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4
4814 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4815 // CHECK12-NEXT: store i8* null, i8** [[TMP21]], align 4
4816 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
4817 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
4818 // CHECK12-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4
4819 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
4820 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
4821 // CHECK12-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4
4822 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
4823 // CHECK12-NEXT: store i8* null, i8** [[TMP26]], align 4
4824 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4825 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4826 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
4827 // CHECK12-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4828 // CHECK12-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
4829 // CHECK12-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4830 // CHECK12: omp_offload.failed:
4831 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
4832 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
4833 // CHECK12: omp_offload.cont:
4834 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4
4835 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
4836 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
4837 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
4838 // CHECK12: arraydestroy.body:
4839 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
4840 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
4841 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
4842 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
4843 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
4844 // CHECK12: arraydestroy.done2:
4845 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
4846 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
4847 // CHECK12-NEXT: ret i32 [[TMP32]]
4848 //
4849 //
4850 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
4851 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4852 // CHECK12-NEXT: entry:
4853 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4854 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4855 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4856 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4857 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4
4858 // CHECK12-NEXT: ret void
4859 //
4860 //
4861 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
4862 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4863 // CHECK12-NEXT: entry:
4864 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4865 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
4866 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4867 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4
4868 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4869 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4870 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
4871 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4
4872 // CHECK12-NEXT: ret void
4873 //
4874 //
4875 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
4876 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4877 // CHECK12-NEXT: entry:
4878 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
4879 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
4880 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
4881 // CHECK12-NEXT: ret void
4882 //
4883 //
4884 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
4885 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4886 // CHECK12-NEXT: entry:
4887 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4888 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4889 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4890 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
4891 // CHECK12-NEXT: ret void
4892 //
4893 //
4894 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
4895 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4896 // CHECK12-NEXT: entry:
4897 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
4898 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
4899 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
4900 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
4901 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
4902 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
4903 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
4904 // CHECK12-NEXT: ret void
4905 //
4906 //
4907 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
4908 // CHECK12-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
4909 // CHECK12-NEXT: entry:
4910 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
4911 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
4912 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
4913 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
4914 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
4915 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
4916 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
4917 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
4918 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
4919 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
4920 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
4921 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
4922 // CHECK12-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
4923 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
4924 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
4925 // CHECK12-NEXT: ret void
4926 //
4927 //
4928 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2
4929 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
4930 // CHECK12-NEXT: entry:
4931 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4932 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4933 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
4934 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
4935 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
4936 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
4937 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
4938 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
4939 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4940 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
4941 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4942 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4943 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4944 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4945 // CHECK12-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
4946 // CHECK12-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
4947 // CHECK12-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
4948 // CHECK12-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
4949 // CHECK12-NEXT: [[_TMP7:%.*]] = alloca %struct.S.0*, align 4
4950 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
4951 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4952 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4953 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
4954 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
4955 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
4956 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
4957 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
4958 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
4959 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
4960 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
4961 // CHECK12-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4
4962 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
4963 // CHECK12-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4
4964 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4965 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
4966 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4967 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4968 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
4969 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
4970 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
4971 // CHECK12: arrayctor.loop:
4972 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
4973 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
4974 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
4975 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
4976 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
4977 // CHECK12: arrayctor.cont:
4978 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4
4979 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]])
4980 // CHECK12-NEXT: store %struct.S.0* [[VAR6]], %struct.S.0** [[_TMP7]], align 4
4981 // CHECK12-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4982 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
4983 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4984 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4985 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
4986 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4987 // CHECK12: cond.true:
4988 // CHECK12-NEXT: br label [[COND_END:%.*]]
4989 // CHECK12: cond.false:
4990 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4991 // CHECK12-NEXT: br label [[COND_END]]
4992 // CHECK12: cond.end:
4993 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
4994 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4995 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4996 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
4997 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4998 // CHECK12: omp.inner.for.cond:
4999 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5000 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5001 // CHECK12-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
5002 // CHECK12-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
5003 // CHECK12: omp.inner.for.cond.cleanup:
5004 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
5005 // CHECK12: omp.inner.for.body:
5006 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5007 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5008 // CHECK12-NEXT: [[TMP15:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 4
5009 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP13]], i32 [[TMP14]], [2 x i32]* [[VEC4]], i32* [[T_VAR3]], [2 x %struct.S.0]* [[S_ARR5]], %struct.S.0* [[TMP15]])
5010 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5011 // CHECK12: omp.inner.for.inc:
5012 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5013 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5014 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
5015 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5016 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
5017 // CHECK12: omp.inner.for.end:
5018 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5019 // CHECK12: omp.loop.exit:
5020 // CHECK12-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5021 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
5022 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
5023 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5024 // CHECK12-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
5025 // CHECK12-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
5026 // CHECK12: .omp.lastprivate.then:
5027 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR3]], align 4
5028 // CHECK12-NEXT: store i32 [[TMP22]], i32* [[TMP0]], align 4
5029 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
5030 // CHECK12-NEXT: [[TMP24:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
5031 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP23]], i8* align 4 [[TMP24]], i32 8, i1 false)
5032 // CHECK12-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
5033 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR5]] to %struct.S.0*
5034 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i32 2
5035 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN9]], [[TMP26]]
5036 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
5037 // CHECK12: omp.arraycpy.body:
5038 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP25]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
5039 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN9]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
5040 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
5041 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
5042 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 4, i1 false)
5043 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
5044 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
5045 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP26]]
5046 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]]
5047 // CHECK12: omp.arraycpy.done10:
5048 // CHECK12-NEXT: [[TMP29:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP7]], align 4
5049 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
5050 // CHECK12-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[TMP29]] to i8*
5051 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i32 4, i1 false)
5052 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
5053 // CHECK12: .omp.lastprivate.done:
5054 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
5055 // CHECK12-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
5056 // CHECK12-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2
5057 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
5058 // CHECK12: arraydestroy.body:
5059 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP32]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5060 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
5061 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
5062 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
5063 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
5064 // CHECK12: arraydestroy.done12:
5065 // CHECK12-NEXT: ret void
5066 //
5067 //
5068 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3
5069 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
5070 // CHECK12-NEXT: entry:
5071 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5072 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5073 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5074 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5075 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
5076 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
5077 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
5078 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
5079 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
5080 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5081 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
5082 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5083 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5084 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5085 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5086 // CHECK12-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
5087 // CHECK12-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
5088 // CHECK12-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
5089 // CHECK12-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
5090 // CHECK12-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4
5091 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
5092 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5093 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5094 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5095 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5096 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
5097 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
5098 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
5099 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
5100 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
5101 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
5102 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
5103 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
5104 // CHECK12-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4
5105 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5106 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
5107 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5108 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5109 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_LB]], align 4
5110 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
5111 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5112 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5113 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
5114 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
5115 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
5116 // CHECK12: arrayctor.loop:
5117 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
5118 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
5119 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
5120 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
5121 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
5122 // CHECK12: arrayctor.cont:
5123 // CHECK12-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
5124 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]])
5125 // CHECK12-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4
5126 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5127 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
5128 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5129 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5130 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
5131 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5132 // CHECK12: cond.true:
5133 // CHECK12-NEXT: br label [[COND_END:%.*]]
5134 // CHECK12: cond.false:
5135 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5136 // CHECK12-NEXT: br label [[COND_END]]
5137 // CHECK12: cond.end:
5138 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
5139 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5140 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5141 // CHECK12-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
5142 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5143 // CHECK12: omp.inner.for.cond:
5144 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5145 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5146 // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
5147 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
5148 // CHECK12: omp.inner.for.cond.cleanup:
5149 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
5150 // CHECK12: omp.inner.for.body:
5151 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5152 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
5153 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5154 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
5155 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR2]], align 4
5156 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
5157 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP16]]
5158 // CHECK12-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX]], align 4
5159 // CHECK12-NEXT: [[TMP17:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4
5160 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[I]], align 4
5161 // CHECK12-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP18]]
5162 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8*
5163 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast %struct.S.0* [[TMP17]] to i8*
5164 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP19]], i8* align 4 [[TMP20]], i32 4, i1 false)
5165 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5166 // CHECK12: omp.body.continue:
5167 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5168 // CHECK12: omp.inner.for.inc:
5169 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5170 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1
5171 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
5172 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
5173 // CHECK12: omp.inner.for.end:
5174 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5175 // CHECK12: omp.loop.exit:
5176 // CHECK12-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5177 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
5178 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
5179 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5180 // CHECK12-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
5181 // CHECK12-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
5182 // CHECK12: .omp.lastprivate.then:
5183 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR2]], align 4
5184 // CHECK12-NEXT: store i32 [[TMP26]], i32* [[TMP1]], align 4
5185 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
5186 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
5187 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 8, i1 false)
5188 // CHECK12-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i32 0, i32 0
5189 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0*
5190 // CHECK12-NEXT: [[TMP30:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2
5191 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP30]]
5192 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
5193 // CHECK12: omp.arraycpy.body:
5194 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
5195 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
5196 // CHECK12-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
5197 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
5198 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false)
5199 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
5200 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
5201 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]]
5202 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
5203 // CHECK12: omp.arraycpy.done11:
5204 // CHECK12-NEXT: [[TMP33:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4
5205 // CHECK12-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP6]] to i8*
5206 // CHECK12-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP33]] to i8*
5207 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i32 4, i1 false)
5208 // CHECK12-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
5209 // CHECK12: .omp.lastprivate.done:
5210 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
5211 // CHECK12-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
5212 // CHECK12-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2
5213 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
5214 // CHECK12: arraydestroy.body:
5215 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
5216 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
5217 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
5218 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
5219 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
5220 // CHECK12: arraydestroy.done13:
5221 // CHECK12-NEXT: ret void
5222 //
5223 //
5224 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
5225 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5226 // CHECK12-NEXT: entry:
5227 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5228 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5229 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5230 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
5231 // CHECK12-NEXT: ret void
5232 //
5233 //
5234 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
5235 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5236 // CHECK12-NEXT: entry:
5237 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5238 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5239 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5240 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
5241 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4
5242 // CHECK12-NEXT: ret void
5243 //
5244 //
5245 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
5246 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5247 // CHECK12-NEXT: entry:
5248 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5249 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
5250 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5251 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
5252 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5253 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
5254 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
5255 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
5256 // CHECK12-NEXT: ret void
5257 //
5258 //
5259 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
5260 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5261 // CHECK12-NEXT: entry:
5262 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
5263 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
5264 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
5265 // CHECK12-NEXT: ret void
5266 //
5267 //
5268 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5269 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] {
5270 // CHECK12-NEXT: entry:
5271 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1)
5272 // CHECK12-NEXT: ret void
5273 //
5274 //