1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
8
9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15
16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
22
23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
29 // expected-no-diagnostics
30 #ifndef HEADER
31 #define HEADER
32
33 template <class T>
34 struct S {
35 T f;
SS36 S(T a) : f(a) {}
SS37 S() : f() {}
operator TS38 operator T() { return T(); }
~SS39 ~S() {}
40 };
41
42 template <typename T>
tmain()43 T tmain() {
44 S<T> test;
45 T t_var = T();
46 T vec[] = {1, 2};
47 S<T> s_arr[] = {1, 2};
48 S<T> &var = test;
49 #pragma omp target
50 #pragma omp teams
51 #pragma omp distribute parallel for private(t_var, vec, s_arr, s_arr, var, var)
52 for (int i = 0; i < 2; ++i) {
53 vec[i] = t_var;
54 s_arr[i] = var;
55 }
56 return T();
57 }
58
main()59 int main() {
60 static int svar;
61 volatile double g;
62 volatile double &g1 = g;
63
64 #ifdef LAMBDA
65 [&]() {
66 static float sfvar;
67
68 #pragma omp target
69 #pragma omp teams
70 #pragma omp distribute parallel for private(g, g1, svar, sfvar)
71 for (int i = 0; i < 2; ++i) {
72
73
74 g = 1;
75 g1 = 1;
76 svar = 3;
77 sfvar = 4.0;
78 [&]() {
79 g = 2;
80 g1 = 2;
81 svar = 4;
82 sfvar = 8.0;
83
84 }();
85 }
86 }();
87 return 0;
88 #else
89 S<float> test;
90 int t_var = 0;
91 int vec[] = {1, 2};
92 S<float> s_arr[] = {1, 2};
93 S<float> &var = test;
94
95 #pragma omp target
96 #pragma omp teams
97 #pragma omp distribute parallel for private(t_var, vec, s_arr, s_arr, var, var, svar)
98 for (int i = 0; i < 2; ++i) {
99 vec[i] = t_var;
100 s_arr[i] = var;
101 }
102 return tmain<int>();
103 #endif
104 }
105
106
107
108 // this is the ctor loop
109
110 // call destructors: var..
111
112 // ..and s_arr
113
114
115 // By OpenMP specifications, private applies to both distribute and parallel for.
116 // However, the support for 'private' of 'parallel' is only used when 'parallel'
117 // is found alone. Therefore we only have one 'private' support for 'parallel for'
118 // in combination
119 // this is the ctor loop
120
121 // call destructors: var..
122
123 // ..and s_arr
124
125
126 // template tmain with S_INT_TY
127
128
129
130 // this is the ctor loop
131
132 // call destructors: var..
133
134 // ..and s_arr
135
136
137 #endif
138 // CHECK1-LABEL: define {{[^@]+}}@main
139 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
140 // CHECK1-NEXT: entry:
141 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
142 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8
143 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8
144 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
145 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
146 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8
147 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
148 // CHECK1-NEXT: ret i32 0
149 //
150 //
151 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
152 // CHECK1-SAME: () #[[ATTR2:[0-9]+]] {
153 // CHECK1-NEXT: entry:
154 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
155 // CHECK1-NEXT: ret void
156 //
157 //
158 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
159 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
160 // CHECK1-NEXT: entry:
161 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
162 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
163 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
164 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
165 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8
166 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
167 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
168 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
169 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
170 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8
171 // CHECK1-NEXT: [[G1:%.*]] = alloca double, align 8
172 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca double*, align 8
173 // CHECK1-NEXT: [[SVAR:%.*]] = alloca i32, align 4
174 // CHECK1-NEXT: [[SFVAR:%.*]] = alloca float, align 4
175 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
176 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
177 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
178 // CHECK1-NEXT: store double* undef, double** [[_TMP1]], align 8
179 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
180 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
181 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
182 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
183 // CHECK1-NEXT: store double* [[G1]], double** [[_TMP2]], align 8
184 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
185 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
186 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
187 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
188 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
189 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
190 // CHECK1: cond.true:
191 // CHECK1-NEXT: br label [[COND_END:%.*]]
192 // CHECK1: cond.false:
193 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
194 // CHECK1-NEXT: br label [[COND_END]]
195 // CHECK1: cond.end:
196 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
197 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
198 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
199 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
200 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
201 // CHECK1: omp.inner.for.cond:
202 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
203 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
204 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
205 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
206 // CHECK1: omp.inner.for.body:
207 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
208 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
209 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
210 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
211 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
212 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
213 // CHECK1: omp.inner.for.inc:
214 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
215 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
216 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
217 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
218 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
219 // CHECK1: omp.inner.for.end:
220 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
221 // CHECK1: omp.loop.exit:
222 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
223 // CHECK1-NEXT: ret void
224 //
225 //
226 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
227 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] {
228 // CHECK1-NEXT: entry:
229 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
230 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
231 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
232 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
233 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
234 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
235 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8
236 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
237 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
238 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
239 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
240 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8
241 // CHECK1-NEXT: [[G1:%.*]] = alloca double, align 8
242 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca double*, align 8
243 // CHECK1-NEXT: [[SVAR:%.*]] = alloca i32, align 4
244 // CHECK1-NEXT: [[SFVAR:%.*]] = alloca float, align 4
245 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
246 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
247 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
248 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
249 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
250 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
251 // CHECK1-NEXT: store double* undef, double** [[_TMP1]], align 8
252 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
253 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
254 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
255 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
256 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
257 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
258 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
259 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
260 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
261 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
262 // CHECK1-NEXT: store double* [[G1]], double** [[_TMP3]], align 8
263 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
264 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
265 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
266 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
267 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
268 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
269 // CHECK1: cond.true:
270 // CHECK1-NEXT: br label [[COND_END:%.*]]
271 // CHECK1: cond.false:
272 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
273 // CHECK1-NEXT: br label [[COND_END]]
274 // CHECK1: cond.end:
275 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
276 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
277 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
278 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
279 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
280 // CHECK1: omp.inner.for.cond:
281 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
282 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
283 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
284 // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
285 // CHECK1: omp.inner.for.body:
286 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
287 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
288 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
289 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
290 // CHECK1-NEXT: store double 1.000000e+00, double* [[G]], align 8
291 // CHECK1-NEXT: [[TMP10:%.*]] = load double*, double** [[_TMP3]], align 8
292 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 8
293 // CHECK1-NEXT: store i32 3, i32* [[SVAR]], align 4
294 // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4
295 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
296 // CHECK1-NEXT: store double* [[G]], double** [[TMP11]], align 8
297 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
298 // CHECK1-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP3]], align 8
299 // CHECK1-NEXT: store double* [[TMP13]], double** [[TMP12]], align 8
300 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
301 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[TMP14]], align 8
302 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
303 // CHECK1-NEXT: store float* [[SFVAR]], float** [[TMP15]], align 8
304 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]])
305 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
306 // CHECK1: omp.body.continue:
307 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
308 // CHECK1: omp.inner.for.inc:
309 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
310 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1
311 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
312 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
313 // CHECK1: omp.inner.for.end:
314 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
315 // CHECK1: omp.loop.exit:
316 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
317 // CHECK1-NEXT: ret void
318 //
319 //
320 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
321 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
322 // CHECK1-NEXT: entry:
323 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
324 // CHECK1-NEXT: ret void
325 //
326 //
327 // CHECK2-LABEL: define {{[^@]+}}@main
328 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
329 // CHECK2-NEXT: entry:
330 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
331 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8
332 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8
333 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
334 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4
335 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8
336 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
337 // CHECK2-NEXT: ret i32 0
338 //
339 //
340 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
341 // CHECK2-SAME: () #[[ATTR2:[0-9]+]] {
342 // CHECK2-NEXT: entry:
343 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
344 // CHECK2-NEXT: ret void
345 //
346 //
347 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
348 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
349 // CHECK2-NEXT: entry:
350 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
351 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
352 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
353 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
354 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8
355 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
356 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
357 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
358 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
359 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8
360 // CHECK2-NEXT: [[G1:%.*]] = alloca double, align 8
361 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca double*, align 8
362 // CHECK2-NEXT: [[SVAR:%.*]] = alloca i32, align 4
363 // CHECK2-NEXT: [[SFVAR:%.*]] = alloca float, align 4
364 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
365 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
366 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
367 // CHECK2-NEXT: store double* undef, double** [[_TMP1]], align 8
368 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
369 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
370 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
371 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
372 // CHECK2-NEXT: store double* [[G1]], double** [[_TMP2]], align 8
373 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
374 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
375 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
376 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
377 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
378 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
379 // CHECK2: cond.true:
380 // CHECK2-NEXT: br label [[COND_END:%.*]]
381 // CHECK2: cond.false:
382 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
383 // CHECK2-NEXT: br label [[COND_END]]
384 // CHECK2: cond.end:
385 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
386 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
387 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
388 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
389 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
390 // CHECK2: omp.inner.for.cond:
391 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
392 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
393 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
394 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
395 // CHECK2: omp.inner.for.body:
396 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
397 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
398 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
399 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
400 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
401 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
402 // CHECK2: omp.inner.for.inc:
403 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
404 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
405 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
406 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
407 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
408 // CHECK2: omp.inner.for.end:
409 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
410 // CHECK2: omp.loop.exit:
411 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
412 // CHECK2-NEXT: ret void
413 //
414 //
415 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
416 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] {
417 // CHECK2-NEXT: entry:
418 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
419 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
420 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
421 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
422 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
423 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
424 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8
425 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
426 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
427 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
428 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
429 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8
430 // CHECK2-NEXT: [[G1:%.*]] = alloca double, align 8
431 // CHECK2-NEXT: [[_TMP3:%.*]] = alloca double*, align 8
432 // CHECK2-NEXT: [[SVAR:%.*]] = alloca i32, align 4
433 // CHECK2-NEXT: [[SFVAR:%.*]] = alloca float, align 4
434 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
435 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
436 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
437 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
438 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
439 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
440 // CHECK2-NEXT: store double* undef, double** [[_TMP1]], align 8
441 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
442 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
443 // CHECK2-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
444 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
445 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
446 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
447 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
448 // CHECK2-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
449 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
450 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
451 // CHECK2-NEXT: store double* [[G1]], double** [[_TMP3]], align 8
452 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
453 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
454 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
455 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
456 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
457 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
458 // CHECK2: cond.true:
459 // CHECK2-NEXT: br label [[COND_END:%.*]]
460 // CHECK2: cond.false:
461 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
462 // CHECK2-NEXT: br label [[COND_END]]
463 // CHECK2: cond.end:
464 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
465 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
466 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
467 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
468 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
469 // CHECK2: omp.inner.for.cond:
470 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
471 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
472 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
473 // CHECK2-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
474 // CHECK2: omp.inner.for.body:
475 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
476 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
477 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
478 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
479 // CHECK2-NEXT: store double 1.000000e+00, double* [[G]], align 8
480 // CHECK2-NEXT: [[TMP10:%.*]] = load double*, double** [[_TMP3]], align 8
481 // CHECK2-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 8
482 // CHECK2-NEXT: store i32 3, i32* [[SVAR]], align 4
483 // CHECK2-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4
484 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
485 // CHECK2-NEXT: store double* [[G]], double** [[TMP11]], align 8
486 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
487 // CHECK2-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP3]], align 8
488 // CHECK2-NEXT: store double* [[TMP13]], double** [[TMP12]], align 8
489 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
490 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[TMP14]], align 8
491 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
492 // CHECK2-NEXT: store float* [[SFVAR]], float** [[TMP15]], align 8
493 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]])
494 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
495 // CHECK2: omp.body.continue:
496 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
497 // CHECK2: omp.inner.for.inc:
498 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
499 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1
500 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
501 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
502 // CHECK2: omp.inner.for.end:
503 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
504 // CHECK2: omp.loop.exit:
505 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
506 // CHECK2-NEXT: ret void
507 //
508 //
509 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
510 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] {
511 // CHECK2-NEXT: entry:
512 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
513 // CHECK2-NEXT: ret void
514 //
515 //
516 // CHECK3-LABEL: define {{[^@]+}}@main
517 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
518 // CHECK3-NEXT: entry:
519 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
520 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8
521 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4
522 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
523 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
524 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4
525 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
526 // CHECK3-NEXT: ret i32 0
527 //
528 //
529 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
530 // CHECK3-SAME: () #[[ATTR2:[0-9]+]] {
531 // CHECK3-NEXT: entry:
532 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
533 // CHECK3-NEXT: ret void
534 //
535 //
536 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
537 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
538 // CHECK3-NEXT: entry:
539 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
540 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
541 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
542 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
543 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4
544 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
545 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
546 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
547 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
548 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8
549 // CHECK3-NEXT: [[G1:%.*]] = alloca double, align 8
550 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca double*, align 4
551 // CHECK3-NEXT: [[SVAR:%.*]] = alloca i32, align 4
552 // CHECK3-NEXT: [[SFVAR:%.*]] = alloca float, align 4
553 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
554 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
555 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
556 // CHECK3-NEXT: store double* undef, double** [[_TMP1]], align 4
557 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
558 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
559 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
560 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
561 // CHECK3-NEXT: store double* [[G1]], double** [[_TMP2]], align 4
562 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
563 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
564 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
565 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
566 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
567 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
568 // CHECK3: cond.true:
569 // CHECK3-NEXT: br label [[COND_END:%.*]]
570 // CHECK3: cond.false:
571 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
572 // CHECK3-NEXT: br label [[COND_END]]
573 // CHECK3: cond.end:
574 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
575 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
576 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
577 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
578 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
579 // CHECK3: omp.inner.for.cond:
580 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
581 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
582 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
583 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
584 // CHECK3: omp.inner.for.body:
585 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
586 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
587 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]])
588 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
589 // CHECK3: omp.inner.for.inc:
590 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
591 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
592 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
593 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
594 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
595 // CHECK3: omp.inner.for.end:
596 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
597 // CHECK3: omp.loop.exit:
598 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
599 // CHECK3-NEXT: ret void
600 //
601 //
602 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
603 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] {
604 // CHECK3-NEXT: entry:
605 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
606 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
607 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
608 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
609 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
610 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
611 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4
612 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
613 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
614 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
615 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
616 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8
617 // CHECK3-NEXT: [[G1:%.*]] = alloca double, align 8
618 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca double*, align 4
619 // CHECK3-NEXT: [[SVAR:%.*]] = alloca i32, align 4
620 // CHECK3-NEXT: [[SFVAR:%.*]] = alloca float, align 4
621 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
622 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
623 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
624 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
625 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
626 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
627 // CHECK3-NEXT: store double* undef, double** [[_TMP1]], align 4
628 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
629 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
630 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
631 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
632 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4
633 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4
634 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
635 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
636 // CHECK3-NEXT: store double* [[G1]], double** [[_TMP2]], align 4
637 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
638 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
639 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
640 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
641 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
642 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
643 // CHECK3: cond.true:
644 // CHECK3-NEXT: br label [[COND_END:%.*]]
645 // CHECK3: cond.false:
646 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
647 // CHECK3-NEXT: br label [[COND_END]]
648 // CHECK3: cond.end:
649 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
650 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
651 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
652 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
653 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
654 // CHECK3: omp.inner.for.cond:
655 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
656 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
657 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
658 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
659 // CHECK3: omp.inner.for.body:
660 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
661 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
662 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
663 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
664 // CHECK3-NEXT: store double 1.000000e+00, double* [[G]], align 8
665 // CHECK3-NEXT: [[TMP10:%.*]] = load double*, double** [[_TMP2]], align 4
666 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 4
667 // CHECK3-NEXT: store i32 3, i32* [[SVAR]], align 4
668 // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4
669 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
670 // CHECK3-NEXT: store double* [[G]], double** [[TMP11]], align 4
671 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
672 // CHECK3-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP2]], align 4
673 // CHECK3-NEXT: store double* [[TMP13]], double** [[TMP12]], align 4
674 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
675 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[TMP14]], align 4
676 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
677 // CHECK3-NEXT: store float* [[SFVAR]], float** [[TMP15]], align 4
678 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]])
679 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
680 // CHECK3: omp.body.continue:
681 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
682 // CHECK3: omp.inner.for.inc:
683 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
684 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP16]], 1
685 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
686 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
687 // CHECK3: omp.inner.for.end:
688 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
689 // CHECK3: omp.loop.exit:
690 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
691 // CHECK3-NEXT: ret void
692 //
693 //
694 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
695 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
696 // CHECK3-NEXT: entry:
697 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
698 // CHECK3-NEXT: ret void
699 //
700 //
701 // CHECK4-LABEL: define {{[^@]+}}@main
702 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
703 // CHECK4-NEXT: entry:
704 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
705 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8
706 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4
707 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
708 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4
709 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4
710 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
711 // CHECK4-NEXT: ret i32 0
712 //
713 //
714 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
715 // CHECK4-SAME: () #[[ATTR2:[0-9]+]] {
716 // CHECK4-NEXT: entry:
717 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
718 // CHECK4-NEXT: ret void
719 //
720 //
721 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
722 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
723 // CHECK4-NEXT: entry:
724 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
725 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
726 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
727 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
728 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4
729 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
730 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
731 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
732 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
733 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8
734 // CHECK4-NEXT: [[G1:%.*]] = alloca double, align 8
735 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca double*, align 4
736 // CHECK4-NEXT: [[SVAR:%.*]] = alloca i32, align 4
737 // CHECK4-NEXT: [[SFVAR:%.*]] = alloca float, align 4
738 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
739 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
740 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
741 // CHECK4-NEXT: store double* undef, double** [[_TMP1]], align 4
742 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
743 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
744 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
745 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
746 // CHECK4-NEXT: store double* [[G1]], double** [[_TMP2]], align 4
747 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
748 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
749 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
750 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
751 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
752 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
753 // CHECK4: cond.true:
754 // CHECK4-NEXT: br label [[COND_END:%.*]]
755 // CHECK4: cond.false:
756 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
757 // CHECK4-NEXT: br label [[COND_END]]
758 // CHECK4: cond.end:
759 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
760 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
761 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
762 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
763 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
764 // CHECK4: omp.inner.for.cond:
765 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
766 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
767 // CHECK4-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
768 // CHECK4-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
769 // CHECK4: omp.inner.for.body:
770 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
771 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
772 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]])
773 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
774 // CHECK4: omp.inner.for.inc:
775 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
776 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
777 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
778 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
779 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
780 // CHECK4: omp.inner.for.end:
781 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
782 // CHECK4: omp.loop.exit:
783 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
784 // CHECK4-NEXT: ret void
785 //
786 //
787 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
788 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] {
789 // CHECK4-NEXT: entry:
790 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
791 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
792 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
793 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
794 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
795 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
796 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4
797 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
798 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
799 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
800 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
801 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8
802 // CHECK4-NEXT: [[G1:%.*]] = alloca double, align 8
803 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca double*, align 4
804 // CHECK4-NEXT: [[SVAR:%.*]] = alloca i32, align 4
805 // CHECK4-NEXT: [[SFVAR:%.*]] = alloca float, align 4
806 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
807 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
808 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
809 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
810 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
811 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
812 // CHECK4-NEXT: store double* undef, double** [[_TMP1]], align 4
813 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
814 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
815 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
816 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
817 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4
818 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4
819 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
820 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
821 // CHECK4-NEXT: store double* [[G1]], double** [[_TMP2]], align 4
822 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
823 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
824 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
825 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
826 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
827 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
828 // CHECK4: cond.true:
829 // CHECK4-NEXT: br label [[COND_END:%.*]]
830 // CHECK4: cond.false:
831 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
832 // CHECK4-NEXT: br label [[COND_END]]
833 // CHECK4: cond.end:
834 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
835 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
836 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
837 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
838 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
839 // CHECK4: omp.inner.for.cond:
840 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
841 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
842 // CHECK4-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
843 // CHECK4-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
844 // CHECK4: omp.inner.for.body:
845 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
846 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
847 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
848 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
849 // CHECK4-NEXT: store double 1.000000e+00, double* [[G]], align 8
850 // CHECK4-NEXT: [[TMP10:%.*]] = load double*, double** [[_TMP2]], align 4
851 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP10]], align 4
852 // CHECK4-NEXT: store i32 3, i32* [[SVAR]], align 4
853 // CHECK4-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4
854 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
855 // CHECK4-NEXT: store double* [[G]], double** [[TMP11]], align 4
856 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
857 // CHECK4-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP2]], align 4
858 // CHECK4-NEXT: store double* [[TMP13]], double** [[TMP12]], align 4
859 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
860 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[TMP14]], align 4
861 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
862 // CHECK4-NEXT: store float* [[SFVAR]], float** [[TMP15]], align 4
863 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]])
864 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
865 // CHECK4: omp.body.continue:
866 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
867 // CHECK4: omp.inner.for.inc:
868 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
869 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP16]], 1
870 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
871 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
872 // CHECK4: omp.inner.for.end:
873 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
874 // CHECK4: omp.loop.exit:
875 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
876 // CHECK4-NEXT: ret void
877 //
878 //
879 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
880 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] {
881 // CHECK4-NEXT: entry:
882 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
883 // CHECK4-NEXT: ret void
884 //
885 //
886 // CHECK9-LABEL: define {{[^@]+}}@main
887 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
888 // CHECK9-NEXT: entry:
889 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
890 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8
891 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8
892 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
893 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
894 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
895 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
896 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8
897 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
898 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8
899 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
900 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8
901 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
902 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4
903 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
904 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
905 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
906 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
907 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
908 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
909 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
910 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8
911 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
912 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
913 // CHECK9-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
914 // CHECK9-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
915 // CHECK9: omp_offload.failed:
916 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]]
917 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
918 // CHECK9: omp_offload.cont:
919 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
920 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
921 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
922 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
923 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
924 // CHECK9: arraydestroy.body:
925 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
926 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
927 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
928 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
929 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
930 // CHECK9: arraydestroy.done2:
931 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
932 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4
933 // CHECK9-NEXT: ret i32 [[TMP4]]
934 //
935 //
936 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
937 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
938 // CHECK9-NEXT: entry:
939 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
940 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
941 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
942 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
943 // CHECK9-NEXT: ret void
944 //
945 //
946 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
947 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
948 // CHECK9-NEXT: entry:
949 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
950 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
951 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
952 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4
953 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
954 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
955 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
956 // CHECK9-NEXT: ret void
957 //
958 //
959 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95
960 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
961 // CHECK9-NEXT: entry:
962 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
963 // CHECK9-NEXT: ret void
964 //
965 //
966 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
967 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
968 // CHECK9-NEXT: entry:
969 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
970 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
971 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
972 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
973 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8
974 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
975 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
976 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
977 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
978 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
979 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
980 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
981 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
982 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8
983 // CHECK9-NEXT: [[SVAR:%.*]] = alloca i32, align 4
984 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
985 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
986 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
987 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8
988 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
989 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
990 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
991 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
992 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
993 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
994 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
995 // CHECK9: arrayctor.loop:
996 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
997 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
998 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
999 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1000 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1001 // CHECK9: arrayctor.cont:
1002 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
1003 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 8
1004 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1005 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1006 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1007 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1008 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
1009 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1010 // CHECK9: cond.true:
1011 // CHECK9-NEXT: br label [[COND_END:%.*]]
1012 // CHECK9: cond.false:
1013 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1014 // CHECK9-NEXT: br label [[COND_END]]
1015 // CHECK9: cond.end:
1016 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1017 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1018 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1019 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1020 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1021 // CHECK9: omp.inner.for.cond:
1022 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1023 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1024 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1025 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1026 // CHECK9: omp.inner.for.cond.cleanup:
1027 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1028 // CHECK9: omp.inner.for.body:
1029 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1030 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1031 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1032 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1033 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1034 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1035 // CHECK9: omp.inner.for.inc:
1036 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1037 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1038 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1039 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1040 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1041 // CHECK9: omp.inner.for.end:
1042 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1043 // CHECK9: omp.loop.exit:
1044 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1045 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
1046 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]])
1047 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1048 // CHECK9-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1049 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i64 2
1050 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1051 // CHECK9: arraydestroy.body:
1052 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1053 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1054 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1055 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
1056 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
1057 // CHECK9: arraydestroy.done5:
1058 // CHECK9-NEXT: ret void
1059 //
1060 //
1061 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1062 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] {
1063 // CHECK9-NEXT: entry:
1064 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1065 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1066 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1067 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1068 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1069 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1070 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8
1071 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1072 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1073 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1074 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1075 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1076 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1077 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1078 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1079 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca %struct.S*, align 8
1080 // CHECK9-NEXT: [[SVAR:%.*]] = alloca i32, align 4
1081 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1082 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1083 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1084 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1085 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1086 // CHECK9-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8
1087 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1088 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1089 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1090 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1091 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1092 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
1093 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1094 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
1095 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1096 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1097 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1098 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1099 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1100 // CHECK9: arrayctor.loop:
1101 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1102 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1103 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1104 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1105 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1106 // CHECK9: arrayctor.cont:
1107 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
1108 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP3]], align 8
1109 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1110 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1111 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1112 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1113 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
1114 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1115 // CHECK9: cond.true:
1116 // CHECK9-NEXT: br label [[COND_END:%.*]]
1117 // CHECK9: cond.false:
1118 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1119 // CHECK9-NEXT: br label [[COND_END]]
1120 // CHECK9: cond.end:
1121 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1122 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1123 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1124 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1125 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1126 // CHECK9: omp.inner.for.cond:
1127 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1128 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1129 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1130 // CHECK9-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1131 // CHECK9: omp.inner.for.cond.cleanup:
1132 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1133 // CHECK9: omp.inner.for.body:
1134 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1135 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1136 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1137 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1138 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
1139 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1140 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
1141 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
1142 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
1143 // CHECK9-NEXT: [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP3]], align 8
1144 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
1145 // CHECK9-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64
1146 // CHECK9-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM5]]
1147 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8*
1148 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8*
1149 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false)
1150 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1151 // CHECK9: omp.body.continue:
1152 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1153 // CHECK9: omp.inner.for.inc:
1154 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1155 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1
1156 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
1157 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1158 // CHECK9: omp.inner.for.end:
1159 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1160 // CHECK9: omp.loop.exit:
1161 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1162 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
1163 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
1164 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1165 // CHECK9-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1166 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN8]], i64 2
1167 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1168 // CHECK9: arraydestroy.body:
1169 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1170 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1171 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1172 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]]
1173 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]]
1174 // CHECK9: arraydestroy.done9:
1175 // CHECK9-NEXT: ret void
1176 //
1177 //
1178 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1179 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1180 // CHECK9-NEXT: entry:
1181 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1182 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1183 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1184 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1185 // CHECK9-NEXT: ret void
1186 //
1187 //
1188 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1189 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat {
1190 // CHECK9-NEXT: entry:
1191 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1192 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1193 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1194 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1195 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1196 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8
1197 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1198 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1199 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
1200 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4
1201 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1202 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1203 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1204 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1)
1205 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1206 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2)
1207 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
1208 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
1209 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
1210 // CHECK9-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
1211 // CHECK9-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
1212 // CHECK9-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1213 // CHECK9: omp_offload.failed:
1214 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]]
1215 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1216 // CHECK9: omp_offload.cont:
1217 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
1218 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1219 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1220 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1221 // CHECK9: arraydestroy.body:
1222 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1223 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1224 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1225 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1226 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1227 // CHECK9: arraydestroy.done2:
1228 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1229 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4
1230 // CHECK9-NEXT: ret i32 [[TMP4]]
1231 //
1232 //
1233 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1234 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1235 // CHECK9-NEXT: entry:
1236 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1237 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1238 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1239 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1240 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4
1241 // CHECK9-NEXT: ret void
1242 //
1243 //
1244 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1245 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1246 // CHECK9-NEXT: entry:
1247 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1248 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1249 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1250 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1251 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1252 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1253 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1254 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4
1255 // CHECK9-NEXT: ret void
1256 //
1257 //
1258 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1259 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1260 // CHECK9-NEXT: entry:
1261 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1262 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1263 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1264 // CHECK9-NEXT: ret void
1265 //
1266 //
1267 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1268 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1269 // CHECK9-NEXT: entry:
1270 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1271 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1272 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1273 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
1274 // CHECK9-NEXT: ret void
1275 //
1276 //
1277 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1278 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1279 // CHECK9-NEXT: entry:
1280 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1281 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1282 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1283 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1284 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1285 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1286 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]])
1287 // CHECK9-NEXT: ret void
1288 //
1289 //
1290 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1291 // CHECK9-SAME: () #[[ATTR3]] {
1292 // CHECK9-NEXT: entry:
1293 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
1294 // CHECK9-NEXT: ret void
1295 //
1296 //
1297 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
1298 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1299 // CHECK9-NEXT: entry:
1300 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1301 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1302 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1303 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1304 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1305 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1306 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1307 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1308 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1309 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1310 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1311 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1312 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1313 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8
1314 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1315 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1316 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1317 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
1318 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1319 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1320 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1321 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1322 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1323 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1324 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1325 // CHECK9: arrayctor.loop:
1326 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1327 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1328 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
1329 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1330 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1331 // CHECK9: arrayctor.cont:
1332 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]])
1333 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8
1334 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1335 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1336 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1337 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1338 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
1339 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1340 // CHECK9: cond.true:
1341 // CHECK9-NEXT: br label [[COND_END:%.*]]
1342 // CHECK9: cond.false:
1343 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1344 // CHECK9-NEXT: br label [[COND_END]]
1345 // CHECK9: cond.end:
1346 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1347 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1348 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1349 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1350 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1351 // CHECK9: omp.inner.for.cond:
1352 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1353 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1354 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1355 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1356 // CHECK9: omp.inner.for.cond.cleanup:
1357 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1358 // CHECK9: omp.inner.for.body:
1359 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1360 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1361 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1362 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1363 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1364 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1365 // CHECK9: omp.inner.for.inc:
1366 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1367 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1368 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1369 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1370 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1371 // CHECK9: omp.inner.for.end:
1372 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1373 // CHECK9: omp.loop.exit:
1374 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1375 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
1376 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]])
1377 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1378 // CHECK9-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1379 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i64 2
1380 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1381 // CHECK9: arraydestroy.body:
1382 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1383 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1384 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1385 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
1386 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
1387 // CHECK9: arraydestroy.done5:
1388 // CHECK9-NEXT: ret void
1389 //
1390 //
1391 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
1392 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] {
1393 // CHECK9-NEXT: entry:
1394 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1395 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1396 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1397 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1398 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1399 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1400 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1401 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1402 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1403 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1404 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1405 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1406 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1407 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1408 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1409 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca %struct.S.0*, align 8
1410 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1411 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1412 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1413 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1414 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1415 // CHECK9-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
1416 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1417 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1418 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1419 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1420 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1421 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
1422 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1423 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
1424 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1425 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1426 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1427 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1428 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1429 // CHECK9: arrayctor.loop:
1430 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1431 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1432 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
1433 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1434 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1435 // CHECK9: arrayctor.cont:
1436 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]])
1437 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP3]], align 8
1438 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1439 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1440 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1441 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1442 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
1443 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1444 // CHECK9: cond.true:
1445 // CHECK9-NEXT: br label [[COND_END:%.*]]
1446 // CHECK9: cond.false:
1447 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1448 // CHECK9-NEXT: br label [[COND_END]]
1449 // CHECK9: cond.end:
1450 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1451 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1452 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1453 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1454 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1455 // CHECK9: omp.inner.for.cond:
1456 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1457 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1458 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1459 // CHECK9-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1460 // CHECK9: omp.inner.for.cond.cleanup:
1461 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1462 // CHECK9: omp.inner.for.body:
1463 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1464 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1465 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1466 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1467 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
1468 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1469 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
1470 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
1471 // CHECK9-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
1472 // CHECK9-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP3]], align 8
1473 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
1474 // CHECK9-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64
1475 // CHECK9-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM5]]
1476 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8*
1477 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
1478 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false)
1479 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1480 // CHECK9: omp.body.continue:
1481 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1482 // CHECK9: omp.inner.for.inc:
1483 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1484 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1
1485 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
1486 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1487 // CHECK9: omp.inner.for.end:
1488 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1489 // CHECK9: omp.loop.exit:
1490 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1491 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
1492 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
1493 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1494 // CHECK9-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1495 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2
1496 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1497 // CHECK9: arraydestroy.body:
1498 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1499 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1500 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1501 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]]
1502 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]]
1503 // CHECK9: arraydestroy.done9:
1504 // CHECK9-NEXT: ret void
1505 //
1506 //
1507 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1508 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1509 // CHECK9-NEXT: entry:
1510 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1511 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1512 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1513 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1514 // CHECK9-NEXT: ret void
1515 //
1516 //
1517 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1518 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1519 // CHECK9-NEXT: entry:
1520 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1521 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1522 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1523 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1524 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4
1525 // CHECK9-NEXT: ret void
1526 //
1527 //
1528 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1529 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1530 // CHECK9-NEXT: entry:
1531 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1532 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1533 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1534 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1535 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1536 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1537 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1538 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
1539 // CHECK9-NEXT: ret void
1540 //
1541 //
1542 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1543 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1544 // CHECK9-NEXT: entry:
1545 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1546 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1547 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1548 // CHECK9-NEXT: ret void
1549 //
1550 //
1551 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1552 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1553 // CHECK9-NEXT: entry:
1554 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
1555 // CHECK9-NEXT: ret void
1556 //
1557 //
1558 // CHECK10-LABEL: define {{[^@]+}}@main
1559 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
1560 // CHECK10-NEXT: entry:
1561 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1562 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8
1563 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 8
1564 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1565 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1566 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1567 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1568 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8
1569 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
1570 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8
1571 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
1572 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 8
1573 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
1574 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4
1575 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1576 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
1577 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
1578 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
1579 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
1580 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
1581 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
1582 // CHECK10-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8
1583 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
1584 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
1585 // CHECK10-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
1586 // CHECK10-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1587 // CHECK10: omp_offload.failed:
1588 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]]
1589 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
1590 // CHECK10: omp_offload.cont:
1591 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
1592 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1593 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1594 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1595 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1596 // CHECK10: arraydestroy.body:
1597 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1598 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1599 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1600 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1601 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1602 // CHECK10: arraydestroy.done2:
1603 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1604 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4
1605 // CHECK10-NEXT: ret i32 [[TMP4]]
1606 //
1607 //
1608 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1609 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1610 // CHECK10-NEXT: entry:
1611 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1612 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1613 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1614 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
1615 // CHECK10-NEXT: ret void
1616 //
1617 //
1618 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1619 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1620 // CHECK10-NEXT: entry:
1621 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1622 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1623 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1624 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1625 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1626 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1627 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
1628 // CHECK10-NEXT: ret void
1629 //
1630 //
1631 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95
1632 // CHECK10-SAME: () #[[ATTR3:[0-9]+]] {
1633 // CHECK10-NEXT: entry:
1634 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
1635 // CHECK10-NEXT: ret void
1636 //
1637 //
1638 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
1639 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1640 // CHECK10-NEXT: entry:
1641 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1642 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1643 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1644 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
1645 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8
1646 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1647 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1648 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1649 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1650 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1651 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1652 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1653 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1654 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8
1655 // CHECK10-NEXT: [[SVAR:%.*]] = alloca i32, align 4
1656 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
1657 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1658 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1659 // CHECK10-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8
1660 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1661 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1662 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1663 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1664 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1665 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1666 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1667 // CHECK10: arrayctor.loop:
1668 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1669 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1670 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1671 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1672 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1673 // CHECK10: arrayctor.cont:
1674 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
1675 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 8
1676 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1677 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1678 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1679 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1680 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
1681 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1682 // CHECK10: cond.true:
1683 // CHECK10-NEXT: br label [[COND_END:%.*]]
1684 // CHECK10: cond.false:
1685 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1686 // CHECK10-NEXT: br label [[COND_END]]
1687 // CHECK10: cond.end:
1688 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1689 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1690 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1691 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1692 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1693 // CHECK10: omp.inner.for.cond:
1694 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1695 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1696 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1697 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1698 // CHECK10: omp.inner.for.cond.cleanup:
1699 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1700 // CHECK10: omp.inner.for.body:
1701 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1702 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1703 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1704 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1705 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1706 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1707 // CHECK10: omp.inner.for.inc:
1708 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1709 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1710 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1711 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1712 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
1713 // CHECK10: omp.inner.for.end:
1714 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1715 // CHECK10: omp.loop.exit:
1716 // CHECK10-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1717 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
1718 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]])
1719 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1720 // CHECK10-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1721 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i64 2
1722 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1723 // CHECK10: arraydestroy.body:
1724 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1725 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1726 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1727 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
1728 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
1729 // CHECK10: arraydestroy.done5:
1730 // CHECK10-NEXT: ret void
1731 //
1732 //
1733 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
1734 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] {
1735 // CHECK10-NEXT: entry:
1736 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1737 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1738 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1739 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1740 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1741 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
1742 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8
1743 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1744 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1745 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1746 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1747 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1748 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1749 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1750 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1751 // CHECK10-NEXT: [[_TMP3:%.*]] = alloca %struct.S*, align 8
1752 // CHECK10-NEXT: [[SVAR:%.*]] = alloca i32, align 4
1753 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
1754 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1755 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1756 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1757 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1758 // CHECK10-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8
1759 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1760 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1761 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1762 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1763 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1764 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
1765 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1766 // CHECK10-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
1767 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1768 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1769 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1770 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1771 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1772 // CHECK10: arrayctor.loop:
1773 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1774 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1775 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1776 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1777 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1778 // CHECK10: arrayctor.cont:
1779 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
1780 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP3]], align 8
1781 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1782 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1783 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1784 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1785 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
1786 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1787 // CHECK10: cond.true:
1788 // CHECK10-NEXT: br label [[COND_END:%.*]]
1789 // CHECK10: cond.false:
1790 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1791 // CHECK10-NEXT: br label [[COND_END]]
1792 // CHECK10: cond.end:
1793 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1794 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1795 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1796 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1797 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1798 // CHECK10: omp.inner.for.cond:
1799 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1800 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1801 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1802 // CHECK10-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1803 // CHECK10: omp.inner.for.cond.cleanup:
1804 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1805 // CHECK10: omp.inner.for.body:
1806 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1807 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1808 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1809 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1810 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
1811 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1812 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
1813 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
1814 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
1815 // CHECK10-NEXT: [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP3]], align 8
1816 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
1817 // CHECK10-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64
1818 // CHECK10-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM5]]
1819 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8*
1820 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8*
1821 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false)
1822 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1823 // CHECK10: omp.body.continue:
1824 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1825 // CHECK10: omp.inner.for.inc:
1826 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1827 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1
1828 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
1829 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
1830 // CHECK10: omp.inner.for.end:
1831 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1832 // CHECK10: omp.loop.exit:
1833 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1834 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
1835 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
1836 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1837 // CHECK10-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1838 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN8]], i64 2
1839 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1840 // CHECK10: arraydestroy.body:
1841 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1842 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1843 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1844 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]]
1845 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]]
1846 // CHECK10: arraydestroy.done9:
1847 // CHECK10-NEXT: ret void
1848 //
1849 //
1850 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1851 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1852 // CHECK10-NEXT: entry:
1853 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1854 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1855 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1856 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1857 // CHECK10-NEXT: ret void
1858 //
1859 //
1860 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1861 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat {
1862 // CHECK10-NEXT: entry:
1863 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1864 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1865 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1866 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1867 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1868 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8
1869 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
1870 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1871 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
1872 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4
1873 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1874 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1875 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1876 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1)
1877 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1878 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2)
1879 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
1880 // CHECK10-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
1881 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
1882 // CHECK10-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
1883 // CHECK10-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
1884 // CHECK10-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1885 // CHECK10: omp_offload.failed:
1886 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]]
1887 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
1888 // CHECK10: omp_offload.cont:
1889 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
1890 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1891 // CHECK10-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1892 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1893 // CHECK10: arraydestroy.body:
1894 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1895 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1896 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1897 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1898 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1899 // CHECK10: arraydestroy.done2:
1900 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1901 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4
1902 // CHECK10-NEXT: ret i32 [[TMP4]]
1903 //
1904 //
1905 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1906 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1907 // CHECK10-NEXT: entry:
1908 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1909 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1910 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1911 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1912 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4
1913 // CHECK10-NEXT: ret void
1914 //
1915 //
1916 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1917 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1918 // CHECK10-NEXT: entry:
1919 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1920 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1921 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1922 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1923 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1924 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1925 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1926 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4
1927 // CHECK10-NEXT: ret void
1928 //
1929 //
1930 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1931 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1932 // CHECK10-NEXT: entry:
1933 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1934 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1935 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1936 // CHECK10-NEXT: ret void
1937 //
1938 //
1939 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1940 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1941 // CHECK10-NEXT: entry:
1942 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1943 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1944 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1945 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
1946 // CHECK10-NEXT: ret void
1947 //
1948 //
1949 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1950 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1951 // CHECK10-NEXT: entry:
1952 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1953 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1954 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1955 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1956 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1957 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1958 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]])
1959 // CHECK10-NEXT: ret void
1960 //
1961 //
1962 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1963 // CHECK10-SAME: () #[[ATTR3]] {
1964 // CHECK10-NEXT: entry:
1965 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
1966 // CHECK10-NEXT: ret void
1967 //
1968 //
1969 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2
1970 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1971 // CHECK10-NEXT: entry:
1972 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1973 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1974 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1975 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
1976 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1977 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1978 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1979 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1980 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1981 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1982 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1983 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1984 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1985 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8
1986 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
1987 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1988 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1989 // CHECK10-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
1990 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1991 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1992 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1993 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1994 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1995 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1996 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1997 // CHECK10: arrayctor.loop:
1998 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1999 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2000 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
2001 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2002 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2003 // CHECK10: arrayctor.cont:
2004 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]])
2005 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8
2006 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2007 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2008 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2009 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2010 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
2011 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2012 // CHECK10: cond.true:
2013 // CHECK10-NEXT: br label [[COND_END:%.*]]
2014 // CHECK10: cond.false:
2015 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2016 // CHECK10-NEXT: br label [[COND_END]]
2017 // CHECK10: cond.end:
2018 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2019 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2020 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2021 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2022 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2023 // CHECK10: omp.inner.for.cond:
2024 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2025 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2026 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2027 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2028 // CHECK10: omp.inner.for.cond.cleanup:
2029 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2030 // CHECK10: omp.inner.for.body:
2031 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2032 // CHECK10-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2033 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2034 // CHECK10-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2035 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
2036 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2037 // CHECK10: omp.inner.for.inc:
2038 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2039 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2040 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2041 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2042 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
2043 // CHECK10: omp.inner.for.end:
2044 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2045 // CHECK10: omp.loop.exit:
2046 // CHECK10-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2047 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
2048 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP14]])
2049 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
2050 // CHECK10-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2051 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i64 2
2052 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2053 // CHECK10: arraydestroy.body:
2054 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP15]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2055 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2056 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2057 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
2058 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
2059 // CHECK10: arraydestroy.done5:
2060 // CHECK10-NEXT: ret void
2061 //
2062 //
2063 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
2064 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] {
2065 // CHECK10-NEXT: entry:
2066 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2067 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2068 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2069 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2070 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2071 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
2072 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
2073 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2074 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2075 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2076 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2077 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2078 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2079 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2080 // CHECK10-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2081 // CHECK10-NEXT: [[_TMP3:%.*]] = alloca %struct.S.0*, align 8
2082 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2083 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2084 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2085 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2086 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2087 // CHECK10-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
2088 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2089 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2090 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2091 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2092 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2093 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
2094 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2095 // CHECK10-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
2096 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2097 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2098 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2099 // CHECK10-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2100 // CHECK10-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2101 // CHECK10: arrayctor.loop:
2102 // CHECK10-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2103 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2104 // CHECK10-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
2105 // CHECK10-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2106 // CHECK10-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2107 // CHECK10: arrayctor.cont:
2108 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]])
2109 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP3]], align 8
2110 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2111 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2112 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2113 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2114 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
2115 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2116 // CHECK10: cond.true:
2117 // CHECK10-NEXT: br label [[COND_END:%.*]]
2118 // CHECK10: cond.false:
2119 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2120 // CHECK10-NEXT: br label [[COND_END]]
2121 // CHECK10: cond.end:
2122 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2123 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2124 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2125 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2126 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2127 // CHECK10: omp.inner.for.cond:
2128 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2129 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2130 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2131 // CHECK10-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2132 // CHECK10: omp.inner.for.cond.cleanup:
2133 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2134 // CHECK10: omp.inner.for.body:
2135 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2136 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2137 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2138 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2139 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
2140 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2141 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2142 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
2143 // CHECK10-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
2144 // CHECK10-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP3]], align 8
2145 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
2146 // CHECK10-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64
2147 // CHECK10-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM5]]
2148 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8*
2149 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
2150 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false)
2151 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2152 // CHECK10: omp.body.continue:
2153 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2154 // CHECK10: omp.inner.for.inc:
2155 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2156 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1
2157 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
2158 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
2159 // CHECK10: omp.inner.for.end:
2160 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2161 // CHECK10: omp.loop.exit:
2162 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2163 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
2164 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
2165 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
2166 // CHECK10-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2167 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i64 2
2168 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2169 // CHECK10: arraydestroy.body:
2170 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2171 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2172 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2173 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]]
2174 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]]
2175 // CHECK10: arraydestroy.done9:
2176 // CHECK10-NEXT: ret void
2177 //
2178 //
2179 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2180 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2181 // CHECK10-NEXT: entry:
2182 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2183 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2184 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2185 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2186 // CHECK10-NEXT: ret void
2187 //
2188 //
2189 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2190 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2191 // CHECK10-NEXT: entry:
2192 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2193 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2194 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2195 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2196 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4
2197 // CHECK10-NEXT: ret void
2198 //
2199 //
2200 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2201 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2202 // CHECK10-NEXT: entry:
2203 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2204 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2205 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2206 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2207 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2208 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2209 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2210 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
2211 // CHECK10-NEXT: ret void
2212 //
2213 //
2214 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2215 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2216 // CHECK10-NEXT: entry:
2217 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2218 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2219 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2220 // CHECK10-NEXT: ret void
2221 //
2222 //
2223 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2224 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] {
2225 // CHECK10-NEXT: entry:
2226 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1)
2227 // CHECK10-NEXT: ret void
2228 //
2229 //
2230 // CHECK11-LABEL: define {{[^@]+}}@main
2231 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
2232 // CHECK11-NEXT: entry:
2233 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2234 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8
2235 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4
2236 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2237 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2238 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2239 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2240 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4
2241 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2242 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4
2243 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
2244 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4
2245 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
2246 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4
2247 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2248 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
2249 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2250 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
2251 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
2252 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
2253 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
2254 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4
2255 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
2256 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
2257 // CHECK11-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
2258 // CHECK11-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2259 // CHECK11: omp_offload.failed:
2260 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]]
2261 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
2262 // CHECK11: omp_offload.cont:
2263 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
2264 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2265 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2266 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2267 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2268 // CHECK11: arraydestroy.body:
2269 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2270 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2271 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2272 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2273 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2274 // CHECK11: arraydestroy.done2:
2275 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2276 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4
2277 // CHECK11-NEXT: ret i32 [[TMP4]]
2278 //
2279 //
2280 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2281 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2282 // CHECK11-NEXT: entry:
2283 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2284 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2285 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2286 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
2287 // CHECK11-NEXT: ret void
2288 //
2289 //
2290 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2291 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2292 // CHECK11-NEXT: entry:
2293 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2294 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2295 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2296 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2297 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2298 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2299 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
2300 // CHECK11-NEXT: ret void
2301 //
2302 //
2303 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95
2304 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] {
2305 // CHECK11-NEXT: entry:
2306 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
2307 // CHECK11-NEXT: ret void
2308 //
2309 //
2310 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
2311 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
2312 // CHECK11-NEXT: entry:
2313 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2314 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2315 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2316 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2317 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4
2318 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2319 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2320 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2321 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2322 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2323 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2324 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2325 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2326 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4
2327 // CHECK11-NEXT: [[SVAR:%.*]] = alloca i32, align 4
2328 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2329 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2330 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2331 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4
2332 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2333 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
2334 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2335 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2336 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2337 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2338 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2339 // CHECK11: arrayctor.loop:
2340 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2341 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2342 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
2343 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2344 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2345 // CHECK11: arrayctor.cont:
2346 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
2347 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4
2348 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2349 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2350 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2351 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2352 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
2353 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2354 // CHECK11: cond.true:
2355 // CHECK11-NEXT: br label [[COND_END:%.*]]
2356 // CHECK11: cond.false:
2357 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2358 // CHECK11-NEXT: br label [[COND_END]]
2359 // CHECK11: cond.end:
2360 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2361 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2362 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2363 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2364 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2365 // CHECK11: omp.inner.for.cond:
2366 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2367 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2368 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2369 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2370 // CHECK11: omp.inner.for.cond.cleanup:
2371 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2372 // CHECK11: omp.inner.for.body:
2373 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2374 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2375 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]])
2376 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2377 // CHECK11: omp.inner.for.inc:
2378 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2379 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2380 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
2381 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2382 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2383 // CHECK11: omp.inner.for.end:
2384 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2385 // CHECK11: omp.loop.exit:
2386 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2387 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
2388 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]])
2389 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
2390 // CHECK11-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2391 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i32 2
2392 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2393 // CHECK11: arraydestroy.body:
2394 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2395 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2396 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2397 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
2398 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
2399 // CHECK11: arraydestroy.done5:
2400 // CHECK11-NEXT: ret void
2401 //
2402 //
2403 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
2404 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] {
2405 // CHECK11-NEXT: entry:
2406 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2407 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2408 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2409 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2410 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2411 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2412 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4
2413 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2414 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2415 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2416 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2417 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2418 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2419 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2420 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2421 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4
2422 // CHECK11-NEXT: [[SVAR:%.*]] = alloca i32, align 4
2423 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2424 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2425 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2426 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2427 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2428 // CHECK11-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4
2429 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2430 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2431 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2432 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2433 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4
2434 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4
2435 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2436 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2437 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2438 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2439 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2440 // CHECK11: arrayctor.loop:
2441 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2442 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2443 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
2444 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2445 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2446 // CHECK11: arrayctor.cont:
2447 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
2448 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4
2449 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2450 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2451 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2452 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2453 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
2454 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2455 // CHECK11: cond.true:
2456 // CHECK11-NEXT: br label [[COND_END:%.*]]
2457 // CHECK11: cond.false:
2458 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2459 // CHECK11-NEXT: br label [[COND_END]]
2460 // CHECK11: cond.end:
2461 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2462 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2463 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2464 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2465 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2466 // CHECK11: omp.inner.for.cond:
2467 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2468 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2469 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2470 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2471 // CHECK11: omp.inner.for.cond.cleanup:
2472 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2473 // CHECK11: omp.inner.for.body:
2474 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2475 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2476 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2477 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2478 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
2479 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2480 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]]
2481 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
2482 // CHECK11-NEXT: [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4
2483 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
2484 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP13]]
2485 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8*
2486 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8*
2487 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false)
2488 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2489 // CHECK11: omp.body.continue:
2490 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2491 // CHECK11: omp.inner.for.inc:
2492 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2493 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1
2494 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
2495 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2496 // CHECK11: omp.inner.for.end:
2497 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2498 // CHECK11: omp.loop.exit:
2499 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2500 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
2501 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
2502 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
2503 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2504 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2
2505 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2506 // CHECK11: arraydestroy.body:
2507 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2508 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2509 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2510 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]
2511 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]
2512 // CHECK11: arraydestroy.done7:
2513 // CHECK11-NEXT: ret void
2514 //
2515 //
2516 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2517 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2518 // CHECK11-NEXT: entry:
2519 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2520 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2521 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2522 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2523 // CHECK11-NEXT: ret void
2524 //
2525 //
2526 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2527 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat {
2528 // CHECK11-NEXT: entry:
2529 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2530 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2531 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2532 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2533 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2534 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4
2535 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2536 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
2537 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
2538 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4
2539 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2540 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
2541 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2542 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
2543 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
2544 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
2545 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
2546 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
2547 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
2548 // CHECK11-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
2549 // CHECK11-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
2550 // CHECK11-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2551 // CHECK11: omp_offload.failed:
2552 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]]
2553 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
2554 // CHECK11: omp_offload.cont:
2555 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
2556 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2557 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2558 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2559 // CHECK11: arraydestroy.body:
2560 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2561 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2562 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2563 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2564 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2565 // CHECK11: arraydestroy.done2:
2566 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2567 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4
2568 // CHECK11-NEXT: ret i32 [[TMP4]]
2569 //
2570 //
2571 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2572 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2573 // CHECK11-NEXT: entry:
2574 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2575 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2576 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2577 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2578 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4
2579 // CHECK11-NEXT: ret void
2580 //
2581 //
2582 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2583 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2584 // CHECK11-NEXT: entry:
2585 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2586 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2587 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2588 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2589 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2590 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2591 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2592 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4
2593 // CHECK11-NEXT: ret void
2594 //
2595 //
2596 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2597 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2598 // CHECK11-NEXT: entry:
2599 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2600 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2601 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2602 // CHECK11-NEXT: ret void
2603 //
2604 //
2605 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2606 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2607 // CHECK11-NEXT: entry:
2608 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2609 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2610 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2611 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
2612 // CHECK11-NEXT: ret void
2613 //
2614 //
2615 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2616 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2617 // CHECK11-NEXT: entry:
2618 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2619 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2620 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2621 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2622 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2623 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2624 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
2625 // CHECK11-NEXT: ret void
2626 //
2627 //
2628 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
2629 // CHECK11-SAME: () #[[ATTR3]] {
2630 // CHECK11-NEXT: entry:
2631 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
2632 // CHECK11-NEXT: ret void
2633 //
2634 //
2635 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
2636 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
2637 // CHECK11-NEXT: entry:
2638 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2639 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2640 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2641 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2642 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
2643 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2644 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2645 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2646 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2647 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2648 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2649 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2650 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2651 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4
2652 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2653 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2654 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2655 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
2656 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2657 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
2658 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2659 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2660 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2661 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2662 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2663 // CHECK11: arrayctor.loop:
2664 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2665 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2666 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
2667 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2668 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2669 // CHECK11: arrayctor.cont:
2670 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]])
2671 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4
2672 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2673 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2674 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2675 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2676 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
2677 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2678 // CHECK11: cond.true:
2679 // CHECK11-NEXT: br label [[COND_END:%.*]]
2680 // CHECK11: cond.false:
2681 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2682 // CHECK11-NEXT: br label [[COND_END]]
2683 // CHECK11: cond.end:
2684 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2685 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2686 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2687 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2688 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2689 // CHECK11: omp.inner.for.cond:
2690 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2691 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2692 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2693 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2694 // CHECK11: omp.inner.for.cond.cleanup:
2695 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2696 // CHECK11: omp.inner.for.body:
2697 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2698 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2699 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]])
2700 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2701 // CHECK11: omp.inner.for.inc:
2702 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2703 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2704 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
2705 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2706 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2707 // CHECK11: omp.inner.for.end:
2708 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2709 // CHECK11: omp.loop.exit:
2710 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2711 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
2712 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]])
2713 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
2714 // CHECK11-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2715 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i32 2
2716 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2717 // CHECK11: arraydestroy.body:
2718 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2719 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2720 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2721 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
2722 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
2723 // CHECK11: arraydestroy.done5:
2724 // CHECK11-NEXT: ret void
2725 //
2726 //
2727 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
2728 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] {
2729 // CHECK11-NEXT: entry:
2730 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2731 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2732 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2733 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2734 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2735 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2736 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
2737 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2738 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2739 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2740 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2741 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2742 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2743 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2744 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2745 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4
2746 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2747 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2748 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2749 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2750 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2751 // CHECK11-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
2752 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2753 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2754 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2755 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2756 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4
2757 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4
2758 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2759 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2760 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2761 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2762 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2763 // CHECK11: arrayctor.loop:
2764 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2765 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2766 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
2767 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2768 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2769 // CHECK11: arrayctor.cont:
2770 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]])
2771 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4
2772 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2773 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2774 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2775 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2776 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
2777 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2778 // CHECK11: cond.true:
2779 // CHECK11-NEXT: br label [[COND_END:%.*]]
2780 // CHECK11: cond.false:
2781 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2782 // CHECK11-NEXT: br label [[COND_END]]
2783 // CHECK11: cond.end:
2784 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2785 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2786 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2787 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2788 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2789 // CHECK11: omp.inner.for.cond:
2790 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2791 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2792 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2793 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2794 // CHECK11: omp.inner.for.cond.cleanup:
2795 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2796 // CHECK11: omp.inner.for.body:
2797 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2798 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2799 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2800 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2801 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
2802 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2803 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]]
2804 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
2805 // CHECK11-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4
2806 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
2807 // CHECK11-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP13]]
2808 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8*
2809 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
2810 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false)
2811 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2812 // CHECK11: omp.body.continue:
2813 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2814 // CHECK11: omp.inner.for.inc:
2815 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2816 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1
2817 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
2818 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2819 // CHECK11: omp.inner.for.end:
2820 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2821 // CHECK11: omp.loop.exit:
2822 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2823 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
2824 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
2825 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
2826 // CHECK11-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2827 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2
2828 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2829 // CHECK11: arraydestroy.body:
2830 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2831 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2832 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2833 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]
2834 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]
2835 // CHECK11: arraydestroy.done7:
2836 // CHECK11-NEXT: ret void
2837 //
2838 //
2839 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2840 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2841 // CHECK11-NEXT: entry:
2842 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2843 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2844 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2845 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2846 // CHECK11-NEXT: ret void
2847 //
2848 //
2849 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2850 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2851 // CHECK11-NEXT: entry:
2852 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2853 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2854 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2855 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2856 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4
2857 // CHECK11-NEXT: ret void
2858 //
2859 //
2860 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2861 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2862 // CHECK11-NEXT: entry:
2863 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2864 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2865 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2866 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2867 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2868 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2869 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2870 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
2871 // CHECK11-NEXT: ret void
2872 //
2873 //
2874 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2875 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2876 // CHECK11-NEXT: entry:
2877 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2878 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2879 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2880 // CHECK11-NEXT: ret void
2881 //
2882 //
2883 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2884 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
2885 // CHECK11-NEXT: entry:
2886 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
2887 // CHECK11-NEXT: ret void
2888 //
2889 //
2890 // CHECK12-LABEL: define {{[^@]+}}@main
2891 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] {
2892 // CHECK12-NEXT: entry:
2893 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2894 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8
2895 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 4
2896 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2897 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2898 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2899 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2900 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4
2901 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
2902 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4
2903 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4
2904 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 4
2905 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
2906 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4
2907 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2908 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
2909 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2910 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
2911 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
2912 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
2913 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
2914 // CHECK12-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4
2915 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 2)
2916 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
2917 // CHECK12-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
2918 // CHECK12-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2919 // CHECK12: omp_offload.failed:
2920 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]]
2921 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
2922 // CHECK12: omp_offload.cont:
2923 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
2924 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2925 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2926 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2927 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2928 // CHECK12: arraydestroy.body:
2929 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2930 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2931 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2932 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2933 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2934 // CHECK12: arraydestroy.done2:
2935 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2936 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4
2937 // CHECK12-NEXT: ret i32 [[TMP4]]
2938 //
2939 //
2940 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2941 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2942 // CHECK12-NEXT: entry:
2943 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2944 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2945 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2946 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
2947 // CHECK12-NEXT: ret void
2948 //
2949 //
2950 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2951 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2952 // CHECK12-NEXT: entry:
2953 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2954 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2955 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2956 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2957 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2958 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2959 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
2960 // CHECK12-NEXT: ret void
2961 //
2962 //
2963 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95
2964 // CHECK12-SAME: () #[[ATTR3:[0-9]+]] {
2965 // CHECK12-NEXT: entry:
2966 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
2967 // CHECK12-NEXT: ret void
2968 //
2969 //
2970 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
2971 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
2972 // CHECK12-NEXT: entry:
2973 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2974 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2975 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2976 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
2977 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4
2978 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2979 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2980 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2981 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2982 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2983 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2984 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2985 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2986 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4
2987 // CHECK12-NEXT: [[SVAR:%.*]] = alloca i32, align 4
2988 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
2989 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2990 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2991 // CHECK12-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4
2992 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2993 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
2994 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2995 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2996 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2997 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2998 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2999 // CHECK12: arrayctor.loop:
3000 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3001 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3002 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
3003 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3004 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3005 // CHECK12: arrayctor.cont:
3006 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
3007 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4
3008 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3009 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3010 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3011 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3012 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
3013 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3014 // CHECK12: cond.true:
3015 // CHECK12-NEXT: br label [[COND_END:%.*]]
3016 // CHECK12: cond.false:
3017 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3018 // CHECK12-NEXT: br label [[COND_END]]
3019 // CHECK12: cond.end:
3020 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3021 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3022 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3023 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3024 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3025 // CHECK12: omp.inner.for.cond:
3026 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3027 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3028 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3029 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3030 // CHECK12: omp.inner.for.cond.cleanup:
3031 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3032 // CHECK12: omp.inner.for.body:
3033 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3034 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3035 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]])
3036 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3037 // CHECK12: omp.inner.for.inc:
3038 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3039 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3040 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
3041 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3042 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
3043 // CHECK12: omp.inner.for.end:
3044 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3045 // CHECK12: omp.loop.exit:
3046 // CHECK12-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3047 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
3048 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]])
3049 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
3050 // CHECK12-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3051 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN4]], i32 2
3052 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3053 // CHECK12: arraydestroy.body:
3054 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP13]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3055 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3056 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3057 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
3058 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
3059 // CHECK12: arraydestroy.done5:
3060 // CHECK12-NEXT: ret void
3061 //
3062 //
3063 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
3064 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] {
3065 // CHECK12-NEXT: entry:
3066 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3067 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3068 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3069 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3070 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3071 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3072 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4
3073 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3074 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3075 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3076 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3077 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
3078 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
3079 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
3080 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3081 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 4
3082 // CHECK12-NEXT: [[SVAR:%.*]] = alloca i32, align 4
3083 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
3084 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3085 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3086 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3087 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3088 // CHECK12-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 4
3089 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3090 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3091 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3092 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3093 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4
3094 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4
3095 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3096 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3097 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3098 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
3099 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
3100 // CHECK12: arrayctor.loop:
3101 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3102 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3103 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
3104 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3105 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3106 // CHECK12: arrayctor.cont:
3107 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]])
3108 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 4
3109 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3110 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3111 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3112 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3113 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
3114 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3115 // CHECK12: cond.true:
3116 // CHECK12-NEXT: br label [[COND_END:%.*]]
3117 // CHECK12: cond.false:
3118 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3119 // CHECK12-NEXT: br label [[COND_END]]
3120 // CHECK12: cond.end:
3121 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3122 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3123 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3124 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3125 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3126 // CHECK12: omp.inner.for.cond:
3127 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3128 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3129 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3130 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3131 // CHECK12: omp.inner.for.cond.cleanup:
3132 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3133 // CHECK12: omp.inner.for.body:
3134 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3135 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3136 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3137 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3138 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
3139 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
3140 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]]
3141 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
3142 // CHECK12-NEXT: [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 4
3143 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
3144 // CHECK12-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 [[TMP13]]
3145 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX4]] to i8*
3146 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8*
3147 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false)
3148 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3149 // CHECK12: omp.body.continue:
3150 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3151 // CHECK12: omp.inner.for.inc:
3152 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3153 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1
3154 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
3155 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
3156 // CHECK12: omp.inner.for.end:
3157 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3158 // CHECK12: omp.loop.exit:
3159 // CHECK12-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3160 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
3161 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
3162 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
3163 // CHECK12-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3164 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN6]], i32 2
3165 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3166 // CHECK12: arraydestroy.body:
3167 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3168 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3169 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3170 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]
3171 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]
3172 // CHECK12: arraydestroy.done7:
3173 // CHECK12-NEXT: ret void
3174 //
3175 //
3176 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3177 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3178 // CHECK12-NEXT: entry:
3179 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3180 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3181 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3182 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3183 // CHECK12-NEXT: ret void
3184 //
3185 //
3186 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
3187 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat {
3188 // CHECK12-NEXT: entry:
3189 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3190 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3191 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
3192 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
3193 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3194 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4
3195 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3196 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
3197 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
3198 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4
3199 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3200 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
3201 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3202 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
3203 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
3204 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
3205 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
3206 // CHECK12-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
3207 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 2)
3208 // CHECK12-NEXT: [[TMP1:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0)
3209 // CHECK12-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
3210 // CHECK12-NEXT: br i1 [[TMP2]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3211 // CHECK12: omp_offload.failed:
3212 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]]
3213 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
3214 // CHECK12: omp_offload.cont:
3215 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4
3216 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3217 // CHECK12-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3218 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3219 // CHECK12: arraydestroy.body:
3220 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3221 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3222 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3223 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
3224 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
3225 // CHECK12: arraydestroy.done2:
3226 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3227 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[RETVAL]], align 4
3228 // CHECK12-NEXT: ret i32 [[TMP4]]
3229 //
3230 //
3231 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3232 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3233 // CHECK12-NEXT: entry:
3234 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3235 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3236 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3237 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3238 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4
3239 // CHECK12-NEXT: ret void
3240 //
3241 //
3242 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3243 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3244 // CHECK12-NEXT: entry:
3245 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3246 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
3247 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3248 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4
3249 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3250 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3251 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3252 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4
3253 // CHECK12-NEXT: ret void
3254 //
3255 //
3256 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3257 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3258 // CHECK12-NEXT: entry:
3259 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3260 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3261 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3262 // CHECK12-NEXT: ret void
3263 //
3264 //
3265 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
3266 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3267 // CHECK12-NEXT: entry:
3268 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3269 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3270 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3271 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
3272 // CHECK12-NEXT: ret void
3273 //
3274 //
3275 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
3276 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3277 // CHECK12-NEXT: entry:
3278 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3279 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
3280 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3281 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
3282 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3283 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3284 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
3285 // CHECK12-NEXT: ret void
3286 //
3287 //
3288 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
3289 // CHECK12-SAME: () #[[ATTR3]] {
3290 // CHECK12-NEXT: entry:
3291 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
3292 // CHECK12-NEXT: ret void
3293 //
3294 //
3295 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2
3296 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3297 // CHECK12-NEXT: entry:
3298 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3299 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3300 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3301 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3302 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
3303 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3304 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3305 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3306 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3307 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
3308 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
3309 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3310 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3311 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4
3312 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
3313 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3314 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3315 // CHECK12-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
3316 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3317 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
3318 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3319 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3320 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3321 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3322 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
3323 // CHECK12: arrayctor.loop:
3324 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3325 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3326 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
3327 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3328 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3329 // CHECK12: arrayctor.cont:
3330 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]])
3331 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4
3332 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3333 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3334 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3335 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3336 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
3337 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3338 // CHECK12: cond.true:
3339 // CHECK12-NEXT: br label [[COND_END:%.*]]
3340 // CHECK12: cond.false:
3341 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3342 // CHECK12-NEXT: br label [[COND_END]]
3343 // CHECK12: cond.end:
3344 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3345 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3346 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3347 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3348 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3349 // CHECK12: omp.inner.for.cond:
3350 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3351 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3352 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3353 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3354 // CHECK12: omp.inner.for.cond.cleanup:
3355 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3356 // CHECK12: omp.inner.for.body:
3357 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3358 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3359 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP7]], i32 [[TMP8]])
3360 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3361 // CHECK12: omp.inner.for.inc:
3362 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3363 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3364 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
3365 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3366 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
3367 // CHECK12: omp.inner.for.end:
3368 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3369 // CHECK12: omp.loop.exit:
3370 // CHECK12-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3371 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
3372 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]])
3373 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
3374 // CHECK12-NEXT: [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3375 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN4]], i32 2
3376 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3377 // CHECK12: arraydestroy.body:
3378 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP13]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3379 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3380 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3381 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
3382 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
3383 // CHECK12: arraydestroy.done5:
3384 // CHECK12-NEXT: ret void
3385 //
3386 //
3387 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3
3388 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] {
3389 // CHECK12-NEXT: entry:
3390 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3391 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3392 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3393 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3394 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3395 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3396 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
3397 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3398 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3399 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3400 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3401 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
3402 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
3403 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3404 // CHECK12-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3405 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 4
3406 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
3407 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3408 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3409 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3410 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3411 // CHECK12-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 4
3412 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3413 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3414 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3415 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3416 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4
3417 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4
3418 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3419 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3420 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3421 // CHECK12-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3422 // CHECK12-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
3423 // CHECK12: arrayctor.loop:
3424 // CHECK12-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3425 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3426 // CHECK12-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
3427 // CHECK12-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3428 // CHECK12-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3429 // CHECK12: arrayctor.cont:
3430 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]])
3431 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 4
3432 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3433 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3434 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3435 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3436 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
3437 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3438 // CHECK12: cond.true:
3439 // CHECK12-NEXT: br label [[COND_END:%.*]]
3440 // CHECK12: cond.false:
3441 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3442 // CHECK12-NEXT: br label [[COND_END]]
3443 // CHECK12: cond.end:
3444 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3445 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3446 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3447 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3448 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3449 // CHECK12: omp.inner.for.cond:
3450 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3451 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3452 // CHECK12-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3453 // CHECK12-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3454 // CHECK12: omp.inner.for.cond.cleanup:
3455 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3456 // CHECK12: omp.inner.for.body:
3457 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3458 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3459 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3460 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3461 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR]], align 4
3462 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
3463 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 [[TMP11]]
3464 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
3465 // CHECK12-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 4
3466 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
3467 // CHECK12-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 [[TMP13]]
3468 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX4]] to i8*
3469 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
3470 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false)
3471 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3472 // CHECK12: omp.body.continue:
3473 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3474 // CHECK12: omp.inner.for.inc:
3475 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3476 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1
3477 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
3478 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
3479 // CHECK12: omp.inner.for.end:
3480 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3481 // CHECK12: omp.loop.exit:
3482 // CHECK12-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3483 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
3484 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]])
3485 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
3486 // CHECK12-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3487 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i32 2
3488 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3489 // CHECK12: arraydestroy.body:
3490 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP19]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3491 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3492 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3493 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]
3494 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]
3495 // CHECK12: arraydestroy.done7:
3496 // CHECK12-NEXT: ret void
3497 //
3498 //
3499 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
3500 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3501 // CHECK12-NEXT: entry:
3502 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3503 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3504 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3505 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3506 // CHECK12-NEXT: ret void
3507 //
3508 //
3509 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
3510 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3511 // CHECK12-NEXT: entry:
3512 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3513 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3514 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3515 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3516 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4
3517 // CHECK12-NEXT: ret void
3518 //
3519 //
3520 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
3521 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3522 // CHECK12-NEXT: entry:
3523 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3524 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
3525 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3526 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
3527 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3528 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3529 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3530 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
3531 // CHECK12-NEXT: ret void
3532 //
3533 //
3534 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
3535 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3536 // CHECK12-NEXT: entry:
3537 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3538 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3539 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3540 // CHECK12-NEXT: ret void
3541 //
3542 //
3543 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3544 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] {
3545 // CHECK12-NEXT: entry:
3546 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1)
3547 // CHECK12-NEXT: ret void
3548 //
3549 //