1 // Test target codegen - host bc file has to be created first.
2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc
3 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64
4 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc
5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32
6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-cuda-mode -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32
7
8 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc
9 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64
10 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc
11 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32
12 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32
13
14 // expected-no-diagnostics
15 #ifndef HEADER
16 #define HEADER
17
18 // Check that the execution mode of all 2 target regions on the gpu is set to NonSPMD Mode.
19 // CHECK-DAG: {{@__omp_offloading_.+l37}}_exec_mode = weak constant i8 0
20 // CHECK-DAG: {{@__omp_offloading_.+l43}}_exec_mode = weak constant i8 0
21 // CHECK-DAG: {{@__omp_offloading_.+l48}}_exec_mode = weak constant i8 0
22 // CHECK-DAG: {{@__omp_offloading_.+l53}}_exec_mode = weak constant i8 0
23
24 #define N 1000
25 #define M 10
26
27 template<typename tx>
ftemplate(int n)28 tx ftemplate(int n) {
29 tx a[N];
30 short aa[N];
31 tx b[10];
32 tx c[M][M];
33 tx f = n;
34 tx l;
35 int k;
36
37 #pragma omp target teams distribute simd lastprivate(l) dist_schedule(static,128)
38 for(int i = 0; i < n; i++) {
39 a[i] = 1;
40 l = i;
41 }
42
43 #pragma omp target teams distribute simd map(tofrom: aa) num_teams(M) thread_limit(64)
44 for(int i = 0; i < n; i++) {
45 aa[i] += 1;
46 }
47
48 #pragma omp target teams distribute simd map(tofrom:a, aa, b) if(target: n>40)
49 for(int i = 0; i < 10; i++) {
50 b[i] += 1;
51 }
52
53 #pragma omp target teams distribute simd collapse(2) firstprivate(f) private(k)
54 for(int i = 0; i < M; i++) {
55 for(int j = 0; j < M; j++) {
56 k = M;
57 c[i][j] = i + j * f + k;
58 }
59 }
60
61 return a[0];
62 }
63
bar(int n)64 int bar(int n){
65 int a = 0;
66
67 a += ftemplate<int>(n);
68
69 return a;
70 }
71
72 // CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+}}_l37(
73 // CHECK: call i32 @__kmpc_target_init({{.*}}, i1 true, i1 false, i1 false)
74 // CHECK: call void @__kmpc_target_deinit({{.*}}, i1 true, i1 false)
75
76 // CHECK: call void @__kmpc_for_static_init_4({{.+}}, {{.+}}, {{.+}} 91,
77 // CHECK: call void @__kmpc_for_static_fini(
78 // CHECK: ret void
79
80 // CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+}}_l43(
81 // CHECK: call i32 @__kmpc_target_init({{.*}}, i1 true, i1 false, i1 false)
82 // CHECK: call void @__kmpc_target_deinit({{.*}}, i1 true, i1 false)
83
84 // CHECK: call void @__kmpc_for_static_init_4({{.+}}, {{.+}}, {{.+}} 91,
85 // CHECK: call void @__kmpc_for_static_fini(
86 // CHECK: ret void
87
88 // CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+}}_l48(
89 // CHECK: call i32 @__kmpc_target_init({{.*}}, i1 true, i1 false, i1 false)
90 // CHECK: call void @__kmpc_target_deinit({{.*}}, i1 true, i1 false)
91
92 // CHECK: call void @__kmpc_for_static_init_4({{.+}}, {{.+}}, {{.+}} 91,
93 // CHECK: call void @__kmpc_for_static_fini(
94 // CHECK: ret void
95
96 // CHECK: define {{.*}}void {{@__omp_offloading_.+}}_l53({{.+}}, i{{32|64}} [[F_IN:%.+]])
97 // CHECK: store {{.+}} [[F_IN]], {{.+}}* {{.+}},
98 // CHECK: call i32 @__kmpc_target_init({{.*}}, i1 true, i1 false, i1 false)
99 // CHECK: call void @__kmpc_target_deinit({{.*}}, i1 true, i1 false)
100
101 // CHECK: store {{.+}} 99, {{.+}}* [[COMB_UB:%.+]], align
102 // CHECK: call void @__kmpc_for_static_init_4({{.+}}, {{.+}}, {{.+}} 91, {{.+}}, {{.+}}, {{.+}}* [[COMB_UB]],
103 // CHECK: call void @__kmpc_for_static_fini(
104 // CHECK: ret void
105
106 #endif
107