1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5 // Test host codegen.
6 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
7 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
9 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
10 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
12
13 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
14 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
16 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
17 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8
19 #ifdef CK1
20
21 int a[100];
22
teams_argument_global(int n)23 int teams_argument_global(int n){
24 int te = n / 128;
25 int th = 128;
26 // discard n_addr
27
28
29 #pragma omp target
30 #pragma omp teams distribute parallel for simd num_teams(te), thread_limit(th) simdlen(64)
31 for(int i = 0; i < n; i++) {
32 a[i] = 0;
33 }
34
35 int i;
36 #pragma omp target
37 {{{
38 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i)
39 for(i = 0; i < n; i++) {
40 a[i] = 0;
41 }
42 }}}
43 // outlined target regions
44
45
46
47
48 return a[0];
49 }
50
51
52 #endif // CK1
53
54 // Test host codegen.
55 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
56 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
57 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
58 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
59 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
60 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
61
62 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
63 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
64 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14
65 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
66 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
67 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16
68 #ifdef CK2
69
teams_local_arg(void)70 int teams_local_arg(void) {
71 int n = 100;
72 int a[n], i;
73
74 #pragma omp target
75 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i)
76 for(i = 0; i < n; i++) {
77 a[i] = 0;
78 }
79
80 // outlined target region
81
82
83 return a[0];
84 }
85
86
87 #endif // CK2
88
89 // Test host codegen.
90 // RUN: %clang_cc1 -DCK3 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17
91 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
92 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18
93 // RUN: %clang_cc1 -DCK3 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19
94 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
95 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK20
96
97 // RUN: %clang_cc1 -DCK3 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK21
98 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
99 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK22
100 // RUN: %clang_cc1 -DCK3 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK23
101 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
102 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK24
103 #ifdef CK3
104
105
106 template <typename T, int X, long long Y>
107 struct SS{
108 T a[X];
109 float b;
fooSS110 int foo(void) {
111 int i;
112 #pragma omp target
113 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i)
114 for(i = 0; i < X; i++) {
115 a[i] = (T)0;
116 }
117
118 // outlined target region
119
120
121 return a[0];
122 }
123 };
124
teams_template_struct(void)125 int teams_template_struct(void) {
126 SS<int, 123, 456> V;
127 return V.foo();
128
129 }
130
131 #endif // CK3
132
133 // Test host codegen.
134 // RUN: %clang_cc1 -DCK4 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK25
135 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
136 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK26
137 // RUN: %clang_cc1 -DCK4 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK27
138 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
139 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK28
140
141 // RUN: %clang_cc1 -DCK4 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK29
142 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
143 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK30
144 // RUN: %clang_cc1 -DCK4 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK31
145 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
146 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK32
147
148 #ifdef CK4
149
150 template <typename T, int n>
tmain(T argc)151 int tmain(T argc) {
152 T a[n];
153 int te = n/128;
154 int th = 128;
155 #pragma omp target
156 #pragma omp teams distribute parallel for simd num_teams(te) thread_limit(th) simdlen(64)
157 for(int i = 0; i < n; i++) {
158 a[i] = (T)0;
159 }
160 return 0;
161 }
162
main(int argc,char ** argv)163 int main (int argc, char **argv) {
164 int n = 100;
165 int a[n], i;
166 #pragma omp target
167 #pragma omp teams distribute parallel for simd safelen(4) aligned(a) linear(i)
168 for(i = 0; i < n; i++) {
169 a[i] = 0;
170 }
171 return tmain<int, 10>(argc);
172 }
173
174
175
176
177
178
179
180
181 #endif // CK4
182 #endif
183
184 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_argument_globali
185 // CHECK1-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
186 // CHECK1-NEXT: entry:
187 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
188 // CHECK1-NEXT: [[TE:%.*]] = alloca i32, align 4
189 // CHECK1-NEXT: [[TH:%.*]] = alloca i32, align 4
190 // CHECK1-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8
191 // CHECK1-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8
192 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
193 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
194 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
195 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
196 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
197 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
198 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
199 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
200 // CHECK1-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
201 // CHECK1-NEXT: [[N_CASTED7:%.*]] = alloca i64, align 8
202 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS9:%.*]] = alloca [3 x i8*], align 8
203 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS10:%.*]] = alloca [3 x i8*], align 8
204 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS11:%.*]] = alloca [3 x i8*], align 8
205 // CHECK1-NEXT: [[_TMP12:%.*]] = alloca i32, align 4
206 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4
207 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4
208 // CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
209 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
210 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
211 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
212 // CHECK1-NEXT: store i32 128, i32* [[TH]], align 4
213 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
214 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32*
215 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4
216 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[TE_CASTED]], align 8
217 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4
218 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32*
219 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
220 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[TH_CASTED]], align 8
221 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4
222 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
223 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4
224 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8
225 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
226 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
227 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8
228 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
229 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
230 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP10]], align 8
231 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
232 // CHECK1-NEXT: store i8* null, i8** [[TMP11]], align 8
233 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
234 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
235 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP13]], align 8
236 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
237 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
238 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP15]], align 8
239 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
240 // CHECK1-NEXT: store i8* null, i8** [[TMP16]], align 8
241 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
242 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
243 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP18]], align 8
244 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
245 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64*
246 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP20]], align 8
247 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
248 // CHECK1-NEXT: store i8* null, i8** [[TMP21]], align 8
249 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
250 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]**
251 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 8
252 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
253 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]**
254 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 8
255 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
256 // CHECK1-NEXT: store i8* null, i8** [[TMP26]], align 8
257 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
258 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
259 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4
260 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[N_ADDR]], align 4
261 // CHECK1-NEXT: store i32 [[TMP30]], i32* [[DOTCAPTURE_EXPR_]], align 4
262 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
263 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP31]], 0
264 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1
265 // CHECK1-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1
266 // CHECK1-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
267 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
268 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP32]], 1
269 // CHECK1-NEXT: [[TMP33:%.*]] = zext i32 [[ADD]] to i64
270 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP33]])
271 // CHECK1-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 0)
272 // CHECK1-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
273 // CHECK1-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
274 // CHECK1: omp_offload.failed:
275 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]]
276 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
277 // CHECK1: omp_offload.cont:
278 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[I]], align 4
279 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[I_CASTED]] to i32*
280 // CHECK1-NEXT: store i32 [[TMP36]], i32* [[CONV6]], align 4
281 // CHECK1-NEXT: [[TMP37:%.*]] = load i64, i64* [[I_CASTED]], align 8
282 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[N_ADDR]], align 4
283 // CHECK1-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED7]] to i32*
284 // CHECK1-NEXT: store i32 [[TMP38]], i32* [[CONV8]], align 4
285 // CHECK1-NEXT: [[TMP39:%.*]] = load i64, i64* [[N_CASTED7]], align 8
286 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
287 // CHECK1-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to [100 x i32]**
288 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP41]], align 8
289 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
290 // CHECK1-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to [100 x i32]**
291 // CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP43]], align 8
292 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 0
293 // CHECK1-NEXT: store i8* null, i8** [[TMP44]], align 8
294 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 1
295 // CHECK1-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
296 // CHECK1-NEXT: store i64 [[TMP37]], i64* [[TMP46]], align 8
297 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 1
298 // CHECK1-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
299 // CHECK1-NEXT: store i64 [[TMP37]], i64* [[TMP48]], align 8
300 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 1
301 // CHECK1-NEXT: store i8* null, i8** [[TMP49]], align 8
302 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 2
303 // CHECK1-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i64*
304 // CHECK1-NEXT: store i64 [[TMP39]], i64* [[TMP51]], align 8
305 // CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 2
306 // CHECK1-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64*
307 // CHECK1-NEXT: store i64 [[TMP39]], i64* [[TMP53]], align 8
308 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 2
309 // CHECK1-NEXT: store i8* null, i8** [[TMP54]], align 8
310 // CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
311 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
312 // CHECK1-NEXT: [[TMP57:%.*]] = load i32, i32* [[N_ADDR]], align 4
313 // CHECK1-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_13]], align 4
314 // CHECK1-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
315 // CHECK1-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP58]], 0
316 // CHECK1-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
317 // CHECK1-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 1
318 // CHECK1-NEXT: store i32 [[SUB17]], i32* [[DOTCAPTURE_EXPR_14]], align 4
319 // CHECK1-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
320 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP59]], 1
321 // CHECK1-NEXT: [[TMP60:%.*]] = zext i32 [[ADD18]] to i64
322 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
323 // CHECK1-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
324 // CHECK1-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
325 // CHECK1-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]]
326 // CHECK1: omp_offload.failed19:
327 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36([100 x i32]* @a, i64 [[TMP37]], i64 [[TMP39]]) #[[ATTR2]]
328 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT20]]
329 // CHECK1: omp_offload.cont20:
330 // CHECK1-NEXT: [[TMP63:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4
331 // CHECK1-NEXT: ret i32 [[TMP63]]
332 //
333 //
334 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29
335 // CHECK1-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], i64 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] {
336 // CHECK1-NEXT: entry:
337 // CHECK1-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8
338 // CHECK1-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8
339 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
340 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
341 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
342 // CHECK1-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8
343 // CHECK1-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8
344 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
345 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
346 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32*
347 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32*
348 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_ADDR]] to i32*
349 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
350 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
351 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
352 // CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
353 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV2]], [100 x i32]* [[TMP1]])
354 // CHECK1-NEXT: ret void
355 //
356 //
357 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
358 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
359 // CHECK1-NEXT: entry:
360 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
361 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
362 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
363 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
364 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
365 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
366 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
367 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
368 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
369 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
370 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
371 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
372 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
373 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4
374 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
375 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
376 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
377 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
378 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
379 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
380 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
381 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
382 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
383 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
384 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
385 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
386 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
387 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
388 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
389 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
390 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
391 // CHECK1: omp.precond.then:
392 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
393 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
394 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
395 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
396 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
397 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
398 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
399 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
400 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
401 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
402 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
403 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
404 // CHECK1: cond.true:
405 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
406 // CHECK1-NEXT: br label [[COND_END:%.*]]
407 // CHECK1: cond.false:
408 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
409 // CHECK1-NEXT: br label [[COND_END]]
410 // CHECK1: cond.end:
411 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
412 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
413 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
414 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
415 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
416 // CHECK1: omp.inner.for.cond:
417 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
418 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
419 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
420 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
421 // CHECK1: omp.inner.for.body:
422 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
423 // CHECK1-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
424 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
425 // CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
426 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i32* [[TMP0]], [100 x i32]* [[TMP1]])
427 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
428 // CHECK1: omp.inner.for.inc:
429 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
430 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
431 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
432 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
433 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
434 // CHECK1: omp.inner.for.end:
435 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
436 // CHECK1: omp.loop.exit:
437 // CHECK1-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
438 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
439 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
440 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
441 // CHECK1-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
442 // CHECK1-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
443 // CHECK1: .omp.final.then:
444 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
445 // CHECK1-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0
446 // CHECK1-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
447 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
448 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
449 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
450 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
451 // CHECK1: .omp.final.done:
452 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
453 // CHECK1: omp.precond.end:
454 // CHECK1-NEXT: ret void
455 //
456 //
457 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
458 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
459 // CHECK1-NEXT: entry:
460 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
461 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
462 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
463 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
464 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
465 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
466 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
467 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
468 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
469 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
470 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
471 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
472 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
473 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
474 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
475 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4
476 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
477 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
478 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
479 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
480 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
481 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
482 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
483 // CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
484 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
485 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
486 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
487 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
488 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
489 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
490 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
491 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
492 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
493 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
494 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
495 // CHECK1: omp.precond.then:
496 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
497 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
498 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
499 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
500 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32
501 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
502 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
503 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
504 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
505 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
506 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
507 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
508 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
509 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
510 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
511 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
512 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
513 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
514 // CHECK1: cond.true:
515 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
516 // CHECK1-NEXT: br label [[COND_END:%.*]]
517 // CHECK1: cond.false:
518 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
519 // CHECK1-NEXT: br label [[COND_END]]
520 // CHECK1: cond.end:
521 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
522 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
523 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
524 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
525 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
526 // CHECK1: omp.inner.for.cond:
527 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
528 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
529 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
530 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
531 // CHECK1: omp.inner.for.body:
532 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
533 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
534 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
535 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
536 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4
537 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
538 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]]
539 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
540 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
541 // CHECK1: omp.body.continue:
542 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
543 // CHECK1: omp.inner.for.inc:
544 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
545 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
546 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
547 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
548 // CHECK1: omp.inner.for.end:
549 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
550 // CHECK1: omp.loop.exit:
551 // CHECK1-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
552 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
553 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
554 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
555 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
556 // CHECK1-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
557 // CHECK1: .omp.final.then:
558 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
559 // CHECK1-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP24]], 0
560 // CHECK1-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
561 // CHECK1-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
562 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
563 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4
564 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
565 // CHECK1: .omp.final.done:
566 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
567 // CHECK1: omp.precond.end:
568 // CHECK1-NEXT: ret void
569 //
570 //
571 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36
572 // CHECK1-SAME: ([100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]], i64 [[I:%.*]], i64 [[N:%.*]]) #[[ATTR1]] {
573 // CHECK1-NEXT: entry:
574 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
575 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
576 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
577 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
578 // CHECK1-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
579 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
580 // CHECK1-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
581 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
582 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
583 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], [100 x i32]* [[TMP0]])
584 // CHECK1-NEXT: ret void
585 //
586 //
587 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
588 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
589 // CHECK1-NEXT: entry:
590 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
591 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
592 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
593 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
594 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
595 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
596 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
597 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
598 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
599 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4
600 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
601 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
602 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
603 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
604 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4
605 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
606 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
607 // CHECK1-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
608 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
609 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
610 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
611 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8
612 // CHECK1-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
613 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
614 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
615 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
616 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
617 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
618 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
619 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
620 // CHECK1-NEXT: store i32 0, i32* [[I3]], align 4
621 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
622 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
623 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
624 // CHECK1: omp.precond.then:
625 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i64 0, i64 0
626 // CHECK1-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ]
627 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
628 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
629 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
630 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
631 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
632 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
633 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
634 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
635 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
636 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
637 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
638 // CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
639 // CHECK1: cond.true:
640 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
641 // CHECK1-NEXT: br label [[COND_END:%.*]]
642 // CHECK1: cond.false:
643 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
644 // CHECK1-NEXT: br label [[COND_END]]
645 // CHECK1: cond.end:
646 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
647 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
648 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
649 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
650 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
651 // CHECK1: omp.inner.for.cond:
652 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
653 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
654 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
655 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
656 // CHECK1: omp.inner.for.body:
657 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
658 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
659 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
660 // CHECK1-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
661 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, [100 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[I4]], i32* [[TMP1]], [100 x i32]* [[TMP2]])
662 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
663 // CHECK1: omp.inner.for.inc:
664 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
665 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
666 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
667 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
668 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
669 // CHECK1: omp.inner.for.end:
670 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
671 // CHECK1: omp.loop.exit:
672 // CHECK1-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
673 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
674 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
675 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
676 // CHECK1-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
677 // CHECK1-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
678 // CHECK1: .omp.final.then:
679 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
680 // CHECK1-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0
681 // CHECK1-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
682 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
683 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
684 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4
685 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
686 // CHECK1: .omp.final.done:
687 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
688 // CHECK1: omp.precond.end:
689 // CHECK1-NEXT: ret void
690 //
691 //
692 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
693 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
694 // CHECK1-NEXT: entry:
695 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
696 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
697 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
698 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
699 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
700 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
701 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
702 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
703 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
704 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
705 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
706 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4
707 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
708 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
709 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
710 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
711 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
712 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4
713 // CHECK1-NEXT: [[I6:%.*]] = alloca i32, align 4
714 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
715 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
716 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
717 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
718 // CHECK1-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
719 // CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
720 // CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
721 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
722 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8
723 // CHECK1-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
724 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
725 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
726 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
727 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
728 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
729 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
730 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
731 // CHECK1-NEXT: store i32 0, i32* [[I3]], align 4
732 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
733 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
734 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
735 // CHECK1: omp.precond.then:
736 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i64 0, i64 0
737 // CHECK1-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ]
738 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4
739 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START]], align 4
740 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
741 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
742 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
743 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
744 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32
745 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
746 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP9]] to i32
747 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
748 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
749 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
750 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
751 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
752 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
753 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP11]])
754 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
755 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
756 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
757 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
758 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
759 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]]
760 // CHECK1-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
761 // CHECK1: cond.true:
762 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
763 // CHECK1-NEXT: br label [[COND_END:%.*]]
764 // CHECK1: cond.false:
765 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
766 // CHECK1-NEXT: br label [[COND_END]]
767 // CHECK1: cond.end:
768 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
769 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
770 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
771 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4
772 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
773 // CHECK1: omp.inner.for.cond:
774 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
775 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
776 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
777 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
778 // CHECK1: omp.inner.for.body:
779 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
780 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1
781 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
782 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
783 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[I5]], align 4
784 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64
785 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i64 0, i64 [[IDXPROM]]
786 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
787 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
788 // CHECK1: omp.body.continue:
789 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
790 // CHECK1: omp.inner.for.inc:
791 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
792 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP23]], 1
793 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
794 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
795 // CHECK1: omp.inner.for.end:
796 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
797 // CHECK1: omp.loop.exit:
798 // CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
799 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
800 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
801 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
802 // CHECK1-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
803 // CHECK1-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
804 // CHECK1: .omp.final.then:
805 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
806 // CHECK1-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP28]], 0
807 // CHECK1-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
808 // CHECK1-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
809 // CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
810 // CHECK1-NEXT: store i32 [[ADD13]], i32* [[TMP0]], align 4
811 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
812 // CHECK1: .omp.final.done:
813 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
814 // CHECK1-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
815 // CHECK1-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
816 // CHECK1: .omp.linear.pu:
817 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
818 // CHECK1: .omp.linear.pu.done:
819 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
820 // CHECK1: omp.precond.end:
821 // CHECK1-NEXT: ret void
822 //
823 //
824 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
825 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] {
826 // CHECK1-NEXT: entry:
827 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
828 // CHECK1-NEXT: ret void
829 //
830 //
831 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_argument_globali
832 // CHECK2-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
833 // CHECK2-NEXT: entry:
834 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
835 // CHECK2-NEXT: [[TE:%.*]] = alloca i32, align 4
836 // CHECK2-NEXT: [[TH:%.*]] = alloca i32, align 4
837 // CHECK2-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8
838 // CHECK2-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8
839 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
840 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
841 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
842 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
843 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
844 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
845 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
846 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
847 // CHECK2-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
848 // CHECK2-NEXT: [[N_CASTED7:%.*]] = alloca i64, align 8
849 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS9:%.*]] = alloca [3 x i8*], align 8
850 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS10:%.*]] = alloca [3 x i8*], align 8
851 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS11:%.*]] = alloca [3 x i8*], align 8
852 // CHECK2-NEXT: [[_TMP12:%.*]] = alloca i32, align 4
853 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4
854 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4
855 // CHECK2-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
856 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
857 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
858 // CHECK2-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
859 // CHECK2-NEXT: store i32 128, i32* [[TH]], align 4
860 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
861 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32*
862 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4
863 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[TE_CASTED]], align 8
864 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4
865 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32*
866 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
867 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[TH_CASTED]], align 8
868 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4
869 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
870 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4
871 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8
872 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
873 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
874 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8
875 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
876 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
877 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP10]], align 8
878 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
879 // CHECK2-NEXT: store i8* null, i8** [[TMP11]], align 8
880 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
881 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
882 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP13]], align 8
883 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
884 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
885 // CHECK2-NEXT: store i64 [[TMP4]], i64* [[TMP15]], align 8
886 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
887 // CHECK2-NEXT: store i8* null, i8** [[TMP16]], align 8
888 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
889 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
890 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP18]], align 8
891 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
892 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64*
893 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[TMP20]], align 8
894 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
895 // CHECK2-NEXT: store i8* null, i8** [[TMP21]], align 8
896 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
897 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]**
898 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 8
899 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
900 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]**
901 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 8
902 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
903 // CHECK2-NEXT: store i8* null, i8** [[TMP26]], align 8
904 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
905 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
906 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4
907 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[N_ADDR]], align 4
908 // CHECK2-NEXT: store i32 [[TMP30]], i32* [[DOTCAPTURE_EXPR_]], align 4
909 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
910 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP31]], 0
911 // CHECK2-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1
912 // CHECK2-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1
913 // CHECK2-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
914 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
915 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP32]], 1
916 // CHECK2-NEXT: [[TMP33:%.*]] = zext i32 [[ADD]] to i64
917 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP33]])
918 // CHECK2-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 0)
919 // CHECK2-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
920 // CHECK2-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
921 // CHECK2: omp_offload.failed:
922 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]]
923 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
924 // CHECK2: omp_offload.cont:
925 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[I]], align 4
926 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[I_CASTED]] to i32*
927 // CHECK2-NEXT: store i32 [[TMP36]], i32* [[CONV6]], align 4
928 // CHECK2-NEXT: [[TMP37:%.*]] = load i64, i64* [[I_CASTED]], align 8
929 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[N_ADDR]], align 4
930 // CHECK2-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED7]] to i32*
931 // CHECK2-NEXT: store i32 [[TMP38]], i32* [[CONV8]], align 4
932 // CHECK2-NEXT: [[TMP39:%.*]] = load i64, i64* [[N_CASTED7]], align 8
933 // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
934 // CHECK2-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to [100 x i32]**
935 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP41]], align 8
936 // CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
937 // CHECK2-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to [100 x i32]**
938 // CHECK2-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP43]], align 8
939 // CHECK2-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 0
940 // CHECK2-NEXT: store i8* null, i8** [[TMP44]], align 8
941 // CHECK2-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 1
942 // CHECK2-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
943 // CHECK2-NEXT: store i64 [[TMP37]], i64* [[TMP46]], align 8
944 // CHECK2-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 1
945 // CHECK2-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
946 // CHECK2-NEXT: store i64 [[TMP37]], i64* [[TMP48]], align 8
947 // CHECK2-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 1
948 // CHECK2-NEXT: store i8* null, i8** [[TMP49]], align 8
949 // CHECK2-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 2
950 // CHECK2-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i64*
951 // CHECK2-NEXT: store i64 [[TMP39]], i64* [[TMP51]], align 8
952 // CHECK2-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 2
953 // CHECK2-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64*
954 // CHECK2-NEXT: store i64 [[TMP39]], i64* [[TMP53]], align 8
955 // CHECK2-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i64 0, i64 2
956 // CHECK2-NEXT: store i8* null, i8** [[TMP54]], align 8
957 // CHECK2-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
958 // CHECK2-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
959 // CHECK2-NEXT: [[TMP57:%.*]] = load i32, i32* [[N_ADDR]], align 4
960 // CHECK2-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_13]], align 4
961 // CHECK2-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
962 // CHECK2-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP58]], 0
963 // CHECK2-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
964 // CHECK2-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 1
965 // CHECK2-NEXT: store i32 [[SUB17]], i32* [[DOTCAPTURE_EXPR_14]], align 4
966 // CHECK2-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
967 // CHECK2-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP59]], 1
968 // CHECK2-NEXT: [[TMP60:%.*]] = zext i32 [[ADD18]] to i64
969 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
970 // CHECK2-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
971 // CHECK2-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
972 // CHECK2-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]]
973 // CHECK2: omp_offload.failed19:
974 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36([100 x i32]* @a, i64 [[TMP37]], i64 [[TMP39]]) #[[ATTR2]]
975 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT20]]
976 // CHECK2: omp_offload.cont20:
977 // CHECK2-NEXT: [[TMP63:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4
978 // CHECK2-NEXT: ret i32 [[TMP63]]
979 //
980 //
981 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29
982 // CHECK2-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], i64 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] {
983 // CHECK2-NEXT: entry:
984 // CHECK2-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8
985 // CHECK2-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8
986 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
987 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
988 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
989 // CHECK2-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8
990 // CHECK2-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8
991 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
992 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
993 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32*
994 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32*
995 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_ADDR]] to i32*
996 // CHECK2-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
997 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
998 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
999 // CHECK2-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
1000 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV2]], [100 x i32]* [[TMP1]])
1001 // CHECK2-NEXT: ret void
1002 //
1003 //
1004 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
1005 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
1006 // CHECK2-NEXT: entry:
1007 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1008 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1009 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
1010 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
1011 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1012 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1013 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1014 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1015 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1016 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1017 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1018 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1019 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1020 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4
1021 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1022 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1023 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
1024 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
1025 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
1026 // CHECK2-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
1027 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
1028 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
1029 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1030 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1031 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1032 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1033 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1034 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
1035 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1036 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1037 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1038 // CHECK2: omp.precond.then:
1039 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1040 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1041 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
1042 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1043 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1044 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1045 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1046 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1047 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1048 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1049 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
1050 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1051 // CHECK2: cond.true:
1052 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1053 // CHECK2-NEXT: br label [[COND_END:%.*]]
1054 // CHECK2: cond.false:
1055 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1056 // CHECK2-NEXT: br label [[COND_END]]
1057 // CHECK2: cond.end:
1058 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1059 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1060 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1061 // CHECK2-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
1062 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1063 // CHECK2: omp.inner.for.cond:
1064 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1065 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1066 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1067 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1068 // CHECK2: omp.inner.for.body:
1069 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1070 // CHECK2-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
1071 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1072 // CHECK2-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
1073 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i32* [[TMP0]], [100 x i32]* [[TMP1]])
1074 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1075 // CHECK2: omp.inner.for.inc:
1076 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1077 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1078 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1079 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1080 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
1081 // CHECK2: omp.inner.for.end:
1082 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1083 // CHECK2: omp.loop.exit:
1084 // CHECK2-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1085 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
1086 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
1087 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1088 // CHECK2-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1089 // CHECK2-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1090 // CHECK2: .omp.final.then:
1091 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1092 // CHECK2-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0
1093 // CHECK2-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1094 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
1095 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
1096 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
1097 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1098 // CHECK2: .omp.final.done:
1099 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
1100 // CHECK2: omp.precond.end:
1101 // CHECK2-NEXT: ret void
1102 //
1103 //
1104 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
1105 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
1106 // CHECK2-NEXT: entry:
1107 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1108 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1109 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1110 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1111 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
1112 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
1113 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1114 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1115 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1116 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1117 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1118 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1119 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1120 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1121 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1122 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4
1123 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1124 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1125 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1126 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1127 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
1128 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
1129 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
1130 // CHECK2-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
1131 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
1132 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
1133 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1134 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1135 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1136 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1137 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1138 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
1139 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1140 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1141 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1142 // CHECK2: omp.precond.then:
1143 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1144 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1145 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
1146 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1147 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32
1148 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1149 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
1150 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1151 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
1152 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1153 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1154 // CHECK2-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1155 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
1156 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1157 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1158 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1159 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
1160 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1161 // CHECK2: cond.true:
1162 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1163 // CHECK2-NEXT: br label [[COND_END:%.*]]
1164 // CHECK2: cond.false:
1165 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1166 // CHECK2-NEXT: br label [[COND_END]]
1167 // CHECK2: cond.end:
1168 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
1169 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1170 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1171 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
1172 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1173 // CHECK2: omp.inner.for.cond:
1174 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1175 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1176 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
1177 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1178 // CHECK2: omp.inner.for.body:
1179 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1180 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
1181 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1182 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
1183 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4
1184 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
1185 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]]
1186 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1187 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1188 // CHECK2: omp.body.continue:
1189 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1190 // CHECK2: omp.inner.for.inc:
1191 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1192 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
1193 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
1194 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
1195 // CHECK2: omp.inner.for.end:
1196 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1197 // CHECK2: omp.loop.exit:
1198 // CHECK2-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1199 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
1200 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
1201 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1202 // CHECK2-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
1203 // CHECK2-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1204 // CHECK2: .omp.final.then:
1205 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1206 // CHECK2-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP24]], 0
1207 // CHECK2-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
1208 // CHECK2-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
1209 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
1210 // CHECK2-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4
1211 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1212 // CHECK2: .omp.final.done:
1213 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
1214 // CHECK2: omp.precond.end:
1215 // CHECK2-NEXT: ret void
1216 //
1217 //
1218 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36
1219 // CHECK2-SAME: ([100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]], i64 [[I:%.*]], i64 [[N:%.*]]) #[[ATTR1]] {
1220 // CHECK2-NEXT: entry:
1221 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
1222 // CHECK2-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
1223 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1224 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
1225 // CHECK2-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
1226 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1227 // CHECK2-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
1228 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
1229 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1230 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], [100 x i32]* [[TMP0]])
1231 // CHECK2-NEXT: ret void
1232 //
1233 //
1234 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2
1235 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
1236 // CHECK2-NEXT: entry:
1237 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1238 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1239 // CHECK2-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
1240 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
1241 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
1242 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1243 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1244 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1245 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1246 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4
1247 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1248 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1249 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1250 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1251 // CHECK2-NEXT: [[I4:%.*]] = alloca i32, align 4
1252 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1253 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1254 // CHECK2-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
1255 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
1256 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
1257 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
1258 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8
1259 // CHECK2-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
1260 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
1261 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
1262 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1263 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
1264 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1265 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1266 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1267 // CHECK2-NEXT: store i32 0, i32* [[I3]], align 4
1268 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1269 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
1270 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1271 // CHECK2: omp.precond.then:
1272 // CHECK2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i64 0, i64 0
1273 // CHECK2-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ]
1274 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1275 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1276 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
1277 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1278 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1279 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1280 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1281 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1282 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1283 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1284 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1285 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1286 // CHECK2: cond.true:
1287 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1288 // CHECK2-NEXT: br label [[COND_END:%.*]]
1289 // CHECK2: cond.false:
1290 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1291 // CHECK2-NEXT: br label [[COND_END]]
1292 // CHECK2: cond.end:
1293 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1294 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1295 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1296 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
1297 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1298 // CHECK2: omp.inner.for.cond:
1299 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1300 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1301 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1302 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1303 // CHECK2: omp.inner.for.body:
1304 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1305 // CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
1306 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1307 // CHECK2-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
1308 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, [100 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[I4]], i32* [[TMP1]], [100 x i32]* [[TMP2]])
1309 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1310 // CHECK2: omp.inner.for.inc:
1311 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1312 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1313 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1314 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1315 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1316 // CHECK2: omp.inner.for.end:
1317 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1318 // CHECK2: omp.loop.exit:
1319 // CHECK2-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1320 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
1321 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
1322 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1323 // CHECK2-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1324 // CHECK2-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1325 // CHECK2: .omp.final.then:
1326 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1327 // CHECK2-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0
1328 // CHECK2-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
1329 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
1330 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
1331 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4
1332 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1333 // CHECK2: .omp.final.done:
1334 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
1335 // CHECK2: omp.precond.end:
1336 // CHECK2-NEXT: ret void
1337 //
1338 //
1339 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3
1340 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
1341 // CHECK2-NEXT: entry:
1342 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1343 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1344 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1345 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1346 // CHECK2-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
1347 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
1348 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8
1349 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1350 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1351 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1352 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1353 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4
1354 // CHECK2-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
1355 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1356 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1357 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1358 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1359 // CHECK2-NEXT: [[I5:%.*]] = alloca i32, align 4
1360 // CHECK2-NEXT: [[I6:%.*]] = alloca i32, align 4
1361 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1362 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1363 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1364 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1365 // CHECK2-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
1366 // CHECK2-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
1367 // CHECK2-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8
1368 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
1369 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8
1370 // CHECK2-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8
1371 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
1372 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
1373 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1374 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
1375 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1376 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1377 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1378 // CHECK2-NEXT: store i32 0, i32* [[I3]], align 4
1379 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1380 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
1381 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1382 // CHECK2: omp.precond.then:
1383 // CHECK2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i64 0, i64 0
1384 // CHECK2-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ]
1385 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4
1386 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START]], align 4
1387 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1388 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1389 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
1390 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1391 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP8]] to i32
1392 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1393 // CHECK2-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP9]] to i32
1394 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1395 // CHECK2-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
1396 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1397 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1398 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1399 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
1400 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP11]])
1401 // CHECK2-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1402 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
1403 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1404 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1405 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1406 // CHECK2-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]]
1407 // CHECK2-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1408 // CHECK2: cond.true:
1409 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1410 // CHECK2-NEXT: br label [[COND_END:%.*]]
1411 // CHECK2: cond.false:
1412 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1413 // CHECK2-NEXT: br label [[COND_END]]
1414 // CHECK2: cond.end:
1415 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
1416 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1417 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1418 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4
1419 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1420 // CHECK2: omp.inner.for.cond:
1421 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1422 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1423 // CHECK2-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
1424 // CHECK2-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1425 // CHECK2: omp.inner.for.body:
1426 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1427 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1
1428 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1429 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
1430 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[I5]], align 4
1431 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64
1432 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i64 0, i64 [[IDXPROM]]
1433 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1434 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1435 // CHECK2: omp.body.continue:
1436 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1437 // CHECK2: omp.inner.for.inc:
1438 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1439 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP23]], 1
1440 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
1441 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
1442 // CHECK2: omp.inner.for.end:
1443 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1444 // CHECK2: omp.loop.exit:
1445 // CHECK2-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1446 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
1447 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
1448 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1449 // CHECK2-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
1450 // CHECK2-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1451 // CHECK2: .omp.final.then:
1452 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1453 // CHECK2-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP28]], 0
1454 // CHECK2-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
1455 // CHECK2-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
1456 // CHECK2-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
1457 // CHECK2-NEXT: store i32 [[ADD13]], i32* [[TMP0]], align 4
1458 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1459 // CHECK2: .omp.final.done:
1460 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1461 // CHECK2-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
1462 // CHECK2-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
1463 // CHECK2: .omp.linear.pu:
1464 // CHECK2-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
1465 // CHECK2: .omp.linear.pu.done:
1466 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
1467 // CHECK2: omp.precond.end:
1468 // CHECK2-NEXT: ret void
1469 //
1470 //
1471 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1472 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] {
1473 // CHECK2-NEXT: entry:
1474 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
1475 // CHECK2-NEXT: ret void
1476 //
1477 //
1478 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_argument_globali
1479 // CHECK3-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
1480 // CHECK3-NEXT: entry:
1481 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1482 // CHECK3-NEXT: [[TE:%.*]] = alloca i32, align 4
1483 // CHECK3-NEXT: [[TH:%.*]] = alloca i32, align 4
1484 // CHECK3-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4
1485 // CHECK3-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4
1486 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1487 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
1488 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
1489 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
1490 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1491 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1492 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1493 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1494 // CHECK3-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
1495 // CHECK3-NEXT: [[N_CASTED4:%.*]] = alloca i32, align 4
1496 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 4
1497 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 4
1498 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 4
1499 // CHECK3-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
1500 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
1501 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
1502 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1503 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
1504 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
1505 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
1506 // CHECK3-NEXT: store i32 128, i32* [[TH]], align 4
1507 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
1508 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TE_CASTED]], align 4
1509 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_CASTED]], align 4
1510 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4
1511 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TH_CASTED]], align 4
1512 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TH_CASTED]], align 4
1513 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4
1514 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[N_CASTED]], align 4
1515 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_CASTED]], align 4
1516 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1517 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
1518 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4
1519 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1520 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
1521 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP10]], align 4
1522 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1523 // CHECK3-NEXT: store i8* null, i8** [[TMP11]], align 4
1524 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1525 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
1526 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP13]], align 4
1527 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1528 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
1529 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP15]], align 4
1530 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1531 // CHECK3-NEXT: store i8* null, i8** [[TMP16]], align 4
1532 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1533 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
1534 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP18]], align 4
1535 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1536 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
1537 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP20]], align 4
1538 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1539 // CHECK3-NEXT: store i8* null, i8** [[TMP21]], align 4
1540 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1541 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]**
1542 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 4
1543 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1544 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]**
1545 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 4
1546 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1547 // CHECK3-NEXT: store i8* null, i8** [[TMP26]], align 4
1548 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1549 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1550 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4
1551 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[N_ADDR]], align 4
1552 // CHECK3-NEXT: store i32 [[TMP30]], i32* [[DOTCAPTURE_EXPR_]], align 4
1553 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1554 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP31]], 0
1555 // CHECK3-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1
1556 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1
1557 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1558 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1559 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP32]], 1
1560 // CHECK3-NEXT: [[TMP33:%.*]] = zext i32 [[ADD]] to i64
1561 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP33]])
1562 // CHECK3-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 0)
1563 // CHECK3-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
1564 // CHECK3-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1565 // CHECK3: omp_offload.failed:
1566 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]]
1567 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1568 // CHECK3: omp_offload.cont:
1569 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[I]], align 4
1570 // CHECK3-NEXT: store i32 [[TMP36]], i32* [[I_CASTED]], align 4
1571 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[I_CASTED]], align 4
1572 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[N_ADDR]], align 4
1573 // CHECK3-NEXT: store i32 [[TMP38]], i32* [[N_CASTED4]], align 4
1574 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[N_CASTED4]], align 4
1575 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
1576 // CHECK3-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to [100 x i32]**
1577 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP41]], align 4
1578 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
1579 // CHECK3-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to [100 x i32]**
1580 // CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP43]], align 4
1581 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0
1582 // CHECK3-NEXT: store i8* null, i8** [[TMP44]], align 4
1583 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
1584 // CHECK3-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
1585 // CHECK3-NEXT: store i32 [[TMP37]], i32* [[TMP46]], align 4
1586 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
1587 // CHECK3-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
1588 // CHECK3-NEXT: store i32 [[TMP37]], i32* [[TMP48]], align 4
1589 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1
1590 // CHECK3-NEXT: store i8* null, i8** [[TMP49]], align 4
1591 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
1592 // CHECK3-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32*
1593 // CHECK3-NEXT: store i32 [[TMP39]], i32* [[TMP51]], align 4
1594 // CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
1595 // CHECK3-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i32*
1596 // CHECK3-NEXT: store i32 [[TMP39]], i32* [[TMP53]], align 4
1597 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 2
1598 // CHECK3-NEXT: store i8* null, i8** [[TMP54]], align 4
1599 // CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
1600 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
1601 // CHECK3-NEXT: [[TMP57:%.*]] = load i32, i32* [[N_ADDR]], align 4
1602 // CHECK3-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_9]], align 4
1603 // CHECK3-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
1604 // CHECK3-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP58]], 0
1605 // CHECK3-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
1606 // CHECK3-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
1607 // CHECK3-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
1608 // CHECK3-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
1609 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP59]], 1
1610 // CHECK3-NEXT: [[TMP60:%.*]] = zext i32 [[ADD14]] to i64
1611 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
1612 // CHECK3-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1613 // CHECK3-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
1614 // CHECK3-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
1615 // CHECK3: omp_offload.failed15:
1616 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36([100 x i32]* @a, i32 [[TMP37]], i32 [[TMP39]]) #[[ATTR2]]
1617 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT16]]
1618 // CHECK3: omp_offload.cont16:
1619 // CHECK3-NEXT: [[TMP63:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4
1620 // CHECK3-NEXT: ret i32 [[TMP63]]
1621 //
1622 //
1623 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29
1624 // CHECK3-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], i32 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] {
1625 // CHECK3-NEXT: entry:
1626 // CHECK3-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4
1627 // CHECK3-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4
1628 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1629 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
1630 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
1631 // CHECK3-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4
1632 // CHECK3-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4
1633 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1634 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
1635 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
1636 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4
1637 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4
1638 // CHECK3-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
1639 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP1]])
1640 // CHECK3-NEXT: ret void
1641 //
1642 //
1643 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
1644 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
1645 // CHECK3-NEXT: entry:
1646 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1647 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1648 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
1649 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
1650 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1651 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1652 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1653 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1654 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1655 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1656 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1657 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1658 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1659 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
1660 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1661 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1662 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
1663 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
1664 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
1665 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
1666 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
1667 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
1668 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1669 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1670 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1671 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1672 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1673 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
1674 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1675 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1676 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1677 // CHECK3: omp.precond.then:
1678 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1679 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1680 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
1681 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1682 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1683 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1684 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1685 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1686 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1687 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1688 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
1689 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1690 // CHECK3: cond.true:
1691 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1692 // CHECK3-NEXT: br label [[COND_END:%.*]]
1693 // CHECK3: cond.false:
1694 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1695 // CHECK3-NEXT: br label [[COND_END]]
1696 // CHECK3: cond.end:
1697 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1698 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1699 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1700 // CHECK3-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
1701 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1702 // CHECK3: omp.inner.for.cond:
1703 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1704 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1705 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1706 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1707 // CHECK3: omp.inner.for.body:
1708 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1709 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1710 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32* [[TMP0]], [100 x i32]* [[TMP1]])
1711 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1712 // CHECK3: omp.inner.for.inc:
1713 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1714 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1715 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1716 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1717 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
1718 // CHECK3: omp.inner.for.end:
1719 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1720 // CHECK3: omp.loop.exit:
1721 // CHECK3-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1722 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
1723 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
1724 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1725 // CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
1726 // CHECK3-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1727 // CHECK3: .omp.final.then:
1728 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1729 // CHECK3-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP23]], 0
1730 // CHECK3-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1731 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
1732 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
1733 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
1734 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1735 // CHECK3: .omp.final.done:
1736 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
1737 // CHECK3: omp.precond.end:
1738 // CHECK3-NEXT: ret void
1739 //
1740 //
1741 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
1742 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
1743 // CHECK3-NEXT: entry:
1744 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1745 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1746 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1747 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1748 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
1749 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
1750 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1751 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1752 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1753 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1754 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1755 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1756 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1757 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1758 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1759 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
1760 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1761 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1762 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1763 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1764 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
1765 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
1766 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
1767 // CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
1768 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
1769 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
1770 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1771 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1772 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1773 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1774 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1775 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
1776 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1777 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1778 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1779 // CHECK3: omp.precond.then:
1780 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1781 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1782 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
1783 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1784 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1785 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
1786 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
1787 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1788 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1789 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1790 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
1791 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1792 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1793 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1794 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
1795 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1796 // CHECK3: cond.true:
1797 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1798 // CHECK3-NEXT: br label [[COND_END:%.*]]
1799 // CHECK3: cond.false:
1800 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1801 // CHECK3-NEXT: br label [[COND_END]]
1802 // CHECK3: cond.end:
1803 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
1804 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1805 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1806 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
1807 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1808 // CHECK3: omp.inner.for.cond:
1809 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1810 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1811 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
1812 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1813 // CHECK3: omp.inner.for.body:
1814 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1815 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
1816 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1817 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
1818 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4
1819 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP18]]
1820 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1821 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1822 // CHECK3: omp.body.continue:
1823 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1824 // CHECK3: omp.inner.for.inc:
1825 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1826 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
1827 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
1828 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
1829 // CHECK3: omp.inner.for.end:
1830 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1831 // CHECK3: omp.loop.exit:
1832 // CHECK3-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1833 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
1834 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
1835 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1836 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
1837 // CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1838 // CHECK3: .omp.final.then:
1839 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1840 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0
1841 // CHECK3-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
1842 // CHECK3-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
1843 // CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
1844 // CHECK3-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
1845 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1846 // CHECK3: .omp.final.done:
1847 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
1848 // CHECK3: omp.precond.end:
1849 // CHECK3-NEXT: ret void
1850 //
1851 //
1852 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36
1853 // CHECK3-SAME: ([100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]], i32 [[I:%.*]], i32 [[N:%.*]]) #[[ATTR1]] {
1854 // CHECK3-NEXT: entry:
1855 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
1856 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
1857 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1858 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
1859 // CHECK3-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
1860 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1861 // CHECK3-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
1862 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[I_ADDR]], i32* [[N_ADDR]], [100 x i32]* [[TMP0]])
1863 // CHECK3-NEXT: ret void
1864 //
1865 //
1866 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2
1867 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
1868 // CHECK3-NEXT: entry:
1869 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1870 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1871 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
1872 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
1873 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
1874 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1875 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1876 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1877 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1878 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
1879 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1880 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1881 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1882 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1883 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4
1884 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1885 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1886 // CHECK3-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
1887 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
1888 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
1889 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
1890 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4
1891 // CHECK3-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
1892 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
1893 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
1894 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1895 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
1896 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1897 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1898 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1899 // CHECK3-NEXT: store i32 0, i32* [[I3]], align 4
1900 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1901 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
1902 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1903 // CHECK3: omp.precond.then:
1904 // CHECK3-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i32 0, i32 0
1905 // CHECK3-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ]
1906 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1907 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1908 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
1909 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1910 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1911 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1912 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1913 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1914 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1915 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1916 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1917 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1918 // CHECK3: cond.true:
1919 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1920 // CHECK3-NEXT: br label [[COND_END:%.*]]
1921 // CHECK3: cond.false:
1922 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1923 // CHECK3-NEXT: br label [[COND_END]]
1924 // CHECK3: cond.end:
1925 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1926 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1927 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1928 // CHECK3-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
1929 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1930 // CHECK3: omp.inner.for.cond:
1931 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1932 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1933 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1934 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1935 // CHECK3: omp.inner.for.body:
1936 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1937 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1938 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [100 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[I4]], i32* [[TMP1]], [100 x i32]* [[TMP2]])
1939 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1940 // CHECK3: omp.inner.for.inc:
1941 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1942 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1943 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1944 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1945 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
1946 // CHECK3: omp.inner.for.end:
1947 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1948 // CHECK3: omp.loop.exit:
1949 // CHECK3-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1950 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
1951 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
1952 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1953 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
1954 // CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1955 // CHECK3: .omp.final.then:
1956 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1957 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0
1958 // CHECK3-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
1959 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
1960 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
1961 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4
1962 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1963 // CHECK3: .omp.final.done:
1964 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
1965 // CHECK3: omp.precond.end:
1966 // CHECK3-NEXT: ret void
1967 //
1968 //
1969 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
1970 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
1971 // CHECK3-NEXT: entry:
1972 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1973 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1974 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1975 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1976 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
1977 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
1978 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
1979 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1980 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1981 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1982 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1983 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
1984 // CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
1985 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1986 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1987 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1988 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1989 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4
1990 // CHECK3-NEXT: [[I5:%.*]] = alloca i32, align 4
1991 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1992 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1993 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1994 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1995 // CHECK3-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
1996 // CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
1997 // CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
1998 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
1999 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4
2000 // CHECK3-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
2001 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
2002 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
2003 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2004 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
2005 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2006 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2007 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2008 // CHECK3-NEXT: store i32 0, i32* [[I3]], align 4
2009 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2010 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2011 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2012 // CHECK3: omp.precond.then:
2013 // CHECK3-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i32 0, i32 0
2014 // CHECK3-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ]
2015 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4
2016 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START]], align 4
2017 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2018 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2019 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
2020 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2021 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2022 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4
2023 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4
2024 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2025 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2026 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2027 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
2028 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP11]])
2029 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2030 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
2031 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2032 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2033 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2034 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]]
2035 // CHECK3-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2036 // CHECK3: cond.true:
2037 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2038 // CHECK3-NEXT: br label [[COND_END:%.*]]
2039 // CHECK3: cond.false:
2040 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2041 // CHECK3-NEXT: br label [[COND_END]]
2042 // CHECK3: cond.end:
2043 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
2044 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2045 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2046 // CHECK3-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4
2047 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2048 // CHECK3: omp.inner.for.cond:
2049 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2050 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2051 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
2052 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2053 // CHECK3: omp.inner.for.body:
2054 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2055 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1
2056 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2057 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
2058 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[I4]], align 4
2059 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i32 0, i32 [[TMP22]]
2060 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2061 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2062 // CHECK3: omp.body.continue:
2063 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2064 // CHECK3: omp.inner.for.inc:
2065 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2066 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], 1
2067 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
2068 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
2069 // CHECK3: omp.inner.for.end:
2070 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2071 // CHECK3: omp.loop.exit:
2072 // CHECK3-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2073 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
2074 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
2075 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2076 // CHECK3-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
2077 // CHECK3-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2078 // CHECK3: .omp.final.then:
2079 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2080 // CHECK3-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP28]], 0
2081 // CHECK3-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
2082 // CHECK3-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
2083 // CHECK3-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
2084 // CHECK3-NEXT: store i32 [[ADD12]], i32* [[TMP0]], align 4
2085 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2086 // CHECK3: .omp.final.done:
2087 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2088 // CHECK3-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
2089 // CHECK3-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
2090 // CHECK3: .omp.linear.pu:
2091 // CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
2092 // CHECK3: .omp.linear.pu.done:
2093 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
2094 // CHECK3: omp.precond.end:
2095 // CHECK3-NEXT: ret void
2096 //
2097 //
2098 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2099 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] {
2100 // CHECK3-NEXT: entry:
2101 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
2102 // CHECK3-NEXT: ret void
2103 //
2104 //
2105 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_argument_globali
2106 // CHECK4-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
2107 // CHECK4-NEXT: entry:
2108 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2109 // CHECK4-NEXT: [[TE:%.*]] = alloca i32, align 4
2110 // CHECK4-NEXT: [[TH:%.*]] = alloca i32, align 4
2111 // CHECK4-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4
2112 // CHECK4-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4
2113 // CHECK4-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2114 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
2115 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
2116 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
2117 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
2118 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2119 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2120 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
2121 // CHECK4-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
2122 // CHECK4-NEXT: [[N_CASTED4:%.*]] = alloca i32, align 4
2123 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 4
2124 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 4
2125 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 4
2126 // CHECK4-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
2127 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
2128 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
2129 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2130 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
2131 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
2132 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
2133 // CHECK4-NEXT: store i32 128, i32* [[TH]], align 4
2134 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
2135 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TE_CASTED]], align 4
2136 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_CASTED]], align 4
2137 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4
2138 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[TH_CASTED]], align 4
2139 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TH_CASTED]], align 4
2140 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4
2141 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[N_CASTED]], align 4
2142 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_CASTED]], align 4
2143 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2144 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
2145 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4
2146 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2147 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
2148 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP10]], align 4
2149 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2150 // CHECK4-NEXT: store i8* null, i8** [[TMP11]], align 4
2151 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2152 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
2153 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP13]], align 4
2154 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2155 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
2156 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP15]], align 4
2157 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2158 // CHECK4-NEXT: store i8* null, i8** [[TMP16]], align 4
2159 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2160 // CHECK4-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
2161 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP18]], align 4
2162 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2163 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
2164 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP20]], align 4
2165 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2166 // CHECK4-NEXT: store i8* null, i8** [[TMP21]], align 4
2167 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2168 // CHECK4-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]**
2169 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 4
2170 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2171 // CHECK4-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]**
2172 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 4
2173 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2174 // CHECK4-NEXT: store i8* null, i8** [[TMP26]], align 4
2175 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2176 // CHECK4-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2177 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4
2178 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[N_ADDR]], align 4
2179 // CHECK4-NEXT: store i32 [[TMP30]], i32* [[DOTCAPTURE_EXPR_]], align 4
2180 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2181 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP31]], 0
2182 // CHECK4-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1
2183 // CHECK4-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1
2184 // CHECK4-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2185 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2186 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP32]], 1
2187 // CHECK4-NEXT: [[TMP33:%.*]] = zext i32 [[ADD]] to i64
2188 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP33]])
2189 // CHECK4-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 [[TMP29]], i32 0)
2190 // CHECK4-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
2191 // CHECK4-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2192 // CHECK4: omp_offload.failed:
2193 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29(i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]]
2194 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
2195 // CHECK4: omp_offload.cont:
2196 // CHECK4-NEXT: [[TMP36:%.*]] = load i32, i32* [[I]], align 4
2197 // CHECK4-NEXT: store i32 [[TMP36]], i32* [[I_CASTED]], align 4
2198 // CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[I_CASTED]], align 4
2199 // CHECK4-NEXT: [[TMP38:%.*]] = load i32, i32* [[N_ADDR]], align 4
2200 // CHECK4-NEXT: store i32 [[TMP38]], i32* [[N_CASTED4]], align 4
2201 // CHECK4-NEXT: [[TMP39:%.*]] = load i32, i32* [[N_CASTED4]], align 4
2202 // CHECK4-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
2203 // CHECK4-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to [100 x i32]**
2204 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP41]], align 4
2205 // CHECK4-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
2206 // CHECK4-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to [100 x i32]**
2207 // CHECK4-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP43]], align 4
2208 // CHECK4-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0
2209 // CHECK4-NEXT: store i8* null, i8** [[TMP44]], align 4
2210 // CHECK4-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
2211 // CHECK4-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
2212 // CHECK4-NEXT: store i32 [[TMP37]], i32* [[TMP46]], align 4
2213 // CHECK4-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
2214 // CHECK4-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
2215 // CHECK4-NEXT: store i32 [[TMP37]], i32* [[TMP48]], align 4
2216 // CHECK4-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1
2217 // CHECK4-NEXT: store i8* null, i8** [[TMP49]], align 4
2218 // CHECK4-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
2219 // CHECK4-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32*
2220 // CHECK4-NEXT: store i32 [[TMP39]], i32* [[TMP51]], align 4
2221 // CHECK4-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
2222 // CHECK4-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i32*
2223 // CHECK4-NEXT: store i32 [[TMP39]], i32* [[TMP53]], align 4
2224 // CHECK4-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 2
2225 // CHECK4-NEXT: store i8* null, i8** [[TMP54]], align 4
2226 // CHECK4-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
2227 // CHECK4-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
2228 // CHECK4-NEXT: [[TMP57:%.*]] = load i32, i32* [[N_ADDR]], align 4
2229 // CHECK4-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_9]], align 4
2230 // CHECK4-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
2231 // CHECK4-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP58]], 0
2232 // CHECK4-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
2233 // CHECK4-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
2234 // CHECK4-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
2235 // CHECK4-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
2236 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP59]], 1
2237 // CHECK4-NEXT: [[TMP60:%.*]] = zext i32 [[ADD14]] to i64
2238 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
2239 // CHECK4-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2240 // CHECK4-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
2241 // CHECK4-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
2242 // CHECK4: omp_offload.failed15:
2243 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36([100 x i32]* @a, i32 [[TMP37]], i32 [[TMP39]]) #[[ATTR2]]
2244 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT16]]
2245 // CHECK4: omp_offload.cont16:
2246 // CHECK4-NEXT: [[TMP63:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4
2247 // CHECK4-NEXT: ret i32 [[TMP63]]
2248 //
2249 //
2250 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l29
2251 // CHECK4-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], i32 [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] {
2252 // CHECK4-NEXT: entry:
2253 // CHECK4-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4
2254 // CHECK4-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4
2255 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2256 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
2257 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
2258 // CHECK4-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4
2259 // CHECK4-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4
2260 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2261 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
2262 // CHECK4-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
2263 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4
2264 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4
2265 // CHECK4-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
2266 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP1]])
2267 // CHECK4-NEXT: ret void
2268 //
2269 //
2270 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
2271 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
2272 // CHECK4-NEXT: entry:
2273 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2274 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2275 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
2276 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
2277 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2278 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
2279 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2280 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2281 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
2282 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2283 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2284 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2285 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2286 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4
2287 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2288 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2289 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
2290 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
2291 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
2292 // CHECK4-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
2293 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
2294 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
2295 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2296 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2297 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2298 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2299 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2300 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4
2301 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2302 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2303 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2304 // CHECK4: omp.precond.then:
2305 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2306 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2307 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
2308 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2309 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2310 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2311 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2312 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2313 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2314 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2315 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
2316 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2317 // CHECK4: cond.true:
2318 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2319 // CHECK4-NEXT: br label [[COND_END:%.*]]
2320 // CHECK4: cond.false:
2321 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2322 // CHECK4-NEXT: br label [[COND_END]]
2323 // CHECK4: cond.end:
2324 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2325 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2326 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2327 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
2328 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2329 // CHECK4: omp.inner.for.cond:
2330 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2331 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2332 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2333 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2334 // CHECK4: omp.inner.for.body:
2335 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2336 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2337 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32* [[TMP0]], [100 x i32]* [[TMP1]])
2338 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2339 // CHECK4: omp.inner.for.inc:
2340 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2341 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2342 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
2343 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2344 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
2345 // CHECK4: omp.inner.for.end:
2346 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2347 // CHECK4: omp.loop.exit:
2348 // CHECK4-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2349 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
2350 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])
2351 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2352 // CHECK4-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
2353 // CHECK4-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2354 // CHECK4: .omp.final.then:
2355 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2356 // CHECK4-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP23]], 0
2357 // CHECK4-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
2358 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
2359 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
2360 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
2361 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
2362 // CHECK4: .omp.final.done:
2363 // CHECK4-NEXT: br label [[OMP_PRECOND_END]]
2364 // CHECK4: omp.precond.end:
2365 // CHECK4-NEXT: ret void
2366 //
2367 //
2368 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
2369 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
2370 // CHECK4-NEXT: entry:
2371 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2372 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2373 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2374 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2375 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
2376 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
2377 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2378 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
2379 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2380 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2381 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
2382 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2383 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2384 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2385 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2386 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4
2387 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2388 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2389 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2390 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2391 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
2392 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
2393 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
2394 // CHECK4-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
2395 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
2396 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
2397 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2398 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2399 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2400 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2401 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2402 // CHECK4-NEXT: store i32 0, i32* [[I]], align 4
2403 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2404 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2405 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2406 // CHECK4: omp.precond.then:
2407 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2408 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2409 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
2410 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2411 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2412 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
2413 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
2414 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2415 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2416 // CHECK4-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2417 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
2418 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2419 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2420 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2421 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
2422 // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2423 // CHECK4: cond.true:
2424 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2425 // CHECK4-NEXT: br label [[COND_END:%.*]]
2426 // CHECK4: cond.false:
2427 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2428 // CHECK4-NEXT: br label [[COND_END]]
2429 // CHECK4: cond.end:
2430 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
2431 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2432 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2433 // CHECK4-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
2434 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2435 // CHECK4: omp.inner.for.cond:
2436 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2437 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2438 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
2439 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2440 // CHECK4: omp.inner.for.body:
2441 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2442 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
2443 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2444 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
2445 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4
2446 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP18]]
2447 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2448 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2449 // CHECK4: omp.body.continue:
2450 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2451 // CHECK4: omp.inner.for.inc:
2452 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2453 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
2454 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
2455 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
2456 // CHECK4: omp.inner.for.end:
2457 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2458 // CHECK4: omp.loop.exit:
2459 // CHECK4-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2460 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
2461 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
2462 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2463 // CHECK4-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
2464 // CHECK4-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2465 // CHECK4: .omp.final.then:
2466 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2467 // CHECK4-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0
2468 // CHECK4-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2469 // CHECK4-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
2470 // CHECK4-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
2471 // CHECK4-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
2472 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
2473 // CHECK4: .omp.final.done:
2474 // CHECK4-NEXT: br label [[OMP_PRECOND_END]]
2475 // CHECK4: omp.precond.end:
2476 // CHECK4-NEXT: ret void
2477 //
2478 //
2479 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l36
2480 // CHECK4-SAME: ([100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]], i32 [[I:%.*]], i32 [[N:%.*]]) #[[ATTR1]] {
2481 // CHECK4-NEXT: entry:
2482 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
2483 // CHECK4-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
2484 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2485 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
2486 // CHECK4-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
2487 // CHECK4-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2488 // CHECK4-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
2489 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[I_ADDR]], i32* [[N_ADDR]], [100 x i32]* [[TMP0]])
2490 // CHECK4-NEXT: ret void
2491 //
2492 //
2493 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2
2494 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
2495 // CHECK4-NEXT: entry:
2496 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2497 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2498 // CHECK4-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
2499 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
2500 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
2501 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2502 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
2503 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2504 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2505 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4
2506 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2507 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2508 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2509 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2510 // CHECK4-NEXT: [[I4:%.*]] = alloca i32, align 4
2511 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2512 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2513 // CHECK4-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
2514 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
2515 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
2516 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
2517 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4
2518 // CHECK4-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
2519 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
2520 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
2521 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2522 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
2523 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2524 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2525 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2526 // CHECK4-NEXT: store i32 0, i32* [[I3]], align 4
2527 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2528 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2529 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2530 // CHECK4: omp.precond.then:
2531 // CHECK4-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i32 0, i32 0
2532 // CHECK4-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ]
2533 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2534 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2535 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
2536 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2537 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2538 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2539 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2540 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2541 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2542 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2543 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2544 // CHECK4-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2545 // CHECK4: cond.true:
2546 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2547 // CHECK4-NEXT: br label [[COND_END:%.*]]
2548 // CHECK4: cond.false:
2549 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2550 // CHECK4-NEXT: br label [[COND_END]]
2551 // CHECK4: cond.end:
2552 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2553 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2554 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2555 // CHECK4-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2556 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2557 // CHECK4: omp.inner.for.cond:
2558 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2559 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2560 // CHECK4-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2561 // CHECK4-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2562 // CHECK4: omp.inner.for.body:
2563 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2564 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2565 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, [100 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[I4]], i32* [[TMP1]], [100 x i32]* [[TMP2]])
2566 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2567 // CHECK4: omp.inner.for.inc:
2568 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2569 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2570 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2571 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2572 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
2573 // CHECK4: omp.inner.for.end:
2574 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2575 // CHECK4: omp.loop.exit:
2576 // CHECK4-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2577 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
2578 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
2579 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2580 // CHECK4-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
2581 // CHECK4-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2582 // CHECK4: .omp.final.then:
2583 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2584 // CHECK4-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0
2585 // CHECK4-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2586 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
2587 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
2588 // CHECK4-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4
2589 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
2590 // CHECK4: .omp.final.done:
2591 // CHECK4-NEXT: br label [[OMP_PRECOND_END]]
2592 // CHECK4: omp.precond.end:
2593 // CHECK4-NEXT: ret void
2594 //
2595 //
2596 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3
2597 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {
2598 // CHECK4-NEXT: entry:
2599 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2600 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2601 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2602 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2603 // CHECK4-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
2604 // CHECK4-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
2605 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4
2606 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2607 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
2608 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2609 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2610 // CHECK4-NEXT: [[I3:%.*]] = alloca i32, align 4
2611 // CHECK4-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
2612 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2613 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2614 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2615 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2616 // CHECK4-NEXT: [[I4:%.*]] = alloca i32, align 4
2617 // CHECK4-NEXT: [[I5:%.*]] = alloca i32, align 4
2618 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2619 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2620 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2621 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2622 // CHECK4-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
2623 // CHECK4-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
2624 // CHECK4-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4
2625 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
2626 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4
2627 // CHECK4-NEXT: [[TMP2:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4
2628 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
2629 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
2630 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2631 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
2632 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2633 // CHECK4-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2634 // CHECK4-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2635 // CHECK4-NEXT: store i32 0, i32* [[I3]], align 4
2636 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2637 // CHECK4-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2638 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2639 // CHECK4: omp.precond.then:
2640 // CHECK4-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i32 0, i32 0
2641 // CHECK4-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ]
2642 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4
2643 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START]], align 4
2644 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2645 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2646 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
2647 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2648 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2649 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_LB]], align 4
2650 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_UB]], align 4
2651 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2652 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2653 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2654 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
2655 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP11]])
2656 // CHECK4-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2657 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
2658 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2659 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2660 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2661 // CHECK4-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP14]], [[TMP15]]
2662 // CHECK4-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2663 // CHECK4: cond.true:
2664 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2665 // CHECK4-NEXT: br label [[COND_END:%.*]]
2666 // CHECK4: cond.false:
2667 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2668 // CHECK4-NEXT: br label [[COND_END]]
2669 // CHECK4: cond.end:
2670 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
2671 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2672 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2673 // CHECK4-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV]], align 4
2674 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2675 // CHECK4: omp.inner.for.cond:
2676 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2677 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2678 // CHECK4-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
2679 // CHECK4-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2680 // CHECK4: omp.inner.for.body:
2681 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2682 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP21]], 1
2683 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2684 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
2685 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[I4]], align 4
2686 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP2]], i32 0, i32 [[TMP22]]
2687 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2688 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2689 // CHECK4: omp.body.continue:
2690 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2691 // CHECK4: omp.inner.for.inc:
2692 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2693 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], 1
2694 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
2695 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
2696 // CHECK4: omp.inner.for.end:
2697 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2698 // CHECK4: omp.loop.exit:
2699 // CHECK4-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2700 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
2701 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
2702 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2703 // CHECK4-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
2704 // CHECK4-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2705 // CHECK4: .omp.final.then:
2706 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2707 // CHECK4-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP28]], 0
2708 // CHECK4-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
2709 // CHECK4-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
2710 // CHECK4-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
2711 // CHECK4-NEXT: store i32 [[ADD12]], i32* [[TMP0]], align 4
2712 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
2713 // CHECK4: .omp.final.done:
2714 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2715 // CHECK4-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
2716 // CHECK4-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
2717 // CHECK4: .omp.linear.pu:
2718 // CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
2719 // CHECK4: .omp.linear.pu.done:
2720 // CHECK4-NEXT: br label [[OMP_PRECOND_END]]
2721 // CHECK4: omp.precond.end:
2722 // CHECK4-NEXT: ret void
2723 //
2724 //
2725 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2726 // CHECK4-SAME: () #[[ATTR5:[0-9]+]] {
2727 // CHECK4-NEXT: entry:
2728 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
2729 // CHECK4-NEXT: ret void
2730 //
2731 //
2732 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_argument_globali
2733 // CHECK5-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
2734 // CHECK5-NEXT: entry:
2735 // CHECK5-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2736 // CHECK5-NEXT: [[TE:%.*]] = alloca i32, align 4
2737 // CHECK5-NEXT: [[TH:%.*]] = alloca i32, align 4
2738 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2739 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2740 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2741 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2742 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2743 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2744 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2745 // CHECK5-NEXT: [[I4:%.*]] = alloca i32, align 4
2746 // CHECK5-NEXT: [[I11:%.*]] = alloca i32, align 4
2747 // CHECK5-NEXT: [[_TMP12:%.*]] = alloca i32, align 4
2748 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4
2749 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4
2750 // CHECK5-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4
2751 // CHECK5-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4
2752 // CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4
2753 // CHECK5-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4
2754 // CHECK5-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
2755 // CHECK5-NEXT: [[I24:%.*]] = alloca i32, align 4
2756 // CHECK5-NEXT: [[I25:%.*]] = alloca i32, align 4
2757 // CHECK5-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2758 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
2759 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
2760 // CHECK5-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
2761 // CHECK5-NEXT: store i32 128, i32* [[TH]], align 4
2762 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2763 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2764 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2765 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2766 // CHECK5-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1
2767 // CHECK5-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1
2768 // CHECK5-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2769 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2770 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2771 // CHECK5-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4
2772 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4
2773 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2774 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2775 // CHECK5-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
2776 // CHECK5: simd.if.then:
2777 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2778 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2779 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2780 // CHECK5: omp.inner.for.cond:
2781 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2782 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
2783 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2784 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2785 // CHECK5: omp.inner.for.body:
2786 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2787 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2788 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2789 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !2
2790 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !2
2791 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
2792 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM]]
2793 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
2794 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2795 // CHECK5: omp.body.continue:
2796 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2797 // CHECK5: omp.inner.for.inc:
2798 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2799 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
2800 // CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2801 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
2802 // CHECK5: omp.inner.for.end:
2803 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2804 // CHECK5-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP11]], 0
2805 // CHECK5-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2806 // CHECK5-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
2807 // CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
2808 // CHECK5-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
2809 // CHECK5-NEXT: br label [[SIMD_IF_END]]
2810 // CHECK5: simd.if.end:
2811 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[N_ADDR]], align 4
2812 // CHECK5-NEXT: store i32 [[TMP12]], i32* [[DOTCAPTURE_EXPR_13]], align 4
2813 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
2814 // CHECK5-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP13]], 0
2815 // CHECK5-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
2816 // CHECK5-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 1
2817 // CHECK5-NEXT: store i32 [[SUB17]], i32* [[DOTCAPTURE_EXPR_14]], align 4
2818 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4
2819 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
2820 // CHECK5-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_UB19]], align 4
2821 // CHECK5-NEXT: store i32 0, i32* [[I20]], align 4
2822 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
2823 // CHECK5-NEXT: [[CMP21:%.*]] = icmp slt i32 0, [[TMP15]]
2824 // CHECK5-NEXT: br i1 [[CMP21]], label [[SIMD_IF_THEN22:%.*]], label [[SIMD_IF_END41:%.*]]
2825 // CHECK5: simd.if.then22:
2826 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4
2827 // CHECK5-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV23]], align 4
2828 // CHECK5-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), i64 16) ]
2829 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[I11]], align 4
2830 // CHECK5-NEXT: store i32 [[TMP17]], i32* [[DOTLINEAR_START]], align 4
2831 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]]
2832 // CHECK5: omp.inner.for.cond26:
2833 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4
2834 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4
2835 // CHECK5-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
2836 // CHECK5-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END36:%.*]]
2837 // CHECK5: omp.inner.for.body28:
2838 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4
2839 // CHECK5-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP20]], 1
2840 // CHECK5-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]]
2841 // CHECK5-NEXT: store i32 [[ADD30]], i32* [[I24]], align 4
2842 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[I24]], align 4
2843 // CHECK5-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP21]] to i64
2844 // CHECK5-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM31]]
2845 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4
2846 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]]
2847 // CHECK5: omp.body.continue33:
2848 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]]
2849 // CHECK5: omp.inner.for.inc34:
2850 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4
2851 // CHECK5-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP22]], 1
2852 // CHECK5-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4
2853 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP7:![0-9]+]]
2854 // CHECK5: omp.inner.for.end36:
2855 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
2856 // CHECK5-NEXT: [[SUB37:%.*]] = sub nsw i32 [[TMP23]], 0
2857 // CHECK5-NEXT: [[DIV38:%.*]] = sdiv i32 [[SUB37]], 1
2858 // CHECK5-NEXT: [[MUL39:%.*]] = mul nsw i32 [[DIV38]], 1
2859 // CHECK5-NEXT: [[ADD40:%.*]] = add nsw i32 0, [[MUL39]]
2860 // CHECK5-NEXT: store i32 [[ADD40]], i32* [[I11]], align 4
2861 // CHECK5-NEXT: br label [[SIMD_IF_END41]]
2862 // CHECK5: simd.if.end41:
2863 // CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4
2864 // CHECK5-NEXT: ret i32 [[TMP24]]
2865 //
2866 //
2867 // CHECK6-LABEL: define {{[^@]+}}@_Z21teams_argument_globali
2868 // CHECK6-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
2869 // CHECK6-NEXT: entry:
2870 // CHECK6-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2871 // CHECK6-NEXT: [[TE:%.*]] = alloca i32, align 4
2872 // CHECK6-NEXT: [[TH:%.*]] = alloca i32, align 4
2873 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
2874 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2875 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2876 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2877 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2878 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
2879 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2880 // CHECK6-NEXT: [[I4:%.*]] = alloca i32, align 4
2881 // CHECK6-NEXT: [[I11:%.*]] = alloca i32, align 4
2882 // CHECK6-NEXT: [[_TMP12:%.*]] = alloca i32, align 4
2883 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4
2884 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4
2885 // CHECK6-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4
2886 // CHECK6-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4
2887 // CHECK6-NEXT: [[I20:%.*]] = alloca i32, align 4
2888 // CHECK6-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4
2889 // CHECK6-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
2890 // CHECK6-NEXT: [[I24:%.*]] = alloca i32, align 4
2891 // CHECK6-NEXT: [[I25:%.*]] = alloca i32, align 4
2892 // CHECK6-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2893 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
2894 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
2895 // CHECK6-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
2896 // CHECK6-NEXT: store i32 128, i32* [[TH]], align 4
2897 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2898 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2899 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2900 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2901 // CHECK6-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1
2902 // CHECK6-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1
2903 // CHECK6-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2904 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2905 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2906 // CHECK6-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4
2907 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4
2908 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2909 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2910 // CHECK6-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
2911 // CHECK6: simd.if.then:
2912 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2913 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2914 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2915 // CHECK6: omp.inner.for.cond:
2916 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2917 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
2918 // CHECK6-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2919 // CHECK6-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2920 // CHECK6: omp.inner.for.body:
2921 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2922 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2923 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2924 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !2
2925 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !2
2926 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
2927 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM]]
2928 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
2929 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2930 // CHECK6: omp.body.continue:
2931 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2932 // CHECK6: omp.inner.for.inc:
2933 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2934 // CHECK6-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
2935 // CHECK6-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2936 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
2937 // CHECK6: omp.inner.for.end:
2938 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2939 // CHECK6-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP11]], 0
2940 // CHECK6-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2941 // CHECK6-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
2942 // CHECK6-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
2943 // CHECK6-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
2944 // CHECK6-NEXT: br label [[SIMD_IF_END]]
2945 // CHECK6: simd.if.end:
2946 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[N_ADDR]], align 4
2947 // CHECK6-NEXT: store i32 [[TMP12]], i32* [[DOTCAPTURE_EXPR_13]], align 4
2948 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
2949 // CHECK6-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP13]], 0
2950 // CHECK6-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
2951 // CHECK6-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 1
2952 // CHECK6-NEXT: store i32 [[SUB17]], i32* [[DOTCAPTURE_EXPR_14]], align 4
2953 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4
2954 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
2955 // CHECK6-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_UB19]], align 4
2956 // CHECK6-NEXT: store i32 0, i32* [[I20]], align 4
2957 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
2958 // CHECK6-NEXT: [[CMP21:%.*]] = icmp slt i32 0, [[TMP15]]
2959 // CHECK6-NEXT: br i1 [[CMP21]], label [[SIMD_IF_THEN22:%.*]], label [[SIMD_IF_END41:%.*]]
2960 // CHECK6: simd.if.then22:
2961 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4
2962 // CHECK6-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV23]], align 4
2963 // CHECK6-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), i64 16) ]
2964 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[I11]], align 4
2965 // CHECK6-NEXT: store i32 [[TMP17]], i32* [[DOTLINEAR_START]], align 4
2966 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]]
2967 // CHECK6: omp.inner.for.cond26:
2968 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4
2969 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4
2970 // CHECK6-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
2971 // CHECK6-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END36:%.*]]
2972 // CHECK6: omp.inner.for.body28:
2973 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4
2974 // CHECK6-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP20]], 1
2975 // CHECK6-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]]
2976 // CHECK6-NEXT: store i32 [[ADD30]], i32* [[I24]], align 4
2977 // CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[I24]], align 4
2978 // CHECK6-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP21]] to i64
2979 // CHECK6-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM31]]
2980 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4
2981 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]]
2982 // CHECK6: omp.body.continue33:
2983 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]]
2984 // CHECK6: omp.inner.for.inc34:
2985 // CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4
2986 // CHECK6-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP22]], 1
2987 // CHECK6-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4
2988 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP7:![0-9]+]]
2989 // CHECK6: omp.inner.for.end36:
2990 // CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
2991 // CHECK6-NEXT: [[SUB37:%.*]] = sub nsw i32 [[TMP23]], 0
2992 // CHECK6-NEXT: [[DIV38:%.*]] = sdiv i32 [[SUB37]], 1
2993 // CHECK6-NEXT: [[MUL39:%.*]] = mul nsw i32 [[DIV38]], 1
2994 // CHECK6-NEXT: [[ADD40:%.*]] = add nsw i32 0, [[MUL39]]
2995 // CHECK6-NEXT: store i32 [[ADD40]], i32* [[I11]], align 4
2996 // CHECK6-NEXT: br label [[SIMD_IF_END41]]
2997 // CHECK6: simd.if.end41:
2998 // CHECK6-NEXT: [[TMP24:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4
2999 // CHECK6-NEXT: ret i32 [[TMP24]]
3000 //
3001 //
3002 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_argument_globali
3003 // CHECK7-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
3004 // CHECK7-NEXT: entry:
3005 // CHECK7-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3006 // CHECK7-NEXT: [[TE:%.*]] = alloca i32, align 4
3007 // CHECK7-NEXT: [[TH:%.*]] = alloca i32, align 4
3008 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3009 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3010 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3011 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3012 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3013 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3014 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3015 // CHECK7-NEXT: [[I4:%.*]] = alloca i32, align 4
3016 // CHECK7-NEXT: [[I11:%.*]] = alloca i32, align 4
3017 // CHECK7-NEXT: [[_TMP12:%.*]] = alloca i32, align 4
3018 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4
3019 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4
3020 // CHECK7-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4
3021 // CHECK7-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4
3022 // CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4
3023 // CHECK7-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4
3024 // CHECK7-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
3025 // CHECK7-NEXT: [[I24:%.*]] = alloca i32, align 4
3026 // CHECK7-NEXT: [[I25:%.*]] = alloca i32, align 4
3027 // CHECK7-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3028 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3029 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
3030 // CHECK7-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
3031 // CHECK7-NEXT: store i32 128, i32* [[TH]], align 4
3032 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
3033 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3034 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3035 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3036 // CHECK7-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1
3037 // CHECK7-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1
3038 // CHECK7-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3039 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3040 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3041 // CHECK7-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4
3042 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4
3043 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3044 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
3045 // CHECK7-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
3046 // CHECK7: simd.if.then:
3047 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3048 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3049 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3050 // CHECK7: omp.inner.for.cond:
3051 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3052 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
3053 // CHECK7-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3054 // CHECK7-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3055 // CHECK7: omp.inner.for.body:
3056 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3057 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3058 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3059 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !3
3060 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !3
3061 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP9]]
3062 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
3063 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3064 // CHECK7: omp.body.continue:
3065 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3066 // CHECK7: omp.inner.for.inc:
3067 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3068 // CHECK7-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
3069 // CHECK7-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3070 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
3071 // CHECK7: omp.inner.for.end:
3072 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3073 // CHECK7-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP11]], 0
3074 // CHECK7-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
3075 // CHECK7-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
3076 // CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
3077 // CHECK7-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
3078 // CHECK7-NEXT: br label [[SIMD_IF_END]]
3079 // CHECK7: simd.if.end:
3080 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[N_ADDR]], align 4
3081 // CHECK7-NEXT: store i32 [[TMP12]], i32* [[DOTCAPTURE_EXPR_13]], align 4
3082 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
3083 // CHECK7-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP13]], 0
3084 // CHECK7-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
3085 // CHECK7-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 1
3086 // CHECK7-NEXT: store i32 [[SUB17]], i32* [[DOTCAPTURE_EXPR_14]], align 4
3087 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4
3088 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
3089 // CHECK7-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_UB19]], align 4
3090 // CHECK7-NEXT: store i32 0, i32* [[I20]], align 4
3091 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
3092 // CHECK7-NEXT: [[CMP21:%.*]] = icmp slt i32 0, [[TMP15]]
3093 // CHECK7-NEXT: br i1 [[CMP21]], label [[SIMD_IF_THEN22:%.*]], label [[SIMD_IF_END40:%.*]]
3094 // CHECK7: simd.if.then22:
3095 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4
3096 // CHECK7-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV23]], align 4
3097 // CHECK7-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32 16) ]
3098 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[I11]], align 4
3099 // CHECK7-NEXT: store i32 [[TMP17]], i32* [[DOTLINEAR_START]], align 4
3100 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]]
3101 // CHECK7: omp.inner.for.cond26:
3102 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4
3103 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4
3104 // CHECK7-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
3105 // CHECK7-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END35:%.*]]
3106 // CHECK7: omp.inner.for.body28:
3107 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4
3108 // CHECK7-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP20]], 1
3109 // CHECK7-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]]
3110 // CHECK7-NEXT: store i32 [[ADD30]], i32* [[I24]], align 4
3111 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[I24]], align 4
3112 // CHECK7-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP21]]
3113 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX31]], align 4
3114 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE32:%.*]]
3115 // CHECK7: omp.body.continue32:
3116 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC33:%.*]]
3117 // CHECK7: omp.inner.for.inc33:
3118 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4
3119 // CHECK7-NEXT: [[ADD34:%.*]] = add nsw i32 [[TMP22]], 1
3120 // CHECK7-NEXT: store i32 [[ADD34]], i32* [[DOTOMP_IV23]], align 4
3121 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP8:![0-9]+]]
3122 // CHECK7: omp.inner.for.end35:
3123 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
3124 // CHECK7-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP23]], 0
3125 // CHECK7-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1
3126 // CHECK7-NEXT: [[MUL38:%.*]] = mul nsw i32 [[DIV37]], 1
3127 // CHECK7-NEXT: [[ADD39:%.*]] = add nsw i32 0, [[MUL38]]
3128 // CHECK7-NEXT: store i32 [[ADD39]], i32* [[I11]], align 4
3129 // CHECK7-NEXT: br label [[SIMD_IF_END40]]
3130 // CHECK7: simd.if.end40:
3131 // CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4
3132 // CHECK7-NEXT: ret i32 [[TMP24]]
3133 //
3134 //
3135 // CHECK8-LABEL: define {{[^@]+}}@_Z21teams_argument_globali
3136 // CHECK8-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
3137 // CHECK8-NEXT: entry:
3138 // CHECK8-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3139 // CHECK8-NEXT: [[TE:%.*]] = alloca i32, align 4
3140 // CHECK8-NEXT: [[TH:%.*]] = alloca i32, align 4
3141 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
3142 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3143 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3144 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3145 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3146 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
3147 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3148 // CHECK8-NEXT: [[I4:%.*]] = alloca i32, align 4
3149 // CHECK8-NEXT: [[I11:%.*]] = alloca i32, align 4
3150 // CHECK8-NEXT: [[_TMP12:%.*]] = alloca i32, align 4
3151 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4
3152 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_14:%.*]] = alloca i32, align 4
3153 // CHECK8-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4
3154 // CHECK8-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4
3155 // CHECK8-NEXT: [[I20:%.*]] = alloca i32, align 4
3156 // CHECK8-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4
3157 // CHECK8-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
3158 // CHECK8-NEXT: [[I24:%.*]] = alloca i32, align 4
3159 // CHECK8-NEXT: [[I25:%.*]] = alloca i32, align 4
3160 // CHECK8-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3161 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4
3162 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
3163 // CHECK8-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
3164 // CHECK8-NEXT: store i32 128, i32* [[TH]], align 4
3165 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
3166 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3167 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3168 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3169 // CHECK8-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1
3170 // CHECK8-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1
3171 // CHECK8-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3172 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3173 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3174 // CHECK8-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4
3175 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4
3176 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3177 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
3178 // CHECK8-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
3179 // CHECK8: simd.if.then:
3180 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3181 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3182 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3183 // CHECK8: omp.inner.for.cond:
3184 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3185 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
3186 // CHECK8-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3187 // CHECK8-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3188 // CHECK8: omp.inner.for.body:
3189 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3190 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3191 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3192 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !3
3193 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !3
3194 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP9]]
3195 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
3196 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3197 // CHECK8: omp.body.continue:
3198 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3199 // CHECK8: omp.inner.for.inc:
3200 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3201 // CHECK8-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
3202 // CHECK8-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3203 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
3204 // CHECK8: omp.inner.for.end:
3205 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3206 // CHECK8-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP11]], 0
3207 // CHECK8-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
3208 // CHECK8-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
3209 // CHECK8-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
3210 // CHECK8-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
3211 // CHECK8-NEXT: br label [[SIMD_IF_END]]
3212 // CHECK8: simd.if.end:
3213 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[N_ADDR]], align 4
3214 // CHECK8-NEXT: store i32 [[TMP12]], i32* [[DOTCAPTURE_EXPR_13]], align 4
3215 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
3216 // CHECK8-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP13]], 0
3217 // CHECK8-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
3218 // CHECK8-NEXT: [[SUB17:%.*]] = sub nsw i32 [[DIV16]], 1
3219 // CHECK8-NEXT: store i32 [[SUB17]], i32* [[DOTCAPTURE_EXPR_14]], align 4
3220 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4
3221 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_14]], align 4
3222 // CHECK8-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_UB19]], align 4
3223 // CHECK8-NEXT: store i32 0, i32* [[I20]], align 4
3224 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
3225 // CHECK8-NEXT: [[CMP21:%.*]] = icmp slt i32 0, [[TMP15]]
3226 // CHECK8-NEXT: br i1 [[CMP21]], label [[SIMD_IF_THEN22:%.*]], label [[SIMD_IF_END40:%.*]]
3227 // CHECK8: simd.if.then22:
3228 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4
3229 // CHECK8-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV23]], align 4
3230 // CHECK8-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32 16) ]
3231 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[I11]], align 4
3232 // CHECK8-NEXT: store i32 [[TMP17]], i32* [[DOTLINEAR_START]], align 4
3233 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND26:%.*]]
3234 // CHECK8: omp.inner.for.cond26:
3235 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4
3236 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4
3237 // CHECK8-NEXT: [[CMP27:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
3238 // CHECK8-NEXT: br i1 [[CMP27]], label [[OMP_INNER_FOR_BODY28:%.*]], label [[OMP_INNER_FOR_END35:%.*]]
3239 // CHECK8: omp.inner.for.body28:
3240 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4
3241 // CHECK8-NEXT: [[MUL29:%.*]] = mul nsw i32 [[TMP20]], 1
3242 // CHECK8-NEXT: [[ADD30:%.*]] = add nsw i32 0, [[MUL29]]
3243 // CHECK8-NEXT: store i32 [[ADD30]], i32* [[I24]], align 4
3244 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[I24]], align 4
3245 // CHECK8-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i32 0, i32 [[TMP21]]
3246 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX31]], align 4
3247 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE32:%.*]]
3248 // CHECK8: omp.body.continue32:
3249 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC33:%.*]]
3250 // CHECK8: omp.inner.for.inc33:
3251 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4
3252 // CHECK8-NEXT: [[ADD34:%.*]] = add nsw i32 [[TMP22]], 1
3253 // CHECK8-NEXT: store i32 [[ADD34]], i32* [[DOTOMP_IV23]], align 4
3254 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND26]], !llvm.loop [[LOOP8:![0-9]+]]
3255 // CHECK8: omp.inner.for.end35:
3256 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
3257 // CHECK8-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP23]], 0
3258 // CHECK8-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1
3259 // CHECK8-NEXT: [[MUL38:%.*]] = mul nsw i32 [[DIV37]], 1
3260 // CHECK8-NEXT: [[ADD39:%.*]] = add nsw i32 0, [[MUL38]]
3261 // CHECK8-NEXT: store i32 [[ADD39]], i32* [[I11]], align 4
3262 // CHECK8-NEXT: br label [[SIMD_IF_END40]]
3263 // CHECK8: simd.if.end40:
3264 // CHECK8-NEXT: [[TMP24:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4
3265 // CHECK8-NEXT: ret i32 [[TMP24]]
3266 //
3267 //
3268 // CHECK9-LABEL: define {{[^@]+}}@_Z15teams_local_argv
3269 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
3270 // CHECK9-NEXT: entry:
3271 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4
3272 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
3273 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
3274 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3275 // CHECK9-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
3276 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3277 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
3278 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
3279 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
3280 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 8
3281 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3282 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3283 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
3284 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4
3285 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
3286 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
3287 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
3288 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
3289 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
3290 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
3291 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4
3292 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32*
3293 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
3294 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[I_CASTED]], align 8
3295 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4
3296 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3297 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
3298 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8
3299 // CHECK9-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP1]], 4
3300 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3301 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
3302 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP9]], align 8
3303 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3304 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64*
3305 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP11]], align 8
3306 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3307 // CHECK9-NEXT: store i64 8, i64* [[TMP12]], align 8
3308 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3309 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8
3310 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3311 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32**
3312 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP15]], align 8
3313 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3314 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32**
3315 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP17]], align 8
3316 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
3317 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP18]], align 8
3318 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
3319 // CHECK9-NEXT: store i8* null, i8** [[TMP19]], align 8
3320 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3321 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
3322 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP21]], align 8
3323 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3324 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
3325 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP23]], align 8
3326 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
3327 // CHECK9-NEXT: store i64 4, i64* [[TMP24]], align 8
3328 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
3329 // CHECK9-NEXT: store i8* null, i8** [[TMP25]], align 8
3330 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
3331 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
3332 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP27]], align 8
3333 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
3334 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
3335 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP29]], align 8
3336 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
3337 // CHECK9-NEXT: store i64 4, i64* [[TMP30]], align 8
3338 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
3339 // CHECK9-NEXT: store i8* null, i8** [[TMP31]], align 8
3340 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3341 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3342 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3343 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[N]], align 4
3344 // CHECK9-NEXT: store i32 [[TMP35]], i32* [[DOTCAPTURE_EXPR_]], align 4
3345 // CHECK9-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3346 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP36]], 0
3347 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3348 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
3349 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
3350 // CHECK9-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3351 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP37]], 1
3352 // CHECK9-NEXT: [[TMP38:%.*]] = zext i32 [[ADD]] to i64
3353 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 [[TMP38]])
3354 // CHECK9-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.region_id, i32 4, i8** [[TMP32]], i8** [[TMP33]], i64* [[TMP34]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3355 // CHECK9-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
3356 // CHECK9-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3357 // CHECK9: omp_offload.failed:
3358 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74(i64 [[TMP1]], i32* [[VLA]], i64 [[TMP4]], i64 [[TMP6]]) #[[ATTR5:[0-9]+]]
3359 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
3360 // CHECK9: omp_offload.cont:
3361 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0
3362 // CHECK9-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3363 // CHECK9-NEXT: [[TMP42:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
3364 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP42]])
3365 // CHECK9-NEXT: ret i32 [[TMP41]]
3366 //
3367 //
3368 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74
3369 // CHECK9-SAME: (i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[I:%.*]], i64 [[N:%.*]]) #[[ATTR2:[0-9]+]] {
3370 // CHECK9-NEXT: entry:
3371 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
3372 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
3373 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
3374 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3375 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3376 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
3377 // CHECK9-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
3378 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3379 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3380 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3381 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
3382 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3383 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]])
3384 // CHECK9-NEXT: ret void
3385 //
3386 //
3387 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
3388 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3389 // CHECK9-NEXT: entry:
3390 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3391 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3392 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
3393 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
3394 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
3395 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
3396 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3397 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3398 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3399 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3400 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
3401 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3402 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3403 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3404 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3405 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4
3406 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3407 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3408 // CHECK9-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
3409 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
3410 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3411 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
3412 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
3413 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8
3414 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3415 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3416 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4
3417 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
3418 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3419 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
3420 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3421 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3422 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3423 // CHECK9-NEXT: store i32 0, i32* [[I3]], align 4
3424 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3425 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
3426 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3427 // CHECK9: omp.precond.then:
3428 // CHECK9-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i64 16) ]
3429 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3430 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3431 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4
3432 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3433 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3434 // CHECK9-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3435 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
3436 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3437 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3438 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3439 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
3440 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3441 // CHECK9: cond.true:
3442 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3443 // CHECK9-NEXT: br label [[COND_END:%.*]]
3444 // CHECK9: cond.false:
3445 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3446 // CHECK9-NEXT: br label [[COND_END]]
3447 // CHECK9: cond.end:
3448 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
3449 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3450 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3451 // CHECK9-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
3452 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3453 // CHECK9: omp.inner.for.cond:
3454 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3455 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3456 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
3457 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3458 // CHECK9: omp.inner.for.body:
3459 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3460 // CHECK9-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
3461 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3462 // CHECK9-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
3463 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[I4]], i32* [[TMP1]], i64 [[TMP2]], i32* [[TMP3]])
3464 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3465 // CHECK9: omp.inner.for.inc:
3466 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3467 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3468 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
3469 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3470 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3471 // CHECK9: omp.inner.for.end:
3472 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3473 // CHECK9: omp.loop.exit:
3474 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3475 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
3476 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
3477 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3478 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3479 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3480 // CHECK9: .omp.final.then:
3481 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3482 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
3483 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
3484 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
3485 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
3486 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4
3487 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
3488 // CHECK9: .omp.final.done:
3489 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
3490 // CHECK9: omp.precond.end:
3491 // CHECK9-NEXT: ret void
3492 //
3493 //
3494 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
3495 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3496 // CHECK9-NEXT: entry:
3497 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3498 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3499 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3500 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3501 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
3502 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
3503 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
3504 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
3505 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3506 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3507 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3508 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3509 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
3510 // CHECK9-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
3511 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3512 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3513 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3514 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3515 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4
3516 // CHECK9-NEXT: [[I6:%.*]] = alloca i32, align 4
3517 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3518 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3519 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3520 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3521 // CHECK9-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
3522 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
3523 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3524 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
3525 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
3526 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8
3527 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3528 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3529 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4
3530 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
3531 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3532 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
3533 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3534 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3535 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3536 // CHECK9-NEXT: store i32 0, i32* [[I3]], align 4
3537 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3538 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
3539 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3540 // CHECK9: omp.precond.then:
3541 // CHECK9-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i64 16) ]
3542 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP0]], align 4
3543 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4
3544 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3545 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3546 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
3547 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3548 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32
3549 // CHECK9-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3550 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP10]] to i32
3551 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3552 // CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
3553 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3554 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3555 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3556 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
3557 // CHECK9-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP12]])
3558 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3559 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
3560 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3561 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3562 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3563 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]]
3564 // CHECK9-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3565 // CHECK9: cond.true:
3566 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3567 // CHECK9-NEXT: br label [[COND_END:%.*]]
3568 // CHECK9: cond.false:
3569 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3570 // CHECK9-NEXT: br label [[COND_END]]
3571 // CHECK9: cond.end:
3572 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
3573 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3574 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3575 // CHECK9-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
3576 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3577 // CHECK9: omp.inner.for.cond:
3578 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3579 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3580 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
3581 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3582 // CHECK9: omp.inner.for.body:
3583 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3584 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1
3585 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3586 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
3587 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[I5]], align 4
3588 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
3589 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i64 [[IDXPROM]]
3590 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
3591 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3592 // CHECK9: omp.body.continue:
3593 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3594 // CHECK9: omp.inner.for.inc:
3595 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3596 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], 1
3597 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
3598 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
3599 // CHECK9: omp.inner.for.end:
3600 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3601 // CHECK9: omp.loop.exit:
3602 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3603 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
3604 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
3605 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3606 // CHECK9-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
3607 // CHECK9-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3608 // CHECK9: .omp.final.then:
3609 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3610 // CHECK9-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP29]], 0
3611 // CHECK9-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
3612 // CHECK9-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
3613 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
3614 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[TMP0]], align 4
3615 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
3616 // CHECK9: .omp.final.done:
3617 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3618 // CHECK9-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
3619 // CHECK9-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
3620 // CHECK9: .omp.linear.pu:
3621 // CHECK9-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
3622 // CHECK9: .omp.linear.pu.done:
3623 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
3624 // CHECK9: omp.precond.end:
3625 // CHECK9-NEXT: ret void
3626 //
3627 //
3628 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3629 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
3630 // CHECK9-NEXT: entry:
3631 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
3632 // CHECK9-NEXT: ret void
3633 //
3634 //
3635 // CHECK10-LABEL: define {{[^@]+}}@_Z15teams_local_argv
3636 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
3637 // CHECK10-NEXT: entry:
3638 // CHECK10-NEXT: [[N:%.*]] = alloca i32, align 4
3639 // CHECK10-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
3640 // CHECK10-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
3641 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
3642 // CHECK10-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
3643 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3644 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
3645 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
3646 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
3647 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 8
3648 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3649 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3650 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
3651 // CHECK10-NEXT: store i32 100, i32* [[N]], align 4
3652 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
3653 // CHECK10-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
3654 // CHECK10-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
3655 // CHECK10-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
3656 // CHECK10-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
3657 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
3658 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4
3659 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32*
3660 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
3661 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[I_CASTED]], align 8
3662 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4
3663 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3664 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
3665 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8
3666 // CHECK10-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP1]], 4
3667 // CHECK10-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3668 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
3669 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP9]], align 8
3670 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3671 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64*
3672 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP11]], align 8
3673 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3674 // CHECK10-NEXT: store i64 8, i64* [[TMP12]], align 8
3675 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3676 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 8
3677 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3678 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32**
3679 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP15]], align 8
3680 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3681 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32**
3682 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP17]], align 8
3683 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
3684 // CHECK10-NEXT: store i64 [[TMP7]], i64* [[TMP18]], align 8
3685 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
3686 // CHECK10-NEXT: store i8* null, i8** [[TMP19]], align 8
3687 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3688 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
3689 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP21]], align 8
3690 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3691 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
3692 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP23]], align 8
3693 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
3694 // CHECK10-NEXT: store i64 4, i64* [[TMP24]], align 8
3695 // CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
3696 // CHECK10-NEXT: store i8* null, i8** [[TMP25]], align 8
3697 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
3698 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
3699 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP27]], align 8
3700 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
3701 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
3702 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP29]], align 8
3703 // CHECK10-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
3704 // CHECK10-NEXT: store i64 4, i64* [[TMP30]], align 8
3705 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
3706 // CHECK10-NEXT: store i8* null, i8** [[TMP31]], align 8
3707 // CHECK10-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3708 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3709 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3710 // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[N]], align 4
3711 // CHECK10-NEXT: store i32 [[TMP35]], i32* [[DOTCAPTURE_EXPR_]], align 4
3712 // CHECK10-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3713 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP36]], 0
3714 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3715 // CHECK10-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
3716 // CHECK10-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
3717 // CHECK10-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3718 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP37]], 1
3719 // CHECK10-NEXT: [[TMP38:%.*]] = zext i32 [[ADD]] to i64
3720 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 [[TMP38]])
3721 // CHECK10-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.region_id, i32 4, i8** [[TMP32]], i8** [[TMP33]], i64* [[TMP34]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3722 // CHECK10-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
3723 // CHECK10-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3724 // CHECK10: omp_offload.failed:
3725 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74(i64 [[TMP1]], i32* [[VLA]], i64 [[TMP4]], i64 [[TMP6]]) #[[ATTR5:[0-9]+]]
3726 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
3727 // CHECK10: omp_offload.cont:
3728 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0
3729 // CHECK10-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3730 // CHECK10-NEXT: [[TMP42:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
3731 // CHECK10-NEXT: call void @llvm.stackrestore(i8* [[TMP42]])
3732 // CHECK10-NEXT: ret i32 [[TMP41]]
3733 //
3734 //
3735 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74
3736 // CHECK10-SAME: (i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[I:%.*]], i64 [[N:%.*]]) #[[ATTR2:[0-9]+]] {
3737 // CHECK10-NEXT: entry:
3738 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
3739 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
3740 // CHECK10-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
3741 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3742 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3743 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
3744 // CHECK10-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
3745 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3746 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3747 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3748 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
3749 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3750 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]])
3751 // CHECK10-NEXT: ret void
3752 //
3753 //
3754 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
3755 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3756 // CHECK10-NEXT: entry:
3757 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3758 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3759 // CHECK10-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
3760 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
3761 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
3762 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
3763 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3764 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3765 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3766 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3767 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4
3768 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3769 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3770 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3771 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3772 // CHECK10-NEXT: [[I4:%.*]] = alloca i32, align 4
3773 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3774 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3775 // CHECK10-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
3776 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
3777 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3778 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
3779 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
3780 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8
3781 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3782 // CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3783 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4
3784 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
3785 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3786 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
3787 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3788 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3789 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3790 // CHECK10-NEXT: store i32 0, i32* [[I3]], align 4
3791 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3792 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
3793 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3794 // CHECK10: omp.precond.then:
3795 // CHECK10-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i64 16) ]
3796 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3797 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3798 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4
3799 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3800 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3801 // CHECK10-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3802 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
3803 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3804 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3805 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3806 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
3807 // CHECK10-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3808 // CHECK10: cond.true:
3809 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3810 // CHECK10-NEXT: br label [[COND_END:%.*]]
3811 // CHECK10: cond.false:
3812 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3813 // CHECK10-NEXT: br label [[COND_END]]
3814 // CHECK10: cond.end:
3815 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
3816 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3817 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3818 // CHECK10-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
3819 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3820 // CHECK10: omp.inner.for.cond:
3821 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3822 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3823 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
3824 // CHECK10-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3825 // CHECK10: omp.inner.for.body:
3826 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3827 // CHECK10-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
3828 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3829 // CHECK10-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
3830 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[I4]], i32* [[TMP1]], i64 [[TMP2]], i32* [[TMP3]])
3831 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3832 // CHECK10: omp.inner.for.inc:
3833 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3834 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3835 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
3836 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3837 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3838 // CHECK10: omp.inner.for.end:
3839 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3840 // CHECK10: omp.loop.exit:
3841 // CHECK10-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3842 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
3843 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
3844 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3845 // CHECK10-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3846 // CHECK10-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3847 // CHECK10: .omp.final.then:
3848 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3849 // CHECK10-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
3850 // CHECK10-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
3851 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
3852 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
3853 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4
3854 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
3855 // CHECK10: .omp.final.done:
3856 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
3857 // CHECK10: omp.precond.end:
3858 // CHECK10-NEXT: ret void
3859 //
3860 //
3861 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
3862 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3863 // CHECK10-NEXT: entry:
3864 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3865 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3866 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3867 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3868 // CHECK10-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
3869 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
3870 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
3871 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
3872 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3873 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3874 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3875 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3876 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4
3877 // CHECK10-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
3878 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3879 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3880 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3881 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3882 // CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4
3883 // CHECK10-NEXT: [[I6:%.*]] = alloca i32, align 4
3884 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3885 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3886 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3887 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3888 // CHECK10-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
3889 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
3890 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
3891 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
3892 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
3893 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8
3894 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
3895 // CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8
3896 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4
3897 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
3898 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3899 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
3900 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3901 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3902 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3903 // CHECK10-NEXT: store i32 0, i32* [[I3]], align 4
3904 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3905 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
3906 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3907 // CHECK10: omp.precond.then:
3908 // CHECK10-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i64 16) ]
3909 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP0]], align 4
3910 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4
3911 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3912 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3913 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
3914 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3915 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32
3916 // CHECK10-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3917 // CHECK10-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP10]] to i32
3918 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3919 // CHECK10-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
3920 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3921 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3922 // CHECK10-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3923 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
3924 // CHECK10-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP12]])
3925 // CHECK10-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3926 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
3927 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3928 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3929 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3930 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]]
3931 // CHECK10-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3932 // CHECK10: cond.true:
3933 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3934 // CHECK10-NEXT: br label [[COND_END:%.*]]
3935 // CHECK10: cond.false:
3936 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3937 // CHECK10-NEXT: br label [[COND_END]]
3938 // CHECK10: cond.end:
3939 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
3940 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3941 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3942 // CHECK10-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
3943 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3944 // CHECK10: omp.inner.for.cond:
3945 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3946 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3947 // CHECK10-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
3948 // CHECK10-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3949 // CHECK10: omp.inner.for.body:
3950 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3951 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1
3952 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3953 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
3954 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[I5]], align 4
3955 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
3956 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i64 [[IDXPROM]]
3957 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
3958 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3959 // CHECK10: omp.body.continue:
3960 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3961 // CHECK10: omp.inner.for.inc:
3962 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3963 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], 1
3964 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
3965 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
3966 // CHECK10: omp.inner.for.end:
3967 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3968 // CHECK10: omp.loop.exit:
3969 // CHECK10-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3970 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
3971 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
3972 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3973 // CHECK10-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
3974 // CHECK10-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3975 // CHECK10: .omp.final.then:
3976 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3977 // CHECK10-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP29]], 0
3978 // CHECK10-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
3979 // CHECK10-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
3980 // CHECK10-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
3981 // CHECK10-NEXT: store i32 [[ADD13]], i32* [[TMP0]], align 4
3982 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
3983 // CHECK10: .omp.final.done:
3984 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3985 // CHECK10-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
3986 // CHECK10-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
3987 // CHECK10: .omp.linear.pu:
3988 // CHECK10-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
3989 // CHECK10: .omp.linear.pu.done:
3990 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
3991 // CHECK10: omp.precond.end:
3992 // CHECK10-NEXT: ret void
3993 //
3994 //
3995 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3996 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] {
3997 // CHECK10-NEXT: entry:
3998 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1)
3999 // CHECK10-NEXT: ret void
4000 //
4001 //
4002 // CHECK11-LABEL: define {{[^@]+}}@_Z15teams_local_argv
4003 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
4004 // CHECK11-NEXT: entry:
4005 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4
4006 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
4007 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
4008 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4009 // CHECK11-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
4010 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4011 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
4012 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
4013 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
4014 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 4
4015 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4016 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4017 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4018 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4
4019 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
4020 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
4021 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
4022 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
4023 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
4024 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4
4025 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[I_CASTED]], align 4
4026 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[I_CASTED]], align 4
4027 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
4028 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4
4029 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4
4030 // CHECK11-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP0]], 4
4031 // CHECK11-NEXT: [[TMP7:%.*]] = sext i32 [[TMP6]] to i64
4032 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4033 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
4034 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP9]], align 4
4035 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4036 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32*
4037 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP11]], align 4
4038 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4039 // CHECK11-NEXT: store i64 4, i64* [[TMP12]], align 4
4040 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4041 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4
4042 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4043 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32**
4044 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP15]], align 4
4045 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4046 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32**
4047 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP17]], align 4
4048 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
4049 // CHECK11-NEXT: store i64 [[TMP7]], i64* [[TMP18]], align 4
4050 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4051 // CHECK11-NEXT: store i8* null, i8** [[TMP19]], align 4
4052 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4053 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
4054 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP21]], align 4
4055 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4056 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
4057 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP23]], align 4
4058 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
4059 // CHECK11-NEXT: store i64 4, i64* [[TMP24]], align 4
4060 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4061 // CHECK11-NEXT: store i8* null, i8** [[TMP25]], align 4
4062 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
4063 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
4064 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP27]], align 4
4065 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
4066 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32*
4067 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP29]], align 4
4068 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
4069 // CHECK11-NEXT: store i64 4, i64* [[TMP30]], align 4
4070 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
4071 // CHECK11-NEXT: store i8* null, i8** [[TMP31]], align 4
4072 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4073 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4074 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4075 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[N]], align 4
4076 // CHECK11-NEXT: store i32 [[TMP35]], i32* [[DOTCAPTURE_EXPR_]], align 4
4077 // CHECK11-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4078 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP36]], 0
4079 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4080 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4081 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4082 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4083 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP37]], 1
4084 // CHECK11-NEXT: [[TMP38:%.*]] = zext i32 [[ADD]] to i64
4085 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 [[TMP38]])
4086 // CHECK11-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.region_id, i32 4, i8** [[TMP32]], i8** [[TMP33]], i64* [[TMP34]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4087 // CHECK11-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
4088 // CHECK11-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4089 // CHECK11: omp_offload.failed:
4090 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74(i32 [[TMP0]], i32* [[VLA]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR5:[0-9]+]]
4091 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
4092 // CHECK11: omp_offload.cont:
4093 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0
4094 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
4095 // CHECK11-NEXT: [[TMP42:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
4096 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP42]])
4097 // CHECK11-NEXT: ret i32 [[TMP41]]
4098 //
4099 //
4100 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74
4101 // CHECK11-SAME: (i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[I:%.*]], i32 [[N:%.*]]) #[[ATTR2:[0-9]+]] {
4102 // CHECK11-NEXT: entry:
4103 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4104 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4105 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
4106 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4107 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4108 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4109 // CHECK11-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
4110 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4111 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4112 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4113 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[I_ADDR]], i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
4114 // CHECK11-NEXT: ret void
4115 //
4116 //
4117 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
4118 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4119 // CHECK11-NEXT: entry:
4120 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4121 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4122 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
4123 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
4124 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4125 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4126 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4127 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4128 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4129 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4130 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
4131 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4132 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4133 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4134 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4135 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4
4136 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4137 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4138 // CHECK11-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
4139 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
4140 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4141 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4142 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
4143 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4
4144 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4145 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4146 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4
4147 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
4148 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4149 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
4150 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4151 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4152 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4153 // CHECK11-NEXT: store i32 0, i32* [[I3]], align 4
4154 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4155 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
4156 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4157 // CHECK11: omp.precond.then:
4158 // CHECK11-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i32 16) ]
4159 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4160 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4161 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4
4162 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4163 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4164 // CHECK11-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4165 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
4166 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4167 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4168 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4169 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
4170 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4171 // CHECK11: cond.true:
4172 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4173 // CHECK11-NEXT: br label [[COND_END:%.*]]
4174 // CHECK11: cond.false:
4175 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4176 // CHECK11-NEXT: br label [[COND_END]]
4177 // CHECK11: cond.end:
4178 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
4179 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4180 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4181 // CHECK11-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
4182 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4183 // CHECK11: omp.inner.for.cond:
4184 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4185 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4186 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
4187 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4188 // CHECK11: omp.inner.for.body:
4189 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4190 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4191 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[I4]], i32* [[TMP1]], i32 [[TMP2]], i32* [[TMP3]])
4192 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4193 // CHECK11: omp.inner.for.inc:
4194 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4195 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4196 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
4197 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4198 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
4199 // CHECK11: omp.inner.for.end:
4200 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4201 // CHECK11: omp.loop.exit:
4202 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4203 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
4204 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
4205 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4206 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
4207 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4208 // CHECK11: .omp.final.then:
4209 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4210 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0
4211 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
4212 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
4213 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
4214 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4
4215 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
4216 // CHECK11: .omp.final.done:
4217 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
4218 // CHECK11: omp.precond.end:
4219 // CHECK11-NEXT: ret void
4220 //
4221 //
4222 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
4223 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4224 // CHECK11-NEXT: entry:
4225 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4226 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4227 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4228 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4229 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
4230 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
4231 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4232 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4233 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4234 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4235 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4236 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4237 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
4238 // CHECK11-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
4239 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4240 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4241 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4242 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4243 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4
4244 // CHECK11-NEXT: [[I5:%.*]] = alloca i32, align 4
4245 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4246 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4247 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4248 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4249 // CHECK11-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
4250 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
4251 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4252 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4253 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
4254 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4
4255 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4256 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4257 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4
4258 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
4259 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4260 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
4261 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4262 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4263 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4264 // CHECK11-NEXT: store i32 0, i32* [[I3]], align 4
4265 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4266 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
4267 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4268 // CHECK11: omp.precond.then:
4269 // CHECK11-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i32 16) ]
4270 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP0]], align 4
4271 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4
4272 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4273 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4274 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
4275 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4276 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4277 // CHECK11-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4
4278 // CHECK11-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4
4279 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4280 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4281 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4282 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
4283 // CHECK11-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP12]])
4284 // CHECK11-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4285 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
4286 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4287 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4288 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4289 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]]
4290 // CHECK11-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4291 // CHECK11: cond.true:
4292 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4293 // CHECK11-NEXT: br label [[COND_END:%.*]]
4294 // CHECK11: cond.false:
4295 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4296 // CHECK11-NEXT: br label [[COND_END]]
4297 // CHECK11: cond.end:
4298 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
4299 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4300 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4301 // CHECK11-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
4302 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4303 // CHECK11: omp.inner.for.cond:
4304 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4305 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4306 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
4307 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4308 // CHECK11: omp.inner.for.body:
4309 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4310 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1
4311 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4312 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
4313 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4
4314 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i32 [[TMP23]]
4315 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
4316 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4317 // CHECK11: omp.body.continue:
4318 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4319 // CHECK11: omp.inner.for.inc:
4320 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4321 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], 1
4322 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
4323 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
4324 // CHECK11: omp.inner.for.end:
4325 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4326 // CHECK11: omp.loop.exit:
4327 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4328 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
4329 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
4330 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4331 // CHECK11-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
4332 // CHECK11-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4333 // CHECK11: .omp.final.then:
4334 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4335 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP29]], 0
4336 // CHECK11-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
4337 // CHECK11-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
4338 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
4339 // CHECK11-NEXT: store i32 [[ADD12]], i32* [[TMP0]], align 4
4340 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
4341 // CHECK11: .omp.final.done:
4342 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4343 // CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
4344 // CHECK11-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
4345 // CHECK11: .omp.linear.pu:
4346 // CHECK11-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
4347 // CHECK11: .omp.linear.pu.done:
4348 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
4349 // CHECK11: omp.precond.end:
4350 // CHECK11-NEXT: ret void
4351 //
4352 //
4353 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4354 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
4355 // CHECK11-NEXT: entry:
4356 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
4357 // CHECK11-NEXT: ret void
4358 //
4359 //
4360 // CHECK12-LABEL: define {{[^@]+}}@_Z15teams_local_argv
4361 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] {
4362 // CHECK12-NEXT: entry:
4363 // CHECK12-NEXT: [[N:%.*]] = alloca i32, align 4
4364 // CHECK12-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
4365 // CHECK12-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
4366 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
4367 // CHECK12-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
4368 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4369 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
4370 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
4371 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
4372 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 4
4373 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
4374 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4375 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4376 // CHECK12-NEXT: store i32 100, i32* [[N]], align 4
4377 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
4378 // CHECK12-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
4379 // CHECK12-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
4380 // CHECK12-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
4381 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
4382 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4
4383 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[I_CASTED]], align 4
4384 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[I_CASTED]], align 4
4385 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
4386 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4
4387 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4
4388 // CHECK12-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP0]], 4
4389 // CHECK12-NEXT: [[TMP7:%.*]] = sext i32 [[TMP6]] to i64
4390 // CHECK12-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4391 // CHECK12-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
4392 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP9]], align 4
4393 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4394 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32*
4395 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP11]], align 4
4396 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4397 // CHECK12-NEXT: store i64 4, i64* [[TMP12]], align 4
4398 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4399 // CHECK12-NEXT: store i8* null, i8** [[TMP13]], align 4
4400 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4401 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32**
4402 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP15]], align 4
4403 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4404 // CHECK12-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32**
4405 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP17]], align 4
4406 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
4407 // CHECK12-NEXT: store i64 [[TMP7]], i64* [[TMP18]], align 4
4408 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
4409 // CHECK12-NEXT: store i8* null, i8** [[TMP19]], align 4
4410 // CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4411 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
4412 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP21]], align 4
4413 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4414 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
4415 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP23]], align 4
4416 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
4417 // CHECK12-NEXT: store i64 4, i64* [[TMP24]], align 4
4418 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
4419 // CHECK12-NEXT: store i8* null, i8** [[TMP25]], align 4
4420 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
4421 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
4422 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[TMP27]], align 4
4423 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
4424 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32*
4425 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[TMP29]], align 4
4426 // CHECK12-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
4427 // CHECK12-NEXT: store i64 4, i64* [[TMP30]], align 4
4428 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
4429 // CHECK12-NEXT: store i8* null, i8** [[TMP31]], align 4
4430 // CHECK12-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4431 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4432 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4433 // CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[N]], align 4
4434 // CHECK12-NEXT: store i32 [[TMP35]], i32* [[DOTCAPTURE_EXPR_]], align 4
4435 // CHECK12-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4436 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP36]], 0
4437 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4438 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4439 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4440 // CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4441 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP37]], 1
4442 // CHECK12-NEXT: [[TMP38:%.*]] = zext i32 [[ADD]] to i64
4443 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 [[TMP38]])
4444 // CHECK12-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74.region_id, i32 4, i8** [[TMP32]], i8** [[TMP33]], i64* [[TMP34]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4445 // CHECK12-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
4446 // CHECK12-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4447 // CHECK12: omp_offload.failed:
4448 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74(i32 [[TMP0]], i32* [[VLA]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR5:[0-9]+]]
4449 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
4450 // CHECK12: omp_offload.cont:
4451 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0
4452 // CHECK12-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
4453 // CHECK12-NEXT: [[TMP42:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
4454 // CHECK12-NEXT: call void @llvm.stackrestore(i8* [[TMP42]])
4455 // CHECK12-NEXT: ret i32 [[TMP41]]
4456 //
4457 //
4458 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l74
4459 // CHECK12-SAME: (i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[I:%.*]], i32 [[N:%.*]]) #[[ATTR2:[0-9]+]] {
4460 // CHECK12-NEXT: entry:
4461 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4462 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4463 // CHECK12-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
4464 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4465 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4466 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4467 // CHECK12-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
4468 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4469 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4470 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4471 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[I_ADDR]], i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
4472 // CHECK12-NEXT: ret void
4473 //
4474 //
4475 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
4476 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4477 // CHECK12-NEXT: entry:
4478 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4479 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4480 // CHECK12-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
4481 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
4482 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4483 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4484 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4485 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
4486 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4487 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4488 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
4489 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4490 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4491 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4492 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4493 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4
4494 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4495 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4496 // CHECK12-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
4497 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
4498 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4499 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4500 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
4501 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4
4502 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4503 // CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4504 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4
4505 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
4506 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4507 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
4508 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4509 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4510 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4511 // CHECK12-NEXT: store i32 0, i32* [[I3]], align 4
4512 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4513 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
4514 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4515 // CHECK12: omp.precond.then:
4516 // CHECK12-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i32 16) ]
4517 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4518 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4519 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4
4520 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4521 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4522 // CHECK12-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4523 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
4524 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4525 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4526 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4527 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
4528 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4529 // CHECK12: cond.true:
4530 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4531 // CHECK12-NEXT: br label [[COND_END:%.*]]
4532 // CHECK12: cond.false:
4533 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4534 // CHECK12-NEXT: br label [[COND_END]]
4535 // CHECK12: cond.end:
4536 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
4537 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4538 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4539 // CHECK12-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
4540 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4541 // CHECK12: omp.inner.for.cond:
4542 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4543 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4544 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
4545 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4546 // CHECK12: omp.inner.for.body:
4547 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4548 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4549 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[I4]], i32* [[TMP1]], i32 [[TMP2]], i32* [[TMP3]])
4550 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4551 // CHECK12: omp.inner.for.inc:
4552 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4553 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4554 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
4555 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4556 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
4557 // CHECK12: omp.inner.for.end:
4558 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4559 // CHECK12: omp.loop.exit:
4560 // CHECK12-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4561 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
4562 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
4563 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4564 // CHECK12-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
4565 // CHECK12-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4566 // CHECK12: .omp.final.then:
4567 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4568 // CHECK12-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0
4569 // CHECK12-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
4570 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
4571 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
4572 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4
4573 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
4574 // CHECK12: .omp.final.done:
4575 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
4576 // CHECK12: omp.precond.end:
4577 // CHECK12-NEXT: ret void
4578 //
4579 //
4580 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
4581 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4582 // CHECK12-NEXT: entry:
4583 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4584 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4585 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4586 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4587 // CHECK12-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
4588 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
4589 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
4590 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
4591 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4592 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
4593 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4594 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4595 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4
4596 // CHECK12-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
4597 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4598 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4599 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4600 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4601 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4
4602 // CHECK12-NEXT: [[I5:%.*]] = alloca i32, align 4
4603 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4604 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4605 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4606 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4607 // CHECK12-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
4608 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
4609 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
4610 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
4611 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
4612 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4
4613 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
4614 // CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 4
4615 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4
4616 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
4617 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4618 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
4619 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4620 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4621 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4622 // CHECK12-NEXT: store i32 0, i32* [[I3]], align 4
4623 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4624 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
4625 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4626 // CHECK12: omp.precond.then:
4627 // CHECK12-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i32 16) ]
4628 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP0]], align 4
4629 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4
4630 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4631 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4632 // CHECK12-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
4633 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4634 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4635 // CHECK12-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4
4636 // CHECK12-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4
4637 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4638 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4639 // CHECK12-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4640 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
4641 // CHECK12-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP12]])
4642 // CHECK12-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4643 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
4644 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4645 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4646 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4647 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]]
4648 // CHECK12-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4649 // CHECK12: cond.true:
4650 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4651 // CHECK12-NEXT: br label [[COND_END:%.*]]
4652 // CHECK12: cond.false:
4653 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4654 // CHECK12-NEXT: br label [[COND_END]]
4655 // CHECK12: cond.end:
4656 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
4657 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4658 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4659 // CHECK12-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
4660 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4661 // CHECK12: omp.inner.for.cond:
4662 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4663 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4664 // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
4665 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4666 // CHECK12: omp.inner.for.body:
4667 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4668 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1
4669 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4670 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
4671 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4
4672 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i32 [[TMP23]]
4673 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
4674 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4675 // CHECK12: omp.body.continue:
4676 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4677 // CHECK12: omp.inner.for.inc:
4678 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4679 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], 1
4680 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
4681 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
4682 // CHECK12: omp.inner.for.end:
4683 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4684 // CHECK12: omp.loop.exit:
4685 // CHECK12-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4686 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
4687 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
4688 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4689 // CHECK12-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
4690 // CHECK12-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4691 // CHECK12: .omp.final.then:
4692 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4693 // CHECK12-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP29]], 0
4694 // CHECK12-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
4695 // CHECK12-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
4696 // CHECK12-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
4697 // CHECK12-NEXT: store i32 [[ADD12]], i32* [[TMP0]], align 4
4698 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
4699 // CHECK12: .omp.final.done:
4700 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4701 // CHECK12-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
4702 // CHECK12-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
4703 // CHECK12: .omp.linear.pu:
4704 // CHECK12-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
4705 // CHECK12: .omp.linear.pu.done:
4706 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
4707 // CHECK12: omp.precond.end:
4708 // CHECK12-NEXT: ret void
4709 //
4710 //
4711 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4712 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] {
4713 // CHECK12-NEXT: entry:
4714 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1)
4715 // CHECK12-NEXT: ret void
4716 //
4717 //
4718 // CHECK13-LABEL: define {{[^@]+}}@_Z15teams_local_argv
4719 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
4720 // CHECK13-NEXT: entry:
4721 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4
4722 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
4723 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
4724 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4725 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4726 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4727 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4728 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4729 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4730 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
4731 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4732 // CHECK13-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
4733 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4
4734 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4
4735 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4
4736 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
4737 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
4738 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
4739 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
4740 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
4741 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
4742 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
4743 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
4744 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4745 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
4746 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4747 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4748 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4749 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4750 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4751 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
4752 // CHECK13-NEXT: store i32 0, i32* [[I3]], align 4
4753 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4754 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
4755 // CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
4756 // CHECK13: simd.if.then:
4757 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4758 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
4759 // CHECK13-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[VLA]], i64 16) ]
4760 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4
4761 // CHECK13-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4
4762 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4763 // CHECK13: omp.inner.for.cond:
4764 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4765 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4766 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4767 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4768 // CHECK13: omp.inner.for.body:
4769 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4770 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4771 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4772 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
4773 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I4]], align 4
4774 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
4775 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
4776 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
4777 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4778 // CHECK13: omp.body.continue:
4779 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4780 // CHECK13: omp.inner.for.inc:
4781 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4782 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP13]], 1
4783 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
4784 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
4785 // CHECK13: omp.inner.for.end:
4786 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4787 // CHECK13-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP14]], 0
4788 // CHECK13-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
4789 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
4790 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
4791 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I]], align 4
4792 // CHECK13-NEXT: br label [[SIMD_IF_END]]
4793 // CHECK13: simd.if.end:
4794 // CHECK13-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0
4795 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX12]], align 4
4796 // CHECK13-NEXT: [[TMP16:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
4797 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP16]])
4798 // CHECK13-NEXT: ret i32 [[TMP15]]
4799 //
4800 //
4801 // CHECK14-LABEL: define {{[^@]+}}@_Z15teams_local_argv
4802 // CHECK14-SAME: () #[[ATTR0:[0-9]+]] {
4803 // CHECK14-NEXT: entry:
4804 // CHECK14-NEXT: [[N:%.*]] = alloca i32, align 4
4805 // CHECK14-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
4806 // CHECK14-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
4807 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
4808 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
4809 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4810 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4811 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4812 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4813 // CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4
4814 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4815 // CHECK14-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
4816 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4
4817 // CHECK14-NEXT: [[I5:%.*]] = alloca i32, align 4
4818 // CHECK14-NEXT: store i32 100, i32* [[N]], align 4
4819 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
4820 // CHECK14-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
4821 // CHECK14-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
4822 // CHECK14-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
4823 // CHECK14-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
4824 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
4825 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
4826 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
4827 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4828 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
4829 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4830 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4831 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4832 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4833 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4834 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
4835 // CHECK14-NEXT: store i32 0, i32* [[I3]], align 4
4836 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4837 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
4838 // CHECK14-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
4839 // CHECK14: simd.if.then:
4840 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4841 // CHECK14-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
4842 // CHECK14-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[VLA]], i64 16) ]
4843 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4
4844 // CHECK14-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4
4845 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4846 // CHECK14: omp.inner.for.cond:
4847 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4848 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4849 // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4850 // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4851 // CHECK14: omp.inner.for.body:
4852 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4853 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4854 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4855 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
4856 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I4]], align 4
4857 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
4858 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
4859 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
4860 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4861 // CHECK14: omp.body.continue:
4862 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4863 // CHECK14: omp.inner.for.inc:
4864 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4865 // CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP13]], 1
4866 // CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
4867 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
4868 // CHECK14: omp.inner.for.end:
4869 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4870 // CHECK14-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP14]], 0
4871 // CHECK14-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
4872 // CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
4873 // CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
4874 // CHECK14-NEXT: store i32 [[ADD11]], i32* [[I]], align 4
4875 // CHECK14-NEXT: br label [[SIMD_IF_END]]
4876 // CHECK14: simd.if.end:
4877 // CHECK14-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0
4878 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX12]], align 4
4879 // CHECK14-NEXT: [[TMP16:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
4880 // CHECK14-NEXT: call void @llvm.stackrestore(i8* [[TMP16]])
4881 // CHECK14-NEXT: ret i32 [[TMP15]]
4882 //
4883 //
4884 // CHECK15-LABEL: define {{[^@]+}}@_Z15teams_local_argv
4885 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
4886 // CHECK15-NEXT: entry:
4887 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4
4888 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
4889 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
4890 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
4891 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
4892 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4893 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4894 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4895 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4896 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
4897 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4898 // CHECK15-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
4899 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
4900 // CHECK15-NEXT: [[I5:%.*]] = alloca i32, align 4
4901 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4
4902 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
4903 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
4904 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
4905 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
4906 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
4907 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
4908 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
4909 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4910 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
4911 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4912 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4913 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4914 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4915 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4916 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
4917 // CHECK15-NEXT: store i32 0, i32* [[I3]], align 4
4918 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4919 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
4920 // CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
4921 // CHECK15: simd.if.then:
4922 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4923 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4924 // CHECK15-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[VLA]], i32 16) ]
4925 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4
4926 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4
4927 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4928 // CHECK15: omp.inner.for.cond:
4929 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4930 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4931 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4932 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4933 // CHECK15: omp.inner.for.body:
4934 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4935 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4936 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4937 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
4938 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I4]], align 4
4939 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP11]]
4940 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
4941 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4942 // CHECK15: omp.body.continue:
4943 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4944 // CHECK15: omp.inner.for.inc:
4945 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4946 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1
4947 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
4948 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
4949 // CHECK15: omp.inner.for.end:
4950 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4951 // CHECK15-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP13]], 0
4952 // CHECK15-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
4953 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
4954 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
4955 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I]], align 4
4956 // CHECK15-NEXT: br label [[SIMD_IF_END]]
4957 // CHECK15: simd.if.end:
4958 // CHECK15-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0
4959 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARRAYIDX12]], align 4
4960 // CHECK15-NEXT: [[TMP15:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
4961 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP15]])
4962 // CHECK15-NEXT: ret i32 [[TMP14]]
4963 //
4964 //
4965 // CHECK16-LABEL: define {{[^@]+}}@_Z15teams_local_argv
4966 // CHECK16-SAME: () #[[ATTR0:[0-9]+]] {
4967 // CHECK16-NEXT: entry:
4968 // CHECK16-NEXT: [[N:%.*]] = alloca i32, align 4
4969 // CHECK16-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
4970 // CHECK16-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
4971 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
4972 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
4973 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4974 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4975 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4976 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4977 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4
4978 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4979 // CHECK16-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
4980 // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4
4981 // CHECK16-NEXT: [[I5:%.*]] = alloca i32, align 4
4982 // CHECK16-NEXT: store i32 100, i32* [[N]], align 4
4983 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
4984 // CHECK16-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
4985 // CHECK16-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
4986 // CHECK16-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
4987 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
4988 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
4989 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
4990 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4991 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
4992 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4993 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4994 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4995 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4996 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4997 // CHECK16-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
4998 // CHECK16-NEXT: store i32 0, i32* [[I3]], align 4
4999 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5000 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5001 // CHECK16-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
5002 // CHECK16: simd.if.then:
5003 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5004 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5005 // CHECK16-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[VLA]], i32 16) ]
5006 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4
5007 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4
5008 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5009 // CHECK16: omp.inner.for.cond:
5010 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5011 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5012 // CHECK16-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5013 // CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5014 // CHECK16: omp.inner.for.body:
5015 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5016 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5017 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5018 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
5019 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[I4]], align 4
5020 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP11]]
5021 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
5022 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5023 // CHECK16: omp.body.continue:
5024 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5025 // CHECK16: omp.inner.for.inc:
5026 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5027 // CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1
5028 // CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
5029 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
5030 // CHECK16: omp.inner.for.end:
5031 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5032 // CHECK16-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP13]], 0
5033 // CHECK16-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
5034 // CHECK16-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
5035 // CHECK16-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
5036 // CHECK16-NEXT: store i32 [[ADD11]], i32* [[I]], align 4
5037 // CHECK16-NEXT: br label [[SIMD_IF_END]]
5038 // CHECK16: simd.if.end:
5039 // CHECK16-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0
5040 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARRAYIDX12]], align 4
5041 // CHECK16-NEXT: [[TMP15:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
5042 // CHECK16-NEXT: call void @llvm.stackrestore(i8* [[TMP15]])
5043 // CHECK16-NEXT: ret i32 [[TMP14]]
5044 //
5045 //
5046 // CHECK17-LABEL: define {{[^@]+}}@_Z21teams_template_structv
5047 // CHECK17-SAME: () #[[ATTR0:[0-9]+]] {
5048 // CHECK17-NEXT: entry:
5049 // CHECK17-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
5050 // CHECK17-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
5051 // CHECK17-NEXT: ret i32 [[CALL]]
5052 //
5053 //
5054 // CHECK17-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
5055 // CHECK17-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
5056 // CHECK17-NEXT: entry:
5057 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5058 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
5059 // CHECK17-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
5060 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 8
5061 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 8
5062 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 8
5063 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
5064 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5065 // CHECK17-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5066 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4
5067 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32*
5068 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
5069 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[I_CASTED]], align 8
5070 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
5071 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5072 // CHECK17-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SS**
5073 // CHECK17-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP3]], align 8
5074 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5075 // CHECK17-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to [123 x i32]**
5076 // CHECK17-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP5]], align 8
5077 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5078 // CHECK17-NEXT: store i8* null, i8** [[TMP6]], align 8
5079 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
5080 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
5081 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8
5082 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
5083 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
5084 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8
5085 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
5086 // CHECK17-NEXT: store i8* null, i8** [[TMP11]], align 8
5087 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5088 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5089 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 123)
5090 // CHECK17-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.region_id, i32 2, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5091 // CHECK17-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5092 // CHECK17-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5093 // CHECK17: omp_offload.failed:
5094 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112(%struct.SS* [[THIS1]], i64 [[TMP1]]) #[[ATTR4:[0-9]+]]
5095 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]
5096 // CHECK17: omp_offload.cont:
5097 // CHECK17-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5098 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0
5099 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
5100 // CHECK17-NEXT: ret i32 [[TMP16]]
5101 //
5102 //
5103 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112
5104 // CHECK17-SAME: (%struct.SS* [[THIS:%.*]], i64 [[I:%.*]]) #[[ATTR1:[0-9]+]] {
5105 // CHECK17-NEXT: entry:
5106 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5107 // CHECK17-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
5108 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5109 // CHECK17-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
5110 // CHECK17-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5111 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
5112 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], %struct.SS* [[TMP0]])
5113 // CHECK17-NEXT: ret void
5114 //
5115 //
5116 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined.
5117 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5118 // CHECK17-NEXT: entry:
5119 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5120 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5121 // CHECK17-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
5122 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5123 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5124 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
5125 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5126 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5127 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5128 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5129 // CHECK17-NEXT: [[I1:%.*]] = alloca i32, align 4
5130 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5131 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5132 // CHECK17-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
5133 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5134 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
5135 // CHECK17-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5136 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0
5137 // CHECK17-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 0
5138 // CHECK17-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ]
5139 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5140 // CHECK17-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5141 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5142 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5143 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5144 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5145 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5146 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5147 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 122
5148 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5149 // CHECK17: cond.true:
5150 // CHECK17-NEXT: br label [[COND_END:%.*]]
5151 // CHECK17: cond.false:
5152 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5153 // CHECK17-NEXT: br label [[COND_END]]
5154 // CHECK17: cond.end:
5155 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5156 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5157 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5158 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5159 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5160 // CHECK17: omp.inner.for.cond:
5161 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5162 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5163 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5164 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5165 // CHECK17: omp.inner.for.body:
5166 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5167 // CHECK17-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5168 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5169 // CHECK17-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
5170 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]], i32* [[I1]], %struct.SS* [[TMP1]])
5171 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5172 // CHECK17: omp.inner.for.inc:
5173 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5174 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5175 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
5176 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5177 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
5178 // CHECK17: omp.inner.for.end:
5179 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5180 // CHECK17: omp.loop.exit:
5181 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5182 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5183 // CHECK17-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
5184 // CHECK17-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5185 // CHECK17: .omp.final.then:
5186 // CHECK17-NEXT: store i32 123, i32* [[TMP0]], align 4
5187 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
5188 // CHECK17: .omp.final.done:
5189 // CHECK17-NEXT: ret void
5190 //
5191 //
5192 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1
5193 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5194 // CHECK17-NEXT: entry:
5195 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5196 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5197 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5198 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5199 // CHECK17-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
5200 // CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5201 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5202 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
5203 // CHECK17-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
5204 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5205 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5206 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5207 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5208 // CHECK17-NEXT: [[I2:%.*]] = alloca i32, align 4
5209 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4
5210 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5211 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5212 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5213 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5214 // CHECK17-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
5215 // CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5216 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
5217 // CHECK17-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5218 // CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0
5219 // CHECK17-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 0
5220 // CHECK17-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ]
5221 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
5222 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTLINEAR_START]], align 4
5223 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5224 // CHECK17-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5225 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5226 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP3]] to i32
5227 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5228 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP4]] to i32
5229 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5230 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5231 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5232 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5233 // CHECK17-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5234 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
5235 // CHECK17-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP6]])
5236 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5237 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5238 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 122
5239 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5240 // CHECK17: cond.true:
5241 // CHECK17-NEXT: br label [[COND_END:%.*]]
5242 // CHECK17: cond.false:
5243 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5244 // CHECK17-NEXT: br label [[COND_END]]
5245 // CHECK17: cond.end:
5246 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
5247 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5248 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5249 // CHECK17-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
5250 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5251 // CHECK17: omp.inner.for.cond:
5252 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5253 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5254 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
5255 // CHECK17-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5256 // CHECK17: omp.inner.for.body:
5257 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5258 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
5259 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5260 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I2]], align 4
5261 // CHECK17-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP1]], i32 0, i32 0
5262 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[I2]], align 4
5263 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
5264 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A5]], i64 0, i64 [[IDXPROM]]
5265 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
5266 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5267 // CHECK17: omp.body.continue:
5268 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5269 // CHECK17: omp.inner.for.inc:
5270 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5271 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1
5272 // CHECK17-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
5273 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
5274 // CHECK17: omp.inner.for.end:
5275 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5276 // CHECK17: omp.loop.exit:
5277 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]])
5278 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5279 // CHECK17-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
5280 // CHECK17-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5281 // CHECK17: .omp.final.then:
5282 // CHECK17-NEXT: store i32 123, i32* [[TMP0]], align 4
5283 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
5284 // CHECK17: .omp.final.done:
5285 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5286 // CHECK17-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
5287 // CHECK17-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
5288 // CHECK17: .omp.linear.pu:
5289 // CHECK17-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
5290 // CHECK17: .omp.linear.pu.done:
5291 // CHECK17-NEXT: ret void
5292 //
5293 //
5294 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5295 // CHECK17-SAME: () #[[ATTR5:[0-9]+]] {
5296 // CHECK17-NEXT: entry:
5297 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1)
5298 // CHECK17-NEXT: ret void
5299 //
5300 //
5301 // CHECK18-LABEL: define {{[^@]+}}@_Z21teams_template_structv
5302 // CHECK18-SAME: () #[[ATTR0:[0-9]+]] {
5303 // CHECK18-NEXT: entry:
5304 // CHECK18-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
5305 // CHECK18-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
5306 // CHECK18-NEXT: ret i32 [[CALL]]
5307 //
5308 //
5309 // CHECK18-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
5310 // CHECK18-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
5311 // CHECK18-NEXT: entry:
5312 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5313 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
5314 // CHECK18-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
5315 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 8
5316 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 8
5317 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 8
5318 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
5319 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5320 // CHECK18-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5321 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4
5322 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32*
5323 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
5324 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[I_CASTED]], align 8
5325 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
5326 // CHECK18-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5327 // CHECK18-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SS**
5328 // CHECK18-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP3]], align 8
5329 // CHECK18-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5330 // CHECK18-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to [123 x i32]**
5331 // CHECK18-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP5]], align 8
5332 // CHECK18-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5333 // CHECK18-NEXT: store i8* null, i8** [[TMP6]], align 8
5334 // CHECK18-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
5335 // CHECK18-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
5336 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8
5337 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
5338 // CHECK18-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
5339 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8
5340 // CHECK18-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
5341 // CHECK18-NEXT: store i8* null, i8** [[TMP11]], align 8
5342 // CHECK18-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5343 // CHECK18-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5344 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 123)
5345 // CHECK18-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.region_id, i32 2, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5346 // CHECK18-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5347 // CHECK18-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5348 // CHECK18: omp_offload.failed:
5349 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112(%struct.SS* [[THIS1]], i64 [[TMP1]]) #[[ATTR4:[0-9]+]]
5350 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]]
5351 // CHECK18: omp_offload.cont:
5352 // CHECK18-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5353 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0
5354 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
5355 // CHECK18-NEXT: ret i32 [[TMP16]]
5356 //
5357 //
5358 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112
5359 // CHECK18-SAME: (%struct.SS* [[THIS:%.*]], i64 [[I:%.*]]) #[[ATTR1:[0-9]+]] {
5360 // CHECK18-NEXT: entry:
5361 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5362 // CHECK18-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
5363 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5364 // CHECK18-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
5365 // CHECK18-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5366 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
5367 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], %struct.SS* [[TMP0]])
5368 // CHECK18-NEXT: ret void
5369 //
5370 //
5371 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined.
5372 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5373 // CHECK18-NEXT: entry:
5374 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5375 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5376 // CHECK18-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
5377 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5378 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5379 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
5380 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5381 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5382 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5383 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5384 // CHECK18-NEXT: [[I1:%.*]] = alloca i32, align 4
5385 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5386 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5387 // CHECK18-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
5388 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5389 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
5390 // CHECK18-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5391 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0
5392 // CHECK18-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 0
5393 // CHECK18-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ]
5394 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5395 // CHECK18-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5396 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5397 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5398 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5399 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5400 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5401 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5402 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 122
5403 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5404 // CHECK18: cond.true:
5405 // CHECK18-NEXT: br label [[COND_END:%.*]]
5406 // CHECK18: cond.false:
5407 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5408 // CHECK18-NEXT: br label [[COND_END]]
5409 // CHECK18: cond.end:
5410 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5411 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5412 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5413 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5414 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5415 // CHECK18: omp.inner.for.cond:
5416 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5417 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5418 // CHECK18-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5419 // CHECK18-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5420 // CHECK18: omp.inner.for.body:
5421 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5422 // CHECK18-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5423 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5424 // CHECK18-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
5425 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP10]], i64 [[TMP12]], i32* [[I1]], %struct.SS* [[TMP1]])
5426 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5427 // CHECK18: omp.inner.for.inc:
5428 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5429 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5430 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
5431 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5432 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
5433 // CHECK18: omp.inner.for.end:
5434 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5435 // CHECK18: omp.loop.exit:
5436 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5437 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5438 // CHECK18-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
5439 // CHECK18-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5440 // CHECK18: .omp.final.then:
5441 // CHECK18-NEXT: store i32 123, i32* [[TMP0]], align 4
5442 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
5443 // CHECK18: .omp.final.done:
5444 // CHECK18-NEXT: ret void
5445 //
5446 //
5447 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..1
5448 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5449 // CHECK18-NEXT: entry:
5450 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5451 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5452 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5453 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5454 // CHECK18-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
5455 // CHECK18-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5456 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5457 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
5458 // CHECK18-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
5459 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5460 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5461 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5462 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5463 // CHECK18-NEXT: [[I2:%.*]] = alloca i32, align 4
5464 // CHECK18-NEXT: [[I3:%.*]] = alloca i32, align 4
5465 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5466 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5467 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5468 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5469 // CHECK18-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
5470 // CHECK18-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5471 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
5472 // CHECK18-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5473 // CHECK18-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0
5474 // CHECK18-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 0
5475 // CHECK18-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ]
5476 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
5477 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTLINEAR_START]], align 4
5478 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5479 // CHECK18-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5480 // CHECK18-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5481 // CHECK18-NEXT: [[CONV:%.*]] = trunc i64 [[TMP3]] to i32
5482 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5483 // CHECK18-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP4]] to i32
5484 // CHECK18-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5485 // CHECK18-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5486 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5487 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5488 // CHECK18-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5489 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
5490 // CHECK18-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP6]])
5491 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5492 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5493 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 122
5494 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5495 // CHECK18: cond.true:
5496 // CHECK18-NEXT: br label [[COND_END:%.*]]
5497 // CHECK18: cond.false:
5498 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5499 // CHECK18-NEXT: br label [[COND_END]]
5500 // CHECK18: cond.end:
5501 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
5502 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5503 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5504 // CHECK18-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
5505 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5506 // CHECK18: omp.inner.for.cond:
5507 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5508 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5509 // CHECK18-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
5510 // CHECK18-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5511 // CHECK18: omp.inner.for.body:
5512 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5513 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
5514 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5515 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I2]], align 4
5516 // CHECK18-NEXT: [[A5:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP1]], i32 0, i32 0
5517 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[I2]], align 4
5518 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
5519 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A5]], i64 0, i64 [[IDXPROM]]
5520 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
5521 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5522 // CHECK18: omp.body.continue:
5523 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5524 // CHECK18: omp.inner.for.inc:
5525 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5526 // CHECK18-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1
5527 // CHECK18-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
5528 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
5529 // CHECK18: omp.inner.for.end:
5530 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5531 // CHECK18: omp.loop.exit:
5532 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]])
5533 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5534 // CHECK18-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
5535 // CHECK18-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5536 // CHECK18: .omp.final.then:
5537 // CHECK18-NEXT: store i32 123, i32* [[TMP0]], align 4
5538 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
5539 // CHECK18: .omp.final.done:
5540 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5541 // CHECK18-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
5542 // CHECK18-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
5543 // CHECK18: .omp.linear.pu:
5544 // CHECK18-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
5545 // CHECK18: .omp.linear.pu.done:
5546 // CHECK18-NEXT: ret void
5547 //
5548 //
5549 // CHECK18-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5550 // CHECK18-SAME: () #[[ATTR5:[0-9]+]] {
5551 // CHECK18-NEXT: entry:
5552 // CHECK18-NEXT: call void @__tgt_register_requires(i64 1)
5553 // CHECK18-NEXT: ret void
5554 //
5555 //
5556 // CHECK19-LABEL: define {{[^@]+}}@_Z21teams_template_structv
5557 // CHECK19-SAME: () #[[ATTR0:[0-9]+]] {
5558 // CHECK19-NEXT: entry:
5559 // CHECK19-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
5560 // CHECK19-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
5561 // CHECK19-NEXT: ret i32 [[CALL]]
5562 //
5563 //
5564 // CHECK19-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
5565 // CHECK19-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
5566 // CHECK19-NEXT: entry:
5567 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5568 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
5569 // CHECK19-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
5570 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 4
5571 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 4
5572 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 4
5573 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
5574 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5575 // CHECK19-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5576 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4
5577 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[I_CASTED]], align 4
5578 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[I_CASTED]], align 4
5579 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
5580 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5581 // CHECK19-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SS**
5582 // CHECK19-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP3]], align 4
5583 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5584 // CHECK19-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to [123 x i32]**
5585 // CHECK19-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP5]], align 4
5586 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5587 // CHECK19-NEXT: store i8* null, i8** [[TMP6]], align 4
5588 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
5589 // CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
5590 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4
5591 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
5592 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
5593 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4
5594 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
5595 // CHECK19-NEXT: store i8* null, i8** [[TMP11]], align 4
5596 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5597 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5598 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 123)
5599 // CHECK19-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.region_id, i32 2, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5600 // CHECK19-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5601 // CHECK19-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5602 // CHECK19: omp_offload.failed:
5603 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112(%struct.SS* [[THIS1]], i32 [[TMP1]]) #[[ATTR4:[0-9]+]]
5604 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]
5605 // CHECK19: omp_offload.cont:
5606 // CHECK19-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5607 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0
5608 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
5609 // CHECK19-NEXT: ret i32 [[TMP16]]
5610 //
5611 //
5612 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112
5613 // CHECK19-SAME: (%struct.SS* [[THIS:%.*]], i32 [[I:%.*]]) #[[ATTR1:[0-9]+]] {
5614 // CHECK19-NEXT: entry:
5615 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5616 // CHECK19-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
5617 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5618 // CHECK19-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
5619 // CHECK19-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5620 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[I_ADDR]], %struct.SS* [[TMP0]])
5621 // CHECK19-NEXT: ret void
5622 //
5623 //
5624 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined.
5625 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5626 // CHECK19-NEXT: entry:
5627 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5628 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5629 // CHECK19-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
5630 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5631 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5632 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
5633 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5634 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5635 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5636 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5637 // CHECK19-NEXT: [[I1:%.*]] = alloca i32, align 4
5638 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5639 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5640 // CHECK19-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
5641 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5642 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
5643 // CHECK19-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5644 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0
5645 // CHECK19-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 0
5646 // CHECK19-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ]
5647 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5648 // CHECK19-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5649 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5650 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5651 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5652 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5653 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5654 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5655 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 122
5656 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5657 // CHECK19: cond.true:
5658 // CHECK19-NEXT: br label [[COND_END:%.*]]
5659 // CHECK19: cond.false:
5660 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5661 // CHECK19-NEXT: br label [[COND_END]]
5662 // CHECK19: cond.end:
5663 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5664 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5665 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5666 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5667 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5668 // CHECK19: omp.inner.for.cond:
5669 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5670 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5671 // CHECK19-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5672 // CHECK19-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5673 // CHECK19: omp.inner.for.body:
5674 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5675 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5676 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP9]], i32 [[TMP10]], i32* [[I1]], %struct.SS* [[TMP1]])
5677 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5678 // CHECK19: omp.inner.for.inc:
5679 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5680 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5681 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5682 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5683 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
5684 // CHECK19: omp.inner.for.end:
5685 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5686 // CHECK19: omp.loop.exit:
5687 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5688 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5689 // CHECK19-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5690 // CHECK19-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5691 // CHECK19: .omp.final.then:
5692 // CHECK19-NEXT: store i32 123, i32* [[TMP0]], align 4
5693 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
5694 // CHECK19: .omp.final.done:
5695 // CHECK19-NEXT: ret void
5696 //
5697 //
5698 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1
5699 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5700 // CHECK19-NEXT: entry:
5701 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5702 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5703 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5704 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5705 // CHECK19-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
5706 // CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5707 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5708 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
5709 // CHECK19-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
5710 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5711 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5712 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5713 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5714 // CHECK19-NEXT: [[I1:%.*]] = alloca i32, align 4
5715 // CHECK19-NEXT: [[I2:%.*]] = alloca i32, align 4
5716 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5717 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5718 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5719 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5720 // CHECK19-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
5721 // CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5722 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
5723 // CHECK19-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5724 // CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0
5725 // CHECK19-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 0
5726 // CHECK19-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ]
5727 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
5728 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTLINEAR_START]], align 4
5729 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5730 // CHECK19-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5731 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5732 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5733 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4
5734 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
5735 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5736 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5737 // CHECK19-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5738 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
5739 // CHECK19-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP6]])
5740 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5741 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5742 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 122
5743 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5744 // CHECK19: cond.true:
5745 // CHECK19-NEXT: br label [[COND_END:%.*]]
5746 // CHECK19: cond.false:
5747 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5748 // CHECK19-NEXT: br label [[COND_END]]
5749 // CHECK19: cond.end:
5750 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
5751 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5752 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5753 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
5754 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5755 // CHECK19: omp.inner.for.cond:
5756 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5757 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5758 // CHECK19-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
5759 // CHECK19-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5760 // CHECK19: omp.inner.for.body:
5761 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5762 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
5763 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5764 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I1]], align 4
5765 // CHECK19-NEXT: [[A4:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP1]], i32 0, i32 0
5766 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[I1]], align 4
5767 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A4]], i32 0, i32 [[TMP13]]
5768 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
5769 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5770 // CHECK19: omp.body.continue:
5771 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5772 // CHECK19: omp.inner.for.inc:
5773 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5774 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1
5775 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
5776 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
5777 // CHECK19: omp.inner.for.end:
5778 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5779 // CHECK19: omp.loop.exit:
5780 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]])
5781 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5782 // CHECK19-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
5783 // CHECK19-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5784 // CHECK19: .omp.final.then:
5785 // CHECK19-NEXT: store i32 123, i32* [[TMP0]], align 4
5786 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
5787 // CHECK19: .omp.final.done:
5788 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5789 // CHECK19-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
5790 // CHECK19-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
5791 // CHECK19: .omp.linear.pu:
5792 // CHECK19-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
5793 // CHECK19: .omp.linear.pu.done:
5794 // CHECK19-NEXT: ret void
5795 //
5796 //
5797 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5798 // CHECK19-SAME: () #[[ATTR5:[0-9]+]] {
5799 // CHECK19-NEXT: entry:
5800 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1)
5801 // CHECK19-NEXT: ret void
5802 //
5803 //
5804 // CHECK20-LABEL: define {{[^@]+}}@_Z21teams_template_structv
5805 // CHECK20-SAME: () #[[ATTR0:[0-9]+]] {
5806 // CHECK20-NEXT: entry:
5807 // CHECK20-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
5808 // CHECK20-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
5809 // CHECK20-NEXT: ret i32 [[CALL]]
5810 //
5811 //
5812 // CHECK20-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
5813 // CHECK20-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
5814 // CHECK20-NEXT: entry:
5815 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5816 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
5817 // CHECK20-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
5818 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 4
5819 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 4
5820 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 4
5821 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
5822 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5823 // CHECK20-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5824 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4
5825 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[I_CASTED]], align 4
5826 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[I_CASTED]], align 4
5827 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
5828 // CHECK20-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5829 // CHECK20-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SS**
5830 // CHECK20-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP3]], align 4
5831 // CHECK20-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5832 // CHECK20-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to [123 x i32]**
5833 // CHECK20-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP5]], align 4
5834 // CHECK20-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5835 // CHECK20-NEXT: store i8* null, i8** [[TMP6]], align 4
5836 // CHECK20-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
5837 // CHECK20-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
5838 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4
5839 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
5840 // CHECK20-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
5841 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4
5842 // CHECK20-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
5843 // CHECK20-NEXT: store i8* null, i8** [[TMP11]], align 4
5844 // CHECK20-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5845 // CHECK20-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5846 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 123)
5847 // CHECK20-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112.region_id, i32 2, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5848 // CHECK20-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5849 // CHECK20-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5850 // CHECK20: omp_offload.failed:
5851 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112(%struct.SS* [[THIS1]], i32 [[TMP1]]) #[[ATTR4:[0-9]+]]
5852 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]]
5853 // CHECK20: omp_offload.cont:
5854 // CHECK20-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5855 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0
5856 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
5857 // CHECK20-NEXT: ret i32 [[TMP16]]
5858 //
5859 //
5860 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l112
5861 // CHECK20-SAME: (%struct.SS* [[THIS:%.*]], i32 [[I:%.*]]) #[[ATTR1:[0-9]+]] {
5862 // CHECK20-NEXT: entry:
5863 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5864 // CHECK20-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
5865 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5866 // CHECK20-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
5867 // CHECK20-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5868 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[I_ADDR]], %struct.SS* [[TMP0]])
5869 // CHECK20-NEXT: ret void
5870 //
5871 //
5872 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined.
5873 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5874 // CHECK20-NEXT: entry:
5875 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5876 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5877 // CHECK20-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
5878 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5879 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5880 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
5881 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5882 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5883 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5884 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5885 // CHECK20-NEXT: [[I1:%.*]] = alloca i32, align 4
5886 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5887 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5888 // CHECK20-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
5889 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5890 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
5891 // CHECK20-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5892 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0
5893 // CHECK20-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 0
5894 // CHECK20-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ]
5895 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5896 // CHECK20-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5897 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5898 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5899 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5900 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5901 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5902 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5903 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 122
5904 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5905 // CHECK20: cond.true:
5906 // CHECK20-NEXT: br label [[COND_END:%.*]]
5907 // CHECK20: cond.false:
5908 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5909 // CHECK20-NEXT: br label [[COND_END]]
5910 // CHECK20: cond.end:
5911 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5912 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5913 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5914 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5915 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5916 // CHECK20: omp.inner.for.cond:
5917 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5918 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5919 // CHECK20-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5920 // CHECK20-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5921 // CHECK20: omp.inner.for.body:
5922 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5923 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5924 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP9]], i32 [[TMP10]], i32* [[I1]], %struct.SS* [[TMP1]])
5925 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5926 // CHECK20: omp.inner.for.inc:
5927 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5928 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5929 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5930 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5931 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
5932 // CHECK20: omp.inner.for.end:
5933 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5934 // CHECK20: omp.loop.exit:
5935 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5936 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5937 // CHECK20-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5938 // CHECK20-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5939 // CHECK20: .omp.final.then:
5940 // CHECK20-NEXT: store i32 123, i32* [[TMP0]], align 4
5941 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
5942 // CHECK20: .omp.final.done:
5943 // CHECK20-NEXT: ret void
5944 //
5945 //
5946 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..1
5947 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5948 // CHECK20-NEXT: entry:
5949 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5950 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5951 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5952 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5953 // CHECK20-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
5954 // CHECK20-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5955 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5956 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
5957 // CHECK20-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
5958 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5959 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5960 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5961 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5962 // CHECK20-NEXT: [[I1:%.*]] = alloca i32, align 4
5963 // CHECK20-NEXT: [[I2:%.*]] = alloca i32, align 4
5964 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5965 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5966 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5967 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5968 // CHECK20-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
5969 // CHECK20-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5970 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
5971 // CHECK20-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5972 // CHECK20-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0
5973 // CHECK20-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 0
5974 // CHECK20-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ]
5975 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
5976 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTLINEAR_START]], align 4
5977 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5978 // CHECK20-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5979 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5980 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5981 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4
5982 // CHECK20-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
5983 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5984 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5985 // CHECK20-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5986 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
5987 // CHECK20-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP6]])
5988 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5989 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5990 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 122
5991 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5992 // CHECK20: cond.true:
5993 // CHECK20-NEXT: br label [[COND_END:%.*]]
5994 // CHECK20: cond.false:
5995 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5996 // CHECK20-NEXT: br label [[COND_END]]
5997 // CHECK20: cond.end:
5998 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
5999 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6000 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6001 // CHECK20-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
6002 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6003 // CHECK20: omp.inner.for.cond:
6004 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6005 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6006 // CHECK20-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
6007 // CHECK20-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6008 // CHECK20: omp.inner.for.body:
6009 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6010 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
6011 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6012 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I1]], align 4
6013 // CHECK20-NEXT: [[A4:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP1]], i32 0, i32 0
6014 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[I1]], align 4
6015 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A4]], i32 0, i32 [[TMP13]]
6016 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
6017 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6018 // CHECK20: omp.body.continue:
6019 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6020 // CHECK20: omp.inner.for.inc:
6021 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6022 // CHECK20-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1
6023 // CHECK20-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
6024 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
6025 // CHECK20: omp.inner.for.end:
6026 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6027 // CHECK20: omp.loop.exit:
6028 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]])
6029 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6030 // CHECK20-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
6031 // CHECK20-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6032 // CHECK20: .omp.final.then:
6033 // CHECK20-NEXT: store i32 123, i32* [[TMP0]], align 4
6034 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
6035 // CHECK20: .omp.final.done:
6036 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6037 // CHECK20-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
6038 // CHECK20-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
6039 // CHECK20: .omp.linear.pu:
6040 // CHECK20-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
6041 // CHECK20: .omp.linear.pu.done:
6042 // CHECK20-NEXT: ret void
6043 //
6044 //
6045 // CHECK20-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6046 // CHECK20-SAME: () #[[ATTR5:[0-9]+]] {
6047 // CHECK20-NEXT: entry:
6048 // CHECK20-NEXT: call void @__tgt_register_requires(i64 1)
6049 // CHECK20-NEXT: ret void
6050 //
6051 //
6052 // CHECK21-LABEL: define {{[^@]+}}@_Z21teams_template_structv
6053 // CHECK21-SAME: () #[[ATTR0:[0-9]+]] {
6054 // CHECK21-NEXT: entry:
6055 // CHECK21-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
6056 // CHECK21-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
6057 // CHECK21-NEXT: ret i32 [[CALL]]
6058 //
6059 //
6060 // CHECK21-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
6061 // CHECK21-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
6062 // CHECK21-NEXT: entry:
6063 // CHECK21-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
6064 // CHECK21-NEXT: [[I:%.*]] = alloca i32, align 4
6065 // CHECK21-NEXT: [[TMP:%.*]] = alloca i32, align 4
6066 // CHECK21-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6067 // CHECK21-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6068 // CHECK21-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6069 // CHECK21-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
6070 // CHECK21-NEXT: [[I2:%.*]] = alloca i32, align 4
6071 // CHECK21-NEXT: [[I3:%.*]] = alloca i32, align 4
6072 // CHECK21-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
6073 // CHECK21-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
6074 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6075 // CHECK21-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
6076 // CHECK21-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6077 // CHECK21-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
6078 // CHECK21-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
6079 // CHECK21-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 0
6080 // CHECK21-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ]
6081 // CHECK21-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4
6082 // CHECK21-NEXT: store i32 [[TMP1]], i32* [[DOTLINEAR_START]], align 4
6083 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6084 // CHECK21: omp.inner.for.cond:
6085 // CHECK21-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6086 // CHECK21-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6087 // CHECK21-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
6088 // CHECK21-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6089 // CHECK21: omp.inner.for.body:
6090 // CHECK21-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6091 // CHECK21-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
6092 // CHECK21-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6093 // CHECK21-NEXT: store i32 [[ADD]], i32* [[I2]], align 4
6094 // CHECK21-NEXT: [[A4:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6095 // CHECK21-NEXT: [[TMP5:%.*]] = load i32, i32* [[I2]], align 4
6096 // CHECK21-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64
6097 // CHECK21-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A4]], i64 0, i64 [[IDXPROM]]
6098 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
6099 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6100 // CHECK21: omp.body.continue:
6101 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6102 // CHECK21: omp.inner.for.inc:
6103 // CHECK21-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6104 // CHECK21-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP6]], 1
6105 // CHECK21-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
6106 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
6107 // CHECK21: omp.inner.for.end:
6108 // CHECK21-NEXT: store i32 123, i32* [[I]], align 4
6109 // CHECK21-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6110 // CHECK21-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A6]], i64 0, i64 0
6111 // CHECK21-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4
6112 // CHECK21-NEXT: ret i32 [[TMP7]]
6113 //
6114 //
6115 // CHECK22-LABEL: define {{[^@]+}}@_Z21teams_template_structv
6116 // CHECK22-SAME: () #[[ATTR0:[0-9]+]] {
6117 // CHECK22-NEXT: entry:
6118 // CHECK22-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
6119 // CHECK22-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
6120 // CHECK22-NEXT: ret i32 [[CALL]]
6121 //
6122 //
6123 // CHECK22-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
6124 // CHECK22-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
6125 // CHECK22-NEXT: entry:
6126 // CHECK22-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
6127 // CHECK22-NEXT: [[I:%.*]] = alloca i32, align 4
6128 // CHECK22-NEXT: [[TMP:%.*]] = alloca i32, align 4
6129 // CHECK22-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6130 // CHECK22-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6131 // CHECK22-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6132 // CHECK22-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
6133 // CHECK22-NEXT: [[I2:%.*]] = alloca i32, align 4
6134 // CHECK22-NEXT: [[I3:%.*]] = alloca i32, align 4
6135 // CHECK22-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
6136 // CHECK22-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
6137 // CHECK22-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6138 // CHECK22-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
6139 // CHECK22-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6140 // CHECK22-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
6141 // CHECK22-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
6142 // CHECK22-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 0
6143 // CHECK22-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 16) ]
6144 // CHECK22-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4
6145 // CHECK22-NEXT: store i32 [[TMP1]], i32* [[DOTLINEAR_START]], align 4
6146 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6147 // CHECK22: omp.inner.for.cond:
6148 // CHECK22-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6149 // CHECK22-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6150 // CHECK22-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
6151 // CHECK22-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6152 // CHECK22: omp.inner.for.body:
6153 // CHECK22-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6154 // CHECK22-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
6155 // CHECK22-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6156 // CHECK22-NEXT: store i32 [[ADD]], i32* [[I2]], align 4
6157 // CHECK22-NEXT: [[A4:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6158 // CHECK22-NEXT: [[TMP5:%.*]] = load i32, i32* [[I2]], align 4
6159 // CHECK22-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64
6160 // CHECK22-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A4]], i64 0, i64 [[IDXPROM]]
6161 // CHECK22-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
6162 // CHECK22-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6163 // CHECK22: omp.body.continue:
6164 // CHECK22-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6165 // CHECK22: omp.inner.for.inc:
6166 // CHECK22-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6167 // CHECK22-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP6]], 1
6168 // CHECK22-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
6169 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
6170 // CHECK22: omp.inner.for.end:
6171 // CHECK22-NEXT: store i32 123, i32* [[I]], align 4
6172 // CHECK22-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6173 // CHECK22-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A6]], i64 0, i64 0
6174 // CHECK22-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4
6175 // CHECK22-NEXT: ret i32 [[TMP7]]
6176 //
6177 //
6178 // CHECK23-LABEL: define {{[^@]+}}@_Z21teams_template_structv
6179 // CHECK23-SAME: () #[[ATTR0:[0-9]+]] {
6180 // CHECK23-NEXT: entry:
6181 // CHECK23-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
6182 // CHECK23-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
6183 // CHECK23-NEXT: ret i32 [[CALL]]
6184 //
6185 //
6186 // CHECK23-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
6187 // CHECK23-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
6188 // CHECK23-NEXT: entry:
6189 // CHECK23-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6190 // CHECK23-NEXT: [[I:%.*]] = alloca i32, align 4
6191 // CHECK23-NEXT: [[TMP:%.*]] = alloca i32, align 4
6192 // CHECK23-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6193 // CHECK23-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6194 // CHECK23-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6195 // CHECK23-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
6196 // CHECK23-NEXT: [[I2:%.*]] = alloca i32, align 4
6197 // CHECK23-NEXT: [[I3:%.*]] = alloca i32, align 4
6198 // CHECK23-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6199 // CHECK23-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6200 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6201 // CHECK23-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
6202 // CHECK23-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6203 // CHECK23-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
6204 // CHECK23-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
6205 // CHECK23-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 0
6206 // CHECK23-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ]
6207 // CHECK23-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4
6208 // CHECK23-NEXT: store i32 [[TMP1]], i32* [[DOTLINEAR_START]], align 4
6209 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6210 // CHECK23: omp.inner.for.cond:
6211 // CHECK23-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6212 // CHECK23-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6213 // CHECK23-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
6214 // CHECK23-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6215 // CHECK23: omp.inner.for.body:
6216 // CHECK23-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6217 // CHECK23-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
6218 // CHECK23-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6219 // CHECK23-NEXT: store i32 [[ADD]], i32* [[I2]], align 4
6220 // CHECK23-NEXT: [[A4:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6221 // CHECK23-NEXT: [[TMP5:%.*]] = load i32, i32* [[I2]], align 4
6222 // CHECK23-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A4]], i32 0, i32 [[TMP5]]
6223 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
6224 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6225 // CHECK23: omp.body.continue:
6226 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6227 // CHECK23: omp.inner.for.inc:
6228 // CHECK23-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6229 // CHECK23-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP6]], 1
6230 // CHECK23-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
6231 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
6232 // CHECK23: omp.inner.for.end:
6233 // CHECK23-NEXT: store i32 123, i32* [[I]], align 4
6234 // CHECK23-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6235 // CHECK23-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A6]], i32 0, i32 0
6236 // CHECK23-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4
6237 // CHECK23-NEXT: ret i32 [[TMP7]]
6238 //
6239 //
6240 // CHECK24-LABEL: define {{[^@]+}}@_Z21teams_template_structv
6241 // CHECK24-SAME: () #[[ATTR0:[0-9]+]] {
6242 // CHECK24-NEXT: entry:
6243 // CHECK24-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
6244 // CHECK24-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
6245 // CHECK24-NEXT: ret i32 [[CALL]]
6246 //
6247 //
6248 // CHECK24-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
6249 // CHECK24-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
6250 // CHECK24-NEXT: entry:
6251 // CHECK24-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6252 // CHECK24-NEXT: [[I:%.*]] = alloca i32, align 4
6253 // CHECK24-NEXT: [[TMP:%.*]] = alloca i32, align 4
6254 // CHECK24-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6255 // CHECK24-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6256 // CHECK24-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6257 // CHECK24-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
6258 // CHECK24-NEXT: [[I2:%.*]] = alloca i32, align 4
6259 // CHECK24-NEXT: [[I3:%.*]] = alloca i32, align 4
6260 // CHECK24-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6261 // CHECK24-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6262 // CHECK24-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6263 // CHECK24-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
6264 // CHECK24-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6265 // CHECK24-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
6266 // CHECK24-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
6267 // CHECK24-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 0
6268 // CHECK24-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 16) ]
6269 // CHECK24-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4
6270 // CHECK24-NEXT: store i32 [[TMP1]], i32* [[DOTLINEAR_START]], align 4
6271 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6272 // CHECK24: omp.inner.for.cond:
6273 // CHECK24-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6274 // CHECK24-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6275 // CHECK24-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
6276 // CHECK24-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6277 // CHECK24: omp.inner.for.body:
6278 // CHECK24-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6279 // CHECK24-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
6280 // CHECK24-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6281 // CHECK24-NEXT: store i32 [[ADD]], i32* [[I2]], align 4
6282 // CHECK24-NEXT: [[A4:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6283 // CHECK24-NEXT: [[TMP5:%.*]] = load i32, i32* [[I2]], align 4
6284 // CHECK24-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A4]], i32 0, i32 [[TMP5]]
6285 // CHECK24-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
6286 // CHECK24-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6287 // CHECK24: omp.body.continue:
6288 // CHECK24-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6289 // CHECK24: omp.inner.for.inc:
6290 // CHECK24-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6291 // CHECK24-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP6]], 1
6292 // CHECK24-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
6293 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
6294 // CHECK24: omp.inner.for.end:
6295 // CHECK24-NEXT: store i32 123, i32* [[I]], align 4
6296 // CHECK24-NEXT: [[A6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6297 // CHECK24-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A6]], i32 0, i32 0
6298 // CHECK24-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX7]], align 4
6299 // CHECK24-NEXT: ret i32 [[TMP7]]
6300 //
6301 //
6302 // CHECK25-LABEL: define {{[^@]+}}@main
6303 // CHECK25-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
6304 // CHECK25-NEXT: entry:
6305 // CHECK25-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
6306 // CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6307 // CHECK25-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
6308 // CHECK25-NEXT: [[N:%.*]] = alloca i32, align 4
6309 // CHECK25-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
6310 // CHECK25-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
6311 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4
6312 // CHECK25-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
6313 // CHECK25-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
6314 // CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
6315 // CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
6316 // CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
6317 // CHECK25-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 8
6318 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4
6319 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6320 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
6321 // CHECK25-NEXT: store i32 0, i32* [[RETVAL]], align 4
6322 // CHECK25-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6323 // CHECK25-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
6324 // CHECK25-NEXT: store i32 100, i32* [[N]], align 4
6325 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
6326 // CHECK25-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
6327 // CHECK25-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
6328 // CHECK25-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
6329 // CHECK25-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
6330 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
6331 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4
6332 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32*
6333 // CHECK25-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
6334 // CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[I_CASTED]], align 8
6335 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4
6336 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
6337 // CHECK25-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
6338 // CHECK25-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8
6339 // CHECK25-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP1]], 4
6340 // CHECK25-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6341 // CHECK25-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
6342 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP9]], align 8
6343 // CHECK25-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6344 // CHECK25-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64*
6345 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP11]], align 8
6346 // CHECK25-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
6347 // CHECK25-NEXT: store i64 8, i64* [[TMP12]], align 8
6348 // CHECK25-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6349 // CHECK25-NEXT: store i8* null, i8** [[TMP13]], align 8
6350 // CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
6351 // CHECK25-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32**
6352 // CHECK25-NEXT: store i32* [[VLA]], i32** [[TMP15]], align 8
6353 // CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
6354 // CHECK25-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32**
6355 // CHECK25-NEXT: store i32* [[VLA]], i32** [[TMP17]], align 8
6356 // CHECK25-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
6357 // CHECK25-NEXT: store i64 [[TMP7]], i64* [[TMP18]], align 8
6358 // CHECK25-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
6359 // CHECK25-NEXT: store i8* null, i8** [[TMP19]], align 8
6360 // CHECK25-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
6361 // CHECK25-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
6362 // CHECK25-NEXT: store i64 [[TMP4]], i64* [[TMP21]], align 8
6363 // CHECK25-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
6364 // CHECK25-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
6365 // CHECK25-NEXT: store i64 [[TMP4]], i64* [[TMP23]], align 8
6366 // CHECK25-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
6367 // CHECK25-NEXT: store i64 4, i64* [[TMP24]], align 8
6368 // CHECK25-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
6369 // CHECK25-NEXT: store i8* null, i8** [[TMP25]], align 8
6370 // CHECK25-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
6371 // CHECK25-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
6372 // CHECK25-NEXT: store i64 [[TMP6]], i64* [[TMP27]], align 8
6373 // CHECK25-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
6374 // CHECK25-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
6375 // CHECK25-NEXT: store i64 [[TMP6]], i64* [[TMP29]], align 8
6376 // CHECK25-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
6377 // CHECK25-NEXT: store i64 4, i64* [[TMP30]], align 8
6378 // CHECK25-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
6379 // CHECK25-NEXT: store i8* null, i8** [[TMP31]], align 8
6380 // CHECK25-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6381 // CHECK25-NEXT: [[TMP33:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6382 // CHECK25-NEXT: [[TMP34:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
6383 // CHECK25-NEXT: [[TMP35:%.*]] = load i32, i32* [[N]], align 4
6384 // CHECK25-NEXT: store i32 [[TMP35]], i32* [[DOTCAPTURE_EXPR_]], align 4
6385 // CHECK25-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6386 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP36]], 0
6387 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6388 // CHECK25-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
6389 // CHECK25-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
6390 // CHECK25-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6391 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP37]], 1
6392 // CHECK25-NEXT: [[TMP38:%.*]] = zext i32 [[ADD]] to i64
6393 // CHECK25-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 [[TMP38]])
6394 // CHECK25-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.region_id, i32 4, i8** [[TMP32]], i8** [[TMP33]], i64* [[TMP34]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6395 // CHECK25-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
6396 // CHECK25-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6397 // CHECK25: omp_offload.failed:
6398 // CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166(i64 [[TMP1]], i32* [[VLA]], i64 [[TMP4]], i64 [[TMP6]]) #[[ATTR5:[0-9]+]]
6399 // CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]]
6400 // CHECK25: omp_offload.cont:
6401 // CHECK25-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
6402 // CHECK25-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP41]])
6403 // CHECK25-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
6404 // CHECK25-NEXT: [[TMP42:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
6405 // CHECK25-NEXT: call void @llvm.stackrestore(i8* [[TMP42]])
6406 // CHECK25-NEXT: [[TMP43:%.*]] = load i32, i32* [[RETVAL]], align 4
6407 // CHECK25-NEXT: ret i32 [[TMP43]]
6408 //
6409 //
6410 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166
6411 // CHECK25-SAME: (i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[I:%.*]], i64 [[N:%.*]]) #[[ATTR2:[0-9]+]] {
6412 // CHECK25-NEXT: entry:
6413 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
6414 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
6415 // CHECK25-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
6416 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
6417 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
6418 // CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
6419 // CHECK25-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
6420 // CHECK25-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
6421 // CHECK25-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
6422 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
6423 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
6424 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
6425 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]])
6426 // CHECK25-NEXT: ret void
6427 //
6428 //
6429 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined.
6430 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
6431 // CHECK25-NEXT: entry:
6432 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6433 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6434 // CHECK25-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
6435 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
6436 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
6437 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
6438 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6439 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4
6440 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6441 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6442 // CHECK25-NEXT: [[I3:%.*]] = alloca i32, align 4
6443 // CHECK25-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6444 // CHECK25-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6445 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6446 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6447 // CHECK25-NEXT: [[I4:%.*]] = alloca i32, align 4
6448 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6449 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6450 // CHECK25-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
6451 // CHECK25-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
6452 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
6453 // CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
6454 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
6455 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8
6456 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
6457 // CHECK25-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8
6458 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4
6459 // CHECK25-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
6460 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6461 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
6462 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6463 // CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6464 // CHECK25-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6465 // CHECK25-NEXT: store i32 0, i32* [[I3]], align 4
6466 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6467 // CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
6468 // CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
6469 // CHECK25: omp.precond.then:
6470 // CHECK25-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i64 16) ]
6471 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6472 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6473 // CHECK25-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4
6474 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6475 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6476 // CHECK25-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6477 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
6478 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6479 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6480 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6481 // CHECK25-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
6482 // CHECK25-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6483 // CHECK25: cond.true:
6484 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6485 // CHECK25-NEXT: br label [[COND_END:%.*]]
6486 // CHECK25: cond.false:
6487 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6488 // CHECK25-NEXT: br label [[COND_END]]
6489 // CHECK25: cond.end:
6490 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
6491 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6492 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6493 // CHECK25-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
6494 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6495 // CHECK25: omp.inner.for.cond:
6496 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6497 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6498 // CHECK25-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
6499 // CHECK25-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6500 // CHECK25: omp.inner.for.body:
6501 // CHECK25-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6502 // CHECK25-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
6503 // CHECK25-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6504 // CHECK25-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
6505 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[I4]], i32* [[TMP1]], i64 [[TMP2]], i32* [[TMP3]])
6506 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6507 // CHECK25: omp.inner.for.inc:
6508 // CHECK25-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6509 // CHECK25-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6510 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
6511 // CHECK25-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6512 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
6513 // CHECK25: omp.inner.for.end:
6514 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6515 // CHECK25: omp.loop.exit:
6516 // CHECK25-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6517 // CHECK25-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
6518 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
6519 // CHECK25-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6520 // CHECK25-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
6521 // CHECK25-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6522 // CHECK25: .omp.final.then:
6523 // CHECK25-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6524 // CHECK25-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
6525 // CHECK25-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
6526 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
6527 // CHECK25-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
6528 // CHECK25-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4
6529 // CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]]
6530 // CHECK25: .omp.final.done:
6531 // CHECK25-NEXT: br label [[OMP_PRECOND_END]]
6532 // CHECK25: omp.precond.end:
6533 // CHECK25-NEXT: ret void
6534 //
6535 //
6536 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..1
6537 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
6538 // CHECK25-NEXT: entry:
6539 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6540 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6541 // CHECK25-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6542 // CHECK25-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6543 // CHECK25-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
6544 // CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
6545 // CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
6546 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
6547 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6548 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4
6549 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6550 // CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6551 // CHECK25-NEXT: [[I3:%.*]] = alloca i32, align 4
6552 // CHECK25-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
6553 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6554 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6555 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6556 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6557 // CHECK25-NEXT: [[I5:%.*]] = alloca i32, align 4
6558 // CHECK25-NEXT: [[I6:%.*]] = alloca i32, align 4
6559 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6560 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6561 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6562 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6563 // CHECK25-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
6564 // CHECK25-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
6565 // CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
6566 // CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
6567 // CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
6568 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8
6569 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
6570 // CHECK25-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8
6571 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4
6572 // CHECK25-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
6573 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6574 // CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
6575 // CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6576 // CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6577 // CHECK25-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6578 // CHECK25-NEXT: store i32 0, i32* [[I3]], align 4
6579 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6580 // CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
6581 // CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
6582 // CHECK25: omp.precond.then:
6583 // CHECK25-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i64 16) ]
6584 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP0]], align 4
6585 // CHECK25-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4
6586 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6587 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6588 // CHECK25-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
6589 // CHECK25-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6590 // CHECK25-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32
6591 // CHECK25-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6592 // CHECK25-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP10]] to i32
6593 // CHECK25-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6594 // CHECK25-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
6595 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6596 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6597 // CHECK25-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6598 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
6599 // CHECK25-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP12]])
6600 // CHECK25-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6601 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
6602 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6603 // CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6604 // CHECK25-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6605 // CHECK25-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]]
6606 // CHECK25-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6607 // CHECK25: cond.true:
6608 // CHECK25-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6609 // CHECK25-NEXT: br label [[COND_END:%.*]]
6610 // CHECK25: cond.false:
6611 // CHECK25-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6612 // CHECK25-NEXT: br label [[COND_END]]
6613 // CHECK25: cond.end:
6614 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
6615 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6616 // CHECK25-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6617 // CHECK25-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
6618 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6619 // CHECK25: omp.inner.for.cond:
6620 // CHECK25-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6621 // CHECK25-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6622 // CHECK25-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
6623 // CHECK25-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6624 // CHECK25: omp.inner.for.body:
6625 // CHECK25-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6626 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1
6627 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6628 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
6629 // CHECK25-NEXT: [[TMP23:%.*]] = load i32, i32* [[I5]], align 4
6630 // CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
6631 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i64 [[IDXPROM]]
6632 // CHECK25-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
6633 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6634 // CHECK25: omp.body.continue:
6635 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6636 // CHECK25: omp.inner.for.inc:
6637 // CHECK25-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6638 // CHECK25-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], 1
6639 // CHECK25-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
6640 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
6641 // CHECK25: omp.inner.for.end:
6642 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6643 // CHECK25: omp.loop.exit:
6644 // CHECK25-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6645 // CHECK25-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
6646 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
6647 // CHECK25-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6648 // CHECK25-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
6649 // CHECK25-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6650 // CHECK25: .omp.final.then:
6651 // CHECK25-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6652 // CHECK25-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP29]], 0
6653 // CHECK25-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
6654 // CHECK25-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
6655 // CHECK25-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
6656 // CHECK25-NEXT: store i32 [[ADD13]], i32* [[TMP0]], align 4
6657 // CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]]
6658 // CHECK25: .omp.final.done:
6659 // CHECK25-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6660 // CHECK25-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
6661 // CHECK25-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
6662 // CHECK25: .omp.linear.pu:
6663 // CHECK25-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
6664 // CHECK25: .omp.linear.pu.done:
6665 // CHECK25-NEXT: br label [[OMP_PRECOND_END]]
6666 // CHECK25: omp.precond.end:
6667 // CHECK25-NEXT: ret void
6668 //
6669 //
6670 // CHECK25-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
6671 // CHECK25-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat {
6672 // CHECK25-NEXT: entry:
6673 // CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6674 // CHECK25-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
6675 // CHECK25-NEXT: [[TE:%.*]] = alloca i32, align 4
6676 // CHECK25-NEXT: [[TH:%.*]] = alloca i32, align 4
6677 // CHECK25-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8
6678 // CHECK25-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8
6679 // CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
6680 // CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
6681 // CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
6682 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4
6683 // CHECK25-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6684 // CHECK25-NEXT: store i32 0, i32* [[TE]], align 4
6685 // CHECK25-NEXT: store i32 128, i32* [[TH]], align 4
6686 // CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4
6687 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32*
6688 // CHECK25-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
6689 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[TE_CASTED]], align 8
6690 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
6691 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32*
6692 // CHECK25-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
6693 // CHECK25-NEXT: [[TMP3:%.*]] = load i64, i64* [[TH_CASTED]], align 8
6694 // CHECK25-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6695 // CHECK25-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
6696 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
6697 // CHECK25-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6698 // CHECK25-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
6699 // CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8
6700 // CHECK25-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6701 // CHECK25-NEXT: store i8* null, i8** [[TMP8]], align 8
6702 // CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
6703 // CHECK25-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
6704 // CHECK25-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
6705 // CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
6706 // CHECK25-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
6707 // CHECK25-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8
6708 // CHECK25-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
6709 // CHECK25-NEXT: store i8* null, i8** [[TMP13]], align 8
6710 // CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
6711 // CHECK25-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]**
6712 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 8
6713 // CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
6714 // CHECK25-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]**
6715 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 8
6716 // CHECK25-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
6717 // CHECK25-NEXT: store i8* null, i8** [[TMP18]], align 8
6718 // CHECK25-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6719 // CHECK25-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6720 // CHECK25-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4
6721 // CHECK25-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 10)
6722 // CHECK25-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 0)
6723 // CHECK25-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
6724 // CHECK25-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6725 // CHECK25: omp_offload.failed:
6726 // CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR5]]
6727 // CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]]
6728 // CHECK25: omp_offload.cont:
6729 // CHECK25-NEXT: ret i32 0
6730 //
6731 //
6732 // CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155
6733 // CHECK25-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6734 // CHECK25-NEXT: entry:
6735 // CHECK25-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8
6736 // CHECK25-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8
6737 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6738 // CHECK25-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
6739 // CHECK25-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8
6740 // CHECK25-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8
6741 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6742 // CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32*
6743 // CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32*
6744 // CHECK25-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6745 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
6746 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
6747 // CHECK25-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
6748 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]])
6749 // CHECK25-NEXT: ret void
6750 //
6751 //
6752 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..2
6753 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6754 // CHECK25-NEXT: entry:
6755 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6756 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6757 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6758 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6759 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4
6760 // CHECK25-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6761 // CHECK25-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6762 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6763 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6764 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4
6765 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6766 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6767 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6768 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6769 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6770 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
6771 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6772 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6773 // CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6774 // CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6775 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6776 // CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6777 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6778 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6779 // CHECK25: cond.true:
6780 // CHECK25-NEXT: br label [[COND_END:%.*]]
6781 // CHECK25: cond.false:
6782 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6783 // CHECK25-NEXT: br label [[COND_END]]
6784 // CHECK25: cond.end:
6785 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6786 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6787 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6788 // CHECK25-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6789 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6790 // CHECK25: omp.inner.for.cond:
6791 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6792 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6793 // CHECK25-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6794 // CHECK25-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6795 // CHECK25: omp.inner.for.body:
6796 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6797 // CHECK25-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6798 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6799 // CHECK25-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6800 // CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
6801 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6802 // CHECK25: omp.inner.for.inc:
6803 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6804 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6805 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6806 // CHECK25-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6807 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
6808 // CHECK25: omp.inner.for.end:
6809 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6810 // CHECK25: omp.loop.exit:
6811 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6812 // CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6813 // CHECK25-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
6814 // CHECK25-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6815 // CHECK25: .omp.final.then:
6816 // CHECK25-NEXT: store i32 10, i32* [[I]], align 4
6817 // CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]]
6818 // CHECK25: .omp.final.done:
6819 // CHECK25-NEXT: ret void
6820 //
6821 //
6822 // CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..3
6823 // CHECK25-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6824 // CHECK25-NEXT: entry:
6825 // CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6826 // CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6827 // CHECK25-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6828 // CHECK25-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6829 // CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6830 // CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6831 // CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4
6832 // CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6833 // CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6834 // CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6835 // CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6836 // CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4
6837 // CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6838 // CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6839 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6840 // CHECK25-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6841 // CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6842 // CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6843 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6844 // CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6845 // CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6846 // CHECK25-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6847 // CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6848 // CHECK25-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6849 // CHECK25-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6850 // CHECK25-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6851 // CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6852 // CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6853 // CHECK25-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6854 // CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6855 // CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6856 // CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6857 // CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
6858 // CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6859 // CHECK25: cond.true:
6860 // CHECK25-NEXT: br label [[COND_END:%.*]]
6861 // CHECK25: cond.false:
6862 // CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6863 // CHECK25-NEXT: br label [[COND_END]]
6864 // CHECK25: cond.end:
6865 // CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6866 // CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6867 // CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6868 // CHECK25-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6869 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6870 // CHECK25: omp.inner.for.cond:
6871 // CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6872 // CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6873 // CHECK25-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6874 // CHECK25-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6875 // CHECK25: omp.inner.for.body:
6876 // CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6877 // CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6878 // CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6879 // CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6880 // CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6881 // CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
6882 // CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
6883 // CHECK25-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
6884 // CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6885 // CHECK25: omp.body.continue:
6886 // CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6887 // CHECK25: omp.inner.for.inc:
6888 // CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6889 // CHECK25-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
6890 // CHECK25-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6891 // CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
6892 // CHECK25: omp.inner.for.end:
6893 // CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6894 // CHECK25: omp.loop.exit:
6895 // CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6896 // CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6897 // CHECK25-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6898 // CHECK25-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6899 // CHECK25: .omp.final.then:
6900 // CHECK25-NEXT: store i32 10, i32* [[I]], align 4
6901 // CHECK25-NEXT: br label [[DOTOMP_FINAL_DONE]]
6902 // CHECK25: .omp.final.done:
6903 // CHECK25-NEXT: ret void
6904 //
6905 //
6906 // CHECK25-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6907 // CHECK25-SAME: () #[[ATTR7:[0-9]+]] {
6908 // CHECK25-NEXT: entry:
6909 // CHECK25-NEXT: call void @__tgt_register_requires(i64 1)
6910 // CHECK25-NEXT: ret void
6911 //
6912 //
6913 // CHECK26-LABEL: define {{[^@]+}}@main
6914 // CHECK26-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
6915 // CHECK26-NEXT: entry:
6916 // CHECK26-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
6917 // CHECK26-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6918 // CHECK26-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
6919 // CHECK26-NEXT: [[N:%.*]] = alloca i32, align 4
6920 // CHECK26-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
6921 // CHECK26-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
6922 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4
6923 // CHECK26-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
6924 // CHECK26-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
6925 // CHECK26-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
6926 // CHECK26-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
6927 // CHECK26-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
6928 // CHECK26-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 8
6929 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4
6930 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6931 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
6932 // CHECK26-NEXT: store i32 0, i32* [[RETVAL]], align 4
6933 // CHECK26-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6934 // CHECK26-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
6935 // CHECK26-NEXT: store i32 100, i32* [[N]], align 4
6936 // CHECK26-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
6937 // CHECK26-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
6938 // CHECK26-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
6939 // CHECK26-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
6940 // CHECK26-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
6941 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
6942 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4
6943 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32*
6944 // CHECK26-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
6945 // CHECK26-NEXT: [[TMP4:%.*]] = load i64, i64* [[I_CASTED]], align 8
6946 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4
6947 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
6948 // CHECK26-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
6949 // CHECK26-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8
6950 // CHECK26-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP1]], 4
6951 // CHECK26-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6952 // CHECK26-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
6953 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP9]], align 8
6954 // CHECK26-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6955 // CHECK26-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64*
6956 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP11]], align 8
6957 // CHECK26-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
6958 // CHECK26-NEXT: store i64 8, i64* [[TMP12]], align 8
6959 // CHECK26-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6960 // CHECK26-NEXT: store i8* null, i8** [[TMP13]], align 8
6961 // CHECK26-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
6962 // CHECK26-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32**
6963 // CHECK26-NEXT: store i32* [[VLA]], i32** [[TMP15]], align 8
6964 // CHECK26-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
6965 // CHECK26-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32**
6966 // CHECK26-NEXT: store i32* [[VLA]], i32** [[TMP17]], align 8
6967 // CHECK26-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
6968 // CHECK26-NEXT: store i64 [[TMP7]], i64* [[TMP18]], align 8
6969 // CHECK26-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
6970 // CHECK26-NEXT: store i8* null, i8** [[TMP19]], align 8
6971 // CHECK26-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
6972 // CHECK26-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
6973 // CHECK26-NEXT: store i64 [[TMP4]], i64* [[TMP21]], align 8
6974 // CHECK26-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
6975 // CHECK26-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
6976 // CHECK26-NEXT: store i64 [[TMP4]], i64* [[TMP23]], align 8
6977 // CHECK26-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
6978 // CHECK26-NEXT: store i64 4, i64* [[TMP24]], align 8
6979 // CHECK26-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
6980 // CHECK26-NEXT: store i8* null, i8** [[TMP25]], align 8
6981 // CHECK26-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
6982 // CHECK26-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
6983 // CHECK26-NEXT: store i64 [[TMP6]], i64* [[TMP27]], align 8
6984 // CHECK26-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
6985 // CHECK26-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
6986 // CHECK26-NEXT: store i64 [[TMP6]], i64* [[TMP29]], align 8
6987 // CHECK26-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
6988 // CHECK26-NEXT: store i64 4, i64* [[TMP30]], align 8
6989 // CHECK26-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
6990 // CHECK26-NEXT: store i8* null, i8** [[TMP31]], align 8
6991 // CHECK26-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6992 // CHECK26-NEXT: [[TMP33:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6993 // CHECK26-NEXT: [[TMP34:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
6994 // CHECK26-NEXT: [[TMP35:%.*]] = load i32, i32* [[N]], align 4
6995 // CHECK26-NEXT: store i32 [[TMP35]], i32* [[DOTCAPTURE_EXPR_]], align 4
6996 // CHECK26-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6997 // CHECK26-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP36]], 0
6998 // CHECK26-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6999 // CHECK26-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
7000 // CHECK26-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
7001 // CHECK26-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7002 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP37]], 1
7003 // CHECK26-NEXT: [[TMP38:%.*]] = zext i32 [[ADD]] to i64
7004 // CHECK26-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 [[TMP38]])
7005 // CHECK26-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.region_id, i32 4, i8** [[TMP32]], i8** [[TMP33]], i64* [[TMP34]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7006 // CHECK26-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
7007 // CHECK26-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7008 // CHECK26: omp_offload.failed:
7009 // CHECK26-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166(i64 [[TMP1]], i32* [[VLA]], i64 [[TMP4]], i64 [[TMP6]]) #[[ATTR5:[0-9]+]]
7010 // CHECK26-NEXT: br label [[OMP_OFFLOAD_CONT]]
7011 // CHECK26: omp_offload.cont:
7012 // CHECK26-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
7013 // CHECK26-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP41]])
7014 // CHECK26-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
7015 // CHECK26-NEXT: [[TMP42:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
7016 // CHECK26-NEXT: call void @llvm.stackrestore(i8* [[TMP42]])
7017 // CHECK26-NEXT: [[TMP43:%.*]] = load i32, i32* [[RETVAL]], align 4
7018 // CHECK26-NEXT: ret i32 [[TMP43]]
7019 //
7020 //
7021 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166
7022 // CHECK26-SAME: (i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[I:%.*]], i64 [[N:%.*]]) #[[ATTR2:[0-9]+]] {
7023 // CHECK26-NEXT: entry:
7024 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
7025 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
7026 // CHECK26-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
7027 // CHECK26-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
7028 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7029 // CHECK26-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
7030 // CHECK26-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
7031 // CHECK26-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
7032 // CHECK26-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7033 // CHECK26-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
7034 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
7035 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
7036 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]])
7037 // CHECK26-NEXT: ret void
7038 //
7039 //
7040 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined.
7041 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7042 // CHECK26-NEXT: entry:
7043 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7044 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7045 // CHECK26-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
7046 // CHECK26-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
7047 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
7048 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
7049 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7050 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4
7051 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7052 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7053 // CHECK26-NEXT: [[I3:%.*]] = alloca i32, align 4
7054 // CHECK26-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7055 // CHECK26-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7056 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7057 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7058 // CHECK26-NEXT: [[I4:%.*]] = alloca i32, align 4
7059 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7060 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7061 // CHECK26-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
7062 // CHECK26-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
7063 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7064 // CHECK26-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
7065 // CHECK26-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
7066 // CHECK26-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8
7067 // CHECK26-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7068 // CHECK26-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8
7069 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4
7070 // CHECK26-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
7071 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7072 // CHECK26-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
7073 // CHECK26-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7074 // CHECK26-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7075 // CHECK26-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7076 // CHECK26-NEXT: store i32 0, i32* [[I3]], align 4
7077 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7078 // CHECK26-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
7079 // CHECK26-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7080 // CHECK26: omp.precond.then:
7081 // CHECK26-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i64 16) ]
7082 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7083 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7084 // CHECK26-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4
7085 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7086 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7087 // CHECK26-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7088 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
7089 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7090 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7091 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7092 // CHECK26-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
7093 // CHECK26-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7094 // CHECK26: cond.true:
7095 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7096 // CHECK26-NEXT: br label [[COND_END:%.*]]
7097 // CHECK26: cond.false:
7098 // CHECK26-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7099 // CHECK26-NEXT: br label [[COND_END]]
7100 // CHECK26: cond.end:
7101 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
7102 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7103 // CHECK26-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7104 // CHECK26-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
7105 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7106 // CHECK26: omp.inner.for.cond:
7107 // CHECK26-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7108 // CHECK26-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7109 // CHECK26-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
7110 // CHECK26-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7111 // CHECK26: omp.inner.for.body:
7112 // CHECK26-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7113 // CHECK26-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
7114 // CHECK26-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7115 // CHECK26-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
7116 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[I4]], i32* [[TMP1]], i64 [[TMP2]], i32* [[TMP3]])
7117 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7118 // CHECK26: omp.inner.for.inc:
7119 // CHECK26-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7120 // CHECK26-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7121 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
7122 // CHECK26-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7123 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
7124 // CHECK26: omp.inner.for.end:
7125 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7126 // CHECK26: omp.loop.exit:
7127 // CHECK26-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7128 // CHECK26-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
7129 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
7130 // CHECK26-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7131 // CHECK26-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
7132 // CHECK26-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7133 // CHECK26: .omp.final.then:
7134 // CHECK26-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7135 // CHECK26-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
7136 // CHECK26-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
7137 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
7138 // CHECK26-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
7139 // CHECK26-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4
7140 // CHECK26-NEXT: br label [[DOTOMP_FINAL_DONE]]
7141 // CHECK26: .omp.final.done:
7142 // CHECK26-NEXT: br label [[OMP_PRECOND_END]]
7143 // CHECK26: omp.precond.end:
7144 // CHECK26-NEXT: ret void
7145 //
7146 //
7147 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..1
7148 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7149 // CHECK26-NEXT: entry:
7150 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7151 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7152 // CHECK26-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7153 // CHECK26-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7154 // CHECK26-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8
7155 // CHECK26-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
7156 // CHECK26-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
7157 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
7158 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7159 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4
7160 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7161 // CHECK26-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7162 // CHECK26-NEXT: [[I3:%.*]] = alloca i32, align 4
7163 // CHECK26-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
7164 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7165 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7166 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7167 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7168 // CHECK26-NEXT: [[I5:%.*]] = alloca i32, align 4
7169 // CHECK26-NEXT: [[I6:%.*]] = alloca i32, align 4
7170 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7171 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7172 // CHECK26-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7173 // CHECK26-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7174 // CHECK26-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8
7175 // CHECK26-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
7176 // CHECK26-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7177 // CHECK26-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
7178 // CHECK26-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8
7179 // CHECK26-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 8
7180 // CHECK26-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7181 // CHECK26-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 8
7182 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4
7183 // CHECK26-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
7184 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7185 // CHECK26-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
7186 // CHECK26-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7187 // CHECK26-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7188 // CHECK26-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7189 // CHECK26-NEXT: store i32 0, i32* [[I3]], align 4
7190 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7191 // CHECK26-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
7192 // CHECK26-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7193 // CHECK26: omp.precond.then:
7194 // CHECK26-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i64 16) ]
7195 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP0]], align 4
7196 // CHECK26-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4
7197 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7198 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7199 // CHECK26-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
7200 // CHECK26-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7201 // CHECK26-NEXT: [[CONV:%.*]] = trunc i64 [[TMP9]] to i32
7202 // CHECK26-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7203 // CHECK26-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP10]] to i32
7204 // CHECK26-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7205 // CHECK26-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
7206 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7207 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7208 // CHECK26-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7209 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
7210 // CHECK26-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP12]])
7211 // CHECK26-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7212 // CHECK26-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
7213 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7214 // CHECK26-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7215 // CHECK26-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7216 // CHECK26-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]]
7217 // CHECK26-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7218 // CHECK26: cond.true:
7219 // CHECK26-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7220 // CHECK26-NEXT: br label [[COND_END:%.*]]
7221 // CHECK26: cond.false:
7222 // CHECK26-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7223 // CHECK26-NEXT: br label [[COND_END]]
7224 // CHECK26: cond.end:
7225 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
7226 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7227 // CHECK26-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7228 // CHECK26-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
7229 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7230 // CHECK26: omp.inner.for.cond:
7231 // CHECK26-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7232 // CHECK26-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7233 // CHECK26-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
7234 // CHECK26-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7235 // CHECK26: omp.inner.for.body:
7236 // CHECK26-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7237 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1
7238 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7239 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
7240 // CHECK26-NEXT: [[TMP23:%.*]] = load i32, i32* [[I5]], align 4
7241 // CHECK26-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
7242 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i64 [[IDXPROM]]
7243 // CHECK26-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
7244 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7245 // CHECK26: omp.body.continue:
7246 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7247 // CHECK26: omp.inner.for.inc:
7248 // CHECK26-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7249 // CHECK26-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], 1
7250 // CHECK26-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
7251 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
7252 // CHECK26: omp.inner.for.end:
7253 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7254 // CHECK26: omp.loop.exit:
7255 // CHECK26-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7256 // CHECK26-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
7257 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
7258 // CHECK26-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7259 // CHECK26-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
7260 // CHECK26-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7261 // CHECK26: .omp.final.then:
7262 // CHECK26-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7263 // CHECK26-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP29]], 0
7264 // CHECK26-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
7265 // CHECK26-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
7266 // CHECK26-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
7267 // CHECK26-NEXT: store i32 [[ADD13]], i32* [[TMP0]], align 4
7268 // CHECK26-NEXT: br label [[DOTOMP_FINAL_DONE]]
7269 // CHECK26: .omp.final.done:
7270 // CHECK26-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7271 // CHECK26-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
7272 // CHECK26-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
7273 // CHECK26: .omp.linear.pu:
7274 // CHECK26-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
7275 // CHECK26: .omp.linear.pu.done:
7276 // CHECK26-NEXT: br label [[OMP_PRECOND_END]]
7277 // CHECK26: omp.precond.end:
7278 // CHECK26-NEXT: ret void
7279 //
7280 //
7281 // CHECK26-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
7282 // CHECK26-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat {
7283 // CHECK26-NEXT: entry:
7284 // CHECK26-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
7285 // CHECK26-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
7286 // CHECK26-NEXT: [[TE:%.*]] = alloca i32, align 4
7287 // CHECK26-NEXT: [[TH:%.*]] = alloca i32, align 4
7288 // CHECK26-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8
7289 // CHECK26-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8
7290 // CHECK26-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
7291 // CHECK26-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
7292 // CHECK26-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
7293 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4
7294 // CHECK26-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
7295 // CHECK26-NEXT: store i32 0, i32* [[TE]], align 4
7296 // CHECK26-NEXT: store i32 128, i32* [[TH]], align 4
7297 // CHECK26-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4
7298 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32*
7299 // CHECK26-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
7300 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[TE_CASTED]], align 8
7301 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
7302 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32*
7303 // CHECK26-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
7304 // CHECK26-NEXT: [[TMP3:%.*]] = load i64, i64* [[TH_CASTED]], align 8
7305 // CHECK26-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7306 // CHECK26-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
7307 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
7308 // CHECK26-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7309 // CHECK26-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
7310 // CHECK26-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8
7311 // CHECK26-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
7312 // CHECK26-NEXT: store i8* null, i8** [[TMP8]], align 8
7313 // CHECK26-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
7314 // CHECK26-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
7315 // CHECK26-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
7316 // CHECK26-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
7317 // CHECK26-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
7318 // CHECK26-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8
7319 // CHECK26-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
7320 // CHECK26-NEXT: store i8* null, i8** [[TMP13]], align 8
7321 // CHECK26-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
7322 // CHECK26-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]**
7323 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 8
7324 // CHECK26-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
7325 // CHECK26-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]**
7326 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 8
7327 // CHECK26-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
7328 // CHECK26-NEXT: store i8* null, i8** [[TMP18]], align 8
7329 // CHECK26-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7330 // CHECK26-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7331 // CHECK26-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4
7332 // CHECK26-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 10)
7333 // CHECK26-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 0)
7334 // CHECK26-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
7335 // CHECK26-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7336 // CHECK26: omp_offload.failed:
7337 // CHECK26-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR5]]
7338 // CHECK26-NEXT: br label [[OMP_OFFLOAD_CONT]]
7339 // CHECK26: omp_offload.cont:
7340 // CHECK26-NEXT: ret i32 0
7341 //
7342 //
7343 // CHECK26-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155
7344 // CHECK26-SAME: (i64 [[TE:%.*]], i64 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
7345 // CHECK26-NEXT: entry:
7346 // CHECK26-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8
7347 // CHECK26-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8
7348 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
7349 // CHECK26-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
7350 // CHECK26-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8
7351 // CHECK26-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8
7352 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7353 // CHECK26-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32*
7354 // CHECK26-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32*
7355 // CHECK26-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7356 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
7357 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 8
7358 // CHECK26-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
7359 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]])
7360 // CHECK26-NEXT: ret void
7361 //
7362 //
7363 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..2
7364 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
7365 // CHECK26-NEXT: entry:
7366 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7367 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7368 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
7369 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7370 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4
7371 // CHECK26-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7372 // CHECK26-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7373 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7374 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7375 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4
7376 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7377 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7378 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7379 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7380 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7381 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
7382 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7383 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7384 // CHECK26-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7385 // CHECK26-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7386 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7387 // CHECK26-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7388 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
7389 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7390 // CHECK26: cond.true:
7391 // CHECK26-NEXT: br label [[COND_END:%.*]]
7392 // CHECK26: cond.false:
7393 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7394 // CHECK26-NEXT: br label [[COND_END]]
7395 // CHECK26: cond.end:
7396 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7397 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7398 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7399 // CHECK26-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7400 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7401 // CHECK26: omp.inner.for.cond:
7402 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7403 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7404 // CHECK26-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7405 // CHECK26-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7406 // CHECK26: omp.inner.for.body:
7407 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7408 // CHECK26-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
7409 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7410 // CHECK26-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
7411 // CHECK26-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
7412 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7413 // CHECK26: omp.inner.for.inc:
7414 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7415 // CHECK26-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7416 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
7417 // CHECK26-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7418 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
7419 // CHECK26: omp.inner.for.end:
7420 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7421 // CHECK26: omp.loop.exit:
7422 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7423 // CHECK26-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7424 // CHECK26-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
7425 // CHECK26-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7426 // CHECK26: .omp.final.then:
7427 // CHECK26-NEXT: store i32 10, i32* [[I]], align 4
7428 // CHECK26-NEXT: br label [[DOTOMP_FINAL_DONE]]
7429 // CHECK26: .omp.final.done:
7430 // CHECK26-NEXT: ret void
7431 //
7432 //
7433 // CHECK26-LABEL: define {{[^@]+}}@.omp_outlined..3
7434 // CHECK26-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
7435 // CHECK26-NEXT: entry:
7436 // CHECK26-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7437 // CHECK26-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7438 // CHECK26-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7439 // CHECK26-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7440 // CHECK26-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
7441 // CHECK26-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7442 // CHECK26-NEXT: [[TMP:%.*]] = alloca i32, align 4
7443 // CHECK26-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7444 // CHECK26-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7445 // CHECK26-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7446 // CHECK26-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7447 // CHECK26-NEXT: [[I:%.*]] = alloca i32, align 4
7448 // CHECK26-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7449 // CHECK26-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7450 // CHECK26-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7451 // CHECK26-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7452 // CHECK26-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7453 // CHECK26-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7454 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7455 // CHECK26-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7456 // CHECK26-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7457 // CHECK26-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
7458 // CHECK26-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7459 // CHECK26-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
7460 // CHECK26-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7461 // CHECK26-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7462 // CHECK26-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7463 // CHECK26-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7464 // CHECK26-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7465 // CHECK26-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
7466 // CHECK26-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7467 // CHECK26-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7468 // CHECK26-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
7469 // CHECK26-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7470 // CHECK26: cond.true:
7471 // CHECK26-NEXT: br label [[COND_END:%.*]]
7472 // CHECK26: cond.false:
7473 // CHECK26-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7474 // CHECK26-NEXT: br label [[COND_END]]
7475 // CHECK26: cond.end:
7476 // CHECK26-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
7477 // CHECK26-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7478 // CHECK26-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7479 // CHECK26-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
7480 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7481 // CHECK26: omp.inner.for.cond:
7482 // CHECK26-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7483 // CHECK26-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7484 // CHECK26-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
7485 // CHECK26-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7486 // CHECK26: omp.inner.for.body:
7487 // CHECK26-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7488 // CHECK26-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
7489 // CHECK26-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7490 // CHECK26-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7491 // CHECK26-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
7492 // CHECK26-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
7493 // CHECK26-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
7494 // CHECK26-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
7495 // CHECK26-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7496 // CHECK26: omp.body.continue:
7497 // CHECK26-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7498 // CHECK26: omp.inner.for.inc:
7499 // CHECK26-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7500 // CHECK26-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
7501 // CHECK26-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7502 // CHECK26-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
7503 // CHECK26: omp.inner.for.end:
7504 // CHECK26-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7505 // CHECK26: omp.loop.exit:
7506 // CHECK26-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
7507 // CHECK26-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7508 // CHECK26-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7509 // CHECK26-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7510 // CHECK26: .omp.final.then:
7511 // CHECK26-NEXT: store i32 10, i32* [[I]], align 4
7512 // CHECK26-NEXT: br label [[DOTOMP_FINAL_DONE]]
7513 // CHECK26: .omp.final.done:
7514 // CHECK26-NEXT: ret void
7515 //
7516 //
7517 // CHECK26-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
7518 // CHECK26-SAME: () #[[ATTR7:[0-9]+]] {
7519 // CHECK26-NEXT: entry:
7520 // CHECK26-NEXT: call void @__tgt_register_requires(i64 1)
7521 // CHECK26-NEXT: ret void
7522 //
7523 //
7524 // CHECK27-LABEL: define {{[^@]+}}@main
7525 // CHECK27-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
7526 // CHECK27-NEXT: entry:
7527 // CHECK27-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
7528 // CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
7529 // CHECK27-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
7530 // CHECK27-NEXT: [[N:%.*]] = alloca i32, align 4
7531 // CHECK27-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
7532 // CHECK27-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
7533 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4
7534 // CHECK27-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
7535 // CHECK27-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
7536 // CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
7537 // CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
7538 // CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
7539 // CHECK27-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 4
7540 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4
7541 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7542 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7543 // CHECK27-NEXT: store i32 0, i32* [[RETVAL]], align 4
7544 // CHECK27-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
7545 // CHECK27-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
7546 // CHECK27-NEXT: store i32 100, i32* [[N]], align 4
7547 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
7548 // CHECK27-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
7549 // CHECK27-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
7550 // CHECK27-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
7551 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
7552 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4
7553 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[I_CASTED]], align 4
7554 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[I_CASTED]], align 4
7555 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
7556 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4
7557 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4
7558 // CHECK27-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP0]], 4
7559 // CHECK27-NEXT: [[TMP7:%.*]] = sext i32 [[TMP6]] to i64
7560 // CHECK27-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7561 // CHECK27-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
7562 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TMP9]], align 4
7563 // CHECK27-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7564 // CHECK27-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32*
7565 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TMP11]], align 4
7566 // CHECK27-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
7567 // CHECK27-NEXT: store i64 4, i64* [[TMP12]], align 4
7568 // CHECK27-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
7569 // CHECK27-NEXT: store i8* null, i8** [[TMP13]], align 4
7570 // CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
7571 // CHECK27-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32**
7572 // CHECK27-NEXT: store i32* [[VLA]], i32** [[TMP15]], align 4
7573 // CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
7574 // CHECK27-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32**
7575 // CHECK27-NEXT: store i32* [[VLA]], i32** [[TMP17]], align 4
7576 // CHECK27-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
7577 // CHECK27-NEXT: store i64 [[TMP7]], i64* [[TMP18]], align 4
7578 // CHECK27-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
7579 // CHECK27-NEXT: store i8* null, i8** [[TMP19]], align 4
7580 // CHECK27-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
7581 // CHECK27-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
7582 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP21]], align 4
7583 // CHECK27-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
7584 // CHECK27-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
7585 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP23]], align 4
7586 // CHECK27-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
7587 // CHECK27-NEXT: store i64 4, i64* [[TMP24]], align 4
7588 // CHECK27-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
7589 // CHECK27-NEXT: store i8* null, i8** [[TMP25]], align 4
7590 // CHECK27-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
7591 // CHECK27-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
7592 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[TMP27]], align 4
7593 // CHECK27-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
7594 // CHECK27-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32*
7595 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[TMP29]], align 4
7596 // CHECK27-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
7597 // CHECK27-NEXT: store i64 4, i64* [[TMP30]], align 4
7598 // CHECK27-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
7599 // CHECK27-NEXT: store i8* null, i8** [[TMP31]], align 4
7600 // CHECK27-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7601 // CHECK27-NEXT: [[TMP33:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7602 // CHECK27-NEXT: [[TMP34:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
7603 // CHECK27-NEXT: [[TMP35:%.*]] = load i32, i32* [[N]], align 4
7604 // CHECK27-NEXT: store i32 [[TMP35]], i32* [[DOTCAPTURE_EXPR_]], align 4
7605 // CHECK27-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7606 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP36]], 0
7607 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7608 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7609 // CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7610 // CHECK27-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7611 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP37]], 1
7612 // CHECK27-NEXT: [[TMP38:%.*]] = zext i32 [[ADD]] to i64
7613 // CHECK27-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 [[TMP38]])
7614 // CHECK27-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.region_id, i32 4, i8** [[TMP32]], i8** [[TMP33]], i64* [[TMP34]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7615 // CHECK27-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
7616 // CHECK27-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7617 // CHECK27: omp_offload.failed:
7618 // CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166(i32 [[TMP0]], i32* [[VLA]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR5:[0-9]+]]
7619 // CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]]
7620 // CHECK27: omp_offload.cont:
7621 // CHECK27-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
7622 // CHECK27-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP41]])
7623 // CHECK27-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
7624 // CHECK27-NEXT: [[TMP42:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
7625 // CHECK27-NEXT: call void @llvm.stackrestore(i8* [[TMP42]])
7626 // CHECK27-NEXT: [[TMP43:%.*]] = load i32, i32* [[RETVAL]], align 4
7627 // CHECK27-NEXT: ret i32 [[TMP43]]
7628 //
7629 //
7630 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166
7631 // CHECK27-SAME: (i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[I:%.*]], i32 [[N:%.*]]) #[[ATTR2:[0-9]+]] {
7632 // CHECK27-NEXT: entry:
7633 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7634 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7635 // CHECK27-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
7636 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7637 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7638 // CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7639 // CHECK27-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
7640 // CHECK27-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7641 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7642 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7643 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[I_ADDR]], i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
7644 // CHECK27-NEXT: ret void
7645 //
7646 //
7647 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined.
7648 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7649 // CHECK27-NEXT: entry:
7650 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7651 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7652 // CHECK27-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
7653 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
7654 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7655 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7656 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7657 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4
7658 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7659 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7660 // CHECK27-NEXT: [[I3:%.*]] = alloca i32, align 4
7661 // CHECK27-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7662 // CHECK27-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7663 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7664 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7665 // CHECK27-NEXT: [[I4:%.*]] = alloca i32, align 4
7666 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7667 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7668 // CHECK27-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
7669 // CHECK27-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
7670 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7671 // CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7672 // CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
7673 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4
7674 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7675 // CHECK27-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7676 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4
7677 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
7678 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7679 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
7680 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7681 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7682 // CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7683 // CHECK27-NEXT: store i32 0, i32* [[I3]], align 4
7684 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7685 // CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
7686 // CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7687 // CHECK27: omp.precond.then:
7688 // CHECK27-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i32 16) ]
7689 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7690 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7691 // CHECK27-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4
7692 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7693 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7694 // CHECK27-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7695 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
7696 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7697 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7698 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7699 // CHECK27-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
7700 // CHECK27-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7701 // CHECK27: cond.true:
7702 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7703 // CHECK27-NEXT: br label [[COND_END:%.*]]
7704 // CHECK27: cond.false:
7705 // CHECK27-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7706 // CHECK27-NEXT: br label [[COND_END]]
7707 // CHECK27: cond.end:
7708 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
7709 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7710 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7711 // CHECK27-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
7712 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7713 // CHECK27: omp.inner.for.cond:
7714 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7715 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7716 // CHECK27-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
7717 // CHECK27-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7718 // CHECK27: omp.inner.for.body:
7719 // CHECK27-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7720 // CHECK27-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7721 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[I4]], i32* [[TMP1]], i32 [[TMP2]], i32* [[TMP3]])
7722 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7723 // CHECK27: omp.inner.for.inc:
7724 // CHECK27-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7725 // CHECK27-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7726 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
7727 // CHECK27-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7728 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
7729 // CHECK27: omp.inner.for.end:
7730 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7731 // CHECK27: omp.loop.exit:
7732 // CHECK27-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7733 // CHECK27-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
7734 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
7735 // CHECK27-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7736 // CHECK27-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
7737 // CHECK27-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7738 // CHECK27: .omp.final.then:
7739 // CHECK27-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7740 // CHECK27-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0
7741 // CHECK27-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
7742 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
7743 // CHECK27-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
7744 // CHECK27-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4
7745 // CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]]
7746 // CHECK27: .omp.final.done:
7747 // CHECK27-NEXT: br label [[OMP_PRECOND_END]]
7748 // CHECK27: omp.precond.end:
7749 // CHECK27-NEXT: ret void
7750 //
7751 //
7752 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..1
7753 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7754 // CHECK27-NEXT: entry:
7755 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7756 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7757 // CHECK27-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7758 // CHECK27-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7759 // CHECK27-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
7760 // CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
7761 // CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7762 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7763 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7764 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4
7765 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7766 // CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7767 // CHECK27-NEXT: [[I3:%.*]] = alloca i32, align 4
7768 // CHECK27-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
7769 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7770 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7771 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7772 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7773 // CHECK27-NEXT: [[I4:%.*]] = alloca i32, align 4
7774 // CHECK27-NEXT: [[I5:%.*]] = alloca i32, align 4
7775 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7776 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7777 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7778 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7779 // CHECK27-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
7780 // CHECK27-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
7781 // CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7782 // CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7783 // CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
7784 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4
7785 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7786 // CHECK27-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7787 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4
7788 // CHECK27-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
7789 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7790 // CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
7791 // CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7792 // CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7793 // CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7794 // CHECK27-NEXT: store i32 0, i32* [[I3]], align 4
7795 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7796 // CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
7797 // CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7798 // CHECK27: omp.precond.then:
7799 // CHECK27-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i32 16) ]
7800 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP0]], align 4
7801 // CHECK27-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4
7802 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7803 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7804 // CHECK27-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
7805 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7806 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7807 // CHECK27-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4
7808 // CHECK27-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4
7809 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7810 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7811 // CHECK27-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7812 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
7813 // CHECK27-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP12]])
7814 // CHECK27-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7815 // CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
7816 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7817 // CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7818 // CHECK27-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7819 // CHECK27-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]]
7820 // CHECK27-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7821 // CHECK27: cond.true:
7822 // CHECK27-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7823 // CHECK27-NEXT: br label [[COND_END:%.*]]
7824 // CHECK27: cond.false:
7825 // CHECK27-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7826 // CHECK27-NEXT: br label [[COND_END]]
7827 // CHECK27: cond.end:
7828 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
7829 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7830 // CHECK27-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7831 // CHECK27-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
7832 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7833 // CHECK27: omp.inner.for.cond:
7834 // CHECK27-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7835 // CHECK27-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7836 // CHECK27-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
7837 // CHECK27-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7838 // CHECK27: omp.inner.for.body:
7839 // CHECK27-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7840 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1
7841 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7842 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
7843 // CHECK27-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4
7844 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i32 [[TMP23]]
7845 // CHECK27-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
7846 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7847 // CHECK27: omp.body.continue:
7848 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7849 // CHECK27: omp.inner.for.inc:
7850 // CHECK27-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7851 // CHECK27-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], 1
7852 // CHECK27-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
7853 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
7854 // CHECK27: omp.inner.for.end:
7855 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7856 // CHECK27: omp.loop.exit:
7857 // CHECK27-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7858 // CHECK27-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
7859 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
7860 // CHECK27-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7861 // CHECK27-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
7862 // CHECK27-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7863 // CHECK27: .omp.final.then:
7864 // CHECK27-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7865 // CHECK27-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP29]], 0
7866 // CHECK27-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
7867 // CHECK27-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
7868 // CHECK27-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
7869 // CHECK27-NEXT: store i32 [[ADD12]], i32* [[TMP0]], align 4
7870 // CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]]
7871 // CHECK27: .omp.final.done:
7872 // CHECK27-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7873 // CHECK27-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
7874 // CHECK27-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
7875 // CHECK27: .omp.linear.pu:
7876 // CHECK27-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
7877 // CHECK27: .omp.linear.pu.done:
7878 // CHECK27-NEXT: br label [[OMP_PRECOND_END]]
7879 // CHECK27: omp.precond.end:
7880 // CHECK27-NEXT: ret void
7881 //
7882 //
7883 // CHECK27-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
7884 // CHECK27-SAME: (i32 [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat {
7885 // CHECK27-NEXT: entry:
7886 // CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
7887 // CHECK27-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
7888 // CHECK27-NEXT: [[TE:%.*]] = alloca i32, align 4
7889 // CHECK27-NEXT: [[TH:%.*]] = alloca i32, align 4
7890 // CHECK27-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4
7891 // CHECK27-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4
7892 // CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
7893 // CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
7894 // CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
7895 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4
7896 // CHECK27-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
7897 // CHECK27-NEXT: store i32 0, i32* [[TE]], align 4
7898 // CHECK27-NEXT: store i32 128, i32* [[TH]], align 4
7899 // CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4
7900 // CHECK27-NEXT: store i32 [[TMP0]], i32* [[TE_CASTED]], align 4
7901 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE_CASTED]], align 4
7902 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
7903 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[TH_CASTED]], align 4
7904 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_CASTED]], align 4
7905 // CHECK27-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7906 // CHECK27-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
7907 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4
7908 // CHECK27-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7909 // CHECK27-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
7910 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4
7911 // CHECK27-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
7912 // CHECK27-NEXT: store i8* null, i8** [[TMP8]], align 4
7913 // CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
7914 // CHECK27-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
7915 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
7916 // CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
7917 // CHECK27-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
7918 // CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4
7919 // CHECK27-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
7920 // CHECK27-NEXT: store i8* null, i8** [[TMP13]], align 4
7921 // CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
7922 // CHECK27-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]**
7923 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 4
7924 // CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
7925 // CHECK27-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]**
7926 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 4
7927 // CHECK27-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
7928 // CHECK27-NEXT: store i8* null, i8** [[TMP18]], align 4
7929 // CHECK27-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7930 // CHECK27-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7931 // CHECK27-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4
7932 // CHECK27-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 10)
7933 // CHECK27-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 0)
7934 // CHECK27-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
7935 // CHECK27-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7936 // CHECK27: omp_offload.failed:
7937 // CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR5]]
7938 // CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]]
7939 // CHECK27: omp_offload.cont:
7940 // CHECK27-NEXT: ret i32 0
7941 //
7942 //
7943 // CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155
7944 // CHECK27-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
7945 // CHECK27-NEXT: entry:
7946 // CHECK27-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4
7947 // CHECK27-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4
7948 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
7949 // CHECK27-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
7950 // CHECK27-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4
7951 // CHECK27-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4
7952 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
7953 // CHECK27-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
7954 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4
7955 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4
7956 // CHECK27-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
7957 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]])
7958 // CHECK27-NEXT: ret void
7959 //
7960 //
7961 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..2
7962 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
7963 // CHECK27-NEXT: entry:
7964 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7965 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7966 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
7967 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7968 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4
7969 // CHECK27-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7970 // CHECK27-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7971 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7972 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7973 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4
7974 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7975 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7976 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
7977 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
7978 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7979 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
7980 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7981 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7982 // CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7983 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7984 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7985 // CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7986 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
7987 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7988 // CHECK27: cond.true:
7989 // CHECK27-NEXT: br label [[COND_END:%.*]]
7990 // CHECK27: cond.false:
7991 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7992 // CHECK27-NEXT: br label [[COND_END]]
7993 // CHECK27: cond.end:
7994 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7995 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7996 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7997 // CHECK27-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7998 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7999 // CHECK27: omp.inner.for.cond:
8000 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8001 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8002 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8003 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8004 // CHECK27: omp.inner.for.body:
8005 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8006 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8007 // CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
8008 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8009 // CHECK27: omp.inner.for.inc:
8010 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8011 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8012 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
8013 // CHECK27-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8014 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
8015 // CHECK27: omp.inner.for.end:
8016 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8017 // CHECK27: omp.loop.exit:
8018 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
8019 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8020 // CHECK27-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
8021 // CHECK27-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8022 // CHECK27: .omp.final.then:
8023 // CHECK27-NEXT: store i32 10, i32* [[I]], align 4
8024 // CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]]
8025 // CHECK27: .omp.final.done:
8026 // CHECK27-NEXT: ret void
8027 //
8028 //
8029 // CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..3
8030 // CHECK27-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8031 // CHECK27-NEXT: entry:
8032 // CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8033 // CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8034 // CHECK27-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8035 // CHECK27-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8036 // CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8037 // CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8038 // CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4
8039 // CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8040 // CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8041 // CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8042 // CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8043 // CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4
8044 // CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8045 // CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8046 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8047 // CHECK27-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8048 // CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8049 // CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8050 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8051 // CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8052 // CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8053 // CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8054 // CHECK27-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
8055 // CHECK27-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
8056 // CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8057 // CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8058 // CHECK27-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8059 // CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
8060 // CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8061 // CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8062 // CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
8063 // CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8064 // CHECK27: cond.true:
8065 // CHECK27-NEXT: br label [[COND_END:%.*]]
8066 // CHECK27: cond.false:
8067 // CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8068 // CHECK27-NEXT: br label [[COND_END]]
8069 // CHECK27: cond.end:
8070 // CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
8071 // CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8072 // CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8073 // CHECK27-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
8074 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8075 // CHECK27: omp.inner.for.cond:
8076 // CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8077 // CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8078 // CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
8079 // CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8080 // CHECK27: omp.inner.for.body:
8081 // CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8082 // CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
8083 // CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8084 // CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8085 // CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
8086 // CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
8087 // CHECK27-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
8088 // CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8089 // CHECK27: omp.body.continue:
8090 // CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8091 // CHECK27: omp.inner.for.inc:
8092 // CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8093 // CHECK27-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
8094 // CHECK27-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
8095 // CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
8096 // CHECK27: omp.inner.for.end:
8097 // CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8098 // CHECK27: omp.loop.exit:
8099 // CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
8100 // CHECK27-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8101 // CHECK27-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
8102 // CHECK27-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8103 // CHECK27: .omp.final.then:
8104 // CHECK27-NEXT: store i32 10, i32* [[I]], align 4
8105 // CHECK27-NEXT: br label [[DOTOMP_FINAL_DONE]]
8106 // CHECK27: .omp.final.done:
8107 // CHECK27-NEXT: ret void
8108 //
8109 //
8110 // CHECK27-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
8111 // CHECK27-SAME: () #[[ATTR7:[0-9]+]] {
8112 // CHECK27-NEXT: entry:
8113 // CHECK27-NEXT: call void @__tgt_register_requires(i64 1)
8114 // CHECK27-NEXT: ret void
8115 //
8116 //
8117 // CHECK28-LABEL: define {{[^@]+}}@main
8118 // CHECK28-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
8119 // CHECK28-NEXT: entry:
8120 // CHECK28-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
8121 // CHECK28-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8122 // CHECK28-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
8123 // CHECK28-NEXT: [[N:%.*]] = alloca i32, align 4
8124 // CHECK28-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
8125 // CHECK28-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
8126 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4
8127 // CHECK28-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
8128 // CHECK28-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8129 // CHECK28-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
8130 // CHECK28-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
8131 // CHECK28-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
8132 // CHECK28-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [4 x i64], align 4
8133 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4
8134 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8135 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8136 // CHECK28-NEXT: store i32 0, i32* [[RETVAL]], align 4
8137 // CHECK28-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8138 // CHECK28-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
8139 // CHECK28-NEXT: store i32 100, i32* [[N]], align 4
8140 // CHECK28-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
8141 // CHECK28-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
8142 // CHECK28-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
8143 // CHECK28-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
8144 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
8145 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4
8146 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[I_CASTED]], align 4
8147 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[I_CASTED]], align 4
8148 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
8149 // CHECK28-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4
8150 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4
8151 // CHECK28-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP0]], 4
8152 // CHECK28-NEXT: [[TMP7:%.*]] = sext i32 [[TMP6]] to i64
8153 // CHECK28-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8154 // CHECK28-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
8155 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[TMP9]], align 4
8156 // CHECK28-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8157 // CHECK28-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32*
8158 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[TMP11]], align 4
8159 // CHECK28-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
8160 // CHECK28-NEXT: store i64 4, i64* [[TMP12]], align 4
8161 // CHECK28-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
8162 // CHECK28-NEXT: store i8* null, i8** [[TMP13]], align 4
8163 // CHECK28-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
8164 // CHECK28-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32**
8165 // CHECK28-NEXT: store i32* [[VLA]], i32** [[TMP15]], align 4
8166 // CHECK28-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
8167 // CHECK28-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32**
8168 // CHECK28-NEXT: store i32* [[VLA]], i32** [[TMP17]], align 4
8169 // CHECK28-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
8170 // CHECK28-NEXT: store i64 [[TMP7]], i64* [[TMP18]], align 4
8171 // CHECK28-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
8172 // CHECK28-NEXT: store i8* null, i8** [[TMP19]], align 4
8173 // CHECK28-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
8174 // CHECK28-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
8175 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[TMP21]], align 4
8176 // CHECK28-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
8177 // CHECK28-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
8178 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[TMP23]], align 4
8179 // CHECK28-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
8180 // CHECK28-NEXT: store i64 4, i64* [[TMP24]], align 4
8181 // CHECK28-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
8182 // CHECK28-NEXT: store i8* null, i8** [[TMP25]], align 4
8183 // CHECK28-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
8184 // CHECK28-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
8185 // CHECK28-NEXT: store i32 [[TMP5]], i32* [[TMP27]], align 4
8186 // CHECK28-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
8187 // CHECK28-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32*
8188 // CHECK28-NEXT: store i32 [[TMP5]], i32* [[TMP29]], align 4
8189 // CHECK28-NEXT: [[TMP30:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
8190 // CHECK28-NEXT: store i64 4, i64* [[TMP30]], align 4
8191 // CHECK28-NEXT: [[TMP31:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
8192 // CHECK28-NEXT: store i8* null, i8** [[TMP31]], align 4
8193 // CHECK28-NEXT: [[TMP32:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8194 // CHECK28-NEXT: [[TMP33:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8195 // CHECK28-NEXT: [[TMP34:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
8196 // CHECK28-NEXT: [[TMP35:%.*]] = load i32, i32* [[N]], align 4
8197 // CHECK28-NEXT: store i32 [[TMP35]], i32* [[DOTCAPTURE_EXPR_]], align 4
8198 // CHECK28-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8199 // CHECK28-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP36]], 0
8200 // CHECK28-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8201 // CHECK28-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8202 // CHECK28-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8203 // CHECK28-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8204 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP37]], 1
8205 // CHECK28-NEXT: [[TMP38:%.*]] = zext i32 [[ADD]] to i64
8206 // CHECK28-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 [[TMP38]])
8207 // CHECK28-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166.region_id, i32 4, i8** [[TMP32]], i8** [[TMP33]], i64* [[TMP34]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
8208 // CHECK28-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
8209 // CHECK28-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8210 // CHECK28: omp_offload.failed:
8211 // CHECK28-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166(i32 [[TMP0]], i32* [[VLA]], i32 [[TMP3]], i32 [[TMP5]]) #[[ATTR5:[0-9]+]]
8212 // CHECK28-NEXT: br label [[OMP_OFFLOAD_CONT]]
8213 // CHECK28: omp_offload.cont:
8214 // CHECK28-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
8215 // CHECK28-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP41]])
8216 // CHECK28-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
8217 // CHECK28-NEXT: [[TMP42:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
8218 // CHECK28-NEXT: call void @llvm.stackrestore(i8* [[TMP42]])
8219 // CHECK28-NEXT: [[TMP43:%.*]] = load i32, i32* [[RETVAL]], align 4
8220 // CHECK28-NEXT: ret i32 [[TMP43]]
8221 //
8222 //
8223 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l166
8224 // CHECK28-SAME: (i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[I:%.*]], i32 [[N:%.*]]) #[[ATTR2:[0-9]+]] {
8225 // CHECK28-NEXT: entry:
8226 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8227 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8228 // CHECK28-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
8229 // CHECK28-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8230 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8231 // CHECK28-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8232 // CHECK28-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
8233 // CHECK28-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8234 // CHECK28-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8235 // CHECK28-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8236 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[I_ADDR]], i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
8237 // CHECK28-NEXT: ret void
8238 //
8239 //
8240 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined.
8241 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8242 // CHECK28-NEXT: entry:
8243 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8244 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8245 // CHECK28-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
8246 // CHECK28-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
8247 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8248 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8249 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8250 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4
8251 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8252 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8253 // CHECK28-NEXT: [[I3:%.*]] = alloca i32, align 4
8254 // CHECK28-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8255 // CHECK28-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8256 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8257 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8258 // CHECK28-NEXT: [[I4:%.*]] = alloca i32, align 4
8259 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8260 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8261 // CHECK28-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
8262 // CHECK28-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
8263 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8264 // CHECK28-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8265 // CHECK28-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
8266 // CHECK28-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4
8267 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8268 // CHECK28-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8269 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4
8270 // CHECK28-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
8271 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8272 // CHECK28-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
8273 // CHECK28-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8274 // CHECK28-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8275 // CHECK28-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8276 // CHECK28-NEXT: store i32 0, i32* [[I3]], align 4
8277 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8278 // CHECK28-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
8279 // CHECK28-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8280 // CHECK28: omp.precond.then:
8281 // CHECK28-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i32 16) ]
8282 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8283 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8284 // CHECK28-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4
8285 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8286 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8287 // CHECK28-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8288 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
8289 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP9]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8290 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8291 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8292 // CHECK28-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
8293 // CHECK28-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8294 // CHECK28: cond.true:
8295 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8296 // CHECK28-NEXT: br label [[COND_END:%.*]]
8297 // CHECK28: cond.false:
8298 // CHECK28-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8299 // CHECK28-NEXT: br label [[COND_END]]
8300 // CHECK28: cond.end:
8301 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
8302 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8303 // CHECK28-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8304 // CHECK28-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
8305 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8306 // CHECK28: omp.inner.for.cond:
8307 // CHECK28-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8308 // CHECK28-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8309 // CHECK28-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
8310 // CHECK28-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8311 // CHECK28: omp.inner.for.body:
8312 // CHECK28-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8313 // CHECK28-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8314 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[I4]], i32* [[TMP1]], i32 [[TMP2]], i32* [[TMP3]])
8315 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8316 // CHECK28: omp.inner.for.inc:
8317 // CHECK28-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8318 // CHECK28-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8319 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
8320 // CHECK28-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8321 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
8322 // CHECK28: omp.inner.for.end:
8323 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8324 // CHECK28: omp.loop.exit:
8325 // CHECK28-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8326 // CHECK28-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
8327 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
8328 // CHECK28-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8329 // CHECK28-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
8330 // CHECK28-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8331 // CHECK28: .omp.final.then:
8332 // CHECK28-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8333 // CHECK28-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0
8334 // CHECK28-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
8335 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
8336 // CHECK28-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
8337 // CHECK28-NEXT: store i32 [[ADD9]], i32* [[TMP0]], align 4
8338 // CHECK28-NEXT: br label [[DOTOMP_FINAL_DONE]]
8339 // CHECK28: .omp.final.done:
8340 // CHECK28-NEXT: br label [[OMP_PRECOND_END]]
8341 // CHECK28: omp.precond.end:
8342 // CHECK28-NEXT: ret void
8343 //
8344 //
8345 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..1
8346 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8347 // CHECK28-NEXT: entry:
8348 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8349 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8350 // CHECK28-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8351 // CHECK28-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8352 // CHECK28-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 4
8353 // CHECK28-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
8354 // CHECK28-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8355 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8356 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8357 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4
8358 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8359 // CHECK28-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8360 // CHECK28-NEXT: [[I3:%.*]] = alloca i32, align 4
8361 // CHECK28-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
8362 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8363 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8364 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8365 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8366 // CHECK28-NEXT: [[I4:%.*]] = alloca i32, align 4
8367 // CHECK28-NEXT: [[I5:%.*]] = alloca i32, align 4
8368 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8369 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8370 // CHECK28-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8371 // CHECK28-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8372 // CHECK28-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 4
8373 // CHECK28-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
8374 // CHECK28-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8375 // CHECK28-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8376 // CHECK28-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 4
8377 // CHECK28-NEXT: [[TMP1:%.*]] = load i32*, i32** [[N_ADDR]], align 4
8378 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8379 // CHECK28-NEXT: [[TMP3:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8380 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP1]], align 4
8381 // CHECK28-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
8382 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8383 // CHECK28-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
8384 // CHECK28-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8385 // CHECK28-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8386 // CHECK28-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8387 // CHECK28-NEXT: store i32 0, i32* [[I3]], align 4
8388 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8389 // CHECK28-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
8390 // CHECK28-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8391 // CHECK28: omp.precond.then:
8392 // CHECK28-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[TMP3]], i32 16) ]
8393 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP0]], align 4
8394 // CHECK28-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4
8395 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8396 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8397 // CHECK28-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
8398 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8399 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8400 // CHECK28-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_LB]], align 4
8401 // CHECK28-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_UB]], align 4
8402 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8403 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8404 // CHECK28-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8405 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
8406 // CHECK28-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP12]])
8407 // CHECK28-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8408 // CHECK28-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
8409 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP14]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8410 // CHECK28-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8411 // CHECK28-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8412 // CHECK28-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP15]], [[TMP16]]
8413 // CHECK28-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8414 // CHECK28: cond.true:
8415 // CHECK28-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8416 // CHECK28-NEXT: br label [[COND_END:%.*]]
8417 // CHECK28: cond.false:
8418 // CHECK28-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8419 // CHECK28-NEXT: br label [[COND_END]]
8420 // CHECK28: cond.end:
8421 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ [[TMP17]], [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
8422 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8423 // CHECK28-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8424 // CHECK28-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
8425 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8426 // CHECK28: omp.inner.for.cond:
8427 // CHECK28-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8428 // CHECK28-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8429 // CHECK28-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
8430 // CHECK28-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8431 // CHECK28: omp.inner.for.body:
8432 // CHECK28-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8433 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1
8434 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8435 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
8436 // CHECK28-NEXT: [[TMP23:%.*]] = load i32, i32* [[I4]], align 4
8437 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP3]], i32 [[TMP23]]
8438 // CHECK28-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
8439 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8440 // CHECK28: omp.body.continue:
8441 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8442 // CHECK28: omp.inner.for.inc:
8443 // CHECK28-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8444 // CHECK28-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], 1
8445 // CHECK28-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
8446 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
8447 // CHECK28: omp.inner.for.end:
8448 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8449 // CHECK28: omp.loop.exit:
8450 // CHECK28-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8451 // CHECK28-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
8452 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
8453 // CHECK28-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8454 // CHECK28-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
8455 // CHECK28-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8456 // CHECK28: .omp.final.then:
8457 // CHECK28-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8458 // CHECK28-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP29]], 0
8459 // CHECK28-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
8460 // CHECK28-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
8461 // CHECK28-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
8462 // CHECK28-NEXT: store i32 [[ADD12]], i32* [[TMP0]], align 4
8463 // CHECK28-NEXT: br label [[DOTOMP_FINAL_DONE]]
8464 // CHECK28: .omp.final.done:
8465 // CHECK28-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8466 // CHECK28-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
8467 // CHECK28-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
8468 // CHECK28: .omp.linear.pu:
8469 // CHECK28-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
8470 // CHECK28: .omp.linear.pu.done:
8471 // CHECK28-NEXT: br label [[OMP_PRECOND_END]]
8472 // CHECK28: omp.precond.end:
8473 // CHECK28-NEXT: ret void
8474 //
8475 //
8476 // CHECK28-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
8477 // CHECK28-SAME: (i32 [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat {
8478 // CHECK28-NEXT: entry:
8479 // CHECK28-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8480 // CHECK28-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
8481 // CHECK28-NEXT: [[TE:%.*]] = alloca i32, align 4
8482 // CHECK28-NEXT: [[TH:%.*]] = alloca i32, align 4
8483 // CHECK28-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4
8484 // CHECK28-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4
8485 // CHECK28-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
8486 // CHECK28-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
8487 // CHECK28-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
8488 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4
8489 // CHECK28-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8490 // CHECK28-NEXT: store i32 0, i32* [[TE]], align 4
8491 // CHECK28-NEXT: store i32 128, i32* [[TH]], align 4
8492 // CHECK28-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4
8493 // CHECK28-NEXT: store i32 [[TMP0]], i32* [[TE_CASTED]], align 4
8494 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE_CASTED]], align 4
8495 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
8496 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[TH_CASTED]], align 4
8497 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_CASTED]], align 4
8498 // CHECK28-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8499 // CHECK28-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
8500 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4
8501 // CHECK28-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8502 // CHECK28-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
8503 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4
8504 // CHECK28-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
8505 // CHECK28-NEXT: store i8* null, i8** [[TMP8]], align 4
8506 // CHECK28-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
8507 // CHECK28-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
8508 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
8509 // CHECK28-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
8510 // CHECK28-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
8511 // CHECK28-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4
8512 // CHECK28-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
8513 // CHECK28-NEXT: store i8* null, i8** [[TMP13]], align 4
8514 // CHECK28-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
8515 // CHECK28-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]**
8516 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 4
8517 // CHECK28-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
8518 // CHECK28-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]**
8519 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 4
8520 // CHECK28-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
8521 // CHECK28-NEXT: store i8* null, i8** [[TMP18]], align 4
8522 // CHECK28-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8523 // CHECK28-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8524 // CHECK28-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4
8525 // CHECK28-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 10)
8526 // CHECK28-NEXT: [[TMP22:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155.region_id, i32 3, i8** [[TMP19]], i8** [[TMP20]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 [[TMP21]], i32 0)
8527 // CHECK28-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
8528 // CHECK28-NEXT: br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8529 // CHECK28: omp_offload.failed:
8530 // CHECK28-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR5]]
8531 // CHECK28-NEXT: br label [[OMP_OFFLOAD_CONT]]
8532 // CHECK28: omp_offload.cont:
8533 // CHECK28-NEXT: ret i32 0
8534 //
8535 //
8536 // CHECK28-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l155
8537 // CHECK28-SAME: (i32 [[TE:%.*]], i32 [[TH:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8538 // CHECK28-NEXT: entry:
8539 // CHECK28-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4
8540 // CHECK28-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4
8541 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8542 // CHECK28-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
8543 // CHECK28-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4
8544 // CHECK28-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4
8545 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8546 // CHECK28-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8547 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4
8548 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4
8549 // CHECK28-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
8550 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]])
8551 // CHECK28-NEXT: ret void
8552 //
8553 //
8554 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..2
8555 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8556 // CHECK28-NEXT: entry:
8557 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8558 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8559 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8560 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8561 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4
8562 // CHECK28-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8563 // CHECK28-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8564 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8565 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8566 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4
8567 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8568 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8569 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8570 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8571 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8572 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
8573 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8574 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8575 // CHECK28-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8576 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
8577 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8578 // CHECK28-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8579 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
8580 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8581 // CHECK28: cond.true:
8582 // CHECK28-NEXT: br label [[COND_END:%.*]]
8583 // CHECK28: cond.false:
8584 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8585 // CHECK28-NEXT: br label [[COND_END]]
8586 // CHECK28: cond.end:
8587 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
8588 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8589 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8590 // CHECK28-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
8591 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8592 // CHECK28: omp.inner.for.cond:
8593 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8594 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8595 // CHECK28-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8596 // CHECK28-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8597 // CHECK28: omp.inner.for.body:
8598 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8599 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8600 // CHECK28-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
8601 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8602 // CHECK28: omp.inner.for.inc:
8603 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8604 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8605 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
8606 // CHECK28-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8607 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
8608 // CHECK28: omp.inner.for.end:
8609 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8610 // CHECK28: omp.loop.exit:
8611 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
8612 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8613 // CHECK28-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
8614 // CHECK28-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8615 // CHECK28: .omp.final.then:
8616 // CHECK28-NEXT: store i32 10, i32* [[I]], align 4
8617 // CHECK28-NEXT: br label [[DOTOMP_FINAL_DONE]]
8618 // CHECK28: .omp.final.done:
8619 // CHECK28-NEXT: ret void
8620 //
8621 //
8622 // CHECK28-LABEL: define {{[^@]+}}@.omp_outlined..3
8623 // CHECK28-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8624 // CHECK28-NEXT: entry:
8625 // CHECK28-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8626 // CHECK28-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8627 // CHECK28-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8628 // CHECK28-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8629 // CHECK28-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8630 // CHECK28-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8631 // CHECK28-NEXT: [[TMP:%.*]] = alloca i32, align 4
8632 // CHECK28-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8633 // CHECK28-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8634 // CHECK28-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8635 // CHECK28-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8636 // CHECK28-NEXT: [[I:%.*]] = alloca i32, align 4
8637 // CHECK28-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8638 // CHECK28-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8639 // CHECK28-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8640 // CHECK28-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8641 // CHECK28-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8642 // CHECK28-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8643 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8644 // CHECK28-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8645 // CHECK28-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8646 // CHECK28-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8647 // CHECK28-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
8648 // CHECK28-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
8649 // CHECK28-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8650 // CHECK28-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8651 // CHECK28-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8652 // CHECK28-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
8653 // CHECK28-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8654 // CHECK28-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8655 // CHECK28-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
8656 // CHECK28-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8657 // CHECK28: cond.true:
8658 // CHECK28-NEXT: br label [[COND_END:%.*]]
8659 // CHECK28: cond.false:
8660 // CHECK28-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8661 // CHECK28-NEXT: br label [[COND_END]]
8662 // CHECK28: cond.end:
8663 // CHECK28-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
8664 // CHECK28-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8665 // CHECK28-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8666 // CHECK28-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
8667 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8668 // CHECK28: omp.inner.for.cond:
8669 // CHECK28-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8670 // CHECK28-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8671 // CHECK28-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
8672 // CHECK28-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8673 // CHECK28: omp.inner.for.body:
8674 // CHECK28-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8675 // CHECK28-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
8676 // CHECK28-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8677 // CHECK28-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8678 // CHECK28-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
8679 // CHECK28-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
8680 // CHECK28-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
8681 // CHECK28-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8682 // CHECK28: omp.body.continue:
8683 // CHECK28-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8684 // CHECK28: omp.inner.for.inc:
8685 // CHECK28-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8686 // CHECK28-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
8687 // CHECK28-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
8688 // CHECK28-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
8689 // CHECK28: omp.inner.for.end:
8690 // CHECK28-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8691 // CHECK28: omp.loop.exit:
8692 // CHECK28-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
8693 // CHECK28-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8694 // CHECK28-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
8695 // CHECK28-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8696 // CHECK28: .omp.final.then:
8697 // CHECK28-NEXT: store i32 10, i32* [[I]], align 4
8698 // CHECK28-NEXT: br label [[DOTOMP_FINAL_DONE]]
8699 // CHECK28: .omp.final.done:
8700 // CHECK28-NEXT: ret void
8701 //
8702 //
8703 // CHECK28-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
8704 // CHECK28-SAME: () #[[ATTR7:[0-9]+]] {
8705 // CHECK28-NEXT: entry:
8706 // CHECK28-NEXT: call void @__tgt_register_requires(i64 1)
8707 // CHECK28-NEXT: ret void
8708 //
8709 //
8710 // CHECK29-LABEL: define {{[^@]+}}@main
8711 // CHECK29-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
8712 // CHECK29-NEXT: entry:
8713 // CHECK29-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
8714 // CHECK29-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8715 // CHECK29-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
8716 // CHECK29-NEXT: [[N:%.*]] = alloca i32, align 4
8717 // CHECK29-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
8718 // CHECK29-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
8719 // CHECK29-NEXT: [[I:%.*]] = alloca i32, align 4
8720 // CHECK29-NEXT: [[TMP:%.*]] = alloca i32, align 4
8721 // CHECK29-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8722 // CHECK29-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8723 // CHECK29-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8724 // CHECK29-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8725 // CHECK29-NEXT: [[I3:%.*]] = alloca i32, align 4
8726 // CHECK29-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8727 // CHECK29-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
8728 // CHECK29-NEXT: [[I4:%.*]] = alloca i32, align 4
8729 // CHECK29-NEXT: [[I5:%.*]] = alloca i32, align 4
8730 // CHECK29-NEXT: store i32 0, i32* [[RETVAL]], align 4
8731 // CHECK29-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8732 // CHECK29-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
8733 // CHECK29-NEXT: store i32 100, i32* [[N]], align 4
8734 // CHECK29-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
8735 // CHECK29-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
8736 // CHECK29-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
8737 // CHECK29-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
8738 // CHECK29-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
8739 // CHECK29-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
8740 // CHECK29-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
8741 // CHECK29-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
8742 // CHECK29-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8743 // CHECK29-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8744 // CHECK29-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8745 // CHECK29-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8746 // CHECK29-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8747 // CHECK29-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8748 // CHECK29-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8749 // CHECK29-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
8750 // CHECK29-NEXT: store i32 0, i32* [[I3]], align 4
8751 // CHECK29-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8752 // CHECK29-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
8753 // CHECK29-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
8754 // CHECK29: simd.if.then:
8755 // CHECK29-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8756 // CHECK29-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
8757 // CHECK29-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[VLA]], i64 16) ]
8758 // CHECK29-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4
8759 // CHECK29-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4
8760 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8761 // CHECK29: omp.inner.for.cond:
8762 // CHECK29-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8763 // CHECK29-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8764 // CHECK29-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
8765 // CHECK29-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8766 // CHECK29: omp.inner.for.body:
8767 // CHECK29-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8768 // CHECK29-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
8769 // CHECK29-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8770 // CHECK29-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
8771 // CHECK29-NEXT: [[TMP12:%.*]] = load i32, i32* [[I4]], align 4
8772 // CHECK29-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
8773 // CHECK29-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
8774 // CHECK29-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
8775 // CHECK29-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8776 // CHECK29: omp.body.continue:
8777 // CHECK29-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8778 // CHECK29: omp.inner.for.inc:
8779 // CHECK29-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8780 // CHECK29-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP13]], 1
8781 // CHECK29-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
8782 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
8783 // CHECK29: omp.inner.for.end:
8784 // CHECK29-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8785 // CHECK29-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP14]], 0
8786 // CHECK29-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
8787 // CHECK29-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
8788 // CHECK29-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
8789 // CHECK29-NEXT: store i32 [[ADD11]], i32* [[I]], align 4
8790 // CHECK29-NEXT: br label [[SIMD_IF_END]]
8791 // CHECK29: simd.if.end:
8792 // CHECK29-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
8793 // CHECK29-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP15]])
8794 // CHECK29-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
8795 // CHECK29-NEXT: [[TMP16:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
8796 // CHECK29-NEXT: call void @llvm.stackrestore(i8* [[TMP16]])
8797 // CHECK29-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4
8798 // CHECK29-NEXT: ret i32 [[TMP17]]
8799 //
8800 //
8801 // CHECK29-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
8802 // CHECK29-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR3:[0-9]+]] comdat {
8803 // CHECK29-NEXT: entry:
8804 // CHECK29-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8805 // CHECK29-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
8806 // CHECK29-NEXT: [[TE:%.*]] = alloca i32, align 4
8807 // CHECK29-NEXT: [[TH:%.*]] = alloca i32, align 4
8808 // CHECK29-NEXT: [[TMP:%.*]] = alloca i32, align 4
8809 // CHECK29-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8810 // CHECK29-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8811 // CHECK29-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8812 // CHECK29-NEXT: [[I:%.*]] = alloca i32, align 4
8813 // CHECK29-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8814 // CHECK29-NEXT: store i32 0, i32* [[TE]], align 4
8815 // CHECK29-NEXT: store i32 128, i32* [[TH]], align 4
8816 // CHECK29-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8817 // CHECK29-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8818 // CHECK29-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8819 // CHECK29-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
8820 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8821 // CHECK29: omp.inner.for.cond:
8822 // CHECK29-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
8823 // CHECK29-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
8824 // CHECK29-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8825 // CHECK29-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8826 // CHECK29: omp.inner.for.body:
8827 // CHECK29-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
8828 // CHECK29-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8829 // CHECK29-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8830 // CHECK29-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5
8831 // CHECK29-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5
8832 // CHECK29-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
8833 // CHECK29-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
8834 // CHECK29-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
8835 // CHECK29-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8836 // CHECK29: omp.body.continue:
8837 // CHECK29-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8838 // CHECK29: omp.inner.for.inc:
8839 // CHECK29-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
8840 // CHECK29-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
8841 // CHECK29-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
8842 // CHECK29-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
8843 // CHECK29: omp.inner.for.end:
8844 // CHECK29-NEXT: store i32 10, i32* [[I]], align 4
8845 // CHECK29-NEXT: ret i32 0
8846 //
8847 //
8848 // CHECK30-LABEL: define {{[^@]+}}@main
8849 // CHECK30-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
8850 // CHECK30-NEXT: entry:
8851 // CHECK30-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
8852 // CHECK30-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8853 // CHECK30-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
8854 // CHECK30-NEXT: [[N:%.*]] = alloca i32, align 4
8855 // CHECK30-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
8856 // CHECK30-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
8857 // CHECK30-NEXT: [[I:%.*]] = alloca i32, align 4
8858 // CHECK30-NEXT: [[TMP:%.*]] = alloca i32, align 4
8859 // CHECK30-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8860 // CHECK30-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8861 // CHECK30-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8862 // CHECK30-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8863 // CHECK30-NEXT: [[I3:%.*]] = alloca i32, align 4
8864 // CHECK30-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8865 // CHECK30-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
8866 // CHECK30-NEXT: [[I4:%.*]] = alloca i32, align 4
8867 // CHECK30-NEXT: [[I5:%.*]] = alloca i32, align 4
8868 // CHECK30-NEXT: store i32 0, i32* [[RETVAL]], align 4
8869 // CHECK30-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8870 // CHECK30-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
8871 // CHECK30-NEXT: store i32 100, i32* [[N]], align 4
8872 // CHECK30-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
8873 // CHECK30-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
8874 // CHECK30-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
8875 // CHECK30-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
8876 // CHECK30-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
8877 // CHECK30-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
8878 // CHECK30-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
8879 // CHECK30-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
8880 // CHECK30-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8881 // CHECK30-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8882 // CHECK30-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8883 // CHECK30-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8884 // CHECK30-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8885 // CHECK30-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8886 // CHECK30-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8887 // CHECK30-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
8888 // CHECK30-NEXT: store i32 0, i32* [[I3]], align 4
8889 // CHECK30-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8890 // CHECK30-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
8891 // CHECK30-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
8892 // CHECK30: simd.if.then:
8893 // CHECK30-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8894 // CHECK30-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
8895 // CHECK30-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[VLA]], i64 16) ]
8896 // CHECK30-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4
8897 // CHECK30-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4
8898 // CHECK30-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8899 // CHECK30: omp.inner.for.cond:
8900 // CHECK30-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8901 // CHECK30-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8902 // CHECK30-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
8903 // CHECK30-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8904 // CHECK30: omp.inner.for.body:
8905 // CHECK30-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8906 // CHECK30-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
8907 // CHECK30-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8908 // CHECK30-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
8909 // CHECK30-NEXT: [[TMP12:%.*]] = load i32, i32* [[I4]], align 4
8910 // CHECK30-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
8911 // CHECK30-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
8912 // CHECK30-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
8913 // CHECK30-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8914 // CHECK30: omp.body.continue:
8915 // CHECK30-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8916 // CHECK30: omp.inner.for.inc:
8917 // CHECK30-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8918 // CHECK30-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP13]], 1
8919 // CHECK30-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
8920 // CHECK30-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
8921 // CHECK30: omp.inner.for.end:
8922 // CHECK30-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8923 // CHECK30-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP14]], 0
8924 // CHECK30-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
8925 // CHECK30-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
8926 // CHECK30-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
8927 // CHECK30-NEXT: store i32 [[ADD11]], i32* [[I]], align 4
8928 // CHECK30-NEXT: br label [[SIMD_IF_END]]
8929 // CHECK30: simd.if.end:
8930 // CHECK30-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
8931 // CHECK30-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP15]])
8932 // CHECK30-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
8933 // CHECK30-NEXT: [[TMP16:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
8934 // CHECK30-NEXT: call void @llvm.stackrestore(i8* [[TMP16]])
8935 // CHECK30-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4
8936 // CHECK30-NEXT: ret i32 [[TMP17]]
8937 //
8938 //
8939 // CHECK30-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
8940 // CHECK30-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR3:[0-9]+]] comdat {
8941 // CHECK30-NEXT: entry:
8942 // CHECK30-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8943 // CHECK30-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
8944 // CHECK30-NEXT: [[TE:%.*]] = alloca i32, align 4
8945 // CHECK30-NEXT: [[TH:%.*]] = alloca i32, align 4
8946 // CHECK30-NEXT: [[TMP:%.*]] = alloca i32, align 4
8947 // CHECK30-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8948 // CHECK30-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8949 // CHECK30-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8950 // CHECK30-NEXT: [[I:%.*]] = alloca i32, align 4
8951 // CHECK30-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8952 // CHECK30-NEXT: store i32 0, i32* [[TE]], align 4
8953 // CHECK30-NEXT: store i32 128, i32* [[TH]], align 4
8954 // CHECK30-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8955 // CHECK30-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8956 // CHECK30-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8957 // CHECK30-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
8958 // CHECK30-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8959 // CHECK30: omp.inner.for.cond:
8960 // CHECK30-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
8961 // CHECK30-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !5
8962 // CHECK30-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8963 // CHECK30-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8964 // CHECK30: omp.inner.for.body:
8965 // CHECK30-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
8966 // CHECK30-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8967 // CHECK30-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8968 // CHECK30-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !5
8969 // CHECK30-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !5
8970 // CHECK30-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
8971 // CHECK30-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
8972 // CHECK30-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !5
8973 // CHECK30-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8974 // CHECK30: omp.body.continue:
8975 // CHECK30-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8976 // CHECK30: omp.inner.for.inc:
8977 // CHECK30-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
8978 // CHECK30-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
8979 // CHECK30-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
8980 // CHECK30-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
8981 // CHECK30: omp.inner.for.end:
8982 // CHECK30-NEXT: store i32 10, i32* [[I]], align 4
8983 // CHECK30-NEXT: ret i32 0
8984 //
8985 //
8986 // CHECK31-LABEL: define {{[^@]+}}@main
8987 // CHECK31-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
8988 // CHECK31-NEXT: entry:
8989 // CHECK31-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
8990 // CHECK31-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8991 // CHECK31-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
8992 // CHECK31-NEXT: [[N:%.*]] = alloca i32, align 4
8993 // CHECK31-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
8994 // CHECK31-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
8995 // CHECK31-NEXT: [[I:%.*]] = alloca i32, align 4
8996 // CHECK31-NEXT: [[TMP:%.*]] = alloca i32, align 4
8997 // CHECK31-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8998 // CHECK31-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8999 // CHECK31-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9000 // CHECK31-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9001 // CHECK31-NEXT: [[I3:%.*]] = alloca i32, align 4
9002 // CHECK31-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9003 // CHECK31-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
9004 // CHECK31-NEXT: [[I4:%.*]] = alloca i32, align 4
9005 // CHECK31-NEXT: [[I5:%.*]] = alloca i32, align 4
9006 // CHECK31-NEXT: store i32 0, i32* [[RETVAL]], align 4
9007 // CHECK31-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9008 // CHECK31-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
9009 // CHECK31-NEXT: store i32 100, i32* [[N]], align 4
9010 // CHECK31-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
9011 // CHECK31-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
9012 // CHECK31-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
9013 // CHECK31-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
9014 // CHECK31-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
9015 // CHECK31-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
9016 // CHECK31-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
9017 // CHECK31-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9018 // CHECK31-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
9019 // CHECK31-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9020 // CHECK31-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9021 // CHECK31-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9022 // CHECK31-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9023 // CHECK31-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9024 // CHECK31-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
9025 // CHECK31-NEXT: store i32 0, i32* [[I3]], align 4
9026 // CHECK31-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9027 // CHECK31-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9028 // CHECK31-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
9029 // CHECK31: simd.if.then:
9030 // CHECK31-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9031 // CHECK31-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9032 // CHECK31-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[VLA]], i32 16) ]
9033 // CHECK31-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4
9034 // CHECK31-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4
9035 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9036 // CHECK31: omp.inner.for.cond:
9037 // CHECK31-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9038 // CHECK31-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9039 // CHECK31-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
9040 // CHECK31-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9041 // CHECK31: omp.inner.for.body:
9042 // CHECK31-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9043 // CHECK31-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
9044 // CHECK31-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9045 // CHECK31-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
9046 // CHECK31-NEXT: [[TMP11:%.*]] = load i32, i32* [[I4]], align 4
9047 // CHECK31-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP11]]
9048 // CHECK31-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
9049 // CHECK31-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9050 // CHECK31: omp.body.continue:
9051 // CHECK31-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9052 // CHECK31: omp.inner.for.inc:
9053 // CHECK31-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9054 // CHECK31-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1
9055 // CHECK31-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
9056 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
9057 // CHECK31: omp.inner.for.end:
9058 // CHECK31-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9059 // CHECK31-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP13]], 0
9060 // CHECK31-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
9061 // CHECK31-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
9062 // CHECK31-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
9063 // CHECK31-NEXT: store i32 [[ADD11]], i32* [[I]], align 4
9064 // CHECK31-NEXT: br label [[SIMD_IF_END]]
9065 // CHECK31: simd.if.end:
9066 // CHECK31-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
9067 // CHECK31-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP14]])
9068 // CHECK31-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
9069 // CHECK31-NEXT: [[TMP15:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
9070 // CHECK31-NEXT: call void @llvm.stackrestore(i8* [[TMP15]])
9071 // CHECK31-NEXT: [[TMP16:%.*]] = load i32, i32* [[RETVAL]], align 4
9072 // CHECK31-NEXT: ret i32 [[TMP16]]
9073 //
9074 //
9075 // CHECK31-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
9076 // CHECK31-SAME: (i32 [[ARGC:%.*]]) #[[ATTR3:[0-9]+]] comdat {
9077 // CHECK31-NEXT: entry:
9078 // CHECK31-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9079 // CHECK31-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
9080 // CHECK31-NEXT: [[TE:%.*]] = alloca i32, align 4
9081 // CHECK31-NEXT: [[TH:%.*]] = alloca i32, align 4
9082 // CHECK31-NEXT: [[TMP:%.*]] = alloca i32, align 4
9083 // CHECK31-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9084 // CHECK31-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9085 // CHECK31-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9086 // CHECK31-NEXT: [[I:%.*]] = alloca i32, align 4
9087 // CHECK31-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9088 // CHECK31-NEXT: store i32 0, i32* [[TE]], align 4
9089 // CHECK31-NEXT: store i32 128, i32* [[TH]], align 4
9090 // CHECK31-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9091 // CHECK31-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9092 // CHECK31-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9093 // CHECK31-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
9094 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9095 // CHECK31: omp.inner.for.cond:
9096 // CHECK31-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9097 // CHECK31-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
9098 // CHECK31-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
9099 // CHECK31-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9100 // CHECK31: omp.inner.for.body:
9101 // CHECK31-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9102 // CHECK31-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
9103 // CHECK31-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9104 // CHECK31-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
9105 // CHECK31-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
9106 // CHECK31-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]]
9107 // CHECK31-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
9108 // CHECK31-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9109 // CHECK31: omp.body.continue:
9110 // CHECK31-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9111 // CHECK31: omp.inner.for.inc:
9112 // CHECK31-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9113 // CHECK31-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
9114 // CHECK31-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9115 // CHECK31-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
9116 // CHECK31: omp.inner.for.end:
9117 // CHECK31-NEXT: store i32 10, i32* [[I]], align 4
9118 // CHECK31-NEXT: ret i32 0
9119 //
9120 //
9121 // CHECK32-LABEL: define {{[^@]+}}@main
9122 // CHECK32-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
9123 // CHECK32-NEXT: entry:
9124 // CHECK32-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
9125 // CHECK32-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9126 // CHECK32-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
9127 // CHECK32-NEXT: [[N:%.*]] = alloca i32, align 4
9128 // CHECK32-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
9129 // CHECK32-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
9130 // CHECK32-NEXT: [[I:%.*]] = alloca i32, align 4
9131 // CHECK32-NEXT: [[TMP:%.*]] = alloca i32, align 4
9132 // CHECK32-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9133 // CHECK32-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9134 // CHECK32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9135 // CHECK32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9136 // CHECK32-NEXT: [[I3:%.*]] = alloca i32, align 4
9137 // CHECK32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9138 // CHECK32-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
9139 // CHECK32-NEXT: [[I4:%.*]] = alloca i32, align 4
9140 // CHECK32-NEXT: [[I5:%.*]] = alloca i32, align 4
9141 // CHECK32-NEXT: store i32 0, i32* [[RETVAL]], align 4
9142 // CHECK32-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9143 // CHECK32-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
9144 // CHECK32-NEXT: store i32 100, i32* [[N]], align 4
9145 // CHECK32-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
9146 // CHECK32-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
9147 // CHECK32-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
9148 // CHECK32-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
9149 // CHECK32-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
9150 // CHECK32-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
9151 // CHECK32-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
9152 // CHECK32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9153 // CHECK32-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
9154 // CHECK32-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9155 // CHECK32-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9156 // CHECK32-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9157 // CHECK32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9158 // CHECK32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9159 // CHECK32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
9160 // CHECK32-NEXT: store i32 0, i32* [[I3]], align 4
9161 // CHECK32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9162 // CHECK32-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9163 // CHECK32-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
9164 // CHECK32: simd.if.then:
9165 // CHECK32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9166 // CHECK32-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
9167 // CHECK32-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[VLA]], i32 16) ]
9168 // CHECK32-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4
9169 // CHECK32-NEXT: store i32 [[TMP7]], i32* [[DOTLINEAR_START]], align 4
9170 // CHECK32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9171 // CHECK32: omp.inner.for.cond:
9172 // CHECK32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9173 // CHECK32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9174 // CHECK32-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
9175 // CHECK32-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9176 // CHECK32: omp.inner.for.body:
9177 // CHECK32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9178 // CHECK32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
9179 // CHECK32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9180 // CHECK32-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
9181 // CHECK32-NEXT: [[TMP11:%.*]] = load i32, i32* [[I4]], align 4
9182 // CHECK32-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP11]]
9183 // CHECK32-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
9184 // CHECK32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9185 // CHECK32: omp.body.continue:
9186 // CHECK32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9187 // CHECK32: omp.inner.for.inc:
9188 // CHECK32-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9189 // CHECK32-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], 1
9190 // CHECK32-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
9191 // CHECK32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
9192 // CHECK32: omp.inner.for.end:
9193 // CHECK32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9194 // CHECK32-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP13]], 0
9195 // CHECK32-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
9196 // CHECK32-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
9197 // CHECK32-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
9198 // CHECK32-NEXT: store i32 [[ADD11]], i32* [[I]], align 4
9199 // CHECK32-NEXT: br label [[SIMD_IF_END]]
9200 // CHECK32: simd.if.end:
9201 // CHECK32-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
9202 // CHECK32-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP14]])
9203 // CHECK32-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
9204 // CHECK32-NEXT: [[TMP15:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
9205 // CHECK32-NEXT: call void @llvm.stackrestore(i8* [[TMP15]])
9206 // CHECK32-NEXT: [[TMP16:%.*]] = load i32, i32* [[RETVAL]], align 4
9207 // CHECK32-NEXT: ret i32 [[TMP16]]
9208 //
9209 //
9210 // CHECK32-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
9211 // CHECK32-SAME: (i32 [[ARGC:%.*]]) #[[ATTR3:[0-9]+]] comdat {
9212 // CHECK32-NEXT: entry:
9213 // CHECK32-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9214 // CHECK32-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
9215 // CHECK32-NEXT: [[TE:%.*]] = alloca i32, align 4
9216 // CHECK32-NEXT: [[TH:%.*]] = alloca i32, align 4
9217 // CHECK32-NEXT: [[TMP:%.*]] = alloca i32, align 4
9218 // CHECK32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9219 // CHECK32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9220 // CHECK32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9221 // CHECK32-NEXT: [[I:%.*]] = alloca i32, align 4
9222 // CHECK32-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9223 // CHECK32-NEXT: store i32 0, i32* [[TE]], align 4
9224 // CHECK32-NEXT: store i32 128, i32* [[TH]], align 4
9225 // CHECK32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9226 // CHECK32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9227 // CHECK32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9228 // CHECK32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
9229 // CHECK32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9230 // CHECK32: omp.inner.for.cond:
9231 // CHECK32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9232 // CHECK32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
9233 // CHECK32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
9234 // CHECK32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9235 // CHECK32: omp.inner.for.body:
9236 // CHECK32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9237 // CHECK32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
9238 // CHECK32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9239 // CHECK32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
9240 // CHECK32-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
9241 // CHECK32-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]]
9242 // CHECK32-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
9243 // CHECK32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9244 // CHECK32: omp.body.continue:
9245 // CHECK32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9246 // CHECK32: omp.inner.for.inc:
9247 // CHECK32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9248 // CHECK32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
9249 // CHECK32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
9250 // CHECK32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
9251 // CHECK32: omp.inner.for.end:
9252 // CHECK32-NEXT: store i32 10, i32* [[I]], align 4
9253 // CHECK32-NEXT: ret i32 0
9254 //
9255