1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
5 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
8
9 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
10 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
12 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
13 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8
15
16 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
19
20 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
21 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
22 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
23
24 // expected-no-diagnostics
25 #ifndef HEADER
26 #define HEADER
27
28 template <typename T>
tmain()29 T tmain() {
30 T t_var = T();
31 T vec[] = {1, 2};
32 #pragma omp target
33 #pragma omp teams distribute parallel for simd reduction(+: t_var)
34 for (int i = 0; i < 2; ++i) {
35 t_var += (T) i;
36 }
37 return T();
38 }
39
main()40 int main() {
41 static int sivar;
42 #ifdef LAMBDA
43
44 [&]() {
45 #pragma omp target
46 #pragma omp teams distribute parallel for simd reduction(+: sivar)
47 for (int i = 0; i < 2; ++i) {
48
49 // Skip global and bound tid vars
50
51
52
53 // Skip global and bound tid vars, and prev lb and ub vars
54 // skip loop vars
55
56
57 sivar += i;
58
59 [&]() {
60
61 sivar += 4;
62
63 }();
64 }
65 }();
66 return 0;
67
68
69 #else
70 #pragma omp target
71 #pragma omp teams distribute parallel for simd reduction(+: sivar)
72 for (int i = 0; i < 2; ++i) {
73 sivar += i;
74 }
75 return tmain<int>();
76 #endif
77 }
78
79
80
81
82 // Skip global and bound tid vars
83
84
85 // Skip global and bound tid vars, and prev lb and ub
86 // skip loop vars
87
88
89
90
91 // Skip global and bound tid vars
92
93
94 // Skip global and bound tid vars, and prev lb and ub vars
95 // skip loop vars
96
97
98
99 #endif
100 // CHECK1-LABEL: define {{[^@]+}}@main
101 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
102 // CHECK1-NEXT: entry:
103 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
104 // CHECK1-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8
105 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
106 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
107 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
108 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
109 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
110 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
111 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32*
112 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
113 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8
114 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
115 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
116 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
117 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
118 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
119 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
120 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
121 // CHECK1-NEXT: store i8* null, i8** [[TMP6]], align 8
122 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
123 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
124 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 2)
125 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
126 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
127 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
128 // CHECK1: omp_offload.failed:
129 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
130 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
131 // CHECK1: omp_offload.cont:
132 // CHECK1-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
133 // CHECK1-NEXT: ret i32 [[CALL]]
134 //
135 //
136 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70
137 // CHECK1-SAME: (i64 [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
138 // CHECK1-NEXT: entry:
139 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8
140 // CHECK1-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8
141 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
142 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
143 // CHECK1-NEXT: ret void
144 //
145 //
146 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
147 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
148 // CHECK1-NEXT: entry:
149 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
150 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
151 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
152 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
153 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
154 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
155 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
156 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
157 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
158 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
159 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
160 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
161 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
162 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
163 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
164 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
165 // CHECK1-NEXT: store i32 0, i32* [[SIVAR1]], align 4
166 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
167 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
168 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
169 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
170 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
171 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
172 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
173 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
174 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
175 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
176 // CHECK1: cond.true:
177 // CHECK1-NEXT: br label [[COND_END:%.*]]
178 // CHECK1: cond.false:
179 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
180 // CHECK1-NEXT: br label [[COND_END]]
181 // CHECK1: cond.end:
182 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
183 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
184 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
185 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
186 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
187 // CHECK1: omp.inner.for.cond:
188 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
189 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
190 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
191 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
192 // CHECK1: omp.inner.for.body:
193 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
194 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
195 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
196 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
197 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[SIVAR1]])
198 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
199 // CHECK1: omp.inner.for.inc:
200 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
201 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
202 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
203 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
204 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
205 // CHECK1: omp.inner.for.end:
206 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
207 // CHECK1: omp.loop.exit:
208 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
209 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
210 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
211 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
212 // CHECK1: .omp.final.then:
213 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4
214 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
215 // CHECK1: .omp.final.done:
216 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
217 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i32* [[SIVAR1]] to i8*
218 // CHECK1-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
219 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
220 // CHECK1-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
221 // CHECK1-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
222 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
223 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
224 // CHECK1-NEXT: ]
225 // CHECK1: .omp.reduction.case1:
226 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
227 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR1]], align 4
228 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
229 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
230 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
231 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
232 // CHECK1: .omp.reduction.case2:
233 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[SIVAR1]], align 4
234 // CHECK1-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
235 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
236 // CHECK1: .omp.reduction.default:
237 // CHECK1-NEXT: ret void
238 //
239 //
240 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
241 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
242 // CHECK1-NEXT: entry:
243 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
244 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
245 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
246 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
247 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
248 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
249 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
250 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
251 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
252 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
253 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
254 // CHECK1-NEXT: [[SIVAR2:%.*]] = alloca i32, align 4
255 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
256 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
257 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
258 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
259 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
260 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
261 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
262 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
263 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
264 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
265 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
266 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
267 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
268 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
269 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
270 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
271 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
272 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
273 // CHECK1-NEXT: store i32 0, i32* [[SIVAR2]], align 4
274 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
275 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
276 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
277 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
278 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
279 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
280 // CHECK1: cond.true:
281 // CHECK1-NEXT: br label [[COND_END:%.*]]
282 // CHECK1: cond.false:
283 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
284 // CHECK1-NEXT: br label [[COND_END]]
285 // CHECK1: cond.end:
286 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
287 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
288 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
289 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
290 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
291 // CHECK1: omp.inner.for.cond:
292 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
293 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
294 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
295 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
296 // CHECK1: omp.inner.for.body:
297 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
298 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
299 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
300 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
301 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
302 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR2]], align 4
303 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
304 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[SIVAR2]], align 4
305 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
306 // CHECK1: omp.body.continue:
307 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
308 // CHECK1: omp.inner.for.inc:
309 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
310 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1
311 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
312 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
313 // CHECK1: omp.inner.for.end:
314 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
315 // CHECK1: omp.loop.exit:
316 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
317 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
318 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
319 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
320 // CHECK1: .omp.final.then:
321 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4
322 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
323 // CHECK1: .omp.final.done:
324 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
325 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i32* [[SIVAR2]] to i8*
326 // CHECK1-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
327 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
328 // CHECK1-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
329 // CHECK1-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
330 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
331 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
332 // CHECK1-NEXT: ]
333 // CHECK1: .omp.reduction.case1:
334 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
335 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR2]], align 4
336 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
337 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4
338 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
339 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
340 // CHECK1: .omp.reduction.case2:
341 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[SIVAR2]], align 4
342 // CHECK1-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
343 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
344 // CHECK1: .omp.reduction.default:
345 // CHECK1-NEXT: ret void
346 //
347 //
348 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
349 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
350 // CHECK1-NEXT: entry:
351 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
352 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
353 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
354 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
355 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
356 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
357 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
358 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
359 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
360 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
361 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
362 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
363 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
364 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
365 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
366 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
367 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
368 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
369 // CHECK1-NEXT: ret void
370 //
371 //
372 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
373 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
374 // CHECK1-NEXT: entry:
375 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
376 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
377 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
378 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
379 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
380 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
381 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
382 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
383 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
384 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
385 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
386 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
387 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
388 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
389 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
390 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
391 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
392 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
393 // CHECK1-NEXT: ret void
394 //
395 //
396 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
397 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat {
398 // CHECK1-NEXT: entry:
399 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
400 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
401 // CHECK1-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
402 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
403 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
404 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
405 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
406 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4
407 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
408 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
409 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4
410 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
411 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4
412 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
413 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
414 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64*
415 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP4]], align 8
416 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
417 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
418 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP6]], align 8
419 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
420 // CHECK1-NEXT: store i8* null, i8** [[TMP7]], align 8
421 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
422 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
423 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 2)
424 // CHECK1-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
425 // CHECK1-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
426 // CHECK1-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
427 // CHECK1: omp_offload.failed:
428 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP2]]) #[[ATTR2]]
429 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
430 // CHECK1: omp_offload.cont:
431 // CHECK1-NEXT: ret i32 0
432 //
433 //
434 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
435 // CHECK1-SAME: (i64 [[T_VAR:%.*]]) #[[ATTR1]] {
436 // CHECK1-NEXT: entry:
437 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
438 // CHECK1-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
439 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
440 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[CONV]])
441 // CHECK1-NEXT: ret void
442 //
443 //
444 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
445 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
446 // CHECK1-NEXT: entry:
447 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
448 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
449 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
450 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
451 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
452 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
453 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
454 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
455 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
456 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
457 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
458 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
459 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
460 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
461 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
462 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
463 // CHECK1-NEXT: store i32 0, i32* [[T_VAR1]], align 4
464 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
465 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
466 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
467 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
468 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
469 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
470 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
471 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
472 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
473 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
474 // CHECK1: cond.true:
475 // CHECK1-NEXT: br label [[COND_END:%.*]]
476 // CHECK1: cond.false:
477 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
478 // CHECK1-NEXT: br label [[COND_END]]
479 // CHECK1: cond.end:
480 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
481 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
482 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
483 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
484 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
485 // CHECK1: omp.inner.for.cond:
486 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
487 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
488 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
489 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
490 // CHECK1: omp.inner.for.body:
491 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
492 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
493 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
494 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
495 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[T_VAR1]])
496 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
497 // CHECK1: omp.inner.for.inc:
498 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
499 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
500 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
501 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
502 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
503 // CHECK1: omp.inner.for.end:
504 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
505 // CHECK1: omp.loop.exit:
506 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
507 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
508 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
509 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
510 // CHECK1: .omp.final.then:
511 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4
512 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
513 // CHECK1: .omp.final.done:
514 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
515 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i32* [[T_VAR1]] to i8*
516 // CHECK1-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
517 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
518 // CHECK1-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var)
519 // CHECK1-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
520 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
521 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
522 // CHECK1-NEXT: ]
523 // CHECK1: .omp.reduction.case1:
524 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
525 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[T_VAR1]], align 4
526 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
527 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
528 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
529 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
530 // CHECK1: .omp.reduction.case2:
531 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR1]], align 4
532 // CHECK1-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
533 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
534 // CHECK1: .omp.reduction.default:
535 // CHECK1-NEXT: ret void
536 //
537 //
538 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
539 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
540 // CHECK1-NEXT: entry:
541 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
542 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
543 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
544 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
545 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
546 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
547 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
548 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
549 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
550 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
551 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
552 // CHECK1-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
553 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
554 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
555 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
556 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
557 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
558 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
559 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
560 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
561 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
562 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
563 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
564 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
565 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
566 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
567 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
568 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
569 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
570 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
571 // CHECK1-NEXT: store i32 0, i32* [[T_VAR2]], align 4
572 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
573 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
574 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
575 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
576 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
577 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
578 // CHECK1: cond.true:
579 // CHECK1-NEXT: br label [[COND_END:%.*]]
580 // CHECK1: cond.false:
581 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
582 // CHECK1-NEXT: br label [[COND_END]]
583 // CHECK1: cond.end:
584 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
585 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
586 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
587 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
588 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
589 // CHECK1: omp.inner.for.cond:
590 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
591 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
592 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
593 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
594 // CHECK1: omp.inner.for.body:
595 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
596 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
597 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
598 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
599 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
600 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4
601 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
602 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[T_VAR2]], align 4
603 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
604 // CHECK1: omp.body.continue:
605 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
606 // CHECK1: omp.inner.for.inc:
607 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
608 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1
609 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
610 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
611 // CHECK1: omp.inner.for.end:
612 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
613 // CHECK1: omp.loop.exit:
614 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
615 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
616 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
617 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
618 // CHECK1: .omp.final.then:
619 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4
620 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
621 // CHECK1: .omp.final.done:
622 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
623 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i32* [[T_VAR2]] to i8*
624 // CHECK1-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
625 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
626 // CHECK1-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var)
627 // CHECK1-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
628 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
629 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
630 // CHECK1-NEXT: ]
631 // CHECK1: .omp.reduction.case1:
632 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
633 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[T_VAR2]], align 4
634 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
635 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4
636 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
637 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
638 // CHECK1: .omp.reduction.case2:
639 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR2]], align 4
640 // CHECK1-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
641 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
642 // CHECK1: .omp.reduction.default:
643 // CHECK1-NEXT: ret void
644 //
645 //
646 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5
647 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
648 // CHECK1-NEXT: entry:
649 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
650 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
651 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
652 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
653 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
654 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
655 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
656 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
657 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
658 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
659 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
660 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
661 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
662 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
663 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
664 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
665 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
666 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
667 // CHECK1-NEXT: ret void
668 //
669 //
670 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6
671 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
672 // CHECK1-NEXT: entry:
673 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
674 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
675 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
676 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
677 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
678 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
679 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
680 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
681 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
682 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
683 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
684 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
685 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
686 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
687 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
688 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
689 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
690 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
691 // CHECK1-NEXT: ret void
692 //
693 //
694 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
695 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] {
696 // CHECK1-NEXT: entry:
697 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
698 // CHECK1-NEXT: ret void
699 //
700 //
701 // CHECK2-LABEL: define {{[^@]+}}@main
702 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
703 // CHECK2-NEXT: entry:
704 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
705 // CHECK2-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8
706 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
707 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
708 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
709 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
710 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4
711 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
712 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32*
713 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
714 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8
715 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
716 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
717 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
718 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
719 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
720 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
721 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
722 // CHECK2-NEXT: store i8* null, i8** [[TMP6]], align 8
723 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
724 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
725 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 2)
726 // CHECK2-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
727 // CHECK2-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
728 // CHECK2-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
729 // CHECK2: omp_offload.failed:
730 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
731 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
732 // CHECK2: omp_offload.cont:
733 // CHECK2-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
734 // CHECK2-NEXT: ret i32 [[CALL]]
735 //
736 //
737 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70
738 // CHECK2-SAME: (i64 [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
739 // CHECK2-NEXT: entry:
740 // CHECK2-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8
741 // CHECK2-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8
742 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
743 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
744 // CHECK2-NEXT: ret void
745 //
746 //
747 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
748 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
749 // CHECK2-NEXT: entry:
750 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
751 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
752 // CHECK2-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
753 // CHECK2-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
754 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
755 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
756 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
757 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
758 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
759 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
760 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
761 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
762 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
763 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
764 // CHECK2-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
765 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
766 // CHECK2-NEXT: store i32 0, i32* [[SIVAR1]], align 4
767 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
768 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
769 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
770 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
771 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
772 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
773 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
774 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
775 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
776 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
777 // CHECK2: cond.true:
778 // CHECK2-NEXT: br label [[COND_END:%.*]]
779 // CHECK2: cond.false:
780 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
781 // CHECK2-NEXT: br label [[COND_END]]
782 // CHECK2: cond.end:
783 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
784 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
785 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
786 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
787 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
788 // CHECK2: omp.inner.for.cond:
789 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
790 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
791 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
792 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
793 // CHECK2: omp.inner.for.body:
794 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
795 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
796 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
797 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
798 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[SIVAR1]])
799 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
800 // CHECK2: omp.inner.for.inc:
801 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
802 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
803 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
804 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
805 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
806 // CHECK2: omp.inner.for.end:
807 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
808 // CHECK2: omp.loop.exit:
809 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
810 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
811 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
812 // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
813 // CHECK2: .omp.final.then:
814 // CHECK2-NEXT: store i32 2, i32* [[I]], align 4
815 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
816 // CHECK2: .omp.final.done:
817 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
818 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i32* [[SIVAR1]] to i8*
819 // CHECK2-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
820 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
821 // CHECK2-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
822 // CHECK2-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
823 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
824 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
825 // CHECK2-NEXT: ]
826 // CHECK2: .omp.reduction.case1:
827 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
828 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR1]], align 4
829 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
830 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
831 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
832 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
833 // CHECK2: .omp.reduction.case2:
834 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[SIVAR1]], align 4
835 // CHECK2-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
836 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
837 // CHECK2: .omp.reduction.default:
838 // CHECK2-NEXT: ret void
839 //
840 //
841 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
842 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
843 // CHECK2-NEXT: entry:
844 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
845 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
846 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
847 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
848 // CHECK2-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
849 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
850 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
851 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
852 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
853 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
854 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
855 // CHECK2-NEXT: [[SIVAR2:%.*]] = alloca i32, align 4
856 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
857 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
858 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
859 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
860 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
861 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
862 // CHECK2-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
863 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
864 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
865 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
866 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
867 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
868 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
869 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
870 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
871 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
872 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
873 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
874 // CHECK2-NEXT: store i32 0, i32* [[SIVAR2]], align 4
875 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
876 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
877 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
878 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
879 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
880 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
881 // CHECK2: cond.true:
882 // CHECK2-NEXT: br label [[COND_END:%.*]]
883 // CHECK2: cond.false:
884 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
885 // CHECK2-NEXT: br label [[COND_END]]
886 // CHECK2: cond.end:
887 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
888 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
889 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
890 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
891 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
892 // CHECK2: omp.inner.for.cond:
893 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
894 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
895 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
896 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
897 // CHECK2: omp.inner.for.body:
898 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
899 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
900 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
901 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
902 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
903 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR2]], align 4
904 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
905 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[SIVAR2]], align 4
906 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
907 // CHECK2: omp.body.continue:
908 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
909 // CHECK2: omp.inner.for.inc:
910 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
911 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1
912 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
913 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
914 // CHECK2: omp.inner.for.end:
915 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
916 // CHECK2: omp.loop.exit:
917 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
918 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
919 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
920 // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
921 // CHECK2: .omp.final.then:
922 // CHECK2-NEXT: store i32 2, i32* [[I]], align 4
923 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
924 // CHECK2: .omp.final.done:
925 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
926 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i32* [[SIVAR2]] to i8*
927 // CHECK2-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
928 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
929 // CHECK2-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
930 // CHECK2-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
931 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
932 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
933 // CHECK2-NEXT: ]
934 // CHECK2: .omp.reduction.case1:
935 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
936 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR2]], align 4
937 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
938 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4
939 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
940 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
941 // CHECK2: .omp.reduction.case2:
942 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[SIVAR2]], align 4
943 // CHECK2-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
944 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
945 // CHECK2: .omp.reduction.default:
946 // CHECK2-NEXT: ret void
947 //
948 //
949 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
950 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
951 // CHECK2-NEXT: entry:
952 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
953 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
954 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
955 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
956 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
957 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
958 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
959 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
960 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
961 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
962 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
963 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
964 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
965 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
966 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
967 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
968 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
969 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
970 // CHECK2-NEXT: ret void
971 //
972 //
973 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
974 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
975 // CHECK2-NEXT: entry:
976 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
977 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
978 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
979 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
980 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
981 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
982 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
983 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
984 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
985 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
986 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
987 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
988 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
989 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
990 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
991 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
992 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
993 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
994 // CHECK2-NEXT: ret void
995 //
996 //
997 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
998 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] comdat {
999 // CHECK2-NEXT: entry:
1000 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1001 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1002 // CHECK2-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1003 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1004 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1005 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1006 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1007 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 4
1008 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1009 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1010 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4
1011 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1012 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4
1013 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1014 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1015 // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64*
1016 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP4]], align 8
1017 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1018 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
1019 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP6]], align 8
1020 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1021 // CHECK2-NEXT: store i8* null, i8** [[TMP7]], align 8
1022 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1023 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1024 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 2)
1025 // CHECK2-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1026 // CHECK2-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
1027 // CHECK2-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1028 // CHECK2: omp_offload.failed:
1029 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP2]]) #[[ATTR2]]
1030 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
1031 // CHECK2: omp_offload.cont:
1032 // CHECK2-NEXT: ret i32 0
1033 //
1034 //
1035 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
1036 // CHECK2-SAME: (i64 [[T_VAR:%.*]]) #[[ATTR1]] {
1037 // CHECK2-NEXT: entry:
1038 // CHECK2-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1039 // CHECK2-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1040 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1041 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[CONV]])
1042 // CHECK2-NEXT: ret void
1043 //
1044 //
1045 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3
1046 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
1047 // CHECK2-NEXT: entry:
1048 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1049 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1050 // CHECK2-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1051 // CHECK2-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
1052 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1053 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1054 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1055 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1056 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1057 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1058 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1059 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
1060 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1061 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1062 // CHECK2-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1063 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1064 // CHECK2-NEXT: store i32 0, i32* [[T_VAR1]], align 4
1065 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1066 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1067 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1068 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1069 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1070 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1071 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1072 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1073 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
1074 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1075 // CHECK2: cond.true:
1076 // CHECK2-NEXT: br label [[COND_END:%.*]]
1077 // CHECK2: cond.false:
1078 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1079 // CHECK2-NEXT: br label [[COND_END]]
1080 // CHECK2: cond.end:
1081 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1082 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1083 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1084 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1085 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1086 // CHECK2: omp.inner.for.cond:
1087 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1088 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1089 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1090 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1091 // CHECK2: omp.inner.for.body:
1092 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1093 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1094 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1095 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1096 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[T_VAR1]])
1097 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1098 // CHECK2: omp.inner.for.inc:
1099 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1100 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1101 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1102 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1103 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
1104 // CHECK2: omp.inner.for.end:
1105 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1106 // CHECK2: omp.loop.exit:
1107 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1108 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1109 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1110 // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1111 // CHECK2: .omp.final.then:
1112 // CHECK2-NEXT: store i32 2, i32* [[I]], align 4
1113 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1114 // CHECK2: .omp.final.done:
1115 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1116 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i32* [[T_VAR1]] to i8*
1117 // CHECK2-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
1118 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1119 // CHECK2-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var)
1120 // CHECK2-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1121 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1122 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1123 // CHECK2-NEXT: ]
1124 // CHECK2: .omp.reduction.case1:
1125 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
1126 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[T_VAR1]], align 4
1127 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1128 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
1129 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1130 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1131 // CHECK2: .omp.reduction.case2:
1132 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR1]], align 4
1133 // CHECK2-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
1134 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1135 // CHECK2: .omp.reduction.default:
1136 // CHECK2-NEXT: ret void
1137 //
1138 //
1139 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4
1140 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
1141 // CHECK2-NEXT: entry:
1142 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1143 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1144 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1145 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1146 // CHECK2-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1147 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1148 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1149 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1150 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1151 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1152 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1153 // CHECK2-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
1154 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1155 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
1156 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1157 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1158 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1159 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1160 // CHECK2-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1161 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1162 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1163 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1164 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1165 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1166 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1167 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1168 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1169 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1170 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1171 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1172 // CHECK2-NEXT: store i32 0, i32* [[T_VAR2]], align 4
1173 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1174 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1175 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1176 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1177 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1178 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1179 // CHECK2: cond.true:
1180 // CHECK2-NEXT: br label [[COND_END:%.*]]
1181 // CHECK2: cond.false:
1182 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1183 // CHECK2-NEXT: br label [[COND_END]]
1184 // CHECK2: cond.end:
1185 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1186 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1187 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1188 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1189 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1190 // CHECK2: omp.inner.for.cond:
1191 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1192 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1193 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1194 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1195 // CHECK2: omp.inner.for.body:
1196 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1197 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1198 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1199 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1200 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1201 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4
1202 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
1203 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[T_VAR2]], align 4
1204 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1205 // CHECK2: omp.body.continue:
1206 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1207 // CHECK2: omp.inner.for.inc:
1208 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1209 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1
1210 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
1211 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1212 // CHECK2: omp.inner.for.end:
1213 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1214 // CHECK2: omp.loop.exit:
1215 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1216 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1217 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1218 // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1219 // CHECK2: .omp.final.then:
1220 // CHECK2-NEXT: store i32 2, i32* [[I]], align 4
1221 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1222 // CHECK2: .omp.final.done:
1223 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1224 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i32* [[T_VAR2]] to i8*
1225 // CHECK2-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
1226 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1227 // CHECK2-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var)
1228 // CHECK2-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1229 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1230 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1231 // CHECK2-NEXT: ]
1232 // CHECK2: .omp.reduction.case1:
1233 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
1234 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[T_VAR2]], align 4
1235 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1236 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4
1237 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1238 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1239 // CHECK2: .omp.reduction.case2:
1240 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR2]], align 4
1241 // CHECK2-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
1242 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1243 // CHECK2: .omp.reduction.default:
1244 // CHECK2-NEXT: ret void
1245 //
1246 //
1247 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5
1248 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
1249 // CHECK2-NEXT: entry:
1250 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
1251 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
1252 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1253 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1254 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1255 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1256 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1257 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1258 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
1259 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1260 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1261 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
1262 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1263 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1264 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1265 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1266 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1267 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1268 // CHECK2-NEXT: ret void
1269 //
1270 //
1271 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6
1272 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
1273 // CHECK2-NEXT: entry:
1274 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
1275 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
1276 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1277 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1278 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1279 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1280 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1281 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1282 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
1283 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1284 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1285 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
1286 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1287 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1288 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1289 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1290 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1291 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1292 // CHECK2-NEXT: ret void
1293 //
1294 //
1295 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1296 // CHECK2-SAME: () #[[ATTR7:[0-9]+]] {
1297 // CHECK2-NEXT: entry:
1298 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
1299 // CHECK2-NEXT: ret void
1300 //
1301 //
1302 // CHECK3-LABEL: define {{[^@]+}}@main
1303 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
1304 // CHECK3-NEXT: entry:
1305 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1306 // CHECK3-NEXT: [[SIVAR_CASTED:%.*]] = alloca i32, align 4
1307 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1308 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1309 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1310 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1311 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
1312 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
1313 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[SIVAR_CASTED]], align 4
1314 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIVAR_CASTED]], align 4
1315 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1316 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32*
1317 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4
1318 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1319 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
1320 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4
1321 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1322 // CHECK3-NEXT: store i8* null, i8** [[TMP6]], align 4
1323 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1324 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1325 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 2)
1326 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1327 // CHECK3-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
1328 // CHECK3-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1329 // CHECK3: omp_offload.failed:
1330 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70(i32 [[TMP1]]) #[[ATTR2:[0-9]+]]
1331 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1332 // CHECK3: omp_offload.cont:
1333 // CHECK3-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
1334 // CHECK3-NEXT: ret i32 [[CALL]]
1335 //
1336 //
1337 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70
1338 // CHECK3-SAME: (i32 [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
1339 // CHECK3-NEXT: entry:
1340 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32, align 4
1341 // CHECK3-NEXT: store i32 [[SIVAR]], i32* [[SIVAR_ADDR]], align 4
1342 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[SIVAR_ADDR]])
1343 // CHECK3-NEXT: ret void
1344 //
1345 //
1346 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
1347 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
1348 // CHECK3-NEXT: entry:
1349 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1350 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1351 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4
1352 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
1353 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1354 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1355 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1356 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1357 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1358 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1359 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1360 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
1361 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1362 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1363 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4
1364 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4
1365 // CHECK3-NEXT: store i32 0, i32* [[SIVAR1]], align 4
1366 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1367 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1368 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1369 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1370 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1371 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1372 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1373 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1374 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
1375 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1376 // CHECK3: cond.true:
1377 // CHECK3-NEXT: br label [[COND_END:%.*]]
1378 // CHECK3: cond.false:
1379 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1380 // CHECK3-NEXT: br label [[COND_END]]
1381 // CHECK3: cond.end:
1382 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1383 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1384 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1385 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1386 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1387 // CHECK3: omp.inner.for.cond:
1388 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1389 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1390 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1391 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1392 // CHECK3: omp.inner.for.body:
1393 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1394 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1395 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], i32* [[SIVAR1]])
1396 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1397 // CHECK3: omp.inner.for.inc:
1398 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1399 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1400 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1401 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1402 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
1403 // CHECK3: omp.inner.for.end:
1404 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1405 // CHECK3: omp.loop.exit:
1406 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1407 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1408 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
1409 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1410 // CHECK3: .omp.final.then:
1411 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4
1412 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1413 // CHECK3: .omp.final.done:
1414 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
1415 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i32* [[SIVAR1]] to i8*
1416 // CHECK3-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 4
1417 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1418 // CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
1419 // CHECK3-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1420 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1421 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1422 // CHECK3-NEXT: ]
1423 // CHECK3: .omp.reduction.case1:
1424 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
1425 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4
1426 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1427 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
1428 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1429 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1430 // CHECK3: .omp.reduction.case2:
1431 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR1]], align 4
1432 // CHECK3-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
1433 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1434 // CHECK3: .omp.reduction.default:
1435 // CHECK3-NEXT: ret void
1436 //
1437 //
1438 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
1439 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
1440 // CHECK3-NEXT: entry:
1441 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1442 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1443 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1444 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1445 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4
1446 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1447 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1448 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1449 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1450 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1451 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1452 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
1453 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1454 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
1455 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1456 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1457 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1458 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1459 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4
1460 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4
1461 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1462 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1463 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1464 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1465 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1466 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1467 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1468 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1469 // CHECK3-NEXT: store i32 0, i32* [[SIVAR1]], align 4
1470 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1471 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1472 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1473 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1474 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1475 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1476 // CHECK3: cond.true:
1477 // CHECK3-NEXT: br label [[COND_END:%.*]]
1478 // CHECK3: cond.false:
1479 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1480 // CHECK3-NEXT: br label [[COND_END]]
1481 // CHECK3: cond.end:
1482 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1483 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1484 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1485 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1486 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1487 // CHECK3: omp.inner.for.cond:
1488 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1489 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1490 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1491 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1492 // CHECK3: omp.inner.for.body:
1493 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1494 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1495 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1496 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1497 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1498 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR1]], align 4
1499 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
1500 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4
1501 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1502 // CHECK3: omp.body.continue:
1503 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1504 // CHECK3: omp.inner.for.inc:
1505 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1506 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1
1507 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
1508 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
1509 // CHECK3: omp.inner.for.end:
1510 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1511 // CHECK3: omp.loop.exit:
1512 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1513 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1514 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1515 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1516 // CHECK3: .omp.final.then:
1517 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4
1518 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1519 // CHECK3: .omp.final.done:
1520 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
1521 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i32* [[SIVAR1]] to i8*
1522 // CHECK3-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 4
1523 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1524 // CHECK3-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
1525 // CHECK3-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1526 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1527 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1528 // CHECK3-NEXT: ]
1529 // CHECK3: .omp.reduction.case1:
1530 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
1531 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR1]], align 4
1532 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1533 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
1534 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1535 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1536 // CHECK3: .omp.reduction.case2:
1537 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[SIVAR1]], align 4
1538 // CHECK3-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
1539 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1540 // CHECK3: .omp.reduction.default:
1541 // CHECK3-NEXT: ret void
1542 //
1543 //
1544 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
1545 // CHECK3-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
1546 // CHECK3-NEXT: entry:
1547 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
1548 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
1549 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1550 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1551 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1552 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1553 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1554 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1555 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1556 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1557 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1558 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1559 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1560 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1561 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1562 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1563 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1564 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1565 // CHECK3-NEXT: ret void
1566 //
1567 //
1568 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
1569 // CHECK3-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
1570 // CHECK3-NEXT: entry:
1571 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
1572 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
1573 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1574 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1575 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1576 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1577 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1578 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1579 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1580 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1581 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1582 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1583 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1584 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1585 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1586 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1587 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1588 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1589 // CHECK3-NEXT: ret void
1590 //
1591 //
1592 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1593 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat {
1594 // CHECK3-NEXT: entry:
1595 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1596 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1597 // CHECK3-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1598 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1599 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1600 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1601 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1602 // CHECK3-NEXT: store i32 0, i32* [[T_VAR]], align 4
1603 // CHECK3-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1604 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
1605 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4
1606 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[T_VAR_CASTED]], align 4
1607 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
1608 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1609 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32*
1610 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP4]], align 4
1611 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1612 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32*
1613 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP6]], align 4
1614 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1615 // CHECK3-NEXT: store i8* null, i8** [[TMP7]], align 4
1616 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1617 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1618 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 2)
1619 // CHECK3-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1620 // CHECK3-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
1621 // CHECK3-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1622 // CHECK3: omp_offload.failed:
1623 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP2]]) #[[ATTR2]]
1624 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1625 // CHECK3: omp_offload.cont:
1626 // CHECK3-NEXT: ret i32 0
1627 //
1628 //
1629 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
1630 // CHECK3-SAME: (i32 [[T_VAR:%.*]]) #[[ATTR1]] {
1631 // CHECK3-NEXT: entry:
1632 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1633 // CHECK3-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
1634 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]])
1635 // CHECK3-NEXT: ret void
1636 //
1637 //
1638 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
1639 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
1640 // CHECK3-NEXT: entry:
1641 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1642 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1643 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
1644 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
1645 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1646 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1647 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1648 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1649 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1650 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1651 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1652 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
1653 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1654 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1655 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
1656 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
1657 // CHECK3-NEXT: store i32 0, i32* [[T_VAR1]], align 4
1658 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1659 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1660 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1661 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1662 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1663 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1664 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1665 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1666 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
1667 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1668 // CHECK3: cond.true:
1669 // CHECK3-NEXT: br label [[COND_END:%.*]]
1670 // CHECK3: cond.false:
1671 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1672 // CHECK3-NEXT: br label [[COND_END]]
1673 // CHECK3: cond.end:
1674 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1675 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1676 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1677 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1678 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1679 // CHECK3: omp.inner.for.cond:
1680 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1681 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1682 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1683 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1684 // CHECK3: omp.inner.for.body:
1685 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1686 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1687 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], i32* [[T_VAR1]])
1688 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1689 // CHECK3: omp.inner.for.inc:
1690 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1691 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1692 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1693 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1694 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1695 // CHECK3: omp.inner.for.end:
1696 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1697 // CHECK3: omp.loop.exit:
1698 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1699 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1700 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
1701 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1702 // CHECK3: .omp.final.then:
1703 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4
1704 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1705 // CHECK3: .omp.final.done:
1706 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
1707 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i32* [[T_VAR1]] to i8*
1708 // CHECK3-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 4
1709 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1710 // CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var)
1711 // CHECK3-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1712 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1713 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1714 // CHECK3-NEXT: ]
1715 // CHECK3: .omp.reduction.case1:
1716 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
1717 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[T_VAR1]], align 4
1718 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1719 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
1720 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1721 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1722 // CHECK3: .omp.reduction.case2:
1723 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR1]], align 4
1724 // CHECK3-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
1725 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1726 // CHECK3: .omp.reduction.default:
1727 // CHECK3-NEXT: ret void
1728 //
1729 //
1730 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
1731 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
1732 // CHECK3-NEXT: entry:
1733 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1734 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1735 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1736 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1737 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
1738 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1739 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1740 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1741 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1742 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1743 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1744 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
1745 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1746 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
1747 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1748 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1749 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1750 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1751 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
1752 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
1753 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1754 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1755 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1756 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1757 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1758 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1759 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1760 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1761 // CHECK3-NEXT: store i32 0, i32* [[T_VAR1]], align 4
1762 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1763 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1764 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1765 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1766 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1767 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1768 // CHECK3: cond.true:
1769 // CHECK3-NEXT: br label [[COND_END:%.*]]
1770 // CHECK3: cond.false:
1771 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1772 // CHECK3-NEXT: br label [[COND_END]]
1773 // CHECK3: cond.end:
1774 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1775 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1776 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1777 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1778 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1779 // CHECK3: omp.inner.for.cond:
1780 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1781 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1782 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1783 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1784 // CHECK3: omp.inner.for.body:
1785 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1786 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1787 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1788 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1789 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1790 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR1]], align 4
1791 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
1792 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4
1793 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1794 // CHECK3: omp.body.continue:
1795 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1796 // CHECK3: omp.inner.for.inc:
1797 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1798 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1
1799 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
1800 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
1801 // CHECK3: omp.inner.for.end:
1802 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1803 // CHECK3: omp.loop.exit:
1804 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1805 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1806 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1807 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1808 // CHECK3: .omp.final.then:
1809 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4
1810 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1811 // CHECK3: .omp.final.done:
1812 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
1813 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i32* [[T_VAR1]] to i8*
1814 // CHECK3-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 4
1815 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1816 // CHECK3-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var)
1817 // CHECK3-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1818 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1819 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1820 // CHECK3-NEXT: ]
1821 // CHECK3: .omp.reduction.case1:
1822 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
1823 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[T_VAR1]], align 4
1824 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1825 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
1826 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1827 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1828 // CHECK3: .omp.reduction.case2:
1829 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR1]], align 4
1830 // CHECK3-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
1831 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1832 // CHECK3: .omp.reduction.default:
1833 // CHECK3-NEXT: ret void
1834 //
1835 //
1836 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5
1837 // CHECK3-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
1838 // CHECK3-NEXT: entry:
1839 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
1840 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
1841 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1842 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1843 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1844 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1845 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1846 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1847 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1848 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1849 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1850 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1851 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1852 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1853 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1854 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1855 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1856 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1857 // CHECK3-NEXT: ret void
1858 //
1859 //
1860 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6
1861 // CHECK3-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
1862 // CHECK3-NEXT: entry:
1863 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
1864 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
1865 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1866 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1867 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1868 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1869 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1870 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1871 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1872 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1873 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1874 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1875 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1876 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1877 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1878 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1879 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1880 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1881 // CHECK3-NEXT: ret void
1882 //
1883 //
1884 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1885 // CHECK3-SAME: () #[[ATTR7:[0-9]+]] {
1886 // CHECK3-NEXT: entry:
1887 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
1888 // CHECK3-NEXT: ret void
1889 //
1890 //
1891 // CHECK4-LABEL: define {{[^@]+}}@main
1892 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
1893 // CHECK4-NEXT: entry:
1894 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1895 // CHECK4-NEXT: [[SIVAR_CASTED:%.*]] = alloca i32, align 4
1896 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1897 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1898 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1899 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1900 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4
1901 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
1902 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[SIVAR_CASTED]], align 4
1903 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIVAR_CASTED]], align 4
1904 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1905 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32*
1906 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4
1907 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1908 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
1909 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4
1910 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1911 // CHECK4-NEXT: store i8* null, i8** [[TMP6]], align 4
1912 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1913 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1914 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 2)
1915 // CHECK4-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1916 // CHECK4-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
1917 // CHECK4-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1918 // CHECK4: omp_offload.failed:
1919 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70(i32 [[TMP1]]) #[[ATTR2:[0-9]+]]
1920 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
1921 // CHECK4: omp_offload.cont:
1922 // CHECK4-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
1923 // CHECK4-NEXT: ret i32 [[CALL]]
1924 //
1925 //
1926 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70
1927 // CHECK4-SAME: (i32 [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
1928 // CHECK4-NEXT: entry:
1929 // CHECK4-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32, align 4
1930 // CHECK4-NEXT: store i32 [[SIVAR]], i32* [[SIVAR_ADDR]], align 4
1931 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[SIVAR_ADDR]])
1932 // CHECK4-NEXT: ret void
1933 //
1934 //
1935 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
1936 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
1937 // CHECK4-NEXT: entry:
1938 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1939 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1940 // CHECK4-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4
1941 // CHECK4-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
1942 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1943 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
1944 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1945 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1946 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1947 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1948 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1949 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
1950 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1951 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1952 // CHECK4-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4
1953 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4
1954 // CHECK4-NEXT: store i32 0, i32* [[SIVAR1]], align 4
1955 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1956 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1957 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1958 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1959 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1960 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1961 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1962 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1963 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
1964 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1965 // CHECK4: cond.true:
1966 // CHECK4-NEXT: br label [[COND_END:%.*]]
1967 // CHECK4: cond.false:
1968 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1969 // CHECK4-NEXT: br label [[COND_END]]
1970 // CHECK4: cond.end:
1971 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1972 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1973 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1974 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1975 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1976 // CHECK4: omp.inner.for.cond:
1977 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1978 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1979 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1980 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1981 // CHECK4: omp.inner.for.body:
1982 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1983 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1984 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], i32* [[SIVAR1]])
1985 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1986 // CHECK4: omp.inner.for.inc:
1987 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1988 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1989 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1990 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1991 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
1992 // CHECK4: omp.inner.for.end:
1993 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1994 // CHECK4: omp.loop.exit:
1995 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1996 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1997 // CHECK4-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
1998 // CHECK4-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1999 // CHECK4: .omp.final.then:
2000 // CHECK4-NEXT: store i32 2, i32* [[I]], align 4
2001 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
2002 // CHECK4: .omp.final.done:
2003 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
2004 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast i32* [[SIVAR1]] to i8*
2005 // CHECK4-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 4
2006 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
2007 // CHECK4-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
2008 // CHECK4-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2009 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2010 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2011 // CHECK4-NEXT: ]
2012 // CHECK4: .omp.reduction.case1:
2013 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
2014 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4
2015 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2016 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
2017 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
2018 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2019 // CHECK4: .omp.reduction.case2:
2020 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR1]], align 4
2021 // CHECK4-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
2022 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2023 // CHECK4: .omp.reduction.default:
2024 // CHECK4-NEXT: ret void
2025 //
2026 //
2027 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
2028 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
2029 // CHECK4-NEXT: entry:
2030 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2031 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2032 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2033 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2034 // CHECK4-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4
2035 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2036 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
2037 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2038 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2039 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2040 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2041 // CHECK4-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
2042 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
2043 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
2044 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2045 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2046 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2047 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2048 // CHECK4-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4
2049 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4
2050 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2051 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2052 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2053 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2054 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2055 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2056 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2057 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2058 // CHECK4-NEXT: store i32 0, i32* [[SIVAR1]], align 4
2059 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2060 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2061 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2062 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2063 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
2064 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2065 // CHECK4: cond.true:
2066 // CHECK4-NEXT: br label [[COND_END:%.*]]
2067 // CHECK4: cond.false:
2068 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2069 // CHECK4-NEXT: br label [[COND_END]]
2070 // CHECK4: cond.end:
2071 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2072 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2073 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2074 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2075 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2076 // CHECK4: omp.inner.for.cond:
2077 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2078 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2079 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2080 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2081 // CHECK4: omp.inner.for.body:
2082 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2083 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2084 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2085 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2086 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2087 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR1]], align 4
2088 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
2089 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4
2090 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2091 // CHECK4: omp.body.continue:
2092 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2093 // CHECK4: omp.inner.for.inc:
2094 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2095 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1
2096 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
2097 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
2098 // CHECK4: omp.inner.for.end:
2099 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2100 // CHECK4: omp.loop.exit:
2101 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2102 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2103 // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2104 // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2105 // CHECK4: .omp.final.then:
2106 // CHECK4-NEXT: store i32 2, i32* [[I]], align 4
2107 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
2108 // CHECK4: .omp.final.done:
2109 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
2110 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i32* [[SIVAR1]] to i8*
2111 // CHECK4-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 4
2112 // CHECK4-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
2113 // CHECK4-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
2114 // CHECK4-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2115 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2116 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2117 // CHECK4-NEXT: ]
2118 // CHECK4: .omp.reduction.case1:
2119 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
2120 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR1]], align 4
2121 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
2122 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
2123 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
2124 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2125 // CHECK4: .omp.reduction.case2:
2126 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[SIVAR1]], align 4
2127 // CHECK4-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
2128 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2129 // CHECK4: .omp.reduction.default:
2130 // CHECK4-NEXT: ret void
2131 //
2132 //
2133 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
2134 // CHECK4-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
2135 // CHECK4-NEXT: entry:
2136 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
2137 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
2138 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
2139 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
2140 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
2141 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
2142 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
2143 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
2144 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
2145 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
2146 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
2147 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
2148 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
2149 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
2150 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
2151 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
2152 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2153 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
2154 // CHECK4-NEXT: ret void
2155 //
2156 //
2157 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
2158 // CHECK4-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
2159 // CHECK4-NEXT: entry:
2160 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
2161 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
2162 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
2163 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
2164 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
2165 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
2166 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
2167 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
2168 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
2169 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
2170 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
2171 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
2172 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
2173 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
2174 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
2175 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
2176 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2177 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
2178 // CHECK4-NEXT: ret void
2179 //
2180 //
2181 // CHECK4-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2182 // CHECK4-SAME: () #[[ATTR5:[0-9]+]] comdat {
2183 // CHECK4-NEXT: entry:
2184 // CHECK4-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2185 // CHECK4-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2186 // CHECK4-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2187 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
2188 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
2189 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
2190 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
2191 // CHECK4-NEXT: store i32 0, i32* [[T_VAR]], align 4
2192 // CHECK4-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2193 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
2194 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4
2195 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[T_VAR_CASTED]], align 4
2196 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2197 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2198 // CHECK4-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32*
2199 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP4]], align 4
2200 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2201 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32*
2202 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP6]], align 4
2203 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2204 // CHECK4-NEXT: store i8* null, i8** [[TMP7]], align 4
2205 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2206 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2207 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 2)
2208 // CHECK4-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2209 // CHECK4-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
2210 // CHECK4-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2211 // CHECK4: omp_offload.failed:
2212 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP2]]) #[[ATTR2]]
2213 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
2214 // CHECK4: omp_offload.cont:
2215 // CHECK4-NEXT: ret i32 0
2216 //
2217 //
2218 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
2219 // CHECK4-SAME: (i32 [[T_VAR:%.*]]) #[[ATTR1]] {
2220 // CHECK4-NEXT: entry:
2221 // CHECK4-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2222 // CHECK4-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2223 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]])
2224 // CHECK4-NEXT: ret void
2225 //
2226 //
2227 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3
2228 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
2229 // CHECK4-NEXT: entry:
2230 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2231 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2232 // CHECK4-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
2233 // CHECK4-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
2234 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2235 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
2236 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2237 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2238 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2239 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2240 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
2241 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
2242 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2243 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2244 // CHECK4-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
2245 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
2246 // CHECK4-NEXT: store i32 0, i32* [[T_VAR1]], align 4
2247 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2248 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
2249 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2250 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2251 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2252 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2253 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2254 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2255 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
2256 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2257 // CHECK4: cond.true:
2258 // CHECK4-NEXT: br label [[COND_END:%.*]]
2259 // CHECK4: cond.false:
2260 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2261 // CHECK4-NEXT: br label [[COND_END]]
2262 // CHECK4: cond.end:
2263 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2264 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2265 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2266 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2267 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2268 // CHECK4: omp.inner.for.cond:
2269 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2270 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2271 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2272 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2273 // CHECK4: omp.inner.for.body:
2274 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2275 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2276 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], i32* [[T_VAR1]])
2277 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2278 // CHECK4: omp.inner.for.inc:
2279 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2280 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2281 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2282 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2283 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
2284 // CHECK4: omp.inner.for.end:
2285 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2286 // CHECK4: omp.loop.exit:
2287 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2288 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2289 // CHECK4-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
2290 // CHECK4-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2291 // CHECK4: .omp.final.then:
2292 // CHECK4-NEXT: store i32 2, i32* [[I]], align 4
2293 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
2294 // CHECK4: .omp.final.done:
2295 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
2296 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast i32* [[T_VAR1]] to i8*
2297 // CHECK4-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 4
2298 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
2299 // CHECK4-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var)
2300 // CHECK4-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2301 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2302 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2303 // CHECK4-NEXT: ]
2304 // CHECK4: .omp.reduction.case1:
2305 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
2306 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[T_VAR1]], align 4
2307 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2308 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
2309 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
2310 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2311 // CHECK4: .omp.reduction.case2:
2312 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR1]], align 4
2313 // CHECK4-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
2314 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2315 // CHECK4: .omp.reduction.default:
2316 // CHECK4-NEXT: ret void
2317 //
2318 //
2319 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4
2320 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
2321 // CHECK4-NEXT: entry:
2322 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2323 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2324 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2325 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2326 // CHECK4-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
2327 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2328 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
2329 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2330 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2331 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2332 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2333 // CHECK4-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
2334 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
2335 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
2336 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2337 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2338 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2339 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2340 // CHECK4-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
2341 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
2342 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2343 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2344 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2345 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2346 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2347 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2348 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2349 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2350 // CHECK4-NEXT: store i32 0, i32* [[T_VAR1]], align 4
2351 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2352 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2353 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2354 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2355 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
2356 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2357 // CHECK4: cond.true:
2358 // CHECK4-NEXT: br label [[COND_END:%.*]]
2359 // CHECK4: cond.false:
2360 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2361 // CHECK4-NEXT: br label [[COND_END]]
2362 // CHECK4: cond.end:
2363 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2364 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2365 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2366 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2367 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2368 // CHECK4: omp.inner.for.cond:
2369 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2370 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2371 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2372 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2373 // CHECK4: omp.inner.for.body:
2374 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2375 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2376 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2377 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2378 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2379 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR1]], align 4
2380 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
2381 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4
2382 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2383 // CHECK4: omp.body.continue:
2384 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2385 // CHECK4: omp.inner.for.inc:
2386 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2387 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1
2388 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
2389 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
2390 // CHECK4: omp.inner.for.end:
2391 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2392 // CHECK4: omp.loop.exit:
2393 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2394 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2395 // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2396 // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2397 // CHECK4: .omp.final.then:
2398 // CHECK4-NEXT: store i32 2, i32* [[I]], align 4
2399 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
2400 // CHECK4: .omp.final.done:
2401 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
2402 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i32* [[T_VAR1]] to i8*
2403 // CHECK4-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 4
2404 // CHECK4-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
2405 // CHECK4-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var)
2406 // CHECK4-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2407 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2408 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2409 // CHECK4-NEXT: ]
2410 // CHECK4: .omp.reduction.case1:
2411 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
2412 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[T_VAR1]], align 4
2413 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
2414 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
2415 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
2416 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2417 // CHECK4: .omp.reduction.case2:
2418 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR1]], align 4
2419 // CHECK4-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
2420 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2421 // CHECK4: .omp.reduction.default:
2422 // CHECK4-NEXT: ret void
2423 //
2424 //
2425 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5
2426 // CHECK4-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
2427 // CHECK4-NEXT: entry:
2428 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
2429 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
2430 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
2431 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
2432 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
2433 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
2434 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
2435 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
2436 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
2437 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
2438 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
2439 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
2440 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
2441 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
2442 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
2443 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
2444 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2445 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
2446 // CHECK4-NEXT: ret void
2447 //
2448 //
2449 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6
2450 // CHECK4-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] {
2451 // CHECK4-NEXT: entry:
2452 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
2453 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
2454 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
2455 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
2456 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
2457 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
2458 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
2459 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
2460 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
2461 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
2462 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
2463 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
2464 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
2465 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
2466 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
2467 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
2468 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2469 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
2470 // CHECK4-NEXT: ret void
2471 //
2472 //
2473 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2474 // CHECK4-SAME: () #[[ATTR7:[0-9]+]] {
2475 // CHECK4-NEXT: entry:
2476 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
2477 // CHECK4-NEXT: ret void
2478 //
2479 //
2480 // CHECK5-LABEL: define {{[^@]+}}@main
2481 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
2482 // CHECK5-NEXT: entry:
2483 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2484 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2485 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2486 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2487 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2488 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2489 // CHECK5-NEXT: [[SIVAR:%.*]] = alloca i32, align 4
2490 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4
2491 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2492 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2493 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2494 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
2495 // CHECK5-NEXT: store i32 0, i32* [[SIVAR]], align 4
2496 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2497 // CHECK5: omp.inner.for.cond:
2498 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2499 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
2500 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2501 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2502 // CHECK5: omp.inner.for.body:
2503 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2504 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
2505 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2506 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
2507 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
2508 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[SIVAR]], align 4, !llvm.access.group !2
2509 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], [[TMP4]]
2510 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[SIVAR]], align 4, !llvm.access.group !2
2511 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2512 // CHECK5: omp.body.continue:
2513 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2514 // CHECK5: omp.inner.for.inc:
2515 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2516 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], 1
2517 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2518 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
2519 // CHECK5: omp.inner.for.end:
2520 // CHECK5-NEXT: store i32 2, i32* [[I]], align 4
2521 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
2522 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[SIVAR]], align 4
2523 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP7]], [[TMP8]]
2524 // CHECK5-NEXT: store i32 [[ADD3]], i32* @_ZZ4mainE5sivar, align 4
2525 // CHECK5-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
2526 // CHECK5-NEXT: ret i32 [[CALL]]
2527 //
2528 //
2529 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2530 // CHECK5-SAME: () #[[ATTR1:[0-9]+]] comdat {
2531 // CHECK5-NEXT: entry:
2532 // CHECK5-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2533 // CHECK5-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2534 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2535 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2536 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2537 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2538 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2539 // CHECK5-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
2540 // CHECK5-NEXT: store i32 0, i32* [[T_VAR]], align 4
2541 // CHECK5-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2542 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
2543 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2544 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2545 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2546 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
2547 // CHECK5-NEXT: store i32 0, i32* [[T_VAR1]], align 4
2548 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2549 // CHECK5: omp.inner.for.cond:
2550 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2551 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
2552 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
2553 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2554 // CHECK5: omp.inner.for.body:
2555 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2556 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
2557 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2558 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
2559 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
2560 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR1]], align 4, !llvm.access.group !6
2561 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], [[TMP5]]
2562 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[T_VAR1]], align 4, !llvm.access.group !6
2563 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2564 // CHECK5: omp.body.continue:
2565 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2566 // CHECK5: omp.inner.for.inc:
2567 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2568 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP7]], 1
2569 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2570 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
2571 // CHECK5: omp.inner.for.end:
2572 // CHECK5-NEXT: store i32 2, i32* [[I]], align 4
2573 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4
2574 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR1]], align 4
2575 // CHECK5-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
2576 // CHECK5-NEXT: store i32 [[ADD4]], i32* [[T_VAR]], align 4
2577 // CHECK5-NEXT: ret i32 0
2578 //
2579 //
2580 // CHECK6-LABEL: define {{[^@]+}}@main
2581 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
2582 // CHECK6-NEXT: entry:
2583 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2584 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
2585 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2586 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2587 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2588 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
2589 // CHECK6-NEXT: [[SIVAR:%.*]] = alloca i32, align 4
2590 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4
2591 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2592 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2593 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2594 // CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
2595 // CHECK6-NEXT: store i32 0, i32* [[SIVAR]], align 4
2596 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2597 // CHECK6: omp.inner.for.cond:
2598 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2599 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
2600 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2601 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2602 // CHECK6: omp.inner.for.body:
2603 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2604 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
2605 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2606 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
2607 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
2608 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[SIVAR]], align 4, !llvm.access.group !2
2609 // CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], [[TMP4]]
2610 // CHECK6-NEXT: store i32 [[ADD1]], i32* [[SIVAR]], align 4, !llvm.access.group !2
2611 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2612 // CHECK6: omp.body.continue:
2613 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2614 // CHECK6: omp.inner.for.inc:
2615 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2616 // CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], 1
2617 // CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
2618 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
2619 // CHECK6: omp.inner.for.end:
2620 // CHECK6-NEXT: store i32 2, i32* [[I]], align 4
2621 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
2622 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[SIVAR]], align 4
2623 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP7]], [[TMP8]]
2624 // CHECK6-NEXT: store i32 [[ADD3]], i32* @_ZZ4mainE5sivar, align 4
2625 // CHECK6-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
2626 // CHECK6-NEXT: ret i32 [[CALL]]
2627 //
2628 //
2629 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2630 // CHECK6-SAME: () #[[ATTR1:[0-9]+]] comdat {
2631 // CHECK6-NEXT: entry:
2632 // CHECK6-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2633 // CHECK6-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2634 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
2635 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2636 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2637 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2638 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
2639 // CHECK6-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
2640 // CHECK6-NEXT: store i32 0, i32* [[T_VAR]], align 4
2641 // CHECK6-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2642 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
2643 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2644 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2645 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2646 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
2647 // CHECK6-NEXT: store i32 0, i32* [[T_VAR1]], align 4
2648 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2649 // CHECK6: omp.inner.for.cond:
2650 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2651 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
2652 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
2653 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2654 // CHECK6: omp.inner.for.body:
2655 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2656 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
2657 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2658 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
2659 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
2660 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR1]], align 4, !llvm.access.group !6
2661 // CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], [[TMP5]]
2662 // CHECK6-NEXT: store i32 [[ADD2]], i32* [[T_VAR1]], align 4, !llvm.access.group !6
2663 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2664 // CHECK6: omp.body.continue:
2665 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2666 // CHECK6: omp.inner.for.inc:
2667 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2668 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP7]], 1
2669 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2670 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
2671 // CHECK6: omp.inner.for.end:
2672 // CHECK6-NEXT: store i32 2, i32* [[I]], align 4
2673 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4
2674 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR1]], align 4
2675 // CHECK6-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
2676 // CHECK6-NEXT: store i32 [[ADD4]], i32* [[T_VAR]], align 4
2677 // CHECK6-NEXT: ret i32 0
2678 //
2679 //
2680 // CHECK7-LABEL: define {{[^@]+}}@main
2681 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
2682 // CHECK7-NEXT: entry:
2683 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2684 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
2685 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2686 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2687 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2688 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
2689 // CHECK7-NEXT: [[SIVAR:%.*]] = alloca i32, align 4
2690 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4
2691 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2692 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2693 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2694 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
2695 // CHECK7-NEXT: store i32 0, i32* [[SIVAR]], align 4
2696 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2697 // CHECK7: omp.inner.for.cond:
2698 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2699 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
2700 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2701 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2702 // CHECK7: omp.inner.for.body:
2703 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2704 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
2705 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2706 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
2707 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
2708 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[SIVAR]], align 4, !llvm.access.group !3
2709 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], [[TMP4]]
2710 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[SIVAR]], align 4, !llvm.access.group !3
2711 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2712 // CHECK7: omp.body.continue:
2713 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2714 // CHECK7: omp.inner.for.inc:
2715 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2716 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], 1
2717 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2718 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
2719 // CHECK7: omp.inner.for.end:
2720 // CHECK7-NEXT: store i32 2, i32* [[I]], align 4
2721 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
2722 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[SIVAR]], align 4
2723 // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP7]], [[TMP8]]
2724 // CHECK7-NEXT: store i32 [[ADD3]], i32* @_ZZ4mainE5sivar, align 4
2725 // CHECK7-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
2726 // CHECK7-NEXT: ret i32 [[CALL]]
2727 //
2728 //
2729 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2730 // CHECK7-SAME: () #[[ATTR1:[0-9]+]] comdat {
2731 // CHECK7-NEXT: entry:
2732 // CHECK7-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2733 // CHECK7-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2734 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
2735 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2736 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2737 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2738 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
2739 // CHECK7-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
2740 // CHECK7-NEXT: store i32 0, i32* [[T_VAR]], align 4
2741 // CHECK7-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2742 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
2743 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2744 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2745 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2746 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
2747 // CHECK7-NEXT: store i32 0, i32* [[T_VAR1]], align 4
2748 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2749 // CHECK7: omp.inner.for.cond:
2750 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2751 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
2752 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
2753 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2754 // CHECK7: omp.inner.for.body:
2755 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2756 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
2757 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2758 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
2759 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
2760 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR1]], align 4, !llvm.access.group !7
2761 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], [[TMP5]]
2762 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[T_VAR1]], align 4, !llvm.access.group !7
2763 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2764 // CHECK7: omp.body.continue:
2765 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2766 // CHECK7: omp.inner.for.inc:
2767 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2768 // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP7]], 1
2769 // CHECK7-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2770 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
2771 // CHECK7: omp.inner.for.end:
2772 // CHECK7-NEXT: store i32 2, i32* [[I]], align 4
2773 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4
2774 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR1]], align 4
2775 // CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
2776 // CHECK7-NEXT: store i32 [[ADD4]], i32* [[T_VAR]], align 4
2777 // CHECK7-NEXT: ret i32 0
2778 //
2779 //
2780 // CHECK8-LABEL: define {{[^@]+}}@main
2781 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
2782 // CHECK8-NEXT: entry:
2783 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2784 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
2785 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2786 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2787 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2788 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
2789 // CHECK8-NEXT: [[SIVAR:%.*]] = alloca i32, align 4
2790 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4
2791 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2792 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2793 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2794 // CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
2795 // CHECK8-NEXT: store i32 0, i32* [[SIVAR]], align 4
2796 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2797 // CHECK8: omp.inner.for.cond:
2798 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2799 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
2800 // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2801 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2802 // CHECK8: omp.inner.for.body:
2803 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2804 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
2805 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2806 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
2807 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
2808 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[SIVAR]], align 4, !llvm.access.group !3
2809 // CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], [[TMP4]]
2810 // CHECK8-NEXT: store i32 [[ADD1]], i32* [[SIVAR]], align 4, !llvm.access.group !3
2811 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2812 // CHECK8: omp.body.continue:
2813 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2814 // CHECK8: omp.inner.for.inc:
2815 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2816 // CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], 1
2817 // CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
2818 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
2819 // CHECK8: omp.inner.for.end:
2820 // CHECK8-NEXT: store i32 2, i32* [[I]], align 4
2821 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
2822 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[SIVAR]], align 4
2823 // CHECK8-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP7]], [[TMP8]]
2824 // CHECK8-NEXT: store i32 [[ADD3]], i32* @_ZZ4mainE5sivar, align 4
2825 // CHECK8-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
2826 // CHECK8-NEXT: ret i32 [[CALL]]
2827 //
2828 //
2829 // CHECK8-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2830 // CHECK8-SAME: () #[[ATTR1:[0-9]+]] comdat {
2831 // CHECK8-NEXT: entry:
2832 // CHECK8-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2833 // CHECK8-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2834 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
2835 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2836 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2837 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2838 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
2839 // CHECK8-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
2840 // CHECK8-NEXT: store i32 0, i32* [[T_VAR]], align 4
2841 // CHECK8-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2842 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
2843 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2844 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2845 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2846 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
2847 // CHECK8-NEXT: store i32 0, i32* [[T_VAR1]], align 4
2848 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2849 // CHECK8: omp.inner.for.cond:
2850 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2851 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
2852 // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
2853 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2854 // CHECK8: omp.inner.for.body:
2855 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2856 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
2857 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2858 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
2859 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
2860 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR1]], align 4, !llvm.access.group !7
2861 // CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], [[TMP5]]
2862 // CHECK8-NEXT: store i32 [[ADD2]], i32* [[T_VAR1]], align 4, !llvm.access.group !7
2863 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2864 // CHECK8: omp.body.continue:
2865 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2866 // CHECK8: omp.inner.for.inc:
2867 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2868 // CHECK8-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP7]], 1
2869 // CHECK8-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2870 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
2871 // CHECK8: omp.inner.for.end:
2872 // CHECK8-NEXT: store i32 2, i32* [[I]], align 4
2873 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4
2874 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR1]], align 4
2875 // CHECK8-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
2876 // CHECK8-NEXT: store i32 [[ADD4]], i32* [[T_VAR]], align 4
2877 // CHECK8-NEXT: ret i32 0
2878 //
2879 //
2880 // CHECK9-LABEL: define {{[^@]+}}@main
2881 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
2882 // CHECK9-NEXT: entry:
2883 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2884 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
2885 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
2886 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
2887 // CHECK9-NEXT: ret i32 0
2888 //
2889 //
2890 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45
2891 // CHECK9-SAME: (i64 [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
2892 // CHECK9-NEXT: entry:
2893 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8
2894 // CHECK9-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8
2895 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
2896 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
2897 // CHECK9-NEXT: ret void
2898 //
2899 //
2900 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
2901 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
2902 // CHECK9-NEXT: entry:
2903 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2904 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2905 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
2906 // CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
2907 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2908 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2909 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2910 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2911 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2912 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2913 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2914 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
2915 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2916 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2917 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
2918 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
2919 // CHECK9-NEXT: store i32 0, i32* [[SIVAR1]], align 4
2920 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2921 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
2922 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2923 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2924 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2925 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2926 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2927 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2928 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
2929 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2930 // CHECK9: cond.true:
2931 // CHECK9-NEXT: br label [[COND_END:%.*]]
2932 // CHECK9: cond.false:
2933 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2934 // CHECK9-NEXT: br label [[COND_END]]
2935 // CHECK9: cond.end:
2936 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2937 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2938 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2939 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2940 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2941 // CHECK9: omp.inner.for.cond:
2942 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2943 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2944 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2945 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2946 // CHECK9: omp.inner.for.body:
2947 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2948 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2949 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2950 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2951 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[SIVAR1]])
2952 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2953 // CHECK9: omp.inner.for.inc:
2954 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2955 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2956 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2957 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2958 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
2959 // CHECK9: omp.inner.for.end:
2960 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2961 // CHECK9: omp.loop.exit:
2962 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2963 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2964 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2965 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2966 // CHECK9: .omp.final.then:
2967 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4
2968 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
2969 // CHECK9: .omp.final.done:
2970 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
2971 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i32* [[SIVAR1]] to i8*
2972 // CHECK9-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
2973 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
2974 // CHECK9-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
2975 // CHECK9-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2976 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2977 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2978 // CHECK9-NEXT: ]
2979 // CHECK9: .omp.reduction.case1:
2980 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
2981 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR1]], align 4
2982 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
2983 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
2984 // CHECK9-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
2985 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2986 // CHECK9: .omp.reduction.case2:
2987 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[SIVAR1]], align 4
2988 // CHECK9-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
2989 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2990 // CHECK9: .omp.reduction.default:
2991 // CHECK9-NEXT: ret void
2992 //
2993 //
2994 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
2995 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
2996 // CHECK9-NEXT: entry:
2997 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2998 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2999 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3000 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3001 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
3002 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3003 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3004 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3005 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3006 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3007 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3008 // CHECK9-NEXT: [[SIVAR2:%.*]] = alloca i32, align 4
3009 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3010 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
3011 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
3012 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3013 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3014 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3015 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3016 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
3017 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
3018 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3019 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3020 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3021 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
3022 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3023 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
3024 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3025 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3026 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3027 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3028 // CHECK9-NEXT: store i32 0, i32* [[SIVAR2]], align 4
3029 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3030 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3031 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3032 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3033 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
3034 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3035 // CHECK9: cond.true:
3036 // CHECK9-NEXT: br label [[COND_END:%.*]]
3037 // CHECK9: cond.false:
3038 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3039 // CHECK9-NEXT: br label [[COND_END]]
3040 // CHECK9: cond.end:
3041 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3042 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3043 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3044 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3045 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3046 // CHECK9: omp.inner.for.cond:
3047 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3048 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3049 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3050 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3051 // CHECK9: omp.inner.for.body:
3052 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3053 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3054 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3055 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3056 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
3057 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR2]], align 4
3058 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
3059 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[SIVAR2]], align 4
3060 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
3061 // CHECK9-NEXT: store i32* [[SIVAR2]], i32** [[TMP13]], align 8
3062 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(8) [[REF_TMP]])
3063 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3064 // CHECK9: omp.body.continue:
3065 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3066 // CHECK9: omp.inner.for.inc:
3067 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3068 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1
3069 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
3070 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
3071 // CHECK9: omp.inner.for.end:
3072 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3073 // CHECK9: omp.loop.exit:
3074 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3075 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3076 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
3077 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3078 // CHECK9: .omp.final.then:
3079 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4
3080 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
3081 // CHECK9: .omp.final.done:
3082 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
3083 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i32* [[SIVAR2]] to i8*
3084 // CHECK9-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8
3085 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
3086 // CHECK9-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP19]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
3087 // CHECK9-NEXT: switch i32 [[TMP20]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
3088 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
3089 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
3090 // CHECK9-NEXT: ]
3091 // CHECK9: .omp.reduction.case1:
3092 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP0]], align 4
3093 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[SIVAR2]], align 4
3094 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
3095 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4
3096 // CHECK9-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
3097 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
3098 // CHECK9: .omp.reduction.case2:
3099 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[SIVAR2]], align 4
3100 // CHECK9-NEXT: [[TMP24:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP23]] monotonic, align 4
3101 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
3102 // CHECK9: .omp.reduction.default:
3103 // CHECK9-NEXT: ret void
3104 //
3105 //
3106 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
3107 // CHECK9-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
3108 // CHECK9-NEXT: entry:
3109 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
3110 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
3111 // CHECK9-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
3112 // CHECK9-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
3113 // CHECK9-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
3114 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
3115 // CHECK9-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
3116 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
3117 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
3118 // CHECK9-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
3119 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
3120 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
3121 // CHECK9-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
3122 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
3123 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
3124 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
3125 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3126 // CHECK9-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
3127 // CHECK9-NEXT: ret void
3128 //
3129 //
3130 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
3131 // CHECK9-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR4]] {
3132 // CHECK9-NEXT: entry:
3133 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
3134 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
3135 // CHECK9-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
3136 // CHECK9-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
3137 // CHECK9-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
3138 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
3139 // CHECK9-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
3140 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
3141 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
3142 // CHECK9-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
3143 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
3144 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
3145 // CHECK9-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
3146 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
3147 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
3148 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
3149 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3150 // CHECK9-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
3151 // CHECK9-NEXT: ret void
3152 //
3153 //
3154 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3155 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
3156 // CHECK9-NEXT: entry:
3157 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
3158 // CHECK9-NEXT: ret void
3159 //
3160 //
3161 // CHECK10-LABEL: define {{[^@]+}}@main
3162 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
3163 // CHECK10-NEXT: entry:
3164 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3165 // CHECK10-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
3166 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
3167 // CHECK10-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
3168 // CHECK10-NEXT: ret i32 0
3169 //
3170 //
3171 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45
3172 // CHECK10-SAME: (i64 [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
3173 // CHECK10-NEXT: entry:
3174 // CHECK10-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8
3175 // CHECK10-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8
3176 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
3177 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
3178 // CHECK10-NEXT: ret void
3179 //
3180 //
3181 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
3182 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
3183 // CHECK10-NEXT: entry:
3184 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3185 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3186 // CHECK10-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
3187 // CHECK10-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
3188 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3189 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3190 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3191 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3192 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3193 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3194 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
3195 // CHECK10-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
3196 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3197 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3198 // CHECK10-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
3199 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
3200 // CHECK10-NEXT: store i32 0, i32* [[SIVAR1]], align 4
3201 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3202 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
3203 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3204 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3205 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3206 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3207 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3208 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3209 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
3210 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3211 // CHECK10: cond.true:
3212 // CHECK10-NEXT: br label [[COND_END:%.*]]
3213 // CHECK10: cond.false:
3214 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3215 // CHECK10-NEXT: br label [[COND_END]]
3216 // CHECK10: cond.end:
3217 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3218 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3219 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3220 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3221 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3222 // CHECK10: omp.inner.for.cond:
3223 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3224 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3225 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3226 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3227 // CHECK10: omp.inner.for.body:
3228 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3229 // CHECK10-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3230 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3231 // CHECK10-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3232 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[SIVAR1]])
3233 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3234 // CHECK10: omp.inner.for.inc:
3235 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3236 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3237 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3238 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3239 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3240 // CHECK10: omp.inner.for.end:
3241 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3242 // CHECK10: omp.loop.exit:
3243 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3244 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3245 // CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3246 // CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3247 // CHECK10: .omp.final.then:
3248 // CHECK10-NEXT: store i32 2, i32* [[I]], align 4
3249 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
3250 // CHECK10: .omp.final.done:
3251 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
3252 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast i32* [[SIVAR1]] to i8*
3253 // CHECK10-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
3254 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
3255 // CHECK10-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
3256 // CHECK10-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
3257 // CHECK10-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
3258 // CHECK10-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
3259 // CHECK10-NEXT: ]
3260 // CHECK10: .omp.reduction.case1:
3261 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
3262 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR1]], align 4
3263 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
3264 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
3265 // CHECK10-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
3266 // CHECK10-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
3267 // CHECK10: .omp.reduction.case2:
3268 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[SIVAR1]], align 4
3269 // CHECK10-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
3270 // CHECK10-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
3271 // CHECK10: .omp.reduction.default:
3272 // CHECK10-NEXT: ret void
3273 //
3274 //
3275 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
3276 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
3277 // CHECK10-NEXT: entry:
3278 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3279 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3280 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3281 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3282 // CHECK10-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
3283 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3284 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
3285 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3286 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3287 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3288 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3289 // CHECK10-NEXT: [[SIVAR2:%.*]] = alloca i32, align 4
3290 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
3291 // CHECK10-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
3292 // CHECK10-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
3293 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3294 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3295 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3296 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3297 // CHECK10-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
3298 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
3299 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3300 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3301 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3302 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
3303 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3304 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
3305 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3306 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3307 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3308 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3309 // CHECK10-NEXT: store i32 0, i32* [[SIVAR2]], align 4
3310 // CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3311 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3312 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3313 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3314 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
3315 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3316 // CHECK10: cond.true:
3317 // CHECK10-NEXT: br label [[COND_END:%.*]]
3318 // CHECK10: cond.false:
3319 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3320 // CHECK10-NEXT: br label [[COND_END]]
3321 // CHECK10: cond.end:
3322 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3323 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3324 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3325 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3326 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3327 // CHECK10: omp.inner.for.cond:
3328 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3329 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3330 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3331 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3332 // CHECK10: omp.inner.for.body:
3333 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3334 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3335 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3336 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3337 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
3338 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR2]], align 4
3339 // CHECK10-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
3340 // CHECK10-NEXT: store i32 [[ADD4]], i32* [[SIVAR2]], align 4
3341 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
3342 // CHECK10-NEXT: store i32* [[SIVAR2]], i32** [[TMP13]], align 8
3343 // CHECK10-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(8) [[REF_TMP]])
3344 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3345 // CHECK10: omp.body.continue:
3346 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3347 // CHECK10: omp.inner.for.inc:
3348 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3349 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1
3350 // CHECK10-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
3351 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
3352 // CHECK10: omp.inner.for.end:
3353 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3354 // CHECK10: omp.loop.exit:
3355 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3356 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3357 // CHECK10-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
3358 // CHECK10-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3359 // CHECK10: .omp.final.then:
3360 // CHECK10-NEXT: store i32 2, i32* [[I]], align 4
3361 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
3362 // CHECK10: .omp.final.done:
3363 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
3364 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i32* [[SIVAR2]] to i8*
3365 // CHECK10-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8
3366 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
3367 // CHECK10-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP19]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
3368 // CHECK10-NEXT: switch i32 [[TMP20]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
3369 // CHECK10-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
3370 // CHECK10-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
3371 // CHECK10-NEXT: ]
3372 // CHECK10: .omp.reduction.case1:
3373 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP0]], align 4
3374 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[SIVAR2]], align 4
3375 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
3376 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4
3377 // CHECK10-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
3378 // CHECK10-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
3379 // CHECK10: .omp.reduction.case2:
3380 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[SIVAR2]], align 4
3381 // CHECK10-NEXT: [[TMP24:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP23]] monotonic, align 4
3382 // CHECK10-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
3383 // CHECK10: .omp.reduction.default:
3384 // CHECK10-NEXT: ret void
3385 //
3386 //
3387 // CHECK10-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
3388 // CHECK10-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
3389 // CHECK10-NEXT: entry:
3390 // CHECK10-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
3391 // CHECK10-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
3392 // CHECK10-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
3393 // CHECK10-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
3394 // CHECK10-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
3395 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
3396 // CHECK10-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
3397 // CHECK10-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
3398 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
3399 // CHECK10-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
3400 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
3401 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
3402 // CHECK10-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
3403 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
3404 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
3405 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
3406 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3407 // CHECK10-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
3408 // CHECK10-NEXT: ret void
3409 //
3410 //
3411 // CHECK10-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
3412 // CHECK10-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR4]] {
3413 // CHECK10-NEXT: entry:
3414 // CHECK10-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
3415 // CHECK10-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
3416 // CHECK10-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
3417 // CHECK10-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
3418 // CHECK10-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
3419 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
3420 // CHECK10-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
3421 // CHECK10-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
3422 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
3423 // CHECK10-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
3424 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
3425 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
3426 // CHECK10-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
3427 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
3428 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
3429 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
3430 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3431 // CHECK10-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
3432 // CHECK10-NEXT: ret void
3433 //
3434 //
3435 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3436 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] {
3437 // CHECK10-NEXT: entry:
3438 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1)
3439 // CHECK10-NEXT: ret void
3440 //
3441 //
3442 // CHECK11-LABEL: define {{[^@]+}}@main
3443 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
3444 // CHECK11-NEXT: entry:
3445 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3446 // CHECK11-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
3447 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
3448 // CHECK11-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
3449 // CHECK11-NEXT: ret i32 0
3450 //
3451 //
3452 // CHECK12-LABEL: define {{[^@]+}}@main
3453 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] {
3454 // CHECK12-NEXT: entry:
3455 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3456 // CHECK12-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
3457 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4
3458 // CHECK12-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]])
3459 // CHECK12-NEXT: ret i32 0
3460 //
3461