1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5
6 // Test host codegen.
7 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK2
9 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
10 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
11
12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
13 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
14 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
15 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK6
16
17 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
19 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
20 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8
21
22 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
23 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
24 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
25 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
26 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
27 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
28 #ifdef CK1
29
30 template <typename T, int X, long long Y>
31 struct SS{
32 T a[X];
33 float b;
fooSS34 int foo(void) {
35
36 #pragma omp target
37 #pragma omp teams distribute parallel for simd
38 for(int i = 0; i < X; i++) {
39 a[i] = (T)0;
40 }
41 #pragma omp target
42 #pragma omp teams distribute parallel for simd schedule(static)
43 for(int i = 0; i < X; i++) {
44 a[i] = (T)0;
45 }
46 #pragma omp target
47 #pragma omp teams distribute parallel for simd schedule(static, X/2)
48 for(int i = 0; i < X; i++) {
49 a[i] = (T)0;
50 }
51
52 #pragma omp target
53 #pragma omp teams distribute parallel for simd schedule(dynamic)
54 for(int i = 0; i < X; i++) {
55 a[i] = (T)0;
56 }
57
58 #pragma omp target
59 #pragma omp teams distribute parallel for simd schedule(dynamic, X/2)
60 for(int i = 0; i < X; i++) {
61 a[i] = (T)0;
62 }
63
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80 return a[0];
81 }
82 };
83
teams_template_struct(void)84 int teams_template_struct(void) {
85 SS<int, 123, 456> V;
86 return V.foo();
87
88 }
89 #endif // CK1
90
91 // Test host codegen.
92 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
93
94 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK14
95
96 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
97 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
98 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
99 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16
100
101
102 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17
103 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
104 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18
105
106 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19
107 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
108 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK20
109
110 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK21
111 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
112 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK22
113 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK23
114 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
115 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK24
116 #ifdef CK2
117
118 template <typename T, int n>
tmain(T argc)119 int tmain(T argc) {
120 T a[n];
121 int m = 10;
122 #pragma omp target
123 #pragma omp teams distribute parallel for simd
124 for(int i = 0; i < n; i++) {
125 a[i] = (T)0;
126 }
127 #pragma omp target
128 #pragma omp teams distribute parallel for simd schedule(static)
129 for(int i = 0; i < n; i++) {
130 a[i] = (T)0;
131 }
132 #pragma omp target
133 #pragma omp teams distribute parallel for simd schedule(static, m)
134 for(int i = 0; i < n; i++) {
135 a[i] = (T)0;
136 }
137 #pragma omp target
138 #pragma omp teams distribute parallel for simd schedule(dynamic)
139 for(int i = 0; i < n; i++) {
140 a[i] = (T)0;
141 }
142 #pragma omp target
143 #pragma omp teams distribute parallel for simd schedule(dynamic, m)
144 for(int i = 0; i < n; i++) {
145 a[i] = (T)0;
146 }
147 return 0;
148 }
149
main(int argc,char ** argv)150 int main (int argc, char **argv) {
151 int n = 100;
152 int a[n];
153 int m = 10;
154 #pragma omp target
155 #pragma omp teams distribute parallel for simd
156 for(int i = 0; i < n; i++) {
157 a[i] = 0;
158 }
159 #pragma omp target
160 #pragma omp teams distribute parallel for simd dist_schedule(static)
161 for(int i = 0; i < n; i++) {
162 a[i] = 0;
163 }
164 #pragma omp target
165 #pragma omp teams distribute parallel for simd dist_schedule(static, m)
166 for(int i = 0; i < n; i++) {
167 a[i] = 0;
168 }
169 #pragma omp target
170 #pragma omp teams distribute parallel for simd schedule(dynamic)
171 for(int i = 0; i < n; i++) {
172 a[i] = 0;
173 }
174 #pragma omp target
175 #pragma omp teams distribute parallel for simd schedule(dynamic, m)
176 for(int i = 0; i < n; i++) {
177 a[i] = 0;
178 }
179 return tmain<int, 10>(argc);
180 }
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219 #endif // CK2
220 #endif // #ifndef HEADER
221 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
222 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
223 // CHECK1-NEXT: entry:
224 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
225 // CHECK1-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
226 // CHECK1-NEXT: ret i32 [[CALL]]
227 //
228 //
229 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
230 // CHECK1-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
231 // CHECK1-NEXT: entry:
232 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
233 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
234 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
235 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
236 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
237 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
238 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
239 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
240 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
241 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
242 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
243 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
244 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
245 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8
246 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8
247 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8
248 // CHECK1-NEXT: [[_TMP20:%.*]] = alloca i32, align 4
249 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8
250 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8
251 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8
252 // CHECK1-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
253 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
254 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
255 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
256 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
257 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
258 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
259 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
260 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
261 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
262 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
263 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8
264 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
265 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
266 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
267 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
268 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
269 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
270 // CHECK1: omp_offload.failed:
271 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
272 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
273 // CHECK1: omp_offload.cont:
274 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
275 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
276 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
277 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
278 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
279 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
280 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
281 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
282 // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8
283 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
284 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
285 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
286 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
287 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
288 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
289 // CHECK1: omp_offload.failed7:
290 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41(%struct.SS* [[THIS1]]) #[[ATTR2]]
291 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]]
292 // CHECK1: omp_offload.cont8:
293 // CHECK1-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
294 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
295 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
296 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
297 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
298 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
299 // CHECK1-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
300 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
301 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8
302 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
303 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
304 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
305 // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
306 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
307 // CHECK1-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
308 // CHECK1: omp_offload.failed14:
309 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46(%struct.SS* [[THIS1]]) #[[ATTR2]]
310 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT15]]
311 // CHECK1: omp_offload.cont15:
312 // CHECK1-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
313 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
314 // CHECK1-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
315 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8
316 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
317 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
318 // CHECK1-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8
319 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0
320 // CHECK1-NEXT: store i8* null, i8** [[TMP31]], align 8
321 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
322 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
323 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
324 // CHECK1-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
325 // CHECK1-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
326 // CHECK1-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
327 // CHECK1: omp_offload.failed21:
328 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52(%struct.SS* [[THIS1]]) #[[ATTR2]]
329 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT22]]
330 // CHECK1: omp_offload.cont22:
331 // CHECK1-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
332 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
333 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
334 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
335 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
336 // CHECK1-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
337 // CHECK1-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8
338 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
339 // CHECK1-NEXT: store i8* null, i8** [[TMP40]], align 8
340 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
341 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
342 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
343 // CHECK1-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
344 // CHECK1-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
345 // CHECK1-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
346 // CHECK1: omp_offload.failed28:
347 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58(%struct.SS* [[THIS1]]) #[[ATTR2]]
348 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT29]]
349 // CHECK1: omp_offload.cont29:
350 // CHECK1-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
351 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0
352 // CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
353 // CHECK1-NEXT: ret i32 [[TMP45]]
354 //
355 //
356 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
357 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
358 // CHECK1-NEXT: entry:
359 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
360 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
361 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
362 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
363 // CHECK1-NEXT: ret void
364 //
365 //
366 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
367 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
368 // CHECK1-NEXT: entry:
369 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
370 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
371 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
372 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
373 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
374 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
375 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
376 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
377 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
378 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
379 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
380 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
381 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
382 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
383 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
384 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
385 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
386 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
387 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
388 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
389 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
390 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
391 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
392 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
393 // CHECK1: cond.true:
394 // CHECK1-NEXT: br label [[COND_END:%.*]]
395 // CHECK1: cond.false:
396 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
397 // CHECK1-NEXT: br label [[COND_END]]
398 // CHECK1: cond.end:
399 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
400 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
401 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
402 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
403 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
404 // CHECK1: omp.inner.for.cond:
405 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
406 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8
407 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
408 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
409 // CHECK1: omp.inner.for.body:
410 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !8
411 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
412 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8
413 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
414 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !8
415 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
416 // CHECK1: omp.inner.for.inc:
417 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
418 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !8
419 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
420 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
421 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
422 // CHECK1: omp.inner.for.end:
423 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
424 // CHECK1: omp.loop.exit:
425 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
426 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
427 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
428 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
429 // CHECK1: .omp.final.then:
430 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
431 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
432 // CHECK1: .omp.final.done:
433 // CHECK1-NEXT: ret void
434 //
435 //
436 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
437 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
438 // CHECK1-NEXT: entry:
439 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
440 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
441 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
442 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
443 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
444 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
445 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
446 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
447 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
448 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
449 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
450 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
451 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
452 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
453 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
454 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
455 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
456 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
457 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
458 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
459 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
460 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
461 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
462 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
463 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
464 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
465 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
466 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
467 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
468 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
469 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
470 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
471 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
472 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
473 // CHECK1: cond.true:
474 // CHECK1-NEXT: br label [[COND_END:%.*]]
475 // CHECK1: cond.false:
476 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
477 // CHECK1-NEXT: br label [[COND_END]]
478 // CHECK1: cond.end:
479 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
480 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
481 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
482 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
483 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
484 // CHECK1: omp.inner.for.cond:
485 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
486 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
487 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
488 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
489 // CHECK1: omp.inner.for.body:
490 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
491 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
492 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
493 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
494 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
495 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
496 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
497 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
498 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
499 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
500 // CHECK1: omp.body.continue:
501 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
502 // CHECK1: omp.inner.for.inc:
503 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
504 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
505 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
506 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
507 // CHECK1: omp.inner.for.end:
508 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
509 // CHECK1: omp.loop.exit:
510 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
511 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
512 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
513 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
514 // CHECK1: .omp.final.then:
515 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
516 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
517 // CHECK1: .omp.final.done:
518 // CHECK1-NEXT: ret void
519 //
520 //
521 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41
522 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
523 // CHECK1-NEXT: entry:
524 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
525 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
526 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
527 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
528 // CHECK1-NEXT: ret void
529 //
530 //
531 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
532 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
533 // CHECK1-NEXT: entry:
534 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
535 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
536 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
537 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
538 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
539 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
540 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
541 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
542 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
543 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
544 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
545 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
546 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
547 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
548 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
549 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
550 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
551 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
552 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
553 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
554 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
555 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
556 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
557 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
558 // CHECK1: cond.true:
559 // CHECK1-NEXT: br label [[COND_END:%.*]]
560 // CHECK1: cond.false:
561 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
562 // CHECK1-NEXT: br label [[COND_END]]
563 // CHECK1: cond.end:
564 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
565 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
566 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
567 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
568 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
569 // CHECK1: omp.inner.for.cond:
570 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
571 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17
572 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
573 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
574 // CHECK1: omp.inner.for.body:
575 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !17
576 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
577 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17
578 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
579 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !17
580 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
581 // CHECK1: omp.inner.for.inc:
582 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
583 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !17
584 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
585 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
586 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
587 // CHECK1: omp.inner.for.end:
588 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
589 // CHECK1: omp.loop.exit:
590 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
591 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
592 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
593 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
594 // CHECK1: .omp.final.then:
595 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
596 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
597 // CHECK1: .omp.final.done:
598 // CHECK1-NEXT: ret void
599 //
600 //
601 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
602 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
603 // CHECK1-NEXT: entry:
604 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
605 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
606 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
607 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
608 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
609 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
610 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
611 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
612 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
613 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
614 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
615 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
616 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
617 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
618 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
619 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
620 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
621 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
622 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
623 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
624 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
625 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
626 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
627 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
628 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
629 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
630 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
631 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
632 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
633 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
634 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
635 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
636 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
637 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
638 // CHECK1: cond.true:
639 // CHECK1-NEXT: br label [[COND_END:%.*]]
640 // CHECK1: cond.false:
641 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
642 // CHECK1-NEXT: br label [[COND_END]]
643 // CHECK1: cond.end:
644 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
645 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
646 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
647 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
648 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
649 // CHECK1: omp.inner.for.cond:
650 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
651 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20
652 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
653 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
654 // CHECK1: omp.inner.for.body:
655 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
656 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
657 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
658 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20
659 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
660 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20
661 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
662 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
663 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20
664 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
665 // CHECK1: omp.body.continue:
666 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
667 // CHECK1: omp.inner.for.inc:
668 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
669 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
670 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
671 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
672 // CHECK1: omp.inner.for.end:
673 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
674 // CHECK1: omp.loop.exit:
675 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
676 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
677 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
678 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
679 // CHECK1: .omp.final.then:
680 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
681 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
682 // CHECK1: .omp.final.done:
683 // CHECK1-NEXT: ret void
684 //
685 //
686 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46
687 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
688 // CHECK1-NEXT: entry:
689 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
690 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
691 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
692 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
693 // CHECK1-NEXT: ret void
694 //
695 //
696 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
697 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
698 // CHECK1-NEXT: entry:
699 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
700 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
701 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
702 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
703 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
704 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
705 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
706 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
707 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
708 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
709 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
710 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
711 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
712 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
713 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
714 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
715 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
716 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
717 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
718 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
719 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
720 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
721 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
722 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
723 // CHECK1: cond.true:
724 // CHECK1-NEXT: br label [[COND_END:%.*]]
725 // CHECK1: cond.false:
726 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
727 // CHECK1-NEXT: br label [[COND_END]]
728 // CHECK1: cond.end:
729 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
730 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
731 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
732 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
733 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
734 // CHECK1: omp.inner.for.cond:
735 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
736 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
737 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
738 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
739 // CHECK1: omp.inner.for.body:
740 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23
741 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
742 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
743 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
744 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !23
745 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
746 // CHECK1: omp.inner.for.inc:
747 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
748 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23
749 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
750 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
751 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
752 // CHECK1: omp.inner.for.end:
753 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
754 // CHECK1: omp.loop.exit:
755 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
756 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
757 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
758 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
759 // CHECK1: .omp.final.then:
760 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
761 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
762 // CHECK1: .omp.final.done:
763 // CHECK1-NEXT: ret void
764 //
765 //
766 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
767 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
768 // CHECK1-NEXT: entry:
769 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
770 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
771 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
772 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
773 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
774 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
775 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
776 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
777 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
778 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
779 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
780 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
781 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
782 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
783 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
784 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
785 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
786 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
787 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
788 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
789 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
790 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
791 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
792 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
793 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
794 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
795 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
796 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
797 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
798 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
799 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
800 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
801 // CHECK1: omp.dispatch.cond:
802 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
803 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
804 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
805 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
806 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
807 // CHECK1: cond.true:
808 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
809 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
810 // CHECK1-NEXT: br label [[COND_END:%.*]]
811 // CHECK1: cond.false:
812 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
813 // CHECK1-NEXT: br label [[COND_END]]
814 // CHECK1: cond.end:
815 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
816 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
817 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
818 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
819 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
820 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
821 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
822 // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
823 // CHECK1: omp.dispatch.body:
824 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
825 // CHECK1: omp.inner.for.cond:
826 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
827 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26
828 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
829 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
830 // CHECK1: omp.inner.for.body:
831 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
832 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
833 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
834 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !26
835 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
836 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !26
837 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
838 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
839 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26
840 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
841 // CHECK1: omp.body.continue:
842 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
843 // CHECK1: omp.inner.for.inc:
844 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
845 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
846 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
847 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
848 // CHECK1: omp.inner.for.end:
849 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
850 // CHECK1: omp.dispatch.inc:
851 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
852 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
853 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
854 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
855 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
856 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
857 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
858 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
859 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
860 // CHECK1: omp.dispatch.end:
861 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
862 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
863 // CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
864 // CHECK1-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
865 // CHECK1: .omp.final.then:
866 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
867 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
868 // CHECK1: .omp.final.done:
869 // CHECK1-NEXT: ret void
870 //
871 //
872 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52
873 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
874 // CHECK1-NEXT: entry:
875 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
876 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
877 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
878 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
879 // CHECK1-NEXT: ret void
880 //
881 //
882 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
883 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
884 // CHECK1-NEXT: entry:
885 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
886 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
887 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
888 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
889 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
890 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
891 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
892 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
893 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
894 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
895 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
896 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
897 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
898 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
899 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
900 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
901 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
902 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
903 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
904 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
905 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
906 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
907 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
908 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
909 // CHECK1: cond.true:
910 // CHECK1-NEXT: br label [[COND_END:%.*]]
911 // CHECK1: cond.false:
912 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
913 // CHECK1-NEXT: br label [[COND_END]]
914 // CHECK1: cond.end:
915 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
916 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
917 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
918 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
919 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
920 // CHECK1: omp.inner.for.cond:
921 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
922 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
923 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
924 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
925 // CHECK1: omp.inner.for.body:
926 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
927 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
928 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
929 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
930 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !29
931 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
932 // CHECK1: omp.inner.for.inc:
933 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
934 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
935 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
936 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
937 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
938 // CHECK1: omp.inner.for.end:
939 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
940 // CHECK1: omp.loop.exit:
941 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
942 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
943 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
944 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
945 // CHECK1: .omp.final.then:
946 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
947 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
948 // CHECK1: .omp.final.done:
949 // CHECK1-NEXT: ret void
950 //
951 //
952 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
953 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
954 // CHECK1-NEXT: entry:
955 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
956 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
957 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
958 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
959 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
960 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
961 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
962 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
963 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
964 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
965 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
966 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
967 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
968 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
969 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
970 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
971 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
972 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
973 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
974 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
975 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
976 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
977 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
978 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
979 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
980 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
981 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
982 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
983 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
984 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
985 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
986 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
987 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
988 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
989 // CHECK1: omp.dispatch.cond:
990 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
991 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
992 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
993 // CHECK1: omp.dispatch.body:
994 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
995 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
996 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
997 // CHECK1: omp.inner.for.cond:
998 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
999 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32
1000 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1001 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1002 // CHECK1: omp.inner.for.body:
1003 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
1004 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1005 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1006 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !32
1007 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1008 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !32
1009 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1010 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1011 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !32
1012 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1013 // CHECK1: omp.body.continue:
1014 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1015 // CHECK1: omp.inner.for.inc:
1016 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
1017 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1018 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
1019 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
1020 // CHECK1: omp.inner.for.end:
1021 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1022 // CHECK1: omp.dispatch.inc:
1023 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
1024 // CHECK1: omp.dispatch.end:
1025 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1026 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1027 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1028 // CHECK1: .omp.final.then:
1029 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
1030 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1031 // CHECK1: .omp.final.done:
1032 // CHECK1-NEXT: ret void
1033 //
1034 //
1035 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58
1036 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1037 // CHECK1-NEXT: entry:
1038 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1039 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1040 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1041 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1042 // CHECK1-NEXT: ret void
1043 //
1044 //
1045 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14
1046 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1047 // CHECK1-NEXT: entry:
1048 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1049 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1050 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1051 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1052 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1053 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1054 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1055 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1056 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1057 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1058 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1059 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1060 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1061 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1062 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1063 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1064 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1065 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1066 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1067 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1068 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1069 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1070 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1071 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1072 // CHECK1: cond.true:
1073 // CHECK1-NEXT: br label [[COND_END:%.*]]
1074 // CHECK1: cond.false:
1075 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1076 // CHECK1-NEXT: br label [[COND_END]]
1077 // CHECK1: cond.end:
1078 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1079 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1080 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1081 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1082 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1083 // CHECK1: omp.inner.for.cond:
1084 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
1085 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
1086 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1087 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1088 // CHECK1: omp.inner.for.body:
1089 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !35
1090 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1091 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
1092 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1093 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !35
1094 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1095 // CHECK1: omp.inner.for.inc:
1096 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
1097 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !35
1098 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1099 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
1100 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
1101 // CHECK1: omp.inner.for.end:
1102 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1103 // CHECK1: omp.loop.exit:
1104 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1105 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1106 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1107 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1108 // CHECK1: .omp.final.then:
1109 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
1110 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1111 // CHECK1: .omp.final.done:
1112 // CHECK1-NEXT: ret void
1113 //
1114 //
1115 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15
1116 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1117 // CHECK1-NEXT: entry:
1118 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1119 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1120 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1121 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1122 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1123 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1124 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1125 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1126 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1127 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1128 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1129 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1130 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1131 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1132 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1133 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1134 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1135 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1136 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1137 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1138 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1139 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1140 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1141 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1142 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1143 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1144 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1145 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1146 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1147 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1148 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1149 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1150 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
1151 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1152 // CHECK1: omp.dispatch.cond:
1153 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1154 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1155 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1156 // CHECK1: omp.dispatch.body:
1157 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1158 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1159 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1160 // CHECK1: omp.inner.for.cond:
1161 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
1162 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38
1163 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1164 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1165 // CHECK1: omp.inner.for.body:
1166 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
1167 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1168 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1169 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !38
1170 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1171 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !38
1172 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1173 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1174 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !38
1175 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1176 // CHECK1: omp.body.continue:
1177 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1178 // CHECK1: omp.inner.for.inc:
1179 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
1180 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1181 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
1182 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
1183 // CHECK1: omp.inner.for.end:
1184 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1185 // CHECK1: omp.dispatch.inc:
1186 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
1187 // CHECK1: omp.dispatch.end:
1188 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1189 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1190 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1191 // CHECK1: .omp.final.then:
1192 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
1193 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1194 // CHECK1: .omp.final.done:
1195 // CHECK1-NEXT: ret void
1196 //
1197 //
1198 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1199 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
1200 // CHECK1-NEXT: entry:
1201 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
1202 // CHECK1-NEXT: ret void
1203 //
1204 //
1205 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1206 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
1207 // CHECK2-NEXT: entry:
1208 // CHECK2-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1209 // CHECK2-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
1210 // CHECK2-NEXT: ret i32 [[CALL]]
1211 //
1212 //
1213 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1214 // CHECK2-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1215 // CHECK2-NEXT: entry:
1216 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1217 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1218 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1219 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1220 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1221 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
1222 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
1223 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
1224 // CHECK2-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
1225 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
1226 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
1227 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
1228 // CHECK2-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
1229 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8
1230 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8
1231 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8
1232 // CHECK2-NEXT: [[_TMP20:%.*]] = alloca i32, align 4
1233 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8
1234 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8
1235 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8
1236 // CHECK2-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
1237 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1238 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1239 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1240 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1241 // CHECK2-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
1242 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
1243 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1244 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
1245 // CHECK2-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
1246 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1247 // CHECK2-NEXT: store i8* null, i8** [[TMP4]], align 8
1248 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1249 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1250 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
1251 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1252 // CHECK2-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
1253 // CHECK2-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1254 // CHECK2: omp_offload.failed:
1255 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
1256 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
1257 // CHECK2: omp_offload.cont:
1258 // CHECK2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1259 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1260 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
1261 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
1262 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1263 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
1264 // CHECK2-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
1265 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
1266 // CHECK2-NEXT: store i8* null, i8** [[TMP13]], align 8
1267 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1268 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1269 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
1270 // CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1271 // CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1272 // CHECK2-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
1273 // CHECK2: omp_offload.failed7:
1274 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41(%struct.SS* [[THIS1]]) #[[ATTR2]]
1275 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT8]]
1276 // CHECK2: omp_offload.cont8:
1277 // CHECK2-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1278 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
1279 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
1280 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
1281 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
1282 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
1283 // CHECK2-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
1284 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
1285 // CHECK2-NEXT: store i8* null, i8** [[TMP22]], align 8
1286 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
1287 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
1288 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
1289 // CHECK2-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1290 // CHECK2-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1291 // CHECK2-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
1292 // CHECK2: omp_offload.failed14:
1293 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46(%struct.SS* [[THIS1]]) #[[ATTR2]]
1294 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT15]]
1295 // CHECK2: omp_offload.cont15:
1296 // CHECK2-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1297 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
1298 // CHECK2-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
1299 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8
1300 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
1301 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
1302 // CHECK2-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8
1303 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0
1304 // CHECK2-NEXT: store i8* null, i8** [[TMP31]], align 8
1305 // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
1306 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
1307 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
1308 // CHECK2-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1309 // CHECK2-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
1310 // CHECK2-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
1311 // CHECK2: omp_offload.failed21:
1312 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52(%struct.SS* [[THIS1]]) #[[ATTR2]]
1313 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT22]]
1314 // CHECK2: omp_offload.cont22:
1315 // CHECK2-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1316 // CHECK2-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
1317 // CHECK2-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
1318 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
1319 // CHECK2-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
1320 // CHECK2-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
1321 // CHECK2-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8
1322 // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
1323 // CHECK2-NEXT: store i8* null, i8** [[TMP40]], align 8
1324 // CHECK2-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
1325 // CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
1326 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
1327 // CHECK2-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1328 // CHECK2-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
1329 // CHECK2-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
1330 // CHECK2: omp_offload.failed28:
1331 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58(%struct.SS* [[THIS1]]) #[[ATTR2]]
1332 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT29]]
1333 // CHECK2: omp_offload.cont29:
1334 // CHECK2-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1335 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0
1336 // CHECK2-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1337 // CHECK2-NEXT: ret i32 [[TMP45]]
1338 //
1339 //
1340 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
1341 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
1342 // CHECK2-NEXT: entry:
1343 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1344 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1345 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1346 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1347 // CHECK2-NEXT: ret void
1348 //
1349 //
1350 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
1351 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1352 // CHECK2-NEXT: entry:
1353 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1354 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1355 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1356 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1357 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1358 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1359 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1360 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1361 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1362 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1363 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1364 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1365 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1366 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1367 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1368 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1369 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1370 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1371 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1372 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1373 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1374 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1375 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1376 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1377 // CHECK2: cond.true:
1378 // CHECK2-NEXT: br label [[COND_END:%.*]]
1379 // CHECK2: cond.false:
1380 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1381 // CHECK2-NEXT: br label [[COND_END]]
1382 // CHECK2: cond.end:
1383 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1384 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1385 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1386 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1387 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1388 // CHECK2: omp.inner.for.cond:
1389 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
1390 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8
1391 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1392 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1393 // CHECK2: omp.inner.for.body:
1394 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !8
1395 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1396 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8
1397 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1398 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !8
1399 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1400 // CHECK2: omp.inner.for.inc:
1401 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
1402 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !8
1403 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1404 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
1405 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
1406 // CHECK2: omp.inner.for.end:
1407 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1408 // CHECK2: omp.loop.exit:
1409 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1410 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1411 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1412 // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1413 // CHECK2: .omp.final.then:
1414 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4
1415 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1416 // CHECK2: .omp.final.done:
1417 // CHECK2-NEXT: ret void
1418 //
1419 //
1420 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
1421 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1422 // CHECK2-NEXT: entry:
1423 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1424 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1425 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1426 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1427 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1428 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1429 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1430 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1431 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1432 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1433 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1434 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1435 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1436 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1437 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1438 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1439 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1440 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1441 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1442 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1443 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1444 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1445 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1446 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1447 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1448 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1449 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1450 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1451 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1452 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1453 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1454 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1455 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1456 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1457 // CHECK2: cond.true:
1458 // CHECK2-NEXT: br label [[COND_END:%.*]]
1459 // CHECK2: cond.false:
1460 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1461 // CHECK2-NEXT: br label [[COND_END]]
1462 // CHECK2: cond.end:
1463 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1464 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1465 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1466 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1467 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1468 // CHECK2: omp.inner.for.cond:
1469 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
1470 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
1471 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1472 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1473 // CHECK2: omp.inner.for.body:
1474 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
1475 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1476 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1477 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
1478 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1479 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
1480 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
1481 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1482 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
1483 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1484 // CHECK2: omp.body.continue:
1485 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1486 // CHECK2: omp.inner.for.inc:
1487 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
1488 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1489 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
1490 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
1491 // CHECK2: omp.inner.for.end:
1492 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1493 // CHECK2: omp.loop.exit:
1494 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1495 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1496 // CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1497 // CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1498 // CHECK2: .omp.final.then:
1499 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4
1500 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1501 // CHECK2: .omp.final.done:
1502 // CHECK2-NEXT: ret void
1503 //
1504 //
1505 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41
1506 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1507 // CHECK2-NEXT: entry:
1508 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1509 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1510 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1511 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1512 // CHECK2-NEXT: ret void
1513 //
1514 //
1515 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2
1516 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1517 // CHECK2-NEXT: entry:
1518 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1519 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1520 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1521 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1522 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1523 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1524 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1525 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1526 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1527 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1528 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1529 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1530 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1531 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1532 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1533 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1534 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1535 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1536 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1537 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1538 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1539 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1540 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1541 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1542 // CHECK2: cond.true:
1543 // CHECK2-NEXT: br label [[COND_END:%.*]]
1544 // CHECK2: cond.false:
1545 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1546 // CHECK2-NEXT: br label [[COND_END]]
1547 // CHECK2: cond.end:
1548 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1549 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1550 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1551 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1552 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1553 // CHECK2: omp.inner.for.cond:
1554 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1555 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17
1556 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1557 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1558 // CHECK2: omp.inner.for.body:
1559 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !17
1560 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1561 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17
1562 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1563 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !17
1564 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1565 // CHECK2: omp.inner.for.inc:
1566 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1567 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !17
1568 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1569 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1570 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
1571 // CHECK2: omp.inner.for.end:
1572 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1573 // CHECK2: omp.loop.exit:
1574 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1575 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1576 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1577 // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1578 // CHECK2: .omp.final.then:
1579 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4
1580 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1581 // CHECK2: .omp.final.done:
1582 // CHECK2-NEXT: ret void
1583 //
1584 //
1585 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3
1586 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1587 // CHECK2-NEXT: entry:
1588 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1589 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1590 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1591 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1592 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1593 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1594 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1595 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1596 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1597 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1598 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1599 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1600 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1601 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1602 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1603 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1604 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1605 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1606 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1607 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1608 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1609 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1610 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1611 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1612 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1613 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1614 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1615 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1616 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1617 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1618 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1619 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1620 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1621 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1622 // CHECK2: cond.true:
1623 // CHECK2-NEXT: br label [[COND_END:%.*]]
1624 // CHECK2: cond.false:
1625 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1626 // CHECK2-NEXT: br label [[COND_END]]
1627 // CHECK2: cond.end:
1628 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1629 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1630 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1631 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1632 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1633 // CHECK2: omp.inner.for.cond:
1634 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
1635 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20
1636 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1637 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1638 // CHECK2: omp.inner.for.body:
1639 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
1640 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1641 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1642 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20
1643 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1644 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20
1645 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
1646 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1647 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20
1648 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1649 // CHECK2: omp.body.continue:
1650 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1651 // CHECK2: omp.inner.for.inc:
1652 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
1653 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1654 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
1655 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
1656 // CHECK2: omp.inner.for.end:
1657 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1658 // CHECK2: omp.loop.exit:
1659 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1660 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1661 // CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1662 // CHECK2-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1663 // CHECK2: .omp.final.then:
1664 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4
1665 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1666 // CHECK2: .omp.final.done:
1667 // CHECK2-NEXT: ret void
1668 //
1669 //
1670 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46
1671 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1672 // CHECK2-NEXT: entry:
1673 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1674 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1675 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1676 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1677 // CHECK2-NEXT: ret void
1678 //
1679 //
1680 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6
1681 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1682 // CHECK2-NEXT: entry:
1683 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1684 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1685 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1686 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1687 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1688 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1689 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1690 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1691 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1692 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1693 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1694 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1695 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1696 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1697 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1698 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1699 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1700 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1701 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1702 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1703 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1704 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1705 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1706 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1707 // CHECK2: cond.true:
1708 // CHECK2-NEXT: br label [[COND_END:%.*]]
1709 // CHECK2: cond.false:
1710 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1711 // CHECK2-NEXT: br label [[COND_END]]
1712 // CHECK2: cond.end:
1713 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1714 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1715 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1716 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1717 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1718 // CHECK2: omp.inner.for.cond:
1719 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
1720 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
1721 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1722 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1723 // CHECK2: omp.inner.for.body:
1724 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23
1725 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1726 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
1727 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1728 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !23
1729 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1730 // CHECK2: omp.inner.for.inc:
1731 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
1732 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23
1733 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1734 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
1735 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
1736 // CHECK2: omp.inner.for.end:
1737 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1738 // CHECK2: omp.loop.exit:
1739 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1740 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1741 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1742 // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1743 // CHECK2: .omp.final.then:
1744 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4
1745 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1746 // CHECK2: .omp.final.done:
1747 // CHECK2-NEXT: ret void
1748 //
1749 //
1750 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7
1751 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1752 // CHECK2-NEXT: entry:
1753 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1754 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1755 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1756 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1757 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1758 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1759 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1760 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1761 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1762 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1763 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1764 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1765 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1766 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1767 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1768 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1769 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1770 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1771 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1772 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1773 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1774 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1775 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1776 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1777 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1778 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1779 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1780 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1781 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1782 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1783 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
1784 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1785 // CHECK2: omp.dispatch.cond:
1786 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1787 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1788 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
1789 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
1790 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1791 // CHECK2: cond.true:
1792 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1793 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
1794 // CHECK2-NEXT: br label [[COND_END:%.*]]
1795 // CHECK2: cond.false:
1796 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1797 // CHECK2-NEXT: br label [[COND_END]]
1798 // CHECK2: cond.end:
1799 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
1800 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1801 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1802 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
1803 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1804 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1805 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
1806 // CHECK2-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1807 // CHECK2: omp.dispatch.body:
1808 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1809 // CHECK2: omp.inner.for.cond:
1810 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
1811 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26
1812 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1813 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1814 // CHECK2: omp.inner.for.body:
1815 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
1816 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1817 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1818 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !26
1819 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1820 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !26
1821 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
1822 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1823 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26
1824 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1825 // CHECK2: omp.body.continue:
1826 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1827 // CHECK2: omp.inner.for.inc:
1828 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
1829 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
1830 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
1831 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
1832 // CHECK2: omp.inner.for.end:
1833 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1834 // CHECK2: omp.dispatch.inc:
1835 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1836 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1837 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1838 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
1839 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1840 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1841 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1842 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
1843 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]]
1844 // CHECK2: omp.dispatch.end:
1845 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1846 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1847 // CHECK2-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
1848 // CHECK2-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1849 // CHECK2: .omp.final.then:
1850 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4
1851 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1852 // CHECK2: .omp.final.done:
1853 // CHECK2-NEXT: ret void
1854 //
1855 //
1856 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52
1857 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1858 // CHECK2-NEXT: entry:
1859 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1860 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1861 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1862 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1863 // CHECK2-NEXT: ret void
1864 //
1865 //
1866 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10
1867 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1868 // CHECK2-NEXT: entry:
1869 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1870 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1871 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1872 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1873 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1874 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1875 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1876 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1877 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1878 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1879 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1880 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1881 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1882 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1883 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1884 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1885 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1886 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1887 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1888 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1889 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1890 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1891 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1892 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1893 // CHECK2: cond.true:
1894 // CHECK2-NEXT: br label [[COND_END:%.*]]
1895 // CHECK2: cond.false:
1896 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1897 // CHECK2-NEXT: br label [[COND_END]]
1898 // CHECK2: cond.end:
1899 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1900 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1901 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1902 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1903 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1904 // CHECK2: omp.inner.for.cond:
1905 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
1906 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
1907 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1908 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1909 // CHECK2: omp.inner.for.body:
1910 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
1911 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1912 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
1913 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1914 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !29
1915 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1916 // CHECK2: omp.inner.for.inc:
1917 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
1918 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
1919 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1920 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
1921 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
1922 // CHECK2: omp.inner.for.end:
1923 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1924 // CHECK2: omp.loop.exit:
1925 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1926 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1927 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1928 // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1929 // CHECK2: .omp.final.then:
1930 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4
1931 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
1932 // CHECK2: .omp.final.done:
1933 // CHECK2-NEXT: ret void
1934 //
1935 //
1936 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11
1937 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1938 // CHECK2-NEXT: entry:
1939 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1940 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1941 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1942 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1943 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1944 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1945 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1946 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1947 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1948 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1949 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1950 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1951 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1952 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1953 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1954 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1955 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1956 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1957 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1958 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1959 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1960 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1961 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1962 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1963 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1964 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1965 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1966 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1967 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1968 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1969 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1970 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1971 // CHECK2-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
1972 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1973 // CHECK2: omp.dispatch.cond:
1974 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1975 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1976 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1977 // CHECK2: omp.dispatch.body:
1978 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1979 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1980 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1981 // CHECK2: omp.inner.for.cond:
1982 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
1983 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32
1984 // CHECK2-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1985 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1986 // CHECK2: omp.inner.for.body:
1987 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
1988 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1989 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1990 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !32
1991 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1992 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !32
1993 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1994 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1995 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !32
1996 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1997 // CHECK2: omp.body.continue:
1998 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1999 // CHECK2: omp.inner.for.inc:
2000 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
2001 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
2002 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
2003 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
2004 // CHECK2: omp.inner.for.end:
2005 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2006 // CHECK2: omp.dispatch.inc:
2007 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]]
2008 // CHECK2: omp.dispatch.end:
2009 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2010 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2011 // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2012 // CHECK2: .omp.final.then:
2013 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4
2014 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
2015 // CHECK2: .omp.final.done:
2016 // CHECK2-NEXT: ret void
2017 //
2018 //
2019 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58
2020 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2021 // CHECK2-NEXT: entry:
2022 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2023 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2024 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2025 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2026 // CHECK2-NEXT: ret void
2027 //
2028 //
2029 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..14
2030 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2031 // CHECK2-NEXT: entry:
2032 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2033 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2034 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2035 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2036 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2037 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2038 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2039 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2040 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2041 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2042 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2043 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2044 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2045 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2046 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2047 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2048 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2049 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2050 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2051 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2052 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2053 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2054 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2055 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2056 // CHECK2: cond.true:
2057 // CHECK2-NEXT: br label [[COND_END:%.*]]
2058 // CHECK2: cond.false:
2059 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2060 // CHECK2-NEXT: br label [[COND_END]]
2061 // CHECK2: cond.end:
2062 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2063 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2064 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2065 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2066 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2067 // CHECK2: omp.inner.for.cond:
2068 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
2069 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
2070 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2071 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2072 // CHECK2: omp.inner.for.body:
2073 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !35
2074 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2075 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
2076 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2077 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !35
2078 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2079 // CHECK2: omp.inner.for.inc:
2080 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
2081 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !35
2082 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2083 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
2084 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
2085 // CHECK2: omp.inner.for.end:
2086 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2087 // CHECK2: omp.loop.exit:
2088 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2089 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2090 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2091 // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2092 // CHECK2: .omp.final.then:
2093 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4
2094 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
2095 // CHECK2: .omp.final.done:
2096 // CHECK2-NEXT: ret void
2097 //
2098 //
2099 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..15
2100 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2101 // CHECK2-NEXT: entry:
2102 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2103 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2104 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2105 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2106 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2107 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2108 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2109 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2110 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2111 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2112 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2113 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2114 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2115 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2116 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2117 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2118 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2119 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2120 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2121 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2122 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2123 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2124 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2125 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2126 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2127 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2128 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2129 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2130 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2131 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2132 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2133 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2134 // CHECK2-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
2135 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2136 // CHECK2: omp.dispatch.cond:
2137 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
2138 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2139 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2140 // CHECK2: omp.dispatch.body:
2141 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2142 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2143 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2144 // CHECK2: omp.inner.for.cond:
2145 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
2146 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38
2147 // CHECK2-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2148 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2149 // CHECK2: omp.inner.for.body:
2150 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
2151 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2152 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2153 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !38
2154 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2155 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !38
2156 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
2157 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2158 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !38
2159 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2160 // CHECK2: omp.body.continue:
2161 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2162 // CHECK2: omp.inner.for.inc:
2163 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
2164 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
2165 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
2166 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
2167 // CHECK2: omp.inner.for.end:
2168 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2169 // CHECK2: omp.dispatch.inc:
2170 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]]
2171 // CHECK2: omp.dispatch.end:
2172 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2173 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2174 // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2175 // CHECK2: .omp.final.then:
2176 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4
2177 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
2178 // CHECK2: .omp.final.done:
2179 // CHECK2-NEXT: ret void
2180 //
2181 //
2182 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2183 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] {
2184 // CHECK2-NEXT: entry:
2185 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
2186 // CHECK2-NEXT: ret void
2187 //
2188 //
2189 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
2190 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
2191 // CHECK3-NEXT: entry:
2192 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
2193 // CHECK3-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
2194 // CHECK3-NEXT: ret i32 [[CALL]]
2195 //
2196 //
2197 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
2198 // CHECK3-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
2199 // CHECK3-NEXT: entry:
2200 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2201 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2202 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2203 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2204 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2205 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
2206 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
2207 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
2208 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
2209 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
2210 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
2211 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
2212 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
2213 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8
2214 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8
2215 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8
2216 // CHECK3-NEXT: [[_TMP20:%.*]] = alloca i32, align 4
2217 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8
2218 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8
2219 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8
2220 // CHECK3-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
2221 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2222 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2223 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
2224 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2225 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
2226 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
2227 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2228 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
2229 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
2230 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2231 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 8
2232 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2233 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2234 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
2235 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2236 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
2237 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2238 // CHECK3: omp_offload.failed:
2239 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
2240 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
2241 // CHECK3: omp_offload.cont:
2242 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2243 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2244 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
2245 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
2246 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2247 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
2248 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
2249 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
2250 // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 8
2251 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2252 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2253 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2254 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2255 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2256 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
2257 // CHECK3: omp_offload.failed7:
2258 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41(%struct.SS* [[THIS1]]) #[[ATTR2]]
2259 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]]
2260 // CHECK3: omp_offload.cont8:
2261 // CHECK3-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2262 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
2263 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
2264 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
2265 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
2266 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
2267 // CHECK3-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
2268 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
2269 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 8
2270 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
2271 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
2272 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2273 // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2274 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2275 // CHECK3-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
2276 // CHECK3: omp_offload.failed14:
2277 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46(%struct.SS* [[THIS1]]) #[[ATTR2]]
2278 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT15]]
2279 // CHECK3: omp_offload.cont15:
2280 // CHECK3-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2281 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
2282 // CHECK3-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
2283 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8
2284 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
2285 // CHECK3-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
2286 // CHECK3-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8
2287 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0
2288 // CHECK3-NEXT: store i8* null, i8** [[TMP31]], align 8
2289 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
2290 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
2291 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2292 // CHECK3-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2293 // CHECK3-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
2294 // CHECK3-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
2295 // CHECK3: omp_offload.failed21:
2296 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52(%struct.SS* [[THIS1]]) #[[ATTR2]]
2297 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT22]]
2298 // CHECK3: omp_offload.cont22:
2299 // CHECK3-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2300 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
2301 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
2302 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
2303 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
2304 // CHECK3-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
2305 // CHECK3-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8
2306 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
2307 // CHECK3-NEXT: store i8* null, i8** [[TMP40]], align 8
2308 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
2309 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
2310 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2311 // CHECK3-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2312 // CHECK3-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
2313 // CHECK3-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
2314 // CHECK3: omp_offload.failed28:
2315 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58(%struct.SS* [[THIS1]]) #[[ATTR2]]
2316 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT29]]
2317 // CHECK3: omp_offload.cont29:
2318 // CHECK3-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2319 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0
2320 // CHECK3-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
2321 // CHECK3-NEXT: ret i32 [[TMP45]]
2322 //
2323 //
2324 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
2325 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
2326 // CHECK3-NEXT: entry:
2327 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2328 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2329 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2330 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2331 // CHECK3-NEXT: ret void
2332 //
2333 //
2334 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
2335 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2336 // CHECK3-NEXT: entry:
2337 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2338 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2339 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2340 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2341 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2342 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2343 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2344 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2345 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2346 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2347 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2348 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2349 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2350 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2351 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2352 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2353 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2354 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2355 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2356 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2357 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2358 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2359 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2360 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2361 // CHECK3: cond.true:
2362 // CHECK3-NEXT: br label [[COND_END:%.*]]
2363 // CHECK3: cond.false:
2364 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2365 // CHECK3-NEXT: br label [[COND_END]]
2366 // CHECK3: cond.end:
2367 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2368 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2369 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2370 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2371 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2372 // CHECK3: omp.inner.for.cond:
2373 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
2374 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8
2375 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2376 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2377 // CHECK3: omp.inner.for.body:
2378 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !8
2379 // CHECK3-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2380 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8
2381 // CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2382 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !8
2383 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2384 // CHECK3: omp.inner.for.inc:
2385 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
2386 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !8
2387 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2388 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
2389 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
2390 // CHECK3: omp.inner.for.end:
2391 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2392 // CHECK3: omp.loop.exit:
2393 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2394 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2395 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2396 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2397 // CHECK3: .omp.final.then:
2398 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
2399 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2400 // CHECK3: .omp.final.done:
2401 // CHECK3-NEXT: ret void
2402 //
2403 //
2404 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
2405 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2406 // CHECK3-NEXT: entry:
2407 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2408 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2409 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2410 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2411 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2412 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2413 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2414 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2415 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2416 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2417 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2418 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2419 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2420 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2421 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2422 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2423 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2424 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2425 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2426 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2427 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2428 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2429 // CHECK3-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2430 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2431 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2432 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2433 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2434 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2435 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2436 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2437 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2438 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2439 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2440 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2441 // CHECK3: cond.true:
2442 // CHECK3-NEXT: br label [[COND_END:%.*]]
2443 // CHECK3: cond.false:
2444 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2445 // CHECK3-NEXT: br label [[COND_END]]
2446 // CHECK3: cond.end:
2447 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2448 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2449 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2450 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2451 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2452 // CHECK3: omp.inner.for.cond:
2453 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2454 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
2455 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2456 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2457 // CHECK3: omp.inner.for.body:
2458 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2459 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2460 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2461 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
2462 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2463 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
2464 // CHECK3-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2465 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2466 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
2467 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2468 // CHECK3: omp.body.continue:
2469 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2470 // CHECK3: omp.inner.for.inc:
2471 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2472 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2473 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2474 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
2475 // CHECK3: omp.inner.for.end:
2476 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2477 // CHECK3: omp.loop.exit:
2478 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2479 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2480 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2481 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2482 // CHECK3: .omp.final.then:
2483 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
2484 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2485 // CHECK3: .omp.final.done:
2486 // CHECK3-NEXT: ret void
2487 //
2488 //
2489 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41
2490 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2491 // CHECK3-NEXT: entry:
2492 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2493 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2494 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2495 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2496 // CHECK3-NEXT: ret void
2497 //
2498 //
2499 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2
2500 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2501 // CHECK3-NEXT: entry:
2502 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2503 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2504 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2505 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2506 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2507 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2508 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2509 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2510 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2511 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2512 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2513 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2514 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2515 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2516 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2517 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2518 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2519 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2520 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2521 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2522 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2523 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2524 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2525 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2526 // CHECK3: cond.true:
2527 // CHECK3-NEXT: br label [[COND_END:%.*]]
2528 // CHECK3: cond.false:
2529 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2530 // CHECK3-NEXT: br label [[COND_END]]
2531 // CHECK3: cond.end:
2532 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2533 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2534 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2535 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2536 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2537 // CHECK3: omp.inner.for.cond:
2538 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
2539 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17
2540 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2541 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2542 // CHECK3: omp.inner.for.body:
2543 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !17
2544 // CHECK3-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2545 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17
2546 // CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2547 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !17
2548 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2549 // CHECK3: omp.inner.for.inc:
2550 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
2551 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !17
2552 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2553 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
2554 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
2555 // CHECK3: omp.inner.for.end:
2556 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2557 // CHECK3: omp.loop.exit:
2558 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2559 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2560 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2561 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2562 // CHECK3: .omp.final.then:
2563 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
2564 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2565 // CHECK3: .omp.final.done:
2566 // CHECK3-NEXT: ret void
2567 //
2568 //
2569 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
2570 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2571 // CHECK3-NEXT: entry:
2572 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2573 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2574 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2575 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2576 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2577 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2578 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2579 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2580 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2581 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2582 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2583 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2584 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2585 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2586 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2587 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2588 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2589 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2590 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2591 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2592 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2593 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2594 // CHECK3-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2595 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2596 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2597 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2598 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2599 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2600 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2601 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2602 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2603 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2604 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2605 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2606 // CHECK3: cond.true:
2607 // CHECK3-NEXT: br label [[COND_END:%.*]]
2608 // CHECK3: cond.false:
2609 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2610 // CHECK3-NEXT: br label [[COND_END]]
2611 // CHECK3: cond.end:
2612 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2613 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2614 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2615 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2616 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2617 // CHECK3: omp.inner.for.cond:
2618 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
2619 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20
2620 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2621 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2622 // CHECK3: omp.inner.for.body:
2623 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
2624 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2625 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2626 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20
2627 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2628 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20
2629 // CHECK3-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2630 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2631 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20
2632 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2633 // CHECK3: omp.body.continue:
2634 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2635 // CHECK3: omp.inner.for.inc:
2636 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
2637 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2638 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
2639 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
2640 // CHECK3: omp.inner.for.end:
2641 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2642 // CHECK3: omp.loop.exit:
2643 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2644 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2645 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2646 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2647 // CHECK3: .omp.final.then:
2648 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
2649 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2650 // CHECK3: .omp.final.done:
2651 // CHECK3-NEXT: ret void
2652 //
2653 //
2654 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46
2655 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2656 // CHECK3-NEXT: entry:
2657 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2658 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2659 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2660 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2661 // CHECK3-NEXT: ret void
2662 //
2663 //
2664 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6
2665 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2666 // CHECK3-NEXT: entry:
2667 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2668 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2669 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2670 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2671 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2672 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2673 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2674 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2675 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2676 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2677 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2678 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2679 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2680 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2681 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2682 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2683 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2684 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2685 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2686 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2687 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2688 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2689 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2690 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2691 // CHECK3: cond.true:
2692 // CHECK3-NEXT: br label [[COND_END:%.*]]
2693 // CHECK3: cond.false:
2694 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2695 // CHECK3-NEXT: br label [[COND_END]]
2696 // CHECK3: cond.end:
2697 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2698 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2699 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2700 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2701 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2702 // CHECK3: omp.inner.for.cond:
2703 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
2704 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
2705 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2706 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2707 // CHECK3: omp.inner.for.body:
2708 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23
2709 // CHECK3-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2710 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
2711 // CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2712 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !23
2713 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2714 // CHECK3: omp.inner.for.inc:
2715 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
2716 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23
2717 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2718 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
2719 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
2720 // CHECK3: omp.inner.for.end:
2721 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2722 // CHECK3: omp.loop.exit:
2723 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2724 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2725 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2726 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2727 // CHECK3: .omp.final.then:
2728 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
2729 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2730 // CHECK3: .omp.final.done:
2731 // CHECK3-NEXT: ret void
2732 //
2733 //
2734 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7
2735 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2736 // CHECK3-NEXT: entry:
2737 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2738 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2739 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2740 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2741 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2742 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2743 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2744 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2745 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2746 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2747 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2748 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2749 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2750 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2751 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2752 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2753 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2754 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2755 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2756 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2757 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2758 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2759 // CHECK3-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2760 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2761 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2762 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2763 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2764 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2765 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2766 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2767 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
2768 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2769 // CHECK3: omp.dispatch.cond:
2770 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2771 // CHECK3-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2772 // CHECK3-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
2773 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
2774 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2775 // CHECK3: cond.true:
2776 // CHECK3-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2777 // CHECK3-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
2778 // CHECK3-NEXT: br label [[COND_END:%.*]]
2779 // CHECK3: cond.false:
2780 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2781 // CHECK3-NEXT: br label [[COND_END]]
2782 // CHECK3: cond.end:
2783 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
2784 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2785 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2786 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
2787 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2788 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2789 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
2790 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2791 // CHECK3: omp.dispatch.body:
2792 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2793 // CHECK3: omp.inner.for.cond:
2794 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
2795 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26
2796 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2797 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2798 // CHECK3: omp.inner.for.body:
2799 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
2800 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
2801 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2802 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !26
2803 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2804 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !26
2805 // CHECK3-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
2806 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2807 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26
2808 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2809 // CHECK3: omp.body.continue:
2810 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2811 // CHECK3: omp.inner.for.inc:
2812 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
2813 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
2814 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
2815 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
2816 // CHECK3: omp.inner.for.end:
2817 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2818 // CHECK3: omp.dispatch.inc:
2819 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2820 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2821 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
2822 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
2823 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2824 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2825 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
2826 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
2827 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
2828 // CHECK3: omp.dispatch.end:
2829 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2830 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2831 // CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
2832 // CHECK3-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2833 // CHECK3: .omp.final.then:
2834 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
2835 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2836 // CHECK3: .omp.final.done:
2837 // CHECK3-NEXT: ret void
2838 //
2839 //
2840 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52
2841 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2842 // CHECK3-NEXT: entry:
2843 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2844 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2845 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2846 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2847 // CHECK3-NEXT: ret void
2848 //
2849 //
2850 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10
2851 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2852 // CHECK3-NEXT: entry:
2853 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2854 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2855 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2856 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2857 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2858 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2859 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2860 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2861 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2862 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2863 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2864 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2865 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2866 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2867 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2868 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2869 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2870 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2871 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2872 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2873 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2874 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2875 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2876 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2877 // CHECK3: cond.true:
2878 // CHECK3-NEXT: br label [[COND_END:%.*]]
2879 // CHECK3: cond.false:
2880 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2881 // CHECK3-NEXT: br label [[COND_END]]
2882 // CHECK3: cond.end:
2883 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2884 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2885 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2886 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2887 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2888 // CHECK3: omp.inner.for.cond:
2889 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
2890 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
2891 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2892 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2893 // CHECK3: omp.inner.for.body:
2894 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
2895 // CHECK3-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2896 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
2897 // CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2898 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !29
2899 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2900 // CHECK3: omp.inner.for.inc:
2901 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
2902 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
2903 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2904 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
2905 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
2906 // CHECK3: omp.inner.for.end:
2907 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2908 // CHECK3: omp.loop.exit:
2909 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2910 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2911 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2912 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2913 // CHECK3: .omp.final.then:
2914 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
2915 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2916 // CHECK3: .omp.final.done:
2917 // CHECK3-NEXT: ret void
2918 //
2919 //
2920 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11
2921 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2922 // CHECK3-NEXT: entry:
2923 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2924 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2925 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2926 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2927 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2928 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2929 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2930 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2931 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2932 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2933 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2934 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2935 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2936 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2937 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2938 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2939 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2940 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2941 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2942 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2943 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2944 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2945 // CHECK3-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2946 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2947 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2948 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2949 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2950 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2951 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2952 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2953 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2954 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2955 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
2956 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2957 // CHECK3: omp.dispatch.cond:
2958 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
2959 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2960 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2961 // CHECK3: omp.dispatch.body:
2962 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2963 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2964 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2965 // CHECK3: omp.inner.for.cond:
2966 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
2967 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32
2968 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2969 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2970 // CHECK3: omp.inner.for.body:
2971 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
2972 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2973 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2974 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !32
2975 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2976 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !32
2977 // CHECK3-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
2978 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2979 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !32
2980 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2981 // CHECK3: omp.body.continue:
2982 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2983 // CHECK3: omp.inner.for.inc:
2984 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
2985 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
2986 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
2987 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
2988 // CHECK3: omp.inner.for.end:
2989 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2990 // CHECK3: omp.dispatch.inc:
2991 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
2992 // CHECK3: omp.dispatch.end:
2993 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2994 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2995 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2996 // CHECK3: .omp.final.then:
2997 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
2998 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2999 // CHECK3: .omp.final.done:
3000 // CHECK3-NEXT: ret void
3001 //
3002 //
3003 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58
3004 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3005 // CHECK3-NEXT: entry:
3006 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3007 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3008 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3009 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3010 // CHECK3-NEXT: ret void
3011 //
3012 //
3013 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14
3014 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3015 // CHECK3-NEXT: entry:
3016 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3017 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3018 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3019 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3020 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3021 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3022 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3023 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3024 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3025 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3026 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3027 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3028 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3029 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3030 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3031 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3032 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3033 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3034 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3035 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3036 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3037 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3038 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3039 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3040 // CHECK3: cond.true:
3041 // CHECK3-NEXT: br label [[COND_END:%.*]]
3042 // CHECK3: cond.false:
3043 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3044 // CHECK3-NEXT: br label [[COND_END]]
3045 // CHECK3: cond.end:
3046 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3047 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3048 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3049 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3050 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3051 // CHECK3: omp.inner.for.cond:
3052 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
3053 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
3054 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3055 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3056 // CHECK3: omp.inner.for.body:
3057 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !35
3058 // CHECK3-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3059 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
3060 // CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3061 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !35
3062 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3063 // CHECK3: omp.inner.for.inc:
3064 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
3065 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !35
3066 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3067 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
3068 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
3069 // CHECK3: omp.inner.for.end:
3070 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3071 // CHECK3: omp.loop.exit:
3072 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3073 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3074 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3075 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3076 // CHECK3: .omp.final.then:
3077 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
3078 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3079 // CHECK3: .omp.final.done:
3080 // CHECK3-NEXT: ret void
3081 //
3082 //
3083 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15
3084 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3085 // CHECK3-NEXT: entry:
3086 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3087 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3088 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3089 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3090 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3091 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3092 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3093 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3094 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3095 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3096 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3097 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3098 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3099 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3100 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3101 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3102 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3103 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3104 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3105 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3106 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3107 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
3108 // CHECK3-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3109 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
3110 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3111 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3112 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3113 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3114 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3115 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3116 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3117 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3118 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
3119 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3120 // CHECK3: omp.dispatch.cond:
3121 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
3122 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3123 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3124 // CHECK3: omp.dispatch.body:
3125 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3126 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
3127 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3128 // CHECK3: omp.inner.for.cond:
3129 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
3130 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38
3131 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3132 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3133 // CHECK3: omp.inner.for.body:
3134 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
3135 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3136 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3137 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !38
3138 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3139 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !38
3140 // CHECK3-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
3141 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
3142 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !38
3143 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3144 // CHECK3: omp.body.continue:
3145 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3146 // CHECK3: omp.inner.for.inc:
3147 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
3148 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
3149 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
3150 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
3151 // CHECK3: omp.inner.for.end:
3152 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3153 // CHECK3: omp.dispatch.inc:
3154 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
3155 // CHECK3: omp.dispatch.end:
3156 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3157 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3158 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3159 // CHECK3: .omp.final.then:
3160 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
3161 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3162 // CHECK3: .omp.final.done:
3163 // CHECK3-NEXT: ret void
3164 //
3165 //
3166 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3167 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
3168 // CHECK3-NEXT: entry:
3169 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
3170 // CHECK3-NEXT: ret void
3171 //
3172 //
3173 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv
3174 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
3175 // CHECK4-NEXT: entry:
3176 // CHECK4-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
3177 // CHECK4-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
3178 // CHECK4-NEXT: ret i32 [[CALL]]
3179 //
3180 //
3181 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
3182 // CHECK4-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
3183 // CHECK4-NEXT: entry:
3184 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3185 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3186 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3187 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3188 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
3189 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
3190 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
3191 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
3192 // CHECK4-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
3193 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
3194 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
3195 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
3196 // CHECK4-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
3197 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8
3198 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8
3199 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8
3200 // CHECK4-NEXT: [[_TMP20:%.*]] = alloca i32, align 4
3201 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8
3202 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8
3203 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8
3204 // CHECK4-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
3205 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3206 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3207 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
3208 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3209 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
3210 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
3211 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3212 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
3213 // CHECK4-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
3214 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3215 // CHECK4-NEXT: store i8* null, i8** [[TMP4]], align 8
3216 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3217 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3218 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
3219 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3220 // CHECK4-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
3221 // CHECK4-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3222 // CHECK4: omp_offload.failed:
3223 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
3224 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
3225 // CHECK4: omp_offload.cont:
3226 // CHECK4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3227 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3228 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
3229 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
3230 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3231 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
3232 // CHECK4-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
3233 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
3234 // CHECK4-NEXT: store i8* null, i8** [[TMP13]], align 8
3235 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3236 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3237 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3238 // CHECK4-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3239 // CHECK4-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3240 // CHECK4-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
3241 // CHECK4: omp_offload.failed7:
3242 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41(%struct.SS* [[THIS1]]) #[[ATTR2]]
3243 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT8]]
3244 // CHECK4: omp_offload.cont8:
3245 // CHECK4-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3246 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
3247 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
3248 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
3249 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
3250 // CHECK4-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
3251 // CHECK4-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
3252 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
3253 // CHECK4-NEXT: store i8* null, i8** [[TMP22]], align 8
3254 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
3255 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
3256 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3257 // CHECK4-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3258 // CHECK4-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3259 // CHECK4-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
3260 // CHECK4: omp_offload.failed14:
3261 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46(%struct.SS* [[THIS1]]) #[[ATTR2]]
3262 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT15]]
3263 // CHECK4: omp_offload.cont15:
3264 // CHECK4-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3265 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
3266 // CHECK4-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
3267 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8
3268 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
3269 // CHECK4-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
3270 // CHECK4-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8
3271 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0
3272 // CHECK4-NEXT: store i8* null, i8** [[TMP31]], align 8
3273 // CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
3274 // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
3275 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3276 // CHECK4-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3277 // CHECK4-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
3278 // CHECK4-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
3279 // CHECK4: omp_offload.failed21:
3280 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52(%struct.SS* [[THIS1]]) #[[ATTR2]]
3281 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT22]]
3282 // CHECK4: omp_offload.cont22:
3283 // CHECK4-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3284 // CHECK4-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
3285 // CHECK4-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
3286 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
3287 // CHECK4-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
3288 // CHECK4-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
3289 // CHECK4-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8
3290 // CHECK4-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
3291 // CHECK4-NEXT: store i8* null, i8** [[TMP40]], align 8
3292 // CHECK4-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
3293 // CHECK4-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
3294 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3295 // CHECK4-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3296 // CHECK4-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
3297 // CHECK4-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
3298 // CHECK4: omp_offload.failed28:
3299 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58(%struct.SS* [[THIS1]]) #[[ATTR2]]
3300 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT29]]
3301 // CHECK4: omp_offload.cont29:
3302 // CHECK4-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3303 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0
3304 // CHECK4-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3305 // CHECK4-NEXT: ret i32 [[TMP45]]
3306 //
3307 //
3308 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
3309 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
3310 // CHECK4-NEXT: entry:
3311 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3312 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3313 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3314 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3315 // CHECK4-NEXT: ret void
3316 //
3317 //
3318 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
3319 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3320 // CHECK4-NEXT: entry:
3321 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3322 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3323 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3324 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3325 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
3326 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3327 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3328 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3329 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3330 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
3331 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3332 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3333 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3334 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3335 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3336 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3337 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3338 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3339 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3340 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3341 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3342 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3343 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3344 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3345 // CHECK4: cond.true:
3346 // CHECK4-NEXT: br label [[COND_END:%.*]]
3347 // CHECK4: cond.false:
3348 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3349 // CHECK4-NEXT: br label [[COND_END]]
3350 // CHECK4: cond.end:
3351 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3352 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3353 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3354 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3355 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3356 // CHECK4: omp.inner.for.cond:
3357 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
3358 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8
3359 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3360 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3361 // CHECK4: omp.inner.for.body:
3362 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !8
3363 // CHECK4-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3364 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8
3365 // CHECK4-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3366 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !8
3367 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3368 // CHECK4: omp.inner.for.inc:
3369 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
3370 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !8
3371 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3372 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
3373 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
3374 // CHECK4: omp.inner.for.end:
3375 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3376 // CHECK4: omp.loop.exit:
3377 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3378 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3379 // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3380 // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3381 // CHECK4: .omp.final.then:
3382 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4
3383 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
3384 // CHECK4: .omp.final.done:
3385 // CHECK4-NEXT: ret void
3386 //
3387 //
3388 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
3389 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3390 // CHECK4-NEXT: entry:
3391 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3392 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3393 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3394 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3395 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3396 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3397 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
3398 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3399 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3400 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3401 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3402 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
3403 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3404 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3405 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3406 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3407 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3408 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3409 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3410 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3411 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3412 // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
3413 // CHECK4-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3414 // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
3415 // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3416 // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3417 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3418 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3419 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3420 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3421 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3422 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3423 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3424 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3425 // CHECK4: cond.true:
3426 // CHECK4-NEXT: br label [[COND_END:%.*]]
3427 // CHECK4: cond.false:
3428 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3429 // CHECK4-NEXT: br label [[COND_END]]
3430 // CHECK4: cond.end:
3431 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3432 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3433 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3434 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3435 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3436 // CHECK4: omp.inner.for.cond:
3437 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3438 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
3439 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3440 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3441 // CHECK4: omp.inner.for.body:
3442 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3443 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3444 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3445 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
3446 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3447 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
3448 // CHECK4-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
3449 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
3450 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
3451 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3452 // CHECK4: omp.body.continue:
3453 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3454 // CHECK4: omp.inner.for.inc:
3455 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3456 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
3457 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3458 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
3459 // CHECK4: omp.inner.for.end:
3460 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3461 // CHECK4: omp.loop.exit:
3462 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3463 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3464 // CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3465 // CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3466 // CHECK4: .omp.final.then:
3467 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4
3468 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
3469 // CHECK4: .omp.final.done:
3470 // CHECK4-NEXT: ret void
3471 //
3472 //
3473 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41
3474 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3475 // CHECK4-NEXT: entry:
3476 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3477 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3478 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3479 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3480 // CHECK4-NEXT: ret void
3481 //
3482 //
3483 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2
3484 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3485 // CHECK4-NEXT: entry:
3486 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3487 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3488 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3489 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3490 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
3491 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3492 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3493 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3494 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3495 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
3496 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3497 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3498 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3499 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3500 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3501 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3502 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3503 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3504 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3505 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3506 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3507 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3508 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3509 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3510 // CHECK4: cond.true:
3511 // CHECK4-NEXT: br label [[COND_END:%.*]]
3512 // CHECK4: cond.false:
3513 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3514 // CHECK4-NEXT: br label [[COND_END]]
3515 // CHECK4: cond.end:
3516 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3517 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3518 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3519 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3520 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3521 // CHECK4: omp.inner.for.cond:
3522 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
3523 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17
3524 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3525 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3526 // CHECK4: omp.inner.for.body:
3527 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !17
3528 // CHECK4-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3529 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17
3530 // CHECK4-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3531 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !17
3532 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3533 // CHECK4: omp.inner.for.inc:
3534 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
3535 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !17
3536 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3537 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
3538 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
3539 // CHECK4: omp.inner.for.end:
3540 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3541 // CHECK4: omp.loop.exit:
3542 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3543 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3544 // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3545 // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3546 // CHECK4: .omp.final.then:
3547 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4
3548 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
3549 // CHECK4: .omp.final.done:
3550 // CHECK4-NEXT: ret void
3551 //
3552 //
3553 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3
3554 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3555 // CHECK4-NEXT: entry:
3556 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3557 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3558 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3559 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3560 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3561 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3562 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
3563 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3564 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3565 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3566 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3567 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
3568 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3569 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3570 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3571 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3572 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3573 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3574 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3575 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3576 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3577 // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
3578 // CHECK4-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3579 // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
3580 // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3581 // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3582 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3583 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3584 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3585 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3586 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3587 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3588 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3589 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3590 // CHECK4: cond.true:
3591 // CHECK4-NEXT: br label [[COND_END:%.*]]
3592 // CHECK4: cond.false:
3593 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3594 // CHECK4-NEXT: br label [[COND_END]]
3595 // CHECK4: cond.end:
3596 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3597 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3598 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3599 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3600 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3601 // CHECK4: omp.inner.for.cond:
3602 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
3603 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20
3604 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3605 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3606 // CHECK4: omp.inner.for.body:
3607 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
3608 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3609 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3610 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20
3611 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3612 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20
3613 // CHECK4-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
3614 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
3615 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20
3616 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3617 // CHECK4: omp.body.continue:
3618 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3619 // CHECK4: omp.inner.for.inc:
3620 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
3621 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
3622 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
3623 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
3624 // CHECK4: omp.inner.for.end:
3625 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3626 // CHECK4: omp.loop.exit:
3627 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3628 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3629 // CHECK4-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3630 // CHECK4-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3631 // CHECK4: .omp.final.then:
3632 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4
3633 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
3634 // CHECK4: .omp.final.done:
3635 // CHECK4-NEXT: ret void
3636 //
3637 //
3638 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46
3639 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3640 // CHECK4-NEXT: entry:
3641 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3642 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3643 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3644 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3645 // CHECK4-NEXT: ret void
3646 //
3647 //
3648 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..6
3649 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3650 // CHECK4-NEXT: entry:
3651 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3652 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3653 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3654 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3655 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
3656 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3657 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3658 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3659 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3660 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
3661 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3662 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3663 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3664 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3665 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3666 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3667 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3668 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3669 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3670 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3671 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3672 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3673 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3674 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3675 // CHECK4: cond.true:
3676 // CHECK4-NEXT: br label [[COND_END:%.*]]
3677 // CHECK4: cond.false:
3678 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3679 // CHECK4-NEXT: br label [[COND_END]]
3680 // CHECK4: cond.end:
3681 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3682 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3683 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3684 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3685 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3686 // CHECK4: omp.inner.for.cond:
3687 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
3688 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
3689 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3690 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3691 // CHECK4: omp.inner.for.body:
3692 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23
3693 // CHECK4-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3694 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
3695 // CHECK4-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3696 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !23
3697 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3698 // CHECK4: omp.inner.for.inc:
3699 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
3700 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23
3701 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3702 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
3703 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
3704 // CHECK4: omp.inner.for.end:
3705 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3706 // CHECK4: omp.loop.exit:
3707 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3708 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3709 // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3710 // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3711 // CHECK4: .omp.final.then:
3712 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4
3713 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
3714 // CHECK4: .omp.final.done:
3715 // CHECK4-NEXT: ret void
3716 //
3717 //
3718 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..7
3719 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3720 // CHECK4-NEXT: entry:
3721 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3722 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3723 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3724 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3725 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3726 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3727 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
3728 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3729 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3730 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3731 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3732 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
3733 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3734 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3735 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3736 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3737 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3738 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3739 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3740 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3741 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3742 // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
3743 // CHECK4-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3744 // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
3745 // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3746 // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3747 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3748 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3749 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3750 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3751 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
3752 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3753 // CHECK4: omp.dispatch.cond:
3754 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3755 // CHECK4-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3756 // CHECK4-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
3757 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
3758 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3759 // CHECK4: cond.true:
3760 // CHECK4-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3761 // CHECK4-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
3762 // CHECK4-NEXT: br label [[COND_END:%.*]]
3763 // CHECK4: cond.false:
3764 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3765 // CHECK4-NEXT: br label [[COND_END]]
3766 // CHECK4: cond.end:
3767 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
3768 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3769 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3770 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
3771 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3772 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3773 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
3774 // CHECK4-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3775 // CHECK4: omp.dispatch.body:
3776 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3777 // CHECK4: omp.inner.for.cond:
3778 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
3779 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26
3780 // CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3781 // CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3782 // CHECK4: omp.inner.for.body:
3783 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
3784 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
3785 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3786 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !26
3787 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3788 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !26
3789 // CHECK4-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
3790 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
3791 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26
3792 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3793 // CHECK4: omp.body.continue:
3794 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3795 // CHECK4: omp.inner.for.inc:
3796 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
3797 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
3798 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
3799 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
3800 // CHECK4: omp.inner.for.end:
3801 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3802 // CHECK4: omp.dispatch.inc:
3803 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3804 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3805 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
3806 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
3807 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3808 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3809 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
3810 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
3811 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]]
3812 // CHECK4: omp.dispatch.end:
3813 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3814 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3815 // CHECK4-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
3816 // CHECK4-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3817 // CHECK4: .omp.final.then:
3818 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4
3819 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
3820 // CHECK4: .omp.final.done:
3821 // CHECK4-NEXT: ret void
3822 //
3823 //
3824 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52
3825 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3826 // CHECK4-NEXT: entry:
3827 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3828 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3829 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3830 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3831 // CHECK4-NEXT: ret void
3832 //
3833 //
3834 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..10
3835 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3836 // CHECK4-NEXT: entry:
3837 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3838 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3839 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3840 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3841 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
3842 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3843 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3844 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3845 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3846 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
3847 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3848 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3849 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3850 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3851 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3852 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3853 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3854 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3855 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3856 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3857 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3858 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3859 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3860 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3861 // CHECK4: cond.true:
3862 // CHECK4-NEXT: br label [[COND_END:%.*]]
3863 // CHECK4: cond.false:
3864 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3865 // CHECK4-NEXT: br label [[COND_END]]
3866 // CHECK4: cond.end:
3867 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3868 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3869 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3870 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3871 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3872 // CHECK4: omp.inner.for.cond:
3873 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
3874 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
3875 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3876 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3877 // CHECK4: omp.inner.for.body:
3878 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
3879 // CHECK4-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3880 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
3881 // CHECK4-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3882 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !29
3883 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3884 // CHECK4: omp.inner.for.inc:
3885 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
3886 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
3887 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3888 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
3889 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
3890 // CHECK4: omp.inner.for.end:
3891 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3892 // CHECK4: omp.loop.exit:
3893 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3894 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3895 // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3896 // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3897 // CHECK4: .omp.final.then:
3898 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4
3899 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
3900 // CHECK4: .omp.final.done:
3901 // CHECK4-NEXT: ret void
3902 //
3903 //
3904 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..11
3905 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3906 // CHECK4-NEXT: entry:
3907 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3908 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3909 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3910 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3911 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3912 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3913 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
3914 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3915 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3916 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3917 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3918 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
3919 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3920 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3921 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3922 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3923 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3924 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3925 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3926 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3927 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3928 // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
3929 // CHECK4-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3930 // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
3931 // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3932 // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3933 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3934 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3935 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3936 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3937 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3938 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3939 // CHECK4-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
3940 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3941 // CHECK4: omp.dispatch.cond:
3942 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
3943 // CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3944 // CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3945 // CHECK4: omp.dispatch.body:
3946 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3947 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
3948 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3949 // CHECK4: omp.inner.for.cond:
3950 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
3951 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32
3952 // CHECK4-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3953 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3954 // CHECK4: omp.inner.for.body:
3955 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
3956 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3957 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3958 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !32
3959 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3960 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !32
3961 // CHECK4-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
3962 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
3963 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !32
3964 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3965 // CHECK4: omp.body.continue:
3966 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3967 // CHECK4: omp.inner.for.inc:
3968 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
3969 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
3970 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
3971 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
3972 // CHECK4: omp.inner.for.end:
3973 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3974 // CHECK4: omp.dispatch.inc:
3975 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]]
3976 // CHECK4: omp.dispatch.end:
3977 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3978 // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3979 // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3980 // CHECK4: .omp.final.then:
3981 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4
3982 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
3983 // CHECK4: .omp.final.done:
3984 // CHECK4-NEXT: ret void
3985 //
3986 //
3987 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58
3988 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3989 // CHECK4-NEXT: entry:
3990 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3991 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3992 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3993 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3994 // CHECK4-NEXT: ret void
3995 //
3996 //
3997 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..14
3998 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3999 // CHECK4-NEXT: entry:
4000 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4001 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4002 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4003 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4004 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
4005 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4006 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4007 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4008 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4009 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
4010 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4011 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4012 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4013 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4014 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4015 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4016 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4017 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4018 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4019 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4020 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4021 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4022 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4023 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4024 // CHECK4: cond.true:
4025 // CHECK4-NEXT: br label [[COND_END:%.*]]
4026 // CHECK4: cond.false:
4027 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4028 // CHECK4-NEXT: br label [[COND_END]]
4029 // CHECK4: cond.end:
4030 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4031 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4032 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4033 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4034 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4035 // CHECK4: omp.inner.for.cond:
4036 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
4037 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
4038 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4039 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4040 // CHECK4: omp.inner.for.body:
4041 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !35
4042 // CHECK4-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4043 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
4044 // CHECK4-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4045 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !35
4046 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4047 // CHECK4: omp.inner.for.inc:
4048 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
4049 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !35
4050 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4051 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
4052 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
4053 // CHECK4: omp.inner.for.end:
4054 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4055 // CHECK4: omp.loop.exit:
4056 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4057 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4058 // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4059 // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4060 // CHECK4: .omp.final.then:
4061 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4
4062 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
4063 // CHECK4: .omp.final.done:
4064 // CHECK4-NEXT: ret void
4065 //
4066 //
4067 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..15
4068 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4069 // CHECK4-NEXT: entry:
4070 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4071 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4072 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4073 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4074 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4075 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4076 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
4077 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4078 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4079 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4080 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4081 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
4082 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4083 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4084 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4085 // CHECK4-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4086 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4087 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4088 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4089 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4090 // CHECK4-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4091 // CHECK4-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4092 // CHECK4-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4093 // CHECK4-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4094 // CHECK4-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4095 // CHECK4-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4096 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4097 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4098 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4099 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4100 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4101 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4102 // CHECK4-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
4103 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4104 // CHECK4: omp.dispatch.cond:
4105 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
4106 // CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
4107 // CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4108 // CHECK4: omp.dispatch.body:
4109 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4110 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
4111 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4112 // CHECK4: omp.inner.for.cond:
4113 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
4114 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38
4115 // CHECK4-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4116 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4117 // CHECK4: omp.inner.for.body:
4118 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
4119 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4120 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4121 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !38
4122 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4123 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !38
4124 // CHECK4-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
4125 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4126 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !38
4127 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4128 // CHECK4: omp.body.continue:
4129 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4130 // CHECK4: omp.inner.for.inc:
4131 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
4132 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
4133 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
4134 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
4135 // CHECK4: omp.inner.for.end:
4136 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4137 // CHECK4: omp.dispatch.inc:
4138 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]]
4139 // CHECK4: omp.dispatch.end:
4140 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4141 // CHECK4-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4142 // CHECK4-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4143 // CHECK4: .omp.final.then:
4144 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4
4145 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
4146 // CHECK4: .omp.final.done:
4147 // CHECK4-NEXT: ret void
4148 //
4149 //
4150 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4151 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] {
4152 // CHECK4-NEXT: entry:
4153 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
4154 // CHECK4-NEXT: ret void
4155 //
4156 //
4157 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv
4158 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
4159 // CHECK5-NEXT: entry:
4160 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
4161 // CHECK5-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
4162 // CHECK5-NEXT: ret i32 [[CALL]]
4163 //
4164 //
4165 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
4166 // CHECK5-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
4167 // CHECK5-NEXT: entry:
4168 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4169 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
4170 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
4171 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
4172 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
4173 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
4174 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
4175 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
4176 // CHECK5-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
4177 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
4178 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
4179 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
4180 // CHECK5-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
4181 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4
4182 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4
4183 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4
4184 // CHECK5-NEXT: [[_TMP20:%.*]] = alloca i32, align 4
4185 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4
4186 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4
4187 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4
4188 // CHECK5-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
4189 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4190 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4191 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
4192 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4193 // CHECK5-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
4194 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
4195 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4196 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
4197 // CHECK5-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
4198 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4199 // CHECK5-NEXT: store i8* null, i8** [[TMP4]], align 4
4200 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4201 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4202 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
4203 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4204 // CHECK5-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
4205 // CHECK5-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4206 // CHECK5: omp_offload.failed:
4207 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
4208 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
4209 // CHECK5: omp_offload.cont:
4210 // CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4211 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
4212 // CHECK5-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
4213 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
4214 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
4215 // CHECK5-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
4216 // CHECK5-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
4217 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
4218 // CHECK5-NEXT: store i8* null, i8** [[TMP13]], align 4
4219 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
4220 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
4221 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
4222 // CHECK5-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4223 // CHECK5-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4224 // CHECK5-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
4225 // CHECK5: omp_offload.failed7:
4226 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41(%struct.SS* [[THIS1]]) #[[ATTR2]]
4227 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT8]]
4228 // CHECK5: omp_offload.cont8:
4229 // CHECK5-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4230 // CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
4231 // CHECK5-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
4232 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
4233 // CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
4234 // CHECK5-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
4235 // CHECK5-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
4236 // CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
4237 // CHECK5-NEXT: store i8* null, i8** [[TMP22]], align 4
4238 // CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
4239 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
4240 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
4241 // CHECK5-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4242 // CHECK5-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
4243 // CHECK5-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
4244 // CHECK5: omp_offload.failed14:
4245 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46(%struct.SS* [[THIS1]]) #[[ATTR2]]
4246 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT15]]
4247 // CHECK5: omp_offload.cont15:
4248 // CHECK5-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4249 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
4250 // CHECK5-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
4251 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4
4252 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
4253 // CHECK5-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
4254 // CHECK5-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4
4255 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
4256 // CHECK5-NEXT: store i8* null, i8** [[TMP31]], align 4
4257 // CHECK5-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
4258 // CHECK5-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
4259 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
4260 // CHECK5-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4261 // CHECK5-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
4262 // CHECK5-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
4263 // CHECK5: omp_offload.failed21:
4264 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52(%struct.SS* [[THIS1]]) #[[ATTR2]]
4265 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT22]]
4266 // CHECK5: omp_offload.cont22:
4267 // CHECK5-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4268 // CHECK5-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
4269 // CHECK5-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
4270 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
4271 // CHECK5-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
4272 // CHECK5-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
4273 // CHECK5-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4
4274 // CHECK5-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
4275 // CHECK5-NEXT: store i8* null, i8** [[TMP40]], align 4
4276 // CHECK5-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
4277 // CHECK5-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
4278 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
4279 // CHECK5-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4280 // CHECK5-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
4281 // CHECK5-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
4282 // CHECK5: omp_offload.failed28:
4283 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58(%struct.SS* [[THIS1]]) #[[ATTR2]]
4284 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT29]]
4285 // CHECK5: omp_offload.cont29:
4286 // CHECK5-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4287 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0
4288 // CHECK5-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
4289 // CHECK5-NEXT: ret i32 [[TMP45]]
4290 //
4291 //
4292 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
4293 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
4294 // CHECK5-NEXT: entry:
4295 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4296 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4297 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4298 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4299 // CHECK5-NEXT: ret void
4300 //
4301 //
4302 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
4303 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4304 // CHECK5-NEXT: entry:
4305 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4306 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4307 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4308 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4309 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
4310 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4311 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4312 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4313 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4314 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
4315 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4316 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4317 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4318 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4319 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4320 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4321 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4322 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4323 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4324 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4325 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4326 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4327 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4328 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4329 // CHECK5: cond.true:
4330 // CHECK5-NEXT: br label [[COND_END:%.*]]
4331 // CHECK5: cond.false:
4332 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4333 // CHECK5-NEXT: br label [[COND_END]]
4334 // CHECK5: cond.end:
4335 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4336 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4337 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4338 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4339 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4340 // CHECK5: omp.inner.for.cond:
4341 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
4342 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
4343 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4344 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4345 // CHECK5: omp.inner.for.body:
4346 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9
4347 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
4348 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !9
4349 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4350 // CHECK5: omp.inner.for.inc:
4351 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
4352 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9
4353 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
4354 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
4355 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
4356 // CHECK5: omp.inner.for.end:
4357 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4358 // CHECK5: omp.loop.exit:
4359 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4360 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4361 // CHECK5-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
4362 // CHECK5-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4363 // CHECK5: .omp.final.then:
4364 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
4365 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
4366 // CHECK5: .omp.final.done:
4367 // CHECK5-NEXT: ret void
4368 //
4369 //
4370 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1
4371 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4372 // CHECK5-NEXT: entry:
4373 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4374 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4375 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4376 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4377 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4378 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4379 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
4380 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4381 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4382 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4383 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4384 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
4385 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4386 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4387 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4388 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4389 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4390 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4391 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4392 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4393 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4394 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4395 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
4396 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
4397 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4398 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4399 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4400 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4401 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4402 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4403 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
4404 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4405 // CHECK5: cond.true:
4406 // CHECK5-NEXT: br label [[COND_END:%.*]]
4407 // CHECK5: cond.false:
4408 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4409 // CHECK5-NEXT: br label [[COND_END]]
4410 // CHECK5: cond.end:
4411 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
4412 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4413 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4414 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
4415 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4416 // CHECK5: omp.inner.for.cond:
4417 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
4418 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
4419 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4420 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4421 // CHECK5: omp.inner.for.body:
4422 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
4423 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4424 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4425 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
4426 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4427 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
4428 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
4429 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
4430 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4431 // CHECK5: omp.body.continue:
4432 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4433 // CHECK5: omp.inner.for.inc:
4434 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
4435 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
4436 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
4437 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
4438 // CHECK5: omp.inner.for.end:
4439 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4440 // CHECK5: omp.loop.exit:
4441 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4442 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4443 // CHECK5-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4444 // CHECK5-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4445 // CHECK5: .omp.final.then:
4446 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
4447 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
4448 // CHECK5: .omp.final.done:
4449 // CHECK5-NEXT: ret void
4450 //
4451 //
4452 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41
4453 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4454 // CHECK5-NEXT: entry:
4455 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4456 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4457 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4458 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4459 // CHECK5-NEXT: ret void
4460 //
4461 //
4462 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2
4463 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4464 // CHECK5-NEXT: entry:
4465 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4466 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4467 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4468 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4469 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
4470 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4471 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4472 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4473 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4474 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
4475 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4476 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4477 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4478 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4479 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4480 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4481 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4482 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4483 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4484 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4485 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4486 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4487 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4488 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4489 // CHECK5: cond.true:
4490 // CHECK5-NEXT: br label [[COND_END:%.*]]
4491 // CHECK5: cond.false:
4492 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4493 // CHECK5-NEXT: br label [[COND_END]]
4494 // CHECK5: cond.end:
4495 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4496 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4497 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4498 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4499 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4500 // CHECK5: omp.inner.for.cond:
4501 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
4502 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
4503 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4504 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4505 // CHECK5: omp.inner.for.body:
4506 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !18
4507 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
4508 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !18
4509 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4510 // CHECK5: omp.inner.for.inc:
4511 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
4512 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !18
4513 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
4514 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
4515 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
4516 // CHECK5: omp.inner.for.end:
4517 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4518 // CHECK5: omp.loop.exit:
4519 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4520 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4521 // CHECK5-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
4522 // CHECK5-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4523 // CHECK5: .omp.final.then:
4524 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
4525 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
4526 // CHECK5: .omp.final.done:
4527 // CHECK5-NEXT: ret void
4528 //
4529 //
4530 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3
4531 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4532 // CHECK5-NEXT: entry:
4533 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4534 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4535 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4536 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4537 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4538 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4539 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
4540 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4541 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4542 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4543 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4544 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
4545 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4546 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4547 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4548 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4549 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4550 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4551 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4552 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4553 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4554 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4555 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
4556 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
4557 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4558 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4559 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4560 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4561 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4562 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4563 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
4564 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4565 // CHECK5: cond.true:
4566 // CHECK5-NEXT: br label [[COND_END:%.*]]
4567 // CHECK5: cond.false:
4568 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4569 // CHECK5-NEXT: br label [[COND_END]]
4570 // CHECK5: cond.end:
4571 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
4572 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4573 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4574 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
4575 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4576 // CHECK5: omp.inner.for.cond:
4577 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
4578 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
4579 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4580 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4581 // CHECK5: omp.inner.for.body:
4582 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
4583 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4584 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4585 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
4586 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4587 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
4588 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
4589 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
4590 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4591 // CHECK5: omp.body.continue:
4592 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4593 // CHECK5: omp.inner.for.inc:
4594 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
4595 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
4596 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
4597 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
4598 // CHECK5: omp.inner.for.end:
4599 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4600 // CHECK5: omp.loop.exit:
4601 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4602 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4603 // CHECK5-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4604 // CHECK5-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4605 // CHECK5: .omp.final.then:
4606 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
4607 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
4608 // CHECK5: .omp.final.done:
4609 // CHECK5-NEXT: ret void
4610 //
4611 //
4612 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46
4613 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4614 // CHECK5-NEXT: entry:
4615 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4616 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4617 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4618 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4619 // CHECK5-NEXT: ret void
4620 //
4621 //
4622 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6
4623 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4624 // CHECK5-NEXT: entry:
4625 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4626 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4627 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4628 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4629 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
4630 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4631 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4632 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4633 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4634 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
4635 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4636 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4637 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4638 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4639 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4640 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4641 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4642 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4643 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4644 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4645 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4646 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4647 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4648 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4649 // CHECK5: cond.true:
4650 // CHECK5-NEXT: br label [[COND_END:%.*]]
4651 // CHECK5: cond.false:
4652 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4653 // CHECK5-NEXT: br label [[COND_END]]
4654 // CHECK5: cond.end:
4655 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4656 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4657 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4658 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4659 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4660 // CHECK5: omp.inner.for.cond:
4661 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
4662 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
4663 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4664 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4665 // CHECK5: omp.inner.for.body:
4666 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !24
4667 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
4668 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !24
4669 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4670 // CHECK5: omp.inner.for.inc:
4671 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
4672 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !24
4673 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
4674 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
4675 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
4676 // CHECK5: omp.inner.for.end:
4677 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4678 // CHECK5: omp.loop.exit:
4679 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4680 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4681 // CHECK5-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
4682 // CHECK5-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4683 // CHECK5: .omp.final.then:
4684 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
4685 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
4686 // CHECK5: .omp.final.done:
4687 // CHECK5-NEXT: ret void
4688 //
4689 //
4690 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7
4691 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4692 // CHECK5-NEXT: entry:
4693 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4694 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4695 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4696 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4697 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4698 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4699 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
4700 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4701 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4702 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4703 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4704 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
4705 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4706 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4707 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4708 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4709 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4710 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4711 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4712 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4713 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4714 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4715 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
4716 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
4717 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4718 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4719 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4720 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4721 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
4722 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4723 // CHECK5: omp.dispatch.cond:
4724 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4725 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4726 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
4727 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4728 // CHECK5: cond.true:
4729 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4730 // CHECK5-NEXT: br label [[COND_END:%.*]]
4731 // CHECK5: cond.false:
4732 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4733 // CHECK5-NEXT: br label [[COND_END]]
4734 // CHECK5: cond.end:
4735 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
4736 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4737 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4738 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
4739 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4740 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4741 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
4742 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4743 // CHECK5: omp.dispatch.body:
4744 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4745 // CHECK5: omp.inner.for.cond:
4746 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
4747 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27
4748 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
4749 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4750 // CHECK5: omp.inner.for.body:
4751 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
4752 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
4753 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4754 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27
4755 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4756 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27
4757 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
4758 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27
4759 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4760 // CHECK5: omp.body.continue:
4761 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4762 // CHECK5: omp.inner.for.inc:
4763 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
4764 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
4765 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
4766 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
4767 // CHECK5: omp.inner.for.end:
4768 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4769 // CHECK5: omp.dispatch.inc:
4770 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4771 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4772 // CHECK5-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
4773 // CHECK5-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
4774 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4775 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4776 // CHECK5-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
4777 // CHECK5-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
4778 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]
4779 // CHECK5: omp.dispatch.end:
4780 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4781 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4782 // CHECK5-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
4783 // CHECK5-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4784 // CHECK5: .omp.final.then:
4785 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
4786 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
4787 // CHECK5: .omp.final.done:
4788 // CHECK5-NEXT: ret void
4789 //
4790 //
4791 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52
4792 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4793 // CHECK5-NEXT: entry:
4794 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4795 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4796 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4797 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4798 // CHECK5-NEXT: ret void
4799 //
4800 //
4801 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10
4802 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4803 // CHECK5-NEXT: entry:
4804 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4805 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4806 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4807 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4808 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
4809 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4810 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4811 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4812 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4813 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
4814 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4815 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4816 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4817 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4818 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4819 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4820 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4821 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4822 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4823 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4824 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4825 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4826 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4827 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4828 // CHECK5: cond.true:
4829 // CHECK5-NEXT: br label [[COND_END:%.*]]
4830 // CHECK5: cond.false:
4831 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4832 // CHECK5-NEXT: br label [[COND_END]]
4833 // CHECK5: cond.end:
4834 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4835 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4836 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4837 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4838 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4839 // CHECK5: omp.inner.for.cond:
4840 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
4841 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
4842 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4843 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4844 // CHECK5: omp.inner.for.body:
4845 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !30
4846 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
4847 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !30
4848 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4849 // CHECK5: omp.inner.for.inc:
4850 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
4851 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !30
4852 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
4853 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
4854 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
4855 // CHECK5: omp.inner.for.end:
4856 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4857 // CHECK5: omp.loop.exit:
4858 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4859 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4860 // CHECK5-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
4861 // CHECK5-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4862 // CHECK5: .omp.final.then:
4863 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
4864 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
4865 // CHECK5: .omp.final.done:
4866 // CHECK5-NEXT: ret void
4867 //
4868 //
4869 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11
4870 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4871 // CHECK5-NEXT: entry:
4872 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4873 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4874 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4875 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4876 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4877 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4878 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
4879 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4880 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4881 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4882 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4883 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
4884 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4885 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4886 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4887 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4888 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4889 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4890 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4891 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4892 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4893 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4894 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
4895 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
4896 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4897 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4898 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4899 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4900 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4901 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4902 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
4903 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4904 // CHECK5: omp.dispatch.cond:
4905 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
4906 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
4907 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4908 // CHECK5: omp.dispatch.body:
4909 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4910 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
4911 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4912 // CHECK5: omp.inner.for.cond:
4913 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
4914 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !33
4915 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4916 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4917 // CHECK5: omp.inner.for.body:
4918 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
4919 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4920 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4921 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !33
4922 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4923 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !33
4924 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
4925 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !33
4926 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4927 // CHECK5: omp.body.continue:
4928 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4929 // CHECK5: omp.inner.for.inc:
4930 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
4931 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
4932 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
4933 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
4934 // CHECK5: omp.inner.for.end:
4935 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4936 // CHECK5: omp.dispatch.inc:
4937 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]
4938 // CHECK5: omp.dispatch.end:
4939 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4940 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4941 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4942 // CHECK5: .omp.final.then:
4943 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
4944 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
4945 // CHECK5: .omp.final.done:
4946 // CHECK5-NEXT: ret void
4947 //
4948 //
4949 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58
4950 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4951 // CHECK5-NEXT: entry:
4952 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4953 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4954 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4955 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4956 // CHECK5-NEXT: ret void
4957 //
4958 //
4959 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..14
4960 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4961 // CHECK5-NEXT: entry:
4962 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4963 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4964 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4965 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4966 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
4967 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4968 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4969 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4970 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4971 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
4972 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4973 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4974 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4975 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4976 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4977 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4978 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4979 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4980 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4981 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4982 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4983 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4984 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4985 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4986 // CHECK5: cond.true:
4987 // CHECK5-NEXT: br label [[COND_END:%.*]]
4988 // CHECK5: cond.false:
4989 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4990 // CHECK5-NEXT: br label [[COND_END]]
4991 // CHECK5: cond.end:
4992 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4993 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4994 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4995 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4996 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4997 // CHECK5: omp.inner.for.cond:
4998 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
4999 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
5000 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5001 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5002 // CHECK5: omp.inner.for.body:
5003 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !36
5004 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
5005 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !36
5006 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5007 // CHECK5: omp.inner.for.inc:
5008 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
5009 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !36
5010 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
5011 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
5012 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
5013 // CHECK5: omp.inner.for.end:
5014 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5015 // CHECK5: omp.loop.exit:
5016 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5017 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5018 // CHECK5-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
5019 // CHECK5-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5020 // CHECK5: .omp.final.then:
5021 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
5022 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
5023 // CHECK5: .omp.final.done:
5024 // CHECK5-NEXT: ret void
5025 //
5026 //
5027 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..15
5028 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5029 // CHECK5-NEXT: entry:
5030 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5031 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5032 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5033 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5034 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5035 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5036 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
5037 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5038 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5039 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5040 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5041 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
5042 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5043 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5044 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5045 // CHECK5-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5046 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5047 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5048 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5049 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5050 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5051 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5052 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
5053 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
5054 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5055 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5056 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5057 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5058 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5059 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
5060 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
5061 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
5062 // CHECK5: omp.dispatch.cond:
5063 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
5064 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
5065 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5066 // CHECK5: omp.dispatch.body:
5067 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5068 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
5069 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5070 // CHECK5: omp.inner.for.cond:
5071 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
5072 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !39
5073 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
5074 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5075 // CHECK5: omp.inner.for.body:
5076 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
5077 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
5078 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5079 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !39
5080 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5081 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !39
5082 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
5083 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !39
5084 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5085 // CHECK5: omp.body.continue:
5086 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5087 // CHECK5: omp.inner.for.inc:
5088 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
5089 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
5090 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
5091 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
5092 // CHECK5: omp.inner.for.end:
5093 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
5094 // CHECK5: omp.dispatch.inc:
5095 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]
5096 // CHECK5: omp.dispatch.end:
5097 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5098 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5099 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5100 // CHECK5: .omp.final.then:
5101 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
5102 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
5103 // CHECK5: .omp.final.done:
5104 // CHECK5-NEXT: ret void
5105 //
5106 //
5107 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5108 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] {
5109 // CHECK5-NEXT: entry:
5110 // CHECK5-NEXT: call void @__tgt_register_requires(i64 1)
5111 // CHECK5-NEXT: ret void
5112 //
5113 //
5114 // CHECK6-LABEL: define {{[^@]+}}@_Z21teams_template_structv
5115 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
5116 // CHECK6-NEXT: entry:
5117 // CHECK6-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
5118 // CHECK6-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
5119 // CHECK6-NEXT: ret i32 [[CALL]]
5120 //
5121 //
5122 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
5123 // CHECK6-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
5124 // CHECK6-NEXT: entry:
5125 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5126 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
5127 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
5128 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
5129 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5130 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
5131 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
5132 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
5133 // CHECK6-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
5134 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
5135 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
5136 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
5137 // CHECK6-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
5138 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4
5139 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4
5140 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4
5141 // CHECK6-NEXT: [[_TMP20:%.*]] = alloca i32, align 4
5142 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4
5143 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4
5144 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4
5145 // CHECK6-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
5146 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5147 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5148 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
5149 // CHECK6-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5150 // CHECK6-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
5151 // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
5152 // CHECK6-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5153 // CHECK6-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
5154 // CHECK6-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
5155 // CHECK6-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5156 // CHECK6-NEXT: store i8* null, i8** [[TMP4]], align 4
5157 // CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5158 // CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5159 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
5160 // CHECK6-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5161 // CHECK6-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
5162 // CHECK6-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5163 // CHECK6: omp_offload.failed:
5164 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
5165 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT]]
5166 // CHECK6: omp_offload.cont:
5167 // CHECK6-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5168 // CHECK6-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
5169 // CHECK6-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
5170 // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
5171 // CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
5172 // CHECK6-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
5173 // CHECK6-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
5174 // CHECK6-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
5175 // CHECK6-NEXT: store i8* null, i8** [[TMP13]], align 4
5176 // CHECK6-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
5177 // CHECK6-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
5178 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
5179 // CHECK6-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5180 // CHECK6-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
5181 // CHECK6-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
5182 // CHECK6: omp_offload.failed7:
5183 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41(%struct.SS* [[THIS1]]) #[[ATTR2]]
5184 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT8]]
5185 // CHECK6: omp_offload.cont8:
5186 // CHECK6-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5187 // CHECK6-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
5188 // CHECK6-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
5189 // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
5190 // CHECK6-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
5191 // CHECK6-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
5192 // CHECK6-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
5193 // CHECK6-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
5194 // CHECK6-NEXT: store i8* null, i8** [[TMP22]], align 4
5195 // CHECK6-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
5196 // CHECK6-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
5197 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
5198 // CHECK6-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5199 // CHECK6-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
5200 // CHECK6-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
5201 // CHECK6: omp_offload.failed14:
5202 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46(%struct.SS* [[THIS1]]) #[[ATTR2]]
5203 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT15]]
5204 // CHECK6: omp_offload.cont15:
5205 // CHECK6-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5206 // CHECK6-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
5207 // CHECK6-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
5208 // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4
5209 // CHECK6-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
5210 // CHECK6-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
5211 // CHECK6-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4
5212 // CHECK6-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
5213 // CHECK6-NEXT: store i8* null, i8** [[TMP31]], align 4
5214 // CHECK6-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
5215 // CHECK6-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
5216 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
5217 // CHECK6-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5218 // CHECK6-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
5219 // CHECK6-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
5220 // CHECK6: omp_offload.failed21:
5221 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52(%struct.SS* [[THIS1]]) #[[ATTR2]]
5222 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT22]]
5223 // CHECK6: omp_offload.cont22:
5224 // CHECK6-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5225 // CHECK6-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
5226 // CHECK6-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
5227 // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
5228 // CHECK6-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
5229 // CHECK6-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
5230 // CHECK6-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4
5231 // CHECK6-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
5232 // CHECK6-NEXT: store i8* null, i8** [[TMP40]], align 4
5233 // CHECK6-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
5234 // CHECK6-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
5235 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
5236 // CHECK6-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5237 // CHECK6-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
5238 // CHECK6-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
5239 // CHECK6: omp_offload.failed28:
5240 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58(%struct.SS* [[THIS1]]) #[[ATTR2]]
5241 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT29]]
5242 // CHECK6: omp_offload.cont29:
5243 // CHECK6-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5244 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0
5245 // CHECK6-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
5246 // CHECK6-NEXT: ret i32 [[TMP45]]
5247 //
5248 //
5249 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
5250 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
5251 // CHECK6-NEXT: entry:
5252 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5253 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5254 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5255 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5256 // CHECK6-NEXT: ret void
5257 //
5258 //
5259 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined.
5260 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5261 // CHECK6-NEXT: entry:
5262 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5263 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5264 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5265 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5266 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5267 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5268 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5269 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5270 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5271 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
5272 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5273 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5274 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5275 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5276 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5277 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5278 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5279 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5280 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5281 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5282 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5283 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5284 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5285 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5286 // CHECK6: cond.true:
5287 // CHECK6-NEXT: br label [[COND_END:%.*]]
5288 // CHECK6: cond.false:
5289 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5290 // CHECK6-NEXT: br label [[COND_END]]
5291 // CHECK6: cond.end:
5292 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5293 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5294 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5295 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5296 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5297 // CHECK6: omp.inner.for.cond:
5298 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
5299 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
5300 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5301 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5302 // CHECK6: omp.inner.for.body:
5303 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9
5304 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
5305 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !9
5306 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5307 // CHECK6: omp.inner.for.inc:
5308 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
5309 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9
5310 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
5311 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
5312 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
5313 // CHECK6: omp.inner.for.end:
5314 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5315 // CHECK6: omp.loop.exit:
5316 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5317 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5318 // CHECK6-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
5319 // CHECK6-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5320 // CHECK6: .omp.final.then:
5321 // CHECK6-NEXT: store i32 123, i32* [[I]], align 4
5322 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
5323 // CHECK6: .omp.final.done:
5324 // CHECK6-NEXT: ret void
5325 //
5326 //
5327 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..1
5328 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5329 // CHECK6-NEXT: entry:
5330 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5331 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5332 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5333 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5334 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5335 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5336 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5337 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5338 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5339 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5340 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5341 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
5342 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5343 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5344 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5345 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5346 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5347 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5348 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5349 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5350 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5351 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5352 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
5353 // CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
5354 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5355 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5356 // CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5357 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
5358 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5359 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5360 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
5361 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5362 // CHECK6: cond.true:
5363 // CHECK6-NEXT: br label [[COND_END:%.*]]
5364 // CHECK6: cond.false:
5365 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5366 // CHECK6-NEXT: br label [[COND_END]]
5367 // CHECK6: cond.end:
5368 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
5369 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5370 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5371 // CHECK6-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
5372 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5373 // CHECK6: omp.inner.for.cond:
5374 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
5375 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
5376 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5377 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5378 // CHECK6: omp.inner.for.body:
5379 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
5380 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5381 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5382 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
5383 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5384 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
5385 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
5386 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
5387 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5388 // CHECK6: omp.body.continue:
5389 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5390 // CHECK6: omp.inner.for.inc:
5391 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
5392 // CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
5393 // CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
5394 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
5395 // CHECK6: omp.inner.for.end:
5396 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5397 // CHECK6: omp.loop.exit:
5398 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5399 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5400 // CHECK6-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5401 // CHECK6-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5402 // CHECK6: .omp.final.then:
5403 // CHECK6-NEXT: store i32 123, i32* [[I]], align 4
5404 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
5405 // CHECK6: .omp.final.done:
5406 // CHECK6-NEXT: ret void
5407 //
5408 //
5409 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41
5410 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5411 // CHECK6-NEXT: entry:
5412 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5413 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5414 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5415 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5416 // CHECK6-NEXT: ret void
5417 //
5418 //
5419 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..2
5420 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5421 // CHECK6-NEXT: entry:
5422 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5423 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5424 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5425 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5426 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5427 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5428 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5429 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5430 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5431 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
5432 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5433 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5434 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5435 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5436 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5437 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5438 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5439 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5440 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5441 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5442 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5443 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5444 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5445 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5446 // CHECK6: cond.true:
5447 // CHECK6-NEXT: br label [[COND_END:%.*]]
5448 // CHECK6: cond.false:
5449 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5450 // CHECK6-NEXT: br label [[COND_END]]
5451 // CHECK6: cond.end:
5452 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5453 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5454 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5455 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5456 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5457 // CHECK6: omp.inner.for.cond:
5458 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
5459 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
5460 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5461 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5462 // CHECK6: omp.inner.for.body:
5463 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !18
5464 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
5465 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !18
5466 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5467 // CHECK6: omp.inner.for.inc:
5468 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
5469 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !18
5470 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
5471 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
5472 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
5473 // CHECK6: omp.inner.for.end:
5474 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5475 // CHECK6: omp.loop.exit:
5476 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5477 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5478 // CHECK6-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
5479 // CHECK6-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5480 // CHECK6: .omp.final.then:
5481 // CHECK6-NEXT: store i32 123, i32* [[I]], align 4
5482 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
5483 // CHECK6: .omp.final.done:
5484 // CHECK6-NEXT: ret void
5485 //
5486 //
5487 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..3
5488 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5489 // CHECK6-NEXT: entry:
5490 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5491 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5492 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5493 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5494 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5495 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5496 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5497 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5498 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5499 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5500 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5501 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
5502 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5503 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5504 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5505 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5506 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5507 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5508 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5509 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5510 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5511 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5512 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
5513 // CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
5514 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5515 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5516 // CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5517 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
5518 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5519 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5520 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
5521 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5522 // CHECK6: cond.true:
5523 // CHECK6-NEXT: br label [[COND_END:%.*]]
5524 // CHECK6: cond.false:
5525 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5526 // CHECK6-NEXT: br label [[COND_END]]
5527 // CHECK6: cond.end:
5528 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
5529 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5530 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5531 // CHECK6-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
5532 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5533 // CHECK6: omp.inner.for.cond:
5534 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
5535 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
5536 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5537 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5538 // CHECK6: omp.inner.for.body:
5539 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
5540 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5541 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5542 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
5543 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5544 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
5545 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
5546 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
5547 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5548 // CHECK6: omp.body.continue:
5549 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5550 // CHECK6: omp.inner.for.inc:
5551 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
5552 // CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
5553 // CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
5554 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
5555 // CHECK6: omp.inner.for.end:
5556 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5557 // CHECK6: omp.loop.exit:
5558 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5559 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5560 // CHECK6-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5561 // CHECK6-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5562 // CHECK6: .omp.final.then:
5563 // CHECK6-NEXT: store i32 123, i32* [[I]], align 4
5564 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
5565 // CHECK6: .omp.final.done:
5566 // CHECK6-NEXT: ret void
5567 //
5568 //
5569 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46
5570 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5571 // CHECK6-NEXT: entry:
5572 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5573 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5574 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5575 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5576 // CHECK6-NEXT: ret void
5577 //
5578 //
5579 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..6
5580 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5581 // CHECK6-NEXT: entry:
5582 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5583 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5584 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5585 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5586 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5587 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5588 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5589 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5590 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5591 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
5592 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5593 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5594 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5595 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5596 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5597 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5598 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5599 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5600 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5601 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5602 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5603 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5604 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5605 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5606 // CHECK6: cond.true:
5607 // CHECK6-NEXT: br label [[COND_END:%.*]]
5608 // CHECK6: cond.false:
5609 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5610 // CHECK6-NEXT: br label [[COND_END]]
5611 // CHECK6: cond.end:
5612 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5613 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5614 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5615 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5616 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5617 // CHECK6: omp.inner.for.cond:
5618 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
5619 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
5620 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5621 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5622 // CHECK6: omp.inner.for.body:
5623 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !24
5624 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
5625 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !24
5626 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5627 // CHECK6: omp.inner.for.inc:
5628 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
5629 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !24
5630 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
5631 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
5632 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
5633 // CHECK6: omp.inner.for.end:
5634 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5635 // CHECK6: omp.loop.exit:
5636 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5637 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5638 // CHECK6-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
5639 // CHECK6-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5640 // CHECK6: .omp.final.then:
5641 // CHECK6-NEXT: store i32 123, i32* [[I]], align 4
5642 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
5643 // CHECK6: .omp.final.done:
5644 // CHECK6-NEXT: ret void
5645 //
5646 //
5647 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..7
5648 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5649 // CHECK6-NEXT: entry:
5650 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5651 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5652 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5653 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5654 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5655 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5656 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5657 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5658 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5659 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5660 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5661 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
5662 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5663 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5664 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5665 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5666 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5667 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5668 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5669 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5670 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5671 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5672 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
5673 // CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
5674 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5675 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5676 // CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5677 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
5678 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
5679 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
5680 // CHECK6: omp.dispatch.cond:
5681 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5682 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5683 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
5684 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5685 // CHECK6: cond.true:
5686 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5687 // CHECK6-NEXT: br label [[COND_END:%.*]]
5688 // CHECK6: cond.false:
5689 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5690 // CHECK6-NEXT: br label [[COND_END]]
5691 // CHECK6: cond.end:
5692 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
5693 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5694 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5695 // CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
5696 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5697 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5698 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
5699 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5700 // CHECK6: omp.dispatch.body:
5701 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5702 // CHECK6: omp.inner.for.cond:
5703 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
5704 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27
5705 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
5706 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5707 // CHECK6: omp.inner.for.body:
5708 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
5709 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
5710 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5711 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27
5712 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5713 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27
5714 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
5715 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27
5716 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5717 // CHECK6: omp.body.continue:
5718 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5719 // CHECK6: omp.inner.for.inc:
5720 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
5721 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
5722 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
5723 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
5724 // CHECK6: omp.inner.for.end:
5725 // CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
5726 // CHECK6: omp.dispatch.inc:
5727 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5728 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5729 // CHECK6-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
5730 // CHECK6-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
5731 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5732 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5733 // CHECK6-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
5734 // CHECK6-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
5735 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND]]
5736 // CHECK6: omp.dispatch.end:
5737 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5738 // CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5739 // CHECK6-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
5740 // CHECK6-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5741 // CHECK6: .omp.final.then:
5742 // CHECK6-NEXT: store i32 123, i32* [[I]], align 4
5743 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
5744 // CHECK6: .omp.final.done:
5745 // CHECK6-NEXT: ret void
5746 //
5747 //
5748 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52
5749 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5750 // CHECK6-NEXT: entry:
5751 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5752 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5753 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5754 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5755 // CHECK6-NEXT: ret void
5756 //
5757 //
5758 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..10
5759 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5760 // CHECK6-NEXT: entry:
5761 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5762 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5763 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5764 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5765 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5766 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5767 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5768 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5769 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5770 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
5771 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5772 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5773 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5774 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5775 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5776 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5777 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5778 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5779 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5780 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5781 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5782 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5783 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5784 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5785 // CHECK6: cond.true:
5786 // CHECK6-NEXT: br label [[COND_END:%.*]]
5787 // CHECK6: cond.false:
5788 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5789 // CHECK6-NEXT: br label [[COND_END]]
5790 // CHECK6: cond.end:
5791 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5792 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5793 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5794 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5795 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5796 // CHECK6: omp.inner.for.cond:
5797 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
5798 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
5799 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5800 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5801 // CHECK6: omp.inner.for.body:
5802 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !30
5803 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
5804 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !30
5805 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5806 // CHECK6: omp.inner.for.inc:
5807 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
5808 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !30
5809 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
5810 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
5811 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
5812 // CHECK6: omp.inner.for.end:
5813 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5814 // CHECK6: omp.loop.exit:
5815 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5816 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5817 // CHECK6-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
5818 // CHECK6-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5819 // CHECK6: .omp.final.then:
5820 // CHECK6-NEXT: store i32 123, i32* [[I]], align 4
5821 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
5822 // CHECK6: .omp.final.done:
5823 // CHECK6-NEXT: ret void
5824 //
5825 //
5826 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..11
5827 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5828 // CHECK6-NEXT: entry:
5829 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5830 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5831 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5832 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5833 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5834 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5835 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5836 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5837 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5838 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5839 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5840 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
5841 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5842 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5843 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5844 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5845 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5846 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5847 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5848 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
5849 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5850 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5851 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
5852 // CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
5853 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5854 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5855 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5856 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5857 // CHECK6-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5858 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
5859 // CHECK6-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
5860 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
5861 // CHECK6: omp.dispatch.cond:
5862 // CHECK6-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
5863 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
5864 // CHECK6-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5865 // CHECK6: omp.dispatch.body:
5866 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5867 // CHECK6-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
5868 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5869 // CHECK6: omp.inner.for.cond:
5870 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
5871 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !33
5872 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
5873 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5874 // CHECK6: omp.inner.for.body:
5875 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
5876 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
5877 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5878 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !33
5879 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5880 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !33
5881 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
5882 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !33
5883 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5884 // CHECK6: omp.body.continue:
5885 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5886 // CHECK6: omp.inner.for.inc:
5887 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
5888 // CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
5889 // CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
5890 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
5891 // CHECK6: omp.inner.for.end:
5892 // CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
5893 // CHECK6: omp.dispatch.inc:
5894 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND]]
5895 // CHECK6: omp.dispatch.end:
5896 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5897 // CHECK6-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5898 // CHECK6-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5899 // CHECK6: .omp.final.then:
5900 // CHECK6-NEXT: store i32 123, i32* [[I]], align 4
5901 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
5902 // CHECK6: .omp.final.done:
5903 // CHECK6-NEXT: ret void
5904 //
5905 //
5906 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58
5907 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5908 // CHECK6-NEXT: entry:
5909 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5910 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5911 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5912 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5913 // CHECK6-NEXT: ret void
5914 //
5915 //
5916 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..14
5917 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5918 // CHECK6-NEXT: entry:
5919 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5920 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5921 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5922 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5923 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5924 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5925 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5926 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5927 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5928 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
5929 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5930 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5931 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5932 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5933 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5934 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5935 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5936 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5937 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5938 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5939 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5940 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5941 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5942 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5943 // CHECK6: cond.true:
5944 // CHECK6-NEXT: br label [[COND_END:%.*]]
5945 // CHECK6: cond.false:
5946 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5947 // CHECK6-NEXT: br label [[COND_END]]
5948 // CHECK6: cond.end:
5949 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5950 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5951 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5952 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5953 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5954 // CHECK6: omp.inner.for.cond:
5955 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
5956 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
5957 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5958 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5959 // CHECK6: omp.inner.for.body:
5960 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !36
5961 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
5962 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !36
5963 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5964 // CHECK6: omp.inner.for.inc:
5965 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
5966 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !36
5967 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
5968 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
5969 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
5970 // CHECK6: omp.inner.for.end:
5971 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5972 // CHECK6: omp.loop.exit:
5973 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5974 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5975 // CHECK6-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
5976 // CHECK6-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5977 // CHECK6: .omp.final.then:
5978 // CHECK6-NEXT: store i32 123, i32* [[I]], align 4
5979 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
5980 // CHECK6: .omp.final.done:
5981 // CHECK6-NEXT: ret void
5982 //
5983 //
5984 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..15
5985 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5986 // CHECK6-NEXT: entry:
5987 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5988 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5989 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5990 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5991 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5992 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5993 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
5994 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5995 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5996 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5997 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5998 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
5999 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6000 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6001 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6002 // CHECK6-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6003 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6004 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6005 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6006 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
6007 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6008 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6009 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6010 // CHECK6-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6011 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6012 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6013 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6014 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6015 // CHECK6-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6016 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
6017 // CHECK6-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
6018 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6019 // CHECK6: omp.dispatch.cond:
6020 // CHECK6-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
6021 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
6022 // CHECK6-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6023 // CHECK6: omp.dispatch.body:
6024 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6025 // CHECK6-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
6026 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6027 // CHECK6: omp.inner.for.cond:
6028 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
6029 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !39
6030 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
6031 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6032 // CHECK6: omp.inner.for.body:
6033 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
6034 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
6035 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6036 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !39
6037 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6038 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !39
6039 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
6040 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !39
6041 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6042 // CHECK6: omp.body.continue:
6043 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6044 // CHECK6: omp.inner.for.inc:
6045 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
6046 // CHECK6-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
6047 // CHECK6-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
6048 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
6049 // CHECK6: omp.inner.for.end:
6050 // CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6051 // CHECK6: omp.dispatch.inc:
6052 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND]]
6053 // CHECK6: omp.dispatch.end:
6054 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6055 // CHECK6-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
6056 // CHECK6-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6057 // CHECK6: .omp.final.then:
6058 // CHECK6-NEXT: store i32 123, i32* [[I]], align 4
6059 // CHECK6-NEXT: br label [[DOTOMP_FINAL_DONE]]
6060 // CHECK6: .omp.final.done:
6061 // CHECK6-NEXT: ret void
6062 //
6063 //
6064 // CHECK6-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6065 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] {
6066 // CHECK6-NEXT: entry:
6067 // CHECK6-NEXT: call void @__tgt_register_requires(i64 1)
6068 // CHECK6-NEXT: ret void
6069 //
6070 //
6071 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv
6072 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
6073 // CHECK7-NEXT: entry:
6074 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
6075 // CHECK7-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
6076 // CHECK7-NEXT: ret i32 [[CALL]]
6077 //
6078 //
6079 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
6080 // CHECK7-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
6081 // CHECK7-NEXT: entry:
6082 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6083 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
6084 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
6085 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
6086 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
6087 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
6088 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
6089 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
6090 // CHECK7-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
6091 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
6092 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
6093 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
6094 // CHECK7-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
6095 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4
6096 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4
6097 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4
6098 // CHECK7-NEXT: [[_TMP20:%.*]] = alloca i32, align 4
6099 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4
6100 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4
6101 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4
6102 // CHECK7-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
6103 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6104 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6105 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
6106 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6107 // CHECK7-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
6108 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
6109 // CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6110 // CHECK7-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
6111 // CHECK7-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
6112 // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
6113 // CHECK7-NEXT: store i8* null, i8** [[TMP4]], align 4
6114 // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6115 // CHECK7-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6116 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
6117 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6118 // CHECK7-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
6119 // CHECK7-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6120 // CHECK7: omp_offload.failed:
6121 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
6122 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]]
6123 // CHECK7: omp_offload.cont:
6124 // CHECK7-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6125 // CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
6126 // CHECK7-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
6127 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
6128 // CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
6129 // CHECK7-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
6130 // CHECK7-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
6131 // CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
6132 // CHECK7-NEXT: store i8* null, i8** [[TMP13]], align 4
6133 // CHECK7-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
6134 // CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
6135 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
6136 // CHECK7-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6137 // CHECK7-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
6138 // CHECK7-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
6139 // CHECK7: omp_offload.failed7:
6140 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41(%struct.SS* [[THIS1]]) #[[ATTR2]]
6141 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT8]]
6142 // CHECK7: omp_offload.cont8:
6143 // CHECK7-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6144 // CHECK7-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
6145 // CHECK7-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
6146 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
6147 // CHECK7-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
6148 // CHECK7-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
6149 // CHECK7-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
6150 // CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
6151 // CHECK7-NEXT: store i8* null, i8** [[TMP22]], align 4
6152 // CHECK7-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
6153 // CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
6154 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
6155 // CHECK7-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6156 // CHECK7-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
6157 // CHECK7-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
6158 // CHECK7: omp_offload.failed14:
6159 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46(%struct.SS* [[THIS1]]) #[[ATTR2]]
6160 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT15]]
6161 // CHECK7: omp_offload.cont15:
6162 // CHECK7-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6163 // CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
6164 // CHECK7-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
6165 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4
6166 // CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
6167 // CHECK7-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
6168 // CHECK7-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4
6169 // CHECK7-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
6170 // CHECK7-NEXT: store i8* null, i8** [[TMP31]], align 4
6171 // CHECK7-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
6172 // CHECK7-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
6173 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
6174 // CHECK7-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6175 // CHECK7-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
6176 // CHECK7-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
6177 // CHECK7: omp_offload.failed21:
6178 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52(%struct.SS* [[THIS1]]) #[[ATTR2]]
6179 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT22]]
6180 // CHECK7: omp_offload.cont22:
6181 // CHECK7-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6182 // CHECK7-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
6183 // CHECK7-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
6184 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
6185 // CHECK7-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
6186 // CHECK7-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
6187 // CHECK7-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4
6188 // CHECK7-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
6189 // CHECK7-NEXT: store i8* null, i8** [[TMP40]], align 4
6190 // CHECK7-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
6191 // CHECK7-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
6192 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
6193 // CHECK7-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6194 // CHECK7-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
6195 // CHECK7-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
6196 // CHECK7: omp_offload.failed28:
6197 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58(%struct.SS* [[THIS1]]) #[[ATTR2]]
6198 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT29]]
6199 // CHECK7: omp_offload.cont29:
6200 // CHECK7-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6201 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0
6202 // CHECK7-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
6203 // CHECK7-NEXT: ret i32 [[TMP45]]
6204 //
6205 //
6206 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
6207 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
6208 // CHECK7-NEXT: entry:
6209 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6210 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6211 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6212 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6213 // CHECK7-NEXT: ret void
6214 //
6215 //
6216 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined.
6217 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6218 // CHECK7-NEXT: entry:
6219 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6220 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6221 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6222 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6223 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
6224 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6225 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6226 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6227 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6228 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
6229 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6230 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6231 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6232 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6233 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6234 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6235 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6236 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6237 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6238 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6239 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6240 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6241 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6242 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6243 // CHECK7: cond.true:
6244 // CHECK7-NEXT: br label [[COND_END:%.*]]
6245 // CHECK7: cond.false:
6246 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6247 // CHECK7-NEXT: br label [[COND_END]]
6248 // CHECK7: cond.end:
6249 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6250 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6251 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6252 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6253 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6254 // CHECK7: omp.inner.for.cond:
6255 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
6256 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
6257 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6258 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6259 // CHECK7: omp.inner.for.body:
6260 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9
6261 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
6262 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !9
6263 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6264 // CHECK7: omp.inner.for.inc:
6265 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
6266 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9
6267 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6268 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
6269 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
6270 // CHECK7: omp.inner.for.end:
6271 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6272 // CHECK7: omp.loop.exit:
6273 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6274 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6275 // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
6276 // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6277 // CHECK7: .omp.final.then:
6278 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
6279 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
6280 // CHECK7: .omp.final.done:
6281 // CHECK7-NEXT: ret void
6282 //
6283 //
6284 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..1
6285 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6286 // CHECK7-NEXT: entry:
6287 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6288 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6289 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6290 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6291 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6292 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6293 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
6294 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6295 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6296 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6297 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6298 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
6299 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6300 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6301 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6302 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6303 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6304 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6305 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6306 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
6307 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6308 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6309 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6310 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6311 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6312 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6313 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6314 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6315 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6316 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6317 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
6318 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6319 // CHECK7: cond.true:
6320 // CHECK7-NEXT: br label [[COND_END:%.*]]
6321 // CHECK7: cond.false:
6322 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6323 // CHECK7-NEXT: br label [[COND_END]]
6324 // CHECK7: cond.end:
6325 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6326 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6327 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6328 // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6329 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6330 // CHECK7: omp.inner.for.cond:
6331 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
6332 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
6333 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6334 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6335 // CHECK7: omp.inner.for.body:
6336 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
6337 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6338 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6339 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
6340 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6341 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
6342 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
6343 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
6344 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6345 // CHECK7: omp.body.continue:
6346 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6347 // CHECK7: omp.inner.for.inc:
6348 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
6349 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
6350 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
6351 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
6352 // CHECK7: omp.inner.for.end:
6353 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6354 // CHECK7: omp.loop.exit:
6355 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6356 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6357 // CHECK7-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6358 // CHECK7-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6359 // CHECK7: .omp.final.then:
6360 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
6361 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
6362 // CHECK7: .omp.final.done:
6363 // CHECK7-NEXT: ret void
6364 //
6365 //
6366 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41
6367 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6368 // CHECK7-NEXT: entry:
6369 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6370 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6371 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6372 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6373 // CHECK7-NEXT: ret void
6374 //
6375 //
6376 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..2
6377 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6378 // CHECK7-NEXT: entry:
6379 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6380 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6381 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6382 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6383 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
6384 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6385 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6386 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6387 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6388 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
6389 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6390 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6391 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6392 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6393 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6394 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6395 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6396 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6397 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6398 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6399 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6400 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6401 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6402 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6403 // CHECK7: cond.true:
6404 // CHECK7-NEXT: br label [[COND_END:%.*]]
6405 // CHECK7: cond.false:
6406 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6407 // CHECK7-NEXT: br label [[COND_END]]
6408 // CHECK7: cond.end:
6409 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6410 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6411 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6412 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6413 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6414 // CHECK7: omp.inner.for.cond:
6415 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
6416 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
6417 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6418 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6419 // CHECK7: omp.inner.for.body:
6420 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !18
6421 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
6422 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !18
6423 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6424 // CHECK7: omp.inner.for.inc:
6425 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
6426 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !18
6427 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6428 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
6429 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
6430 // CHECK7: omp.inner.for.end:
6431 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6432 // CHECK7: omp.loop.exit:
6433 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6434 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6435 // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
6436 // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6437 // CHECK7: .omp.final.then:
6438 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
6439 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
6440 // CHECK7: .omp.final.done:
6441 // CHECK7-NEXT: ret void
6442 //
6443 //
6444 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..3
6445 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6446 // CHECK7-NEXT: entry:
6447 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6448 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6449 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6450 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6451 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6452 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6453 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
6454 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6455 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6456 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6457 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6458 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
6459 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6460 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6461 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6462 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6463 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6464 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6465 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6466 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
6467 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6468 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6469 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6470 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6471 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6472 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6473 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6474 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6475 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6476 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6477 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
6478 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6479 // CHECK7: cond.true:
6480 // CHECK7-NEXT: br label [[COND_END:%.*]]
6481 // CHECK7: cond.false:
6482 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6483 // CHECK7-NEXT: br label [[COND_END]]
6484 // CHECK7: cond.end:
6485 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6486 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6487 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6488 // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6489 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6490 // CHECK7: omp.inner.for.cond:
6491 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
6492 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
6493 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6494 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6495 // CHECK7: omp.inner.for.body:
6496 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
6497 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6498 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6499 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
6500 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6501 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
6502 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
6503 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
6504 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6505 // CHECK7: omp.body.continue:
6506 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6507 // CHECK7: omp.inner.for.inc:
6508 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
6509 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
6510 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
6511 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
6512 // CHECK7: omp.inner.for.end:
6513 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6514 // CHECK7: omp.loop.exit:
6515 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6516 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6517 // CHECK7-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6518 // CHECK7-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6519 // CHECK7: .omp.final.then:
6520 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
6521 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
6522 // CHECK7: .omp.final.done:
6523 // CHECK7-NEXT: ret void
6524 //
6525 //
6526 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46
6527 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6528 // CHECK7-NEXT: entry:
6529 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6530 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6531 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6532 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6533 // CHECK7-NEXT: ret void
6534 //
6535 //
6536 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..6
6537 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6538 // CHECK7-NEXT: entry:
6539 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6540 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6541 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6542 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6543 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
6544 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6545 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6546 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6547 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6548 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
6549 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6550 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6551 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6552 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6553 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6554 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6555 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6556 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6557 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6558 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6559 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6560 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6561 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6562 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6563 // CHECK7: cond.true:
6564 // CHECK7-NEXT: br label [[COND_END:%.*]]
6565 // CHECK7: cond.false:
6566 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6567 // CHECK7-NEXT: br label [[COND_END]]
6568 // CHECK7: cond.end:
6569 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6570 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6571 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6572 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6573 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6574 // CHECK7: omp.inner.for.cond:
6575 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
6576 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
6577 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6578 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6579 // CHECK7: omp.inner.for.body:
6580 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !24
6581 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
6582 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !24
6583 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6584 // CHECK7: omp.inner.for.inc:
6585 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
6586 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !24
6587 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6588 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
6589 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
6590 // CHECK7: omp.inner.for.end:
6591 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6592 // CHECK7: omp.loop.exit:
6593 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6594 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6595 // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
6596 // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6597 // CHECK7: .omp.final.then:
6598 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
6599 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
6600 // CHECK7: .omp.final.done:
6601 // CHECK7-NEXT: ret void
6602 //
6603 //
6604 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..7
6605 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6606 // CHECK7-NEXT: entry:
6607 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6608 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6609 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6610 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6611 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6612 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6613 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
6614 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6615 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6616 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6617 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6618 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
6619 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6620 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6621 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6622 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6623 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6624 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6625 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6626 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
6627 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6628 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6629 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6630 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6631 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6632 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6633 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6634 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6635 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
6636 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6637 // CHECK7: omp.dispatch.cond:
6638 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6639 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6640 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
6641 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6642 // CHECK7: cond.true:
6643 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6644 // CHECK7-NEXT: br label [[COND_END:%.*]]
6645 // CHECK7: cond.false:
6646 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6647 // CHECK7-NEXT: br label [[COND_END]]
6648 // CHECK7: cond.end:
6649 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
6650 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6651 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6652 // CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
6653 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6654 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6655 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
6656 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6657 // CHECK7: omp.dispatch.body:
6658 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6659 // CHECK7: omp.inner.for.cond:
6660 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
6661 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27
6662 // CHECK7-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
6663 // CHECK7-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6664 // CHECK7: omp.inner.for.body:
6665 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
6666 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
6667 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6668 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27
6669 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6670 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27
6671 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
6672 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27
6673 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6674 // CHECK7: omp.body.continue:
6675 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6676 // CHECK7: omp.inner.for.inc:
6677 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
6678 // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
6679 // CHECK7-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
6680 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
6681 // CHECK7: omp.inner.for.end:
6682 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6683 // CHECK7: omp.dispatch.inc:
6684 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6685 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6686 // CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
6687 // CHECK7-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
6688 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6689 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6690 // CHECK7-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
6691 // CHECK7-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
6692 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]
6693 // CHECK7: omp.dispatch.end:
6694 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6695 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6696 // CHECK7-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
6697 // CHECK7-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6698 // CHECK7: .omp.final.then:
6699 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
6700 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
6701 // CHECK7: .omp.final.done:
6702 // CHECK7-NEXT: ret void
6703 //
6704 //
6705 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52
6706 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6707 // CHECK7-NEXT: entry:
6708 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6709 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6710 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6711 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6712 // CHECK7-NEXT: ret void
6713 //
6714 //
6715 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..10
6716 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6717 // CHECK7-NEXT: entry:
6718 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6719 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6720 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6721 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6722 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
6723 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6724 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6725 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6726 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6727 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
6728 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6729 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6730 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6731 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6732 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6733 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6734 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6735 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6736 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6737 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6738 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6739 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6740 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6741 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6742 // CHECK7: cond.true:
6743 // CHECK7-NEXT: br label [[COND_END:%.*]]
6744 // CHECK7: cond.false:
6745 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6746 // CHECK7-NEXT: br label [[COND_END]]
6747 // CHECK7: cond.end:
6748 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6749 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6750 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6751 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6752 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6753 // CHECK7: omp.inner.for.cond:
6754 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
6755 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
6756 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6757 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6758 // CHECK7: omp.inner.for.body:
6759 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !30
6760 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
6761 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !30
6762 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6763 // CHECK7: omp.inner.for.inc:
6764 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
6765 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !30
6766 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6767 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
6768 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
6769 // CHECK7: omp.inner.for.end:
6770 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6771 // CHECK7: omp.loop.exit:
6772 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6773 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6774 // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
6775 // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6776 // CHECK7: .omp.final.then:
6777 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
6778 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
6779 // CHECK7: .omp.final.done:
6780 // CHECK7-NEXT: ret void
6781 //
6782 //
6783 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..11
6784 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6785 // CHECK7-NEXT: entry:
6786 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6787 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6788 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6789 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6790 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6791 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6792 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
6793 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6794 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6795 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6796 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6797 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
6798 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6799 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6800 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6801 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6802 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6803 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6804 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6805 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
6806 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6807 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6808 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6809 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6810 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6811 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6812 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6813 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6814 // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6815 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
6816 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
6817 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6818 // CHECK7: omp.dispatch.cond:
6819 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
6820 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
6821 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6822 // CHECK7: omp.dispatch.body:
6823 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6824 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
6825 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6826 // CHECK7: omp.inner.for.cond:
6827 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
6828 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !33
6829 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
6830 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6831 // CHECK7: omp.inner.for.body:
6832 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
6833 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
6834 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6835 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !33
6836 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6837 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !33
6838 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
6839 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !33
6840 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6841 // CHECK7: omp.body.continue:
6842 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6843 // CHECK7: omp.inner.for.inc:
6844 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
6845 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
6846 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
6847 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
6848 // CHECK7: omp.inner.for.end:
6849 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6850 // CHECK7: omp.dispatch.inc:
6851 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]
6852 // CHECK7: omp.dispatch.end:
6853 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6854 // CHECK7-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
6855 // CHECK7-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6856 // CHECK7: .omp.final.then:
6857 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
6858 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
6859 // CHECK7: .omp.final.done:
6860 // CHECK7-NEXT: ret void
6861 //
6862 //
6863 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58
6864 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6865 // CHECK7-NEXT: entry:
6866 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6867 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6868 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6869 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6870 // CHECK7-NEXT: ret void
6871 //
6872 //
6873 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..14
6874 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6875 // CHECK7-NEXT: entry:
6876 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6877 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6878 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6879 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6880 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
6881 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6882 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6883 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6884 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6885 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
6886 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6887 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6888 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6889 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6890 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6891 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6892 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6893 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6894 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6895 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6896 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6897 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6898 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6899 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6900 // CHECK7: cond.true:
6901 // CHECK7-NEXT: br label [[COND_END:%.*]]
6902 // CHECK7: cond.false:
6903 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6904 // CHECK7-NEXT: br label [[COND_END]]
6905 // CHECK7: cond.end:
6906 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6907 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6908 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6909 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6910 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6911 // CHECK7: omp.inner.for.cond:
6912 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
6913 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
6914 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6915 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6916 // CHECK7: omp.inner.for.body:
6917 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !36
6918 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
6919 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !36
6920 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6921 // CHECK7: omp.inner.for.inc:
6922 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
6923 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !36
6924 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6925 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
6926 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
6927 // CHECK7: omp.inner.for.end:
6928 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6929 // CHECK7: omp.loop.exit:
6930 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6931 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6932 // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
6933 // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6934 // CHECK7: .omp.final.then:
6935 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
6936 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
6937 // CHECK7: .omp.final.done:
6938 // CHECK7-NEXT: ret void
6939 //
6940 //
6941 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..15
6942 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6943 // CHECK7-NEXT: entry:
6944 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6945 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6946 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6947 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6948 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6949 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6950 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
6951 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6952 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6953 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6954 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6955 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
6956 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6957 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6958 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6959 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6960 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6961 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6962 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6963 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
6964 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6965 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6966 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6967 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6968 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6969 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6970 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6971 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6972 // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6973 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
6974 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
6975 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6976 // CHECK7: omp.dispatch.cond:
6977 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
6978 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
6979 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6980 // CHECK7: omp.dispatch.body:
6981 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6982 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
6983 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6984 // CHECK7: omp.inner.for.cond:
6985 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
6986 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !39
6987 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
6988 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6989 // CHECK7: omp.inner.for.body:
6990 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
6991 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
6992 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6993 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !39
6994 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6995 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !39
6996 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
6997 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !39
6998 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6999 // CHECK7: omp.body.continue:
7000 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7001 // CHECK7: omp.inner.for.inc:
7002 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
7003 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
7004 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
7005 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
7006 // CHECK7: omp.inner.for.end:
7007 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7008 // CHECK7: omp.dispatch.inc:
7009 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]
7010 // CHECK7: omp.dispatch.end:
7011 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7012 // CHECK7-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
7013 // CHECK7-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7014 // CHECK7: .omp.final.then:
7015 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
7016 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
7017 // CHECK7: .omp.final.done:
7018 // CHECK7-NEXT: ret void
7019 //
7020 //
7021 // CHECK7-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
7022 // CHECK7-SAME: () #[[ATTR3:[0-9]+]] {
7023 // CHECK7-NEXT: entry:
7024 // CHECK7-NEXT: call void @__tgt_register_requires(i64 1)
7025 // CHECK7-NEXT: ret void
7026 //
7027 //
7028 // CHECK8-LABEL: define {{[^@]+}}@_Z21teams_template_structv
7029 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
7030 // CHECK8-NEXT: entry:
7031 // CHECK8-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
7032 // CHECK8-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
7033 // CHECK8-NEXT: ret i32 [[CALL]]
7034 //
7035 //
7036 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
7037 // CHECK8-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
7038 // CHECK8-NEXT: entry:
7039 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7040 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
7041 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
7042 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
7043 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
7044 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
7045 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
7046 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
7047 // CHECK8-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
7048 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
7049 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
7050 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
7051 // CHECK8-NEXT: [[_TMP13:%.*]] = alloca i32, align 4
7052 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4
7053 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4
7054 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4
7055 // CHECK8-NEXT: [[_TMP20:%.*]] = alloca i32, align 4
7056 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4
7057 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4
7058 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4
7059 // CHECK8-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
7060 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7061 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7062 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
7063 // CHECK8-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7064 // CHECK8-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
7065 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
7066 // CHECK8-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7067 // CHECK8-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
7068 // CHECK8-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
7069 // CHECK8-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
7070 // CHECK8-NEXT: store i8* null, i8** [[TMP4]], align 4
7071 // CHECK8-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7072 // CHECK8-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7073 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
7074 // CHECK8-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7075 // CHECK8-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
7076 // CHECK8-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7077 // CHECK8: omp_offload.failed:
7078 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
7079 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT]]
7080 // CHECK8: omp_offload.cont:
7081 // CHECK8-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7082 // CHECK8-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
7083 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
7084 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
7085 // CHECK8-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
7086 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
7087 // CHECK8-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
7088 // CHECK8-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
7089 // CHECK8-NEXT: store i8* null, i8** [[TMP13]], align 4
7090 // CHECK8-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
7091 // CHECK8-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
7092 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
7093 // CHECK8-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7094 // CHECK8-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
7095 // CHECK8-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
7096 // CHECK8: omp_offload.failed7:
7097 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41(%struct.SS* [[THIS1]]) #[[ATTR2]]
7098 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT8]]
7099 // CHECK8: omp_offload.cont8:
7100 // CHECK8-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7101 // CHECK8-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
7102 // CHECK8-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
7103 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
7104 // CHECK8-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
7105 // CHECK8-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
7106 // CHECK8-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
7107 // CHECK8-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
7108 // CHECK8-NEXT: store i8* null, i8** [[TMP22]], align 4
7109 // CHECK8-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
7110 // CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
7111 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
7112 // CHECK8-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7113 // CHECK8-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
7114 // CHECK8-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
7115 // CHECK8: omp_offload.failed14:
7116 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46(%struct.SS* [[THIS1]]) #[[ATTR2]]
7117 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT15]]
7118 // CHECK8: omp_offload.cont15:
7119 // CHECK8-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7120 // CHECK8-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
7121 // CHECK8-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
7122 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4
7123 // CHECK8-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
7124 // CHECK8-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
7125 // CHECK8-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4
7126 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
7127 // CHECK8-NEXT: store i8* null, i8** [[TMP31]], align 4
7128 // CHECK8-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
7129 // CHECK8-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
7130 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
7131 // CHECK8-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7132 // CHECK8-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
7133 // CHECK8-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
7134 // CHECK8: omp_offload.failed21:
7135 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52(%struct.SS* [[THIS1]]) #[[ATTR2]]
7136 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT22]]
7137 // CHECK8: omp_offload.cont22:
7138 // CHECK8-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7139 // CHECK8-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
7140 // CHECK8-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
7141 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
7142 // CHECK8-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
7143 // CHECK8-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
7144 // CHECK8-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4
7145 // CHECK8-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
7146 // CHECK8-NEXT: store i8* null, i8** [[TMP40]], align 4
7147 // CHECK8-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
7148 // CHECK8-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
7149 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
7150 // CHECK8-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7151 // CHECK8-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
7152 // CHECK8-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
7153 // CHECK8: omp_offload.failed28:
7154 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58(%struct.SS* [[THIS1]]) #[[ATTR2]]
7155 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT29]]
7156 // CHECK8: omp_offload.cont29:
7157 // CHECK8-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7158 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0
7159 // CHECK8-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
7160 // CHECK8-NEXT: ret i32 [[TMP45]]
7161 //
7162 //
7163 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
7164 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
7165 // CHECK8-NEXT: entry:
7166 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7167 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7168 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7169 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
7170 // CHECK8-NEXT: ret void
7171 //
7172 //
7173 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined.
7174 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7175 // CHECK8-NEXT: entry:
7176 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7177 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7178 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7179 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7180 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
7181 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7182 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7183 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7184 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7185 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
7186 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7187 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7188 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7189 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7190 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7191 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
7192 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7193 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7194 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7195 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7196 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7197 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7198 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
7199 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7200 // CHECK8: cond.true:
7201 // CHECK8-NEXT: br label [[COND_END:%.*]]
7202 // CHECK8: cond.false:
7203 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7204 // CHECK8-NEXT: br label [[COND_END]]
7205 // CHECK8: cond.end:
7206 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7207 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7208 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7209 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7210 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7211 // CHECK8: omp.inner.for.cond:
7212 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
7213 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
7214 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7215 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7216 // CHECK8: omp.inner.for.body:
7217 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9
7218 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
7219 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !9
7220 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7221 // CHECK8: omp.inner.for.inc:
7222 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
7223 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9
7224 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
7225 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
7226 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
7227 // CHECK8: omp.inner.for.end:
7228 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7229 // CHECK8: omp.loop.exit:
7230 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7231 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7232 // CHECK8-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
7233 // CHECK8-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7234 // CHECK8: .omp.final.then:
7235 // CHECK8-NEXT: store i32 123, i32* [[I]], align 4
7236 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
7237 // CHECK8: .omp.final.done:
7238 // CHECK8-NEXT: ret void
7239 //
7240 //
7241 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..1
7242 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7243 // CHECK8-NEXT: entry:
7244 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7245 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7246 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7247 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7248 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7249 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7250 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
7251 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7252 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7253 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7254 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7255 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
7256 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7257 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7258 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7259 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7260 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7261 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7262 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7263 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
7264 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7265 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7266 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
7267 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
7268 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7269 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7270 // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7271 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
7272 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7273 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7274 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
7275 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7276 // CHECK8: cond.true:
7277 // CHECK8-NEXT: br label [[COND_END:%.*]]
7278 // CHECK8: cond.false:
7279 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7280 // CHECK8-NEXT: br label [[COND_END]]
7281 // CHECK8: cond.end:
7282 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
7283 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7284 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7285 // CHECK8-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
7286 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7287 // CHECK8: omp.inner.for.cond:
7288 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7289 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
7290 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
7291 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7292 // CHECK8: omp.inner.for.body:
7293 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7294 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
7295 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7296 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
7297 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
7298 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
7299 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
7300 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
7301 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7302 // CHECK8: omp.body.continue:
7303 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7304 // CHECK8: omp.inner.for.inc:
7305 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7306 // CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
7307 // CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7308 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
7309 // CHECK8: omp.inner.for.end:
7310 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7311 // CHECK8: omp.loop.exit:
7312 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
7313 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7314 // CHECK8-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7315 // CHECK8-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7316 // CHECK8: .omp.final.then:
7317 // CHECK8-NEXT: store i32 123, i32* [[I]], align 4
7318 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
7319 // CHECK8: .omp.final.done:
7320 // CHECK8-NEXT: ret void
7321 //
7322 //
7323 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l41
7324 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7325 // CHECK8-NEXT: entry:
7326 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7327 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7328 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7329 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
7330 // CHECK8-NEXT: ret void
7331 //
7332 //
7333 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..2
7334 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7335 // CHECK8-NEXT: entry:
7336 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7337 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7338 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7339 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7340 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
7341 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7342 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7343 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7344 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7345 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
7346 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7347 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7348 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7349 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7350 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7351 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
7352 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7353 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7354 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7355 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7356 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7357 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7358 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
7359 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7360 // CHECK8: cond.true:
7361 // CHECK8-NEXT: br label [[COND_END:%.*]]
7362 // CHECK8: cond.false:
7363 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7364 // CHECK8-NEXT: br label [[COND_END]]
7365 // CHECK8: cond.end:
7366 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7367 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7368 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7369 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7370 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7371 // CHECK8: omp.inner.for.cond:
7372 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
7373 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
7374 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7375 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7376 // CHECK8: omp.inner.for.body:
7377 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !18
7378 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
7379 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !18
7380 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7381 // CHECK8: omp.inner.for.inc:
7382 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
7383 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !18
7384 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
7385 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
7386 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
7387 // CHECK8: omp.inner.for.end:
7388 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7389 // CHECK8: omp.loop.exit:
7390 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7391 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7392 // CHECK8-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
7393 // CHECK8-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7394 // CHECK8: .omp.final.then:
7395 // CHECK8-NEXT: store i32 123, i32* [[I]], align 4
7396 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
7397 // CHECK8: .omp.final.done:
7398 // CHECK8-NEXT: ret void
7399 //
7400 //
7401 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..3
7402 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7403 // CHECK8-NEXT: entry:
7404 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7405 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7406 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7407 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7408 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7409 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7410 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
7411 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7412 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7413 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7414 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7415 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
7416 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7417 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7418 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7419 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7420 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7421 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7422 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7423 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
7424 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7425 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7426 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
7427 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
7428 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7429 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7430 // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7431 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
7432 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7433 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7434 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
7435 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7436 // CHECK8: cond.true:
7437 // CHECK8-NEXT: br label [[COND_END:%.*]]
7438 // CHECK8: cond.false:
7439 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7440 // CHECK8-NEXT: br label [[COND_END]]
7441 // CHECK8: cond.end:
7442 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
7443 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7444 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7445 // CHECK8-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
7446 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7447 // CHECK8: omp.inner.for.cond:
7448 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
7449 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
7450 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
7451 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7452 // CHECK8: omp.inner.for.body:
7453 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
7454 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
7455 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7456 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
7457 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
7458 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
7459 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
7460 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
7461 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7462 // CHECK8: omp.body.continue:
7463 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7464 // CHECK8: omp.inner.for.inc:
7465 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
7466 // CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
7467 // CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
7468 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
7469 // CHECK8: omp.inner.for.end:
7470 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7471 // CHECK8: omp.loop.exit:
7472 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
7473 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7474 // CHECK8-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7475 // CHECK8-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7476 // CHECK8: .omp.final.then:
7477 // CHECK8-NEXT: store i32 123, i32* [[I]], align 4
7478 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
7479 // CHECK8: .omp.final.done:
7480 // CHECK8-NEXT: ret void
7481 //
7482 //
7483 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l46
7484 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7485 // CHECK8-NEXT: entry:
7486 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7487 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7488 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7489 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
7490 // CHECK8-NEXT: ret void
7491 //
7492 //
7493 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..6
7494 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7495 // CHECK8-NEXT: entry:
7496 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7497 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7498 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7499 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7500 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
7501 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7502 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7503 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7504 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7505 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
7506 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7507 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7508 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7509 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7510 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7511 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
7512 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7513 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7514 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7515 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7516 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7517 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7518 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
7519 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7520 // CHECK8: cond.true:
7521 // CHECK8-NEXT: br label [[COND_END:%.*]]
7522 // CHECK8: cond.false:
7523 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7524 // CHECK8-NEXT: br label [[COND_END]]
7525 // CHECK8: cond.end:
7526 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7527 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7528 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7529 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7530 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7531 // CHECK8: omp.inner.for.cond:
7532 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
7533 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
7534 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7535 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7536 // CHECK8: omp.inner.for.body:
7537 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !24
7538 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
7539 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !24
7540 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7541 // CHECK8: omp.inner.for.inc:
7542 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
7543 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !24
7544 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
7545 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
7546 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
7547 // CHECK8: omp.inner.for.end:
7548 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7549 // CHECK8: omp.loop.exit:
7550 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7551 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7552 // CHECK8-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
7553 // CHECK8-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7554 // CHECK8: .omp.final.then:
7555 // CHECK8-NEXT: store i32 123, i32* [[I]], align 4
7556 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
7557 // CHECK8: .omp.final.done:
7558 // CHECK8-NEXT: ret void
7559 //
7560 //
7561 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..7
7562 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7563 // CHECK8-NEXT: entry:
7564 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7565 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7566 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7567 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7568 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7569 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7570 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
7571 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7572 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7573 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7574 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7575 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
7576 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7577 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7578 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7579 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7580 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7581 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7582 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7583 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
7584 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7585 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7586 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
7587 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
7588 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7589 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7590 // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7591 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
7592 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
7593 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7594 // CHECK8: omp.dispatch.cond:
7595 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7596 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7597 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
7598 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7599 // CHECK8: cond.true:
7600 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7601 // CHECK8-NEXT: br label [[COND_END:%.*]]
7602 // CHECK8: cond.false:
7603 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7604 // CHECK8-NEXT: br label [[COND_END]]
7605 // CHECK8: cond.end:
7606 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
7607 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7608 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7609 // CHECK8-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
7610 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7611 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7612 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
7613 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7614 // CHECK8: omp.dispatch.body:
7615 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7616 // CHECK8: omp.inner.for.cond:
7617 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
7618 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27
7619 // CHECK8-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
7620 // CHECK8-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7621 // CHECK8: omp.inner.for.body:
7622 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
7623 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
7624 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7625 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27
7626 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
7627 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27
7628 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
7629 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27
7630 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7631 // CHECK8: omp.body.continue:
7632 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7633 // CHECK8: omp.inner.for.inc:
7634 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
7635 // CHECK8-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
7636 // CHECK8-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
7637 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
7638 // CHECK8: omp.inner.for.end:
7639 // CHECK8-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7640 // CHECK8: omp.dispatch.inc:
7641 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7642 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7643 // CHECK8-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
7644 // CHECK8-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
7645 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7646 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7647 // CHECK8-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
7648 // CHECK8-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
7649 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND]]
7650 // CHECK8: omp.dispatch.end:
7651 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
7652 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7653 // CHECK8-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
7654 // CHECK8-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7655 // CHECK8: .omp.final.then:
7656 // CHECK8-NEXT: store i32 123, i32* [[I]], align 4
7657 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
7658 // CHECK8: .omp.final.done:
7659 // CHECK8-NEXT: ret void
7660 //
7661 //
7662 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l52
7663 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7664 // CHECK8-NEXT: entry:
7665 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7666 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7667 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7668 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
7669 // CHECK8-NEXT: ret void
7670 //
7671 //
7672 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..10
7673 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7674 // CHECK8-NEXT: entry:
7675 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7676 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7677 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7678 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7679 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
7680 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7681 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7682 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7683 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7684 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
7685 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7686 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7687 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7688 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7689 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7690 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
7691 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7692 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7693 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7694 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7695 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7696 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7697 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
7698 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7699 // CHECK8: cond.true:
7700 // CHECK8-NEXT: br label [[COND_END:%.*]]
7701 // CHECK8: cond.false:
7702 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7703 // CHECK8-NEXT: br label [[COND_END]]
7704 // CHECK8: cond.end:
7705 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7706 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7707 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7708 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7709 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7710 // CHECK8: omp.inner.for.cond:
7711 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
7712 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
7713 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7714 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7715 // CHECK8: omp.inner.for.body:
7716 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !30
7717 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
7718 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !30
7719 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7720 // CHECK8: omp.inner.for.inc:
7721 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
7722 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !30
7723 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
7724 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
7725 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
7726 // CHECK8: omp.inner.for.end:
7727 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7728 // CHECK8: omp.loop.exit:
7729 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7730 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7731 // CHECK8-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
7732 // CHECK8-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7733 // CHECK8: .omp.final.then:
7734 // CHECK8-NEXT: store i32 123, i32* [[I]], align 4
7735 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
7736 // CHECK8: .omp.final.done:
7737 // CHECK8-NEXT: ret void
7738 //
7739 //
7740 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..11
7741 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7742 // CHECK8-NEXT: entry:
7743 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7744 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7745 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7746 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7747 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7748 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7749 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
7750 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7751 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7752 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7753 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7754 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
7755 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7756 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7757 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7758 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7759 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7760 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7761 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7762 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
7763 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7764 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7765 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
7766 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
7767 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7768 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7769 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7770 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7771 // CHECK8-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7772 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
7773 // CHECK8-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
7774 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7775 // CHECK8: omp.dispatch.cond:
7776 // CHECK8-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
7777 // CHECK8-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
7778 // CHECK8-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7779 // CHECK8: omp.dispatch.body:
7780 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7781 // CHECK8-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
7782 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7783 // CHECK8: omp.inner.for.cond:
7784 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
7785 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !33
7786 // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
7787 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7788 // CHECK8: omp.inner.for.body:
7789 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
7790 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
7791 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7792 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !33
7793 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
7794 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !33
7795 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
7796 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !33
7797 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7798 // CHECK8: omp.body.continue:
7799 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7800 // CHECK8: omp.inner.for.inc:
7801 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
7802 // CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
7803 // CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
7804 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
7805 // CHECK8: omp.inner.for.end:
7806 // CHECK8-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7807 // CHECK8: omp.dispatch.inc:
7808 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND]]
7809 // CHECK8: omp.dispatch.end:
7810 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7811 // CHECK8-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
7812 // CHECK8-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7813 // CHECK8: .omp.final.then:
7814 // CHECK8-NEXT: store i32 123, i32* [[I]], align 4
7815 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
7816 // CHECK8: .omp.final.done:
7817 // CHECK8-NEXT: ret void
7818 //
7819 //
7820 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l58
7821 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7822 // CHECK8-NEXT: entry:
7823 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7824 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7825 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7826 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
7827 // CHECK8-NEXT: ret void
7828 //
7829 //
7830 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..14
7831 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7832 // CHECK8-NEXT: entry:
7833 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7834 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7835 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7836 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7837 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
7838 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7839 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7840 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7841 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7842 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
7843 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7844 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7845 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7846 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7847 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7848 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
7849 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7850 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7851 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7852 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7853 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7854 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7855 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
7856 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7857 // CHECK8: cond.true:
7858 // CHECK8-NEXT: br label [[COND_END:%.*]]
7859 // CHECK8: cond.false:
7860 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7861 // CHECK8-NEXT: br label [[COND_END]]
7862 // CHECK8: cond.end:
7863 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7864 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7865 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7866 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7867 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7868 // CHECK8: omp.inner.for.cond:
7869 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
7870 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
7871 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7872 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7873 // CHECK8: omp.inner.for.body:
7874 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !36
7875 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
7876 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !36
7877 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7878 // CHECK8: omp.inner.for.inc:
7879 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
7880 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !36
7881 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
7882 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
7883 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
7884 // CHECK8: omp.inner.for.end:
7885 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7886 // CHECK8: omp.loop.exit:
7887 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7888 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7889 // CHECK8-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
7890 // CHECK8-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7891 // CHECK8: .omp.final.then:
7892 // CHECK8-NEXT: store i32 123, i32* [[I]], align 4
7893 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
7894 // CHECK8: .omp.final.done:
7895 // CHECK8-NEXT: ret void
7896 //
7897 //
7898 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..15
7899 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7900 // CHECK8-NEXT: entry:
7901 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7902 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7903 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7904 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7905 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7906 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7907 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
7908 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7909 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7910 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7911 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7912 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
7913 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7914 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7915 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7916 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7917 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7918 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7919 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7920 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
7921 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7922 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7923 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
7924 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
7925 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7926 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7927 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7928 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7929 // CHECK8-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7930 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
7931 // CHECK8-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
7932 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7933 // CHECK8: omp.dispatch.cond:
7934 // CHECK8-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
7935 // CHECK8-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
7936 // CHECK8-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7937 // CHECK8: omp.dispatch.body:
7938 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7939 // CHECK8-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
7940 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7941 // CHECK8: omp.inner.for.cond:
7942 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
7943 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !39
7944 // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
7945 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7946 // CHECK8: omp.inner.for.body:
7947 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
7948 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
7949 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7950 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !39
7951 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
7952 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !39
7953 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
7954 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !39
7955 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7956 // CHECK8: omp.body.continue:
7957 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7958 // CHECK8: omp.inner.for.inc:
7959 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
7960 // CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
7961 // CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
7962 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
7963 // CHECK8: omp.inner.for.end:
7964 // CHECK8-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7965 // CHECK8: omp.dispatch.inc:
7966 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND]]
7967 // CHECK8: omp.dispatch.end:
7968 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7969 // CHECK8-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
7970 // CHECK8-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7971 // CHECK8: .omp.final.then:
7972 // CHECK8-NEXT: store i32 123, i32* [[I]], align 4
7973 // CHECK8-NEXT: br label [[DOTOMP_FINAL_DONE]]
7974 // CHECK8: .omp.final.done:
7975 // CHECK8-NEXT: ret void
7976 //
7977 //
7978 // CHECK8-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
7979 // CHECK8-SAME: () #[[ATTR3:[0-9]+]] {
7980 // CHECK8-NEXT: entry:
7981 // CHECK8-NEXT: call void @__tgt_register_requires(i64 1)
7982 // CHECK8-NEXT: ret void
7983 //
7984 //
7985 // CHECK9-LABEL: define {{[^@]+}}@_Z21teams_template_structv
7986 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
7987 // CHECK9-NEXT: entry:
7988 // CHECK9-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
7989 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
7990 // CHECK9-NEXT: ret i32 [[CALL]]
7991 //
7992 //
7993 // CHECK9-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
7994 // CHECK9-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
7995 // CHECK9-NEXT: entry:
7996 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
7997 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
7998 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7999 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8000 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8001 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
8002 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
8003 // CHECK9-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4
8004 // CHECK9-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4
8005 // CHECK9-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4
8006 // CHECK9-NEXT: [[I7:%.*]] = alloca i32, align 4
8007 // CHECK9-NEXT: [[_TMP20:%.*]] = alloca i32, align 4
8008 // CHECK9-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4
8009 // CHECK9-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4
8010 // CHECK9-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4
8011 // CHECK9-NEXT: [[I24:%.*]] = alloca i32, align 4
8012 // CHECK9-NEXT: [[_TMP37:%.*]] = alloca i32, align 4
8013 // CHECK9-NEXT: [[DOTOMP_LB38:%.*]] = alloca i32, align 4
8014 // CHECK9-NEXT: [[DOTOMP_UB39:%.*]] = alloca i32, align 4
8015 // CHECK9-NEXT: [[DOTOMP_IV40:%.*]] = alloca i32, align 4
8016 // CHECK9-NEXT: [[I41:%.*]] = alloca i32, align 4
8017 // CHECK9-NEXT: [[_TMP54:%.*]] = alloca i32, align 4
8018 // CHECK9-NEXT: [[DOTOMP_LB55:%.*]] = alloca i32, align 4
8019 // CHECK9-NEXT: [[DOTOMP_UB56:%.*]] = alloca i32, align 4
8020 // CHECK9-NEXT: [[DOTOMP_IV57:%.*]] = alloca i32, align 4
8021 // CHECK9-NEXT: [[I58:%.*]] = alloca i32, align 4
8022 // CHECK9-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
8023 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
8024 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8025 // CHECK9-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
8026 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8027 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
8028 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8029 // CHECK9: omp.inner.for.cond:
8030 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
8031 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
8032 // CHECK9-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8033 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8034 // CHECK9: omp.inner.for.body:
8035 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
8036 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8037 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8038 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
8039 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
8040 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
8041 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
8042 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
8043 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
8044 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8045 // CHECK9: omp.body.continue:
8046 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8047 // CHECK9: omp.inner.for.inc:
8048 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
8049 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
8050 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
8051 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
8052 // CHECK9: omp.inner.for.end:
8053 // CHECK9-NEXT: store i32 123, i32* [[I]], align 4
8054 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4
8055 // CHECK9-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4
8056 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
8057 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4
8058 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
8059 // CHECK9: omp.inner.for.cond8:
8060 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
8061 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6
8062 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8063 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]]
8064 // CHECK9: omp.inner.for.body10:
8065 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
8066 // CHECK9-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1
8067 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
8068 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6
8069 // CHECK9-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8070 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !6
8071 // CHECK9-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64
8072 // CHECK9-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i64 0, i64 [[IDXPROM14]]
8073 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX15]], align 4, !llvm.access.group !6
8074 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]]
8075 // CHECK9: omp.body.continue16:
8076 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]]
8077 // CHECK9: omp.inner.for.inc17:
8078 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
8079 // CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1
8080 // CHECK9-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
8081 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]
8082 // CHECK9: omp.inner.for.end19:
8083 // CHECK9-NEXT: store i32 123, i32* [[I7]], align 4
8084 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4
8085 // CHECK9-NEXT: store i32 122, i32* [[DOTOMP_UB22]], align 4
8086 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4
8087 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV23]], align 4
8088 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]]
8089 // CHECK9: omp.inner.for.cond25:
8090 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
8091 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !9
8092 // CHECK9-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
8093 // CHECK9-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]]
8094 // CHECK9: omp.inner.for.body27:
8095 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
8096 // CHECK9-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1
8097 // CHECK9-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]]
8098 // CHECK9-NEXT: store i32 [[ADD29]], i32* [[I24]], align 4, !llvm.access.group !9
8099 // CHECK9-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8100 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I24]], align 4, !llvm.access.group !9
8101 // CHECK9-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64
8102 // CHECK9-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 [[IDXPROM31]]
8103 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4, !llvm.access.group !9
8104 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]]
8105 // CHECK9: omp.body.continue33:
8106 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]]
8107 // CHECK9: omp.inner.for.inc34:
8108 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
8109 // CHECK9-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1
8110 // CHECK9-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
8111 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]]
8112 // CHECK9: omp.inner.for.end36:
8113 // CHECK9-NEXT: store i32 123, i32* [[I24]], align 4
8114 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB38]], align 4
8115 // CHECK9-NEXT: store i32 122, i32* [[DOTOMP_UB39]], align 4
8116 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB38]], align 4
8117 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV40]], align 4
8118 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND42:%.*]]
8119 // CHECK9: omp.inner.for.cond42:
8120 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12
8121 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB39]], align 4, !llvm.access.group !12
8122 // CHECK9-NEXT: [[CMP43:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
8123 // CHECK9-NEXT: br i1 [[CMP43]], label [[OMP_INNER_FOR_BODY44:%.*]], label [[OMP_INNER_FOR_END53:%.*]]
8124 // CHECK9: omp.inner.for.body44:
8125 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12
8126 // CHECK9-NEXT: [[MUL45:%.*]] = mul nsw i32 [[TMP21]], 1
8127 // CHECK9-NEXT: [[ADD46:%.*]] = add nsw i32 0, [[MUL45]]
8128 // CHECK9-NEXT: store i32 [[ADD46]], i32* [[I41]], align 4, !llvm.access.group !12
8129 // CHECK9-NEXT: [[A47:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8130 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[I41]], align 4, !llvm.access.group !12
8131 // CHECK9-NEXT: [[IDXPROM48:%.*]] = sext i32 [[TMP22]] to i64
8132 // CHECK9-NEXT: [[ARRAYIDX49:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A47]], i64 0, i64 [[IDXPROM48]]
8133 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX49]], align 4, !llvm.access.group !12
8134 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE50:%.*]]
8135 // CHECK9: omp.body.continue50:
8136 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC51:%.*]]
8137 // CHECK9: omp.inner.for.inc51:
8138 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12
8139 // CHECK9-NEXT: [[ADD52:%.*]] = add nsw i32 [[TMP23]], 1
8140 // CHECK9-NEXT: store i32 [[ADD52]], i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12
8141 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND42]], !llvm.loop [[LOOP13:![0-9]+]]
8142 // CHECK9: omp.inner.for.end53:
8143 // CHECK9-NEXT: store i32 123, i32* [[I41]], align 4
8144 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB55]], align 4
8145 // CHECK9-NEXT: store i32 122, i32* [[DOTOMP_UB56]], align 4
8146 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_LB55]], align 4
8147 // CHECK9-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV57]], align 4
8148 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND59:%.*]]
8149 // CHECK9: omp.inner.for.cond59:
8150 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15
8151 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_UB56]], align 4, !llvm.access.group !15
8152 // CHECK9-NEXT: [[CMP60:%.*]] = icmp sle i32 [[TMP25]], [[TMP26]]
8153 // CHECK9-NEXT: br i1 [[CMP60]], label [[OMP_INNER_FOR_BODY61:%.*]], label [[OMP_INNER_FOR_END70:%.*]]
8154 // CHECK9: omp.inner.for.body61:
8155 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15
8156 // CHECK9-NEXT: [[MUL62:%.*]] = mul nsw i32 [[TMP27]], 1
8157 // CHECK9-NEXT: [[ADD63:%.*]] = add nsw i32 0, [[MUL62]]
8158 // CHECK9-NEXT: store i32 [[ADD63]], i32* [[I58]], align 4, !llvm.access.group !15
8159 // CHECK9-NEXT: [[A64:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8160 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[I58]], align 4, !llvm.access.group !15
8161 // CHECK9-NEXT: [[IDXPROM65:%.*]] = sext i32 [[TMP28]] to i64
8162 // CHECK9-NEXT: [[ARRAYIDX66:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A64]], i64 0, i64 [[IDXPROM65]]
8163 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX66]], align 4, !llvm.access.group !15
8164 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE67:%.*]]
8165 // CHECK9: omp.body.continue67:
8166 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC68:%.*]]
8167 // CHECK9: omp.inner.for.inc68:
8168 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15
8169 // CHECK9-NEXT: [[ADD69:%.*]] = add nsw i32 [[TMP29]], 1
8170 // CHECK9-NEXT: store i32 [[ADD69]], i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15
8171 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND59]], !llvm.loop [[LOOP16:![0-9]+]]
8172 // CHECK9: omp.inner.for.end70:
8173 // CHECK9-NEXT: store i32 123, i32* [[I58]], align 4
8174 // CHECK9-NEXT: [[A71:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8175 // CHECK9-NEXT: [[ARRAYIDX72:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A71]], i64 0, i64 0
8176 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX72]], align 4
8177 // CHECK9-NEXT: ret i32 [[TMP30]]
8178 //
8179 //
8180 // CHECK10-LABEL: define {{[^@]+}}@_Z21teams_template_structv
8181 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
8182 // CHECK10-NEXT: entry:
8183 // CHECK10-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
8184 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
8185 // CHECK10-NEXT: ret i32 [[CALL]]
8186 //
8187 //
8188 // CHECK10-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
8189 // CHECK10-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
8190 // CHECK10-NEXT: entry:
8191 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
8192 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
8193 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8194 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8195 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8196 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
8197 // CHECK10-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
8198 // CHECK10-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4
8199 // CHECK10-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4
8200 // CHECK10-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4
8201 // CHECK10-NEXT: [[I7:%.*]] = alloca i32, align 4
8202 // CHECK10-NEXT: [[_TMP20:%.*]] = alloca i32, align 4
8203 // CHECK10-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4
8204 // CHECK10-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4
8205 // CHECK10-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4
8206 // CHECK10-NEXT: [[I24:%.*]] = alloca i32, align 4
8207 // CHECK10-NEXT: [[_TMP37:%.*]] = alloca i32, align 4
8208 // CHECK10-NEXT: [[DOTOMP_LB38:%.*]] = alloca i32, align 4
8209 // CHECK10-NEXT: [[DOTOMP_UB39:%.*]] = alloca i32, align 4
8210 // CHECK10-NEXT: [[DOTOMP_IV40:%.*]] = alloca i32, align 4
8211 // CHECK10-NEXT: [[I41:%.*]] = alloca i32, align 4
8212 // CHECK10-NEXT: [[_TMP54:%.*]] = alloca i32, align 4
8213 // CHECK10-NEXT: [[DOTOMP_LB55:%.*]] = alloca i32, align 4
8214 // CHECK10-NEXT: [[DOTOMP_UB56:%.*]] = alloca i32, align 4
8215 // CHECK10-NEXT: [[DOTOMP_IV57:%.*]] = alloca i32, align 4
8216 // CHECK10-NEXT: [[I58:%.*]] = alloca i32, align 4
8217 // CHECK10-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
8218 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
8219 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8220 // CHECK10-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
8221 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8222 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
8223 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8224 // CHECK10: omp.inner.for.cond:
8225 // CHECK10-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
8226 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
8227 // CHECK10-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8228 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8229 // CHECK10: omp.inner.for.body:
8230 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
8231 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8232 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8233 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
8234 // CHECK10-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
8235 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
8236 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
8237 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
8238 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
8239 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8240 // CHECK10: omp.body.continue:
8241 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8242 // CHECK10: omp.inner.for.inc:
8243 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
8244 // CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
8245 // CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
8246 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
8247 // CHECK10: omp.inner.for.end:
8248 // CHECK10-NEXT: store i32 123, i32* [[I]], align 4
8249 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4
8250 // CHECK10-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4
8251 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
8252 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4
8253 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
8254 // CHECK10: omp.inner.for.cond8:
8255 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
8256 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6
8257 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8258 // CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]]
8259 // CHECK10: omp.inner.for.body10:
8260 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
8261 // CHECK10-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1
8262 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
8263 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6
8264 // CHECK10-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8265 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !6
8266 // CHECK10-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64
8267 // CHECK10-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i64 0, i64 [[IDXPROM14]]
8268 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX15]], align 4, !llvm.access.group !6
8269 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]]
8270 // CHECK10: omp.body.continue16:
8271 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]]
8272 // CHECK10: omp.inner.for.inc17:
8273 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
8274 // CHECK10-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1
8275 // CHECK10-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
8276 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]
8277 // CHECK10: omp.inner.for.end19:
8278 // CHECK10-NEXT: store i32 123, i32* [[I7]], align 4
8279 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4
8280 // CHECK10-NEXT: store i32 122, i32* [[DOTOMP_UB22]], align 4
8281 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4
8282 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV23]], align 4
8283 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]]
8284 // CHECK10: omp.inner.for.cond25:
8285 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
8286 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !9
8287 // CHECK10-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
8288 // CHECK10-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]]
8289 // CHECK10: omp.inner.for.body27:
8290 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
8291 // CHECK10-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1
8292 // CHECK10-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]]
8293 // CHECK10-NEXT: store i32 [[ADD29]], i32* [[I24]], align 4, !llvm.access.group !9
8294 // CHECK10-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8295 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[I24]], align 4, !llvm.access.group !9
8296 // CHECK10-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64
8297 // CHECK10-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 [[IDXPROM31]]
8298 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4, !llvm.access.group !9
8299 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]]
8300 // CHECK10: omp.body.continue33:
8301 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]]
8302 // CHECK10: omp.inner.for.inc34:
8303 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
8304 // CHECK10-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1
8305 // CHECK10-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
8306 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]]
8307 // CHECK10: omp.inner.for.end36:
8308 // CHECK10-NEXT: store i32 123, i32* [[I24]], align 4
8309 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB38]], align 4
8310 // CHECK10-NEXT: store i32 122, i32* [[DOTOMP_UB39]], align 4
8311 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB38]], align 4
8312 // CHECK10-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV40]], align 4
8313 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND42:%.*]]
8314 // CHECK10: omp.inner.for.cond42:
8315 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12
8316 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB39]], align 4, !llvm.access.group !12
8317 // CHECK10-NEXT: [[CMP43:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
8318 // CHECK10-NEXT: br i1 [[CMP43]], label [[OMP_INNER_FOR_BODY44:%.*]], label [[OMP_INNER_FOR_END53:%.*]]
8319 // CHECK10: omp.inner.for.body44:
8320 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12
8321 // CHECK10-NEXT: [[MUL45:%.*]] = mul nsw i32 [[TMP21]], 1
8322 // CHECK10-NEXT: [[ADD46:%.*]] = add nsw i32 0, [[MUL45]]
8323 // CHECK10-NEXT: store i32 [[ADD46]], i32* [[I41]], align 4, !llvm.access.group !12
8324 // CHECK10-NEXT: [[A47:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8325 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[I41]], align 4, !llvm.access.group !12
8326 // CHECK10-NEXT: [[IDXPROM48:%.*]] = sext i32 [[TMP22]] to i64
8327 // CHECK10-NEXT: [[ARRAYIDX49:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A47]], i64 0, i64 [[IDXPROM48]]
8328 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX49]], align 4, !llvm.access.group !12
8329 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE50:%.*]]
8330 // CHECK10: omp.body.continue50:
8331 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC51:%.*]]
8332 // CHECK10: omp.inner.for.inc51:
8333 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12
8334 // CHECK10-NEXT: [[ADD52:%.*]] = add nsw i32 [[TMP23]], 1
8335 // CHECK10-NEXT: store i32 [[ADD52]], i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12
8336 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND42]], !llvm.loop [[LOOP13:![0-9]+]]
8337 // CHECK10: omp.inner.for.end53:
8338 // CHECK10-NEXT: store i32 123, i32* [[I41]], align 4
8339 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB55]], align 4
8340 // CHECK10-NEXT: store i32 122, i32* [[DOTOMP_UB56]], align 4
8341 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_LB55]], align 4
8342 // CHECK10-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV57]], align 4
8343 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND59:%.*]]
8344 // CHECK10: omp.inner.for.cond59:
8345 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15
8346 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_UB56]], align 4, !llvm.access.group !15
8347 // CHECK10-NEXT: [[CMP60:%.*]] = icmp sle i32 [[TMP25]], [[TMP26]]
8348 // CHECK10-NEXT: br i1 [[CMP60]], label [[OMP_INNER_FOR_BODY61:%.*]], label [[OMP_INNER_FOR_END70:%.*]]
8349 // CHECK10: omp.inner.for.body61:
8350 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15
8351 // CHECK10-NEXT: [[MUL62:%.*]] = mul nsw i32 [[TMP27]], 1
8352 // CHECK10-NEXT: [[ADD63:%.*]] = add nsw i32 0, [[MUL62]]
8353 // CHECK10-NEXT: store i32 [[ADD63]], i32* [[I58]], align 4, !llvm.access.group !15
8354 // CHECK10-NEXT: [[A64:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8355 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[I58]], align 4, !llvm.access.group !15
8356 // CHECK10-NEXT: [[IDXPROM65:%.*]] = sext i32 [[TMP28]] to i64
8357 // CHECK10-NEXT: [[ARRAYIDX66:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A64]], i64 0, i64 [[IDXPROM65]]
8358 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX66]], align 4, !llvm.access.group !15
8359 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE67:%.*]]
8360 // CHECK10: omp.body.continue67:
8361 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC68:%.*]]
8362 // CHECK10: omp.inner.for.inc68:
8363 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15
8364 // CHECK10-NEXT: [[ADD69:%.*]] = add nsw i32 [[TMP29]], 1
8365 // CHECK10-NEXT: store i32 [[ADD69]], i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15
8366 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND59]], !llvm.loop [[LOOP16:![0-9]+]]
8367 // CHECK10: omp.inner.for.end70:
8368 // CHECK10-NEXT: store i32 123, i32* [[I58]], align 4
8369 // CHECK10-NEXT: [[A71:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8370 // CHECK10-NEXT: [[ARRAYIDX72:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A71]], i64 0, i64 0
8371 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX72]], align 4
8372 // CHECK10-NEXT: ret i32 [[TMP30]]
8373 //
8374 //
8375 // CHECK11-LABEL: define {{[^@]+}}@_Z21teams_template_structv
8376 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
8377 // CHECK11-NEXT: entry:
8378 // CHECK11-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
8379 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
8380 // CHECK11-NEXT: ret i32 [[CALL]]
8381 //
8382 //
8383 // CHECK11-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
8384 // CHECK11-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
8385 // CHECK11-NEXT: entry:
8386 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
8387 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
8388 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8389 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8390 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8391 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
8392 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
8393 // CHECK11-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4
8394 // CHECK11-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4
8395 // CHECK11-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4
8396 // CHECK11-NEXT: [[I7:%.*]] = alloca i32, align 4
8397 // CHECK11-NEXT: [[_TMP19:%.*]] = alloca i32, align 4
8398 // CHECK11-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 4
8399 // CHECK11-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 4
8400 // CHECK11-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 4
8401 // CHECK11-NEXT: [[I23:%.*]] = alloca i32, align 4
8402 // CHECK11-NEXT: [[_TMP35:%.*]] = alloca i32, align 4
8403 // CHECK11-NEXT: [[DOTOMP_LB36:%.*]] = alloca i32, align 4
8404 // CHECK11-NEXT: [[DOTOMP_UB37:%.*]] = alloca i32, align 4
8405 // CHECK11-NEXT: [[DOTOMP_IV38:%.*]] = alloca i32, align 4
8406 // CHECK11-NEXT: [[I39:%.*]] = alloca i32, align 4
8407 // CHECK11-NEXT: [[_TMP51:%.*]] = alloca i32, align 4
8408 // CHECK11-NEXT: [[DOTOMP_LB52:%.*]] = alloca i32, align 4
8409 // CHECK11-NEXT: [[DOTOMP_UB53:%.*]] = alloca i32, align 4
8410 // CHECK11-NEXT: [[DOTOMP_IV54:%.*]] = alloca i32, align 4
8411 // CHECK11-NEXT: [[I55:%.*]] = alloca i32, align 4
8412 // CHECK11-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
8413 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
8414 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8415 // CHECK11-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
8416 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8417 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
8418 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8419 // CHECK11: omp.inner.for.cond:
8420 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
8421 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
8422 // CHECK11-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8423 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8424 // CHECK11: omp.inner.for.body:
8425 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
8426 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8427 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8428 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
8429 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
8430 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
8431 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP4]]
8432 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
8433 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8434 // CHECK11: omp.body.continue:
8435 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8436 // CHECK11: omp.inner.for.inc:
8437 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
8438 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
8439 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
8440 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
8441 // CHECK11: omp.inner.for.end:
8442 // CHECK11-NEXT: store i32 123, i32* [[I]], align 4
8443 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4
8444 // CHECK11-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4
8445 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
8446 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4
8447 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
8448 // CHECK11: omp.inner.for.cond8:
8449 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
8450 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !7
8451 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8452 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
8453 // CHECK11: omp.inner.for.body10:
8454 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
8455 // CHECK11-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1
8456 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
8457 // CHECK11-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !7
8458 // CHECK11-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8459 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !7
8460 // CHECK11-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i32 0, i32 [[TMP10]]
8461 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4, !llvm.access.group !7
8462 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
8463 // CHECK11: omp.body.continue15:
8464 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
8465 // CHECK11: omp.inner.for.inc16:
8466 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
8467 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1
8468 // CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
8469 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]]
8470 // CHECK11: omp.inner.for.end18:
8471 // CHECK11-NEXT: store i32 123, i32* [[I7]], align 4
8472 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB20]], align 4
8473 // CHECK11-NEXT: store i32 122, i32* [[DOTOMP_UB21]], align 4
8474 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB20]], align 4
8475 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV22]], align 4
8476 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]]
8477 // CHECK11: omp.inner.for.cond24:
8478 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
8479 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB21]], align 4, !llvm.access.group !10
8480 // CHECK11-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
8481 // CHECK11-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]]
8482 // CHECK11: omp.inner.for.body26:
8483 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
8484 // CHECK11-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1
8485 // CHECK11-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]]
8486 // CHECK11-NEXT: store i32 [[ADD28]], i32* [[I23]], align 4, !llvm.access.group !10
8487 // CHECK11-NEXT: [[A29:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8488 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I23]], align 4, !llvm.access.group !10
8489 // CHECK11-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A29]], i32 0, i32 [[TMP16]]
8490 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX30]], align 4, !llvm.access.group !10
8491 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]]
8492 // CHECK11: omp.body.continue31:
8493 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]]
8494 // CHECK11: omp.inner.for.inc32:
8495 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
8496 // CHECK11-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1
8497 // CHECK11-NEXT: store i32 [[ADD33]], i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
8498 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]]
8499 // CHECK11: omp.inner.for.end34:
8500 // CHECK11-NEXT: store i32 123, i32* [[I23]], align 4
8501 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB36]], align 4
8502 // CHECK11-NEXT: store i32 122, i32* [[DOTOMP_UB37]], align 4
8503 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB36]], align 4
8504 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV38]], align 4
8505 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND40:%.*]]
8506 // CHECK11: omp.inner.for.cond40:
8507 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13
8508 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB37]], align 4, !llvm.access.group !13
8509 // CHECK11-NEXT: [[CMP41:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
8510 // CHECK11-NEXT: br i1 [[CMP41]], label [[OMP_INNER_FOR_BODY42:%.*]], label [[OMP_INNER_FOR_END50:%.*]]
8511 // CHECK11: omp.inner.for.body42:
8512 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13
8513 // CHECK11-NEXT: [[MUL43:%.*]] = mul nsw i32 [[TMP21]], 1
8514 // CHECK11-NEXT: [[ADD44:%.*]] = add nsw i32 0, [[MUL43]]
8515 // CHECK11-NEXT: store i32 [[ADD44]], i32* [[I39]], align 4, !llvm.access.group !13
8516 // CHECK11-NEXT: [[A45:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8517 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[I39]], align 4, !llvm.access.group !13
8518 // CHECK11-NEXT: [[ARRAYIDX46:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A45]], i32 0, i32 [[TMP22]]
8519 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX46]], align 4, !llvm.access.group !13
8520 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE47:%.*]]
8521 // CHECK11: omp.body.continue47:
8522 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC48:%.*]]
8523 // CHECK11: omp.inner.for.inc48:
8524 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13
8525 // CHECK11-NEXT: [[ADD49:%.*]] = add nsw i32 [[TMP23]], 1
8526 // CHECK11-NEXT: store i32 [[ADD49]], i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13
8527 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND40]], !llvm.loop [[LOOP14:![0-9]+]]
8528 // CHECK11: omp.inner.for.end50:
8529 // CHECK11-NEXT: store i32 123, i32* [[I39]], align 4
8530 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB52]], align 4
8531 // CHECK11-NEXT: store i32 122, i32* [[DOTOMP_UB53]], align 4
8532 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_LB52]], align 4
8533 // CHECK11-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV54]], align 4
8534 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND56:%.*]]
8535 // CHECK11: omp.inner.for.cond56:
8536 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16
8537 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_UB53]], align 4, !llvm.access.group !16
8538 // CHECK11-NEXT: [[CMP57:%.*]] = icmp sle i32 [[TMP25]], [[TMP26]]
8539 // CHECK11-NEXT: br i1 [[CMP57]], label [[OMP_INNER_FOR_BODY58:%.*]], label [[OMP_INNER_FOR_END66:%.*]]
8540 // CHECK11: omp.inner.for.body58:
8541 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16
8542 // CHECK11-NEXT: [[MUL59:%.*]] = mul nsw i32 [[TMP27]], 1
8543 // CHECK11-NEXT: [[ADD60:%.*]] = add nsw i32 0, [[MUL59]]
8544 // CHECK11-NEXT: store i32 [[ADD60]], i32* [[I55]], align 4, !llvm.access.group !16
8545 // CHECK11-NEXT: [[A61:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8546 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[I55]], align 4, !llvm.access.group !16
8547 // CHECK11-NEXT: [[ARRAYIDX62:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A61]], i32 0, i32 [[TMP28]]
8548 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX62]], align 4, !llvm.access.group !16
8549 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE63:%.*]]
8550 // CHECK11: omp.body.continue63:
8551 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC64:%.*]]
8552 // CHECK11: omp.inner.for.inc64:
8553 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16
8554 // CHECK11-NEXT: [[ADD65:%.*]] = add nsw i32 [[TMP29]], 1
8555 // CHECK11-NEXT: store i32 [[ADD65]], i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16
8556 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND56]], !llvm.loop [[LOOP17:![0-9]+]]
8557 // CHECK11: omp.inner.for.end66:
8558 // CHECK11-NEXT: store i32 123, i32* [[I55]], align 4
8559 // CHECK11-NEXT: [[A67:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8560 // CHECK11-NEXT: [[ARRAYIDX68:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A67]], i32 0, i32 0
8561 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX68]], align 4
8562 // CHECK11-NEXT: ret i32 [[TMP30]]
8563 //
8564 //
8565 // CHECK12-LABEL: define {{[^@]+}}@_Z21teams_template_structv
8566 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] {
8567 // CHECK12-NEXT: entry:
8568 // CHECK12-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
8569 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
8570 // CHECK12-NEXT: ret i32 [[CALL]]
8571 //
8572 //
8573 // CHECK12-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
8574 // CHECK12-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
8575 // CHECK12-NEXT: entry:
8576 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
8577 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
8578 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8579 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8580 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8581 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
8582 // CHECK12-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
8583 // CHECK12-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4
8584 // CHECK12-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4
8585 // CHECK12-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4
8586 // CHECK12-NEXT: [[I7:%.*]] = alloca i32, align 4
8587 // CHECK12-NEXT: [[_TMP19:%.*]] = alloca i32, align 4
8588 // CHECK12-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 4
8589 // CHECK12-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 4
8590 // CHECK12-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 4
8591 // CHECK12-NEXT: [[I23:%.*]] = alloca i32, align 4
8592 // CHECK12-NEXT: [[_TMP35:%.*]] = alloca i32, align 4
8593 // CHECK12-NEXT: [[DOTOMP_LB36:%.*]] = alloca i32, align 4
8594 // CHECK12-NEXT: [[DOTOMP_UB37:%.*]] = alloca i32, align 4
8595 // CHECK12-NEXT: [[DOTOMP_IV38:%.*]] = alloca i32, align 4
8596 // CHECK12-NEXT: [[I39:%.*]] = alloca i32, align 4
8597 // CHECK12-NEXT: [[_TMP51:%.*]] = alloca i32, align 4
8598 // CHECK12-NEXT: [[DOTOMP_LB52:%.*]] = alloca i32, align 4
8599 // CHECK12-NEXT: [[DOTOMP_UB53:%.*]] = alloca i32, align 4
8600 // CHECK12-NEXT: [[DOTOMP_IV54:%.*]] = alloca i32, align 4
8601 // CHECK12-NEXT: [[I55:%.*]] = alloca i32, align 4
8602 // CHECK12-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
8603 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
8604 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8605 // CHECK12-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
8606 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8607 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
8608 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8609 // CHECK12: omp.inner.for.cond:
8610 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
8611 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
8612 // CHECK12-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8613 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8614 // CHECK12: omp.inner.for.body:
8615 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
8616 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8617 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8618 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
8619 // CHECK12-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
8620 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
8621 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP4]]
8622 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
8623 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8624 // CHECK12: omp.body.continue:
8625 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8626 // CHECK12: omp.inner.for.inc:
8627 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
8628 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
8629 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
8630 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
8631 // CHECK12: omp.inner.for.end:
8632 // CHECK12-NEXT: store i32 123, i32* [[I]], align 4
8633 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4
8634 // CHECK12-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4
8635 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
8636 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4
8637 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
8638 // CHECK12: omp.inner.for.cond8:
8639 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
8640 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !7
8641 // CHECK12-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
8642 // CHECK12-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
8643 // CHECK12: omp.inner.for.body10:
8644 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
8645 // CHECK12-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1
8646 // CHECK12-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
8647 // CHECK12-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !7
8648 // CHECK12-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8649 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !7
8650 // CHECK12-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i32 0, i32 [[TMP10]]
8651 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4, !llvm.access.group !7
8652 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
8653 // CHECK12: omp.body.continue15:
8654 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
8655 // CHECK12: omp.inner.for.inc16:
8656 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
8657 // CHECK12-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1
8658 // CHECK12-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
8659 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]]
8660 // CHECK12: omp.inner.for.end18:
8661 // CHECK12-NEXT: store i32 123, i32* [[I7]], align 4
8662 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB20]], align 4
8663 // CHECK12-NEXT: store i32 122, i32* [[DOTOMP_UB21]], align 4
8664 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB20]], align 4
8665 // CHECK12-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV22]], align 4
8666 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]]
8667 // CHECK12: omp.inner.for.cond24:
8668 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
8669 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB21]], align 4, !llvm.access.group !10
8670 // CHECK12-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
8671 // CHECK12-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]]
8672 // CHECK12: omp.inner.for.body26:
8673 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
8674 // CHECK12-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1
8675 // CHECK12-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]]
8676 // CHECK12-NEXT: store i32 [[ADD28]], i32* [[I23]], align 4, !llvm.access.group !10
8677 // CHECK12-NEXT: [[A29:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8678 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I23]], align 4, !llvm.access.group !10
8679 // CHECK12-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A29]], i32 0, i32 [[TMP16]]
8680 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX30]], align 4, !llvm.access.group !10
8681 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]]
8682 // CHECK12: omp.body.continue31:
8683 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]]
8684 // CHECK12: omp.inner.for.inc32:
8685 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
8686 // CHECK12-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1
8687 // CHECK12-NEXT: store i32 [[ADD33]], i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
8688 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]]
8689 // CHECK12: omp.inner.for.end34:
8690 // CHECK12-NEXT: store i32 123, i32* [[I23]], align 4
8691 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB36]], align 4
8692 // CHECK12-NEXT: store i32 122, i32* [[DOTOMP_UB37]], align 4
8693 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB36]], align 4
8694 // CHECK12-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV38]], align 4
8695 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND40:%.*]]
8696 // CHECK12: omp.inner.for.cond40:
8697 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13
8698 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB37]], align 4, !llvm.access.group !13
8699 // CHECK12-NEXT: [[CMP41:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
8700 // CHECK12-NEXT: br i1 [[CMP41]], label [[OMP_INNER_FOR_BODY42:%.*]], label [[OMP_INNER_FOR_END50:%.*]]
8701 // CHECK12: omp.inner.for.body42:
8702 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13
8703 // CHECK12-NEXT: [[MUL43:%.*]] = mul nsw i32 [[TMP21]], 1
8704 // CHECK12-NEXT: [[ADD44:%.*]] = add nsw i32 0, [[MUL43]]
8705 // CHECK12-NEXT: store i32 [[ADD44]], i32* [[I39]], align 4, !llvm.access.group !13
8706 // CHECK12-NEXT: [[A45:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8707 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[I39]], align 4, !llvm.access.group !13
8708 // CHECK12-NEXT: [[ARRAYIDX46:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A45]], i32 0, i32 [[TMP22]]
8709 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX46]], align 4, !llvm.access.group !13
8710 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE47:%.*]]
8711 // CHECK12: omp.body.continue47:
8712 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC48:%.*]]
8713 // CHECK12: omp.inner.for.inc48:
8714 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13
8715 // CHECK12-NEXT: [[ADD49:%.*]] = add nsw i32 [[TMP23]], 1
8716 // CHECK12-NEXT: store i32 [[ADD49]], i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13
8717 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND40]], !llvm.loop [[LOOP14:![0-9]+]]
8718 // CHECK12: omp.inner.for.end50:
8719 // CHECK12-NEXT: store i32 123, i32* [[I39]], align 4
8720 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB52]], align 4
8721 // CHECK12-NEXT: store i32 122, i32* [[DOTOMP_UB53]], align 4
8722 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_LB52]], align 4
8723 // CHECK12-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV54]], align 4
8724 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND56:%.*]]
8725 // CHECK12: omp.inner.for.cond56:
8726 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16
8727 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_UB53]], align 4, !llvm.access.group !16
8728 // CHECK12-NEXT: [[CMP57:%.*]] = icmp sle i32 [[TMP25]], [[TMP26]]
8729 // CHECK12-NEXT: br i1 [[CMP57]], label [[OMP_INNER_FOR_BODY58:%.*]], label [[OMP_INNER_FOR_END66:%.*]]
8730 // CHECK12: omp.inner.for.body58:
8731 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16
8732 // CHECK12-NEXT: [[MUL59:%.*]] = mul nsw i32 [[TMP27]], 1
8733 // CHECK12-NEXT: [[ADD60:%.*]] = add nsw i32 0, [[MUL59]]
8734 // CHECK12-NEXT: store i32 [[ADD60]], i32* [[I55]], align 4, !llvm.access.group !16
8735 // CHECK12-NEXT: [[A61:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8736 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[I55]], align 4, !llvm.access.group !16
8737 // CHECK12-NEXT: [[ARRAYIDX62:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A61]], i32 0, i32 [[TMP28]]
8738 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX62]], align 4, !llvm.access.group !16
8739 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE63:%.*]]
8740 // CHECK12: omp.body.continue63:
8741 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC64:%.*]]
8742 // CHECK12: omp.inner.for.inc64:
8743 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16
8744 // CHECK12-NEXT: [[ADD65:%.*]] = add nsw i32 [[TMP29]], 1
8745 // CHECK12-NEXT: store i32 [[ADD65]], i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16
8746 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND56]], !llvm.loop [[LOOP17:![0-9]+]]
8747 // CHECK12: omp.inner.for.end66:
8748 // CHECK12-NEXT: store i32 123, i32* [[I55]], align 4
8749 // CHECK12-NEXT: [[A67:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
8750 // CHECK12-NEXT: [[ARRAYIDX68:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A67]], i32 0, i32 0
8751 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX68]], align 4
8752 // CHECK12-NEXT: ret i32 [[TMP30]]
8753 //
8754 //
8755 // CHECK13-LABEL: define {{[^@]+}}@main
8756 // CHECK13-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
8757 // CHECK13-NEXT: entry:
8758 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
8759 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8760 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
8761 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4
8762 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
8763 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
8764 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4
8765 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
8766 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
8767 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
8768 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
8769 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
8770 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
8771 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8772 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8773 // CHECK13-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
8774 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
8775 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
8776 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
8777 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
8778 // CHECK13-NEXT: [[_TMP9:%.*]] = alloca i32, align 4
8779 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
8780 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
8781 // CHECK13-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
8782 // CHECK13-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8
8783 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8
8784 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8
8785 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8
8786 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8
8787 // CHECK13-NEXT: [[_TMP25:%.*]] = alloca i32, align 4
8788 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
8789 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
8790 // CHECK13-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8
8791 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8
8792 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8
8793 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8
8794 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8
8795 // CHECK13-NEXT: [[_TMP40:%.*]] = alloca i32, align 4
8796 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
8797 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
8798 // CHECK13-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8
8799 // CHECK13-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8
8800 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8
8801 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8
8802 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8
8803 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8
8804 // CHECK13-NEXT: [[_TMP57:%.*]] = alloca i32, align 4
8805 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
8806 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4
8807 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
8808 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8809 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
8810 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4
8811 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
8812 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
8813 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
8814 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
8815 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
8816 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
8817 // CHECK13-NEXT: store i32 10, i32* [[M]], align 4
8818 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
8819 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
8820 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
8821 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
8822 // CHECK13-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
8823 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8824 // CHECK13-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
8825 // CHECK13-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
8826 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8827 // CHECK13-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
8828 // CHECK13-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
8829 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
8830 // CHECK13-NEXT: store i64 4, i64* [[TMP10]], align 8
8831 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
8832 // CHECK13-NEXT: store i8* null, i8** [[TMP11]], align 8
8833 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
8834 // CHECK13-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
8835 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
8836 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
8837 // CHECK13-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
8838 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
8839 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
8840 // CHECK13-NEXT: store i64 8, i64* [[TMP16]], align 8
8841 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
8842 // CHECK13-NEXT: store i8* null, i8** [[TMP17]], align 8
8843 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
8844 // CHECK13-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
8845 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8
8846 // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
8847 // CHECK13-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
8848 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8
8849 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
8850 // CHECK13-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8
8851 // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
8852 // CHECK13-NEXT: store i8* null, i8** [[TMP23]], align 8
8853 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8854 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8855 // CHECK13-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
8856 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
8857 // CHECK13-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
8858 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8859 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
8860 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8861 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8862 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8863 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8864 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
8865 // CHECK13-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
8866 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
8867 // CHECK13-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
8868 // CHECK13-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
8869 // CHECK13-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8870 // CHECK13: omp_offload.failed:
8871 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
8872 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
8873 // CHECK13: omp_offload.cont:
8874 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4
8875 // CHECK13-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
8876 // CHECK13-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4
8877 // CHECK13-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
8878 // CHECK13-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
8879 // CHECK13-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
8880 // CHECK13-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
8881 // CHECK13-NEXT: store i64 [[TMP34]], i64* [[TMP37]], align 8
8882 // CHECK13-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
8883 // CHECK13-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
8884 // CHECK13-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8
8885 // CHECK13-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
8886 // CHECK13-NEXT: store i64 4, i64* [[TMP40]], align 8
8887 // CHECK13-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
8888 // CHECK13-NEXT: store i8* null, i8** [[TMP41]], align 8
8889 // CHECK13-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
8890 // CHECK13-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
8891 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP43]], align 8
8892 // CHECK13-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
8893 // CHECK13-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
8894 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP45]], align 8
8895 // CHECK13-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
8896 // CHECK13-NEXT: store i64 8, i64* [[TMP46]], align 8
8897 // CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
8898 // CHECK13-NEXT: store i8* null, i8** [[TMP47]], align 8
8899 // CHECK13-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
8900 // CHECK13-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
8901 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8
8902 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
8903 // CHECK13-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
8904 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP51]], align 8
8905 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
8906 // CHECK13-NEXT: store i64 [[TMP35]], i64* [[TMP52]], align 8
8907 // CHECK13-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
8908 // CHECK13-NEXT: store i8* null, i8** [[TMP53]], align 8
8909 // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
8910 // CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
8911 // CHECK13-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
8912 // CHECK13-NEXT: [[TMP57:%.*]] = load i32, i32* [[N]], align 4
8913 // CHECK13-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
8914 // CHECK13-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
8915 // CHECK13-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
8916 // CHECK13-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
8917 // CHECK13-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
8918 // CHECK13-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
8919 // CHECK13-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
8920 // CHECK13-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
8921 // CHECK13-NEXT: [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
8922 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
8923 // CHECK13-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
8924 // CHECK13-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
8925 // CHECK13-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
8926 // CHECK13: omp_offload.failed16:
8927 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
8928 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT17]]
8929 // CHECK13: omp_offload.cont17:
8930 // CHECK13-NEXT: [[TMP63:%.*]] = load i32, i32* [[M]], align 4
8931 // CHECK13-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
8932 // CHECK13-NEXT: store i32 [[TMP63]], i32* [[CONV18]], align 4
8933 // CHECK13-NEXT: [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8
8934 // CHECK13-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4
8935 // CHECK13-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
8936 // CHECK13-NEXT: store i32 [[TMP65]], i32* [[CONV20]], align 4
8937 // CHECK13-NEXT: [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8
8938 // CHECK13-NEXT: [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4
8939 // CHECK13-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
8940 // CHECK13-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64*
8941 // CHECK13-NEXT: store i64 [[TMP64]], i64* [[TMP69]], align 8
8942 // CHECK13-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
8943 // CHECK13-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64*
8944 // CHECK13-NEXT: store i64 [[TMP64]], i64* [[TMP71]], align 8
8945 // CHECK13-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
8946 // CHECK13-NEXT: store i64 4, i64* [[TMP72]], align 8
8947 // CHECK13-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
8948 // CHECK13-NEXT: store i8* null, i8** [[TMP73]], align 8
8949 // CHECK13-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
8950 // CHECK13-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64*
8951 // CHECK13-NEXT: store i64 [[TMP66]], i64* [[TMP75]], align 8
8952 // CHECK13-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
8953 // CHECK13-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64*
8954 // CHECK13-NEXT: store i64 [[TMP66]], i64* [[TMP77]], align 8
8955 // CHECK13-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1
8956 // CHECK13-NEXT: store i64 4, i64* [[TMP78]], align 8
8957 // CHECK13-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
8958 // CHECK13-NEXT: store i8* null, i8** [[TMP79]], align 8
8959 // CHECK13-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2
8960 // CHECK13-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64*
8961 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP81]], align 8
8962 // CHECK13-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2
8963 // CHECK13-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64*
8964 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP83]], align 8
8965 // CHECK13-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2
8966 // CHECK13-NEXT: store i64 8, i64* [[TMP84]], align 8
8967 // CHECK13-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2
8968 // CHECK13-NEXT: store i8* null, i8** [[TMP85]], align 8
8969 // CHECK13-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3
8970 // CHECK13-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32**
8971 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 8
8972 // CHECK13-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3
8973 // CHECK13-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
8974 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 8
8975 // CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3
8976 // CHECK13-NEXT: store i64 [[TMP67]], i64* [[TMP90]], align 8
8977 // CHECK13-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3
8978 // CHECK13-NEXT: store i8* null, i8** [[TMP91]], align 8
8979 // CHECK13-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
8980 // CHECK13-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
8981 // CHECK13-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
8982 // CHECK13-NEXT: [[TMP95:%.*]] = load i32, i32* [[N]], align 4
8983 // CHECK13-NEXT: store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4
8984 // CHECK13-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
8985 // CHECK13-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0
8986 // CHECK13-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1
8987 // CHECK13-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1
8988 // CHECK13-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4
8989 // CHECK13-NEXT: [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
8990 // CHECK13-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1
8991 // CHECK13-NEXT: [[TMP98:%.*]] = zext i32 [[ADD31]] to i64
8992 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]])
8993 // CHECK13-NEXT: [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
8994 // CHECK13-NEXT: [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0
8995 // CHECK13-NEXT: br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
8996 // CHECK13: omp_offload.failed32:
8997 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
8998 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT33]]
8999 // CHECK13: omp_offload.cont33:
9000 // CHECK13-NEXT: [[TMP101:%.*]] = load i32, i32* [[N]], align 4
9001 // CHECK13-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32*
9002 // CHECK13-NEXT: store i32 [[TMP101]], i32* [[CONV35]], align 4
9003 // CHECK13-NEXT: [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8
9004 // CHECK13-NEXT: [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4
9005 // CHECK13-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
9006 // CHECK13-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
9007 // CHECK13-NEXT: store i64 [[TMP102]], i64* [[TMP105]], align 8
9008 // CHECK13-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
9009 // CHECK13-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64*
9010 // CHECK13-NEXT: store i64 [[TMP102]], i64* [[TMP107]], align 8
9011 // CHECK13-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
9012 // CHECK13-NEXT: store i64 4, i64* [[TMP108]], align 8
9013 // CHECK13-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0
9014 // CHECK13-NEXT: store i8* null, i8** [[TMP109]], align 8
9015 // CHECK13-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1
9016 // CHECK13-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64*
9017 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP111]], align 8
9018 // CHECK13-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1
9019 // CHECK13-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64*
9020 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP113]], align 8
9021 // CHECK13-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1
9022 // CHECK13-NEXT: store i64 8, i64* [[TMP114]], align 8
9023 // CHECK13-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1
9024 // CHECK13-NEXT: store i8* null, i8** [[TMP115]], align 8
9025 // CHECK13-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2
9026 // CHECK13-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32**
9027 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 8
9028 // CHECK13-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2
9029 // CHECK13-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32**
9030 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP119]], align 8
9031 // CHECK13-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2
9032 // CHECK13-NEXT: store i64 [[TMP103]], i64* [[TMP120]], align 8
9033 // CHECK13-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2
9034 // CHECK13-NEXT: store i8* null, i8** [[TMP121]], align 8
9035 // CHECK13-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
9036 // CHECK13-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
9037 // CHECK13-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
9038 // CHECK13-NEXT: [[TMP125:%.*]] = load i32, i32* [[N]], align 4
9039 // CHECK13-NEXT: store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4
9040 // CHECK13-NEXT: [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
9041 // CHECK13-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0
9042 // CHECK13-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
9043 // CHECK13-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
9044 // CHECK13-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
9045 // CHECK13-NEXT: [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
9046 // CHECK13-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1
9047 // CHECK13-NEXT: [[TMP128:%.*]] = zext i32 [[ADD46]] to i64
9048 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]])
9049 // CHECK13-NEXT: [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
9050 // CHECK13-NEXT: [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0
9051 // CHECK13-NEXT: br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
9052 // CHECK13: omp_offload.failed47:
9053 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
9054 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT48]]
9055 // CHECK13: omp_offload.cont48:
9056 // CHECK13-NEXT: [[TMP131:%.*]] = load i32, i32* [[M]], align 4
9057 // CHECK13-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32*
9058 // CHECK13-NEXT: store i32 [[TMP131]], i32* [[CONV50]], align 4
9059 // CHECK13-NEXT: [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8
9060 // CHECK13-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4
9061 // CHECK13-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32*
9062 // CHECK13-NEXT: store i32 [[TMP133]], i32* [[CONV52]], align 4
9063 // CHECK13-NEXT: [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8
9064 // CHECK13-NEXT: [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4
9065 // CHECK13-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
9066 // CHECK13-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
9067 // CHECK13-NEXT: store i64 [[TMP132]], i64* [[TMP137]], align 8
9068 // CHECK13-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
9069 // CHECK13-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64*
9070 // CHECK13-NEXT: store i64 [[TMP132]], i64* [[TMP139]], align 8
9071 // CHECK13-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
9072 // CHECK13-NEXT: store i64 4, i64* [[TMP140]], align 8
9073 // CHECK13-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0
9074 // CHECK13-NEXT: store i8* null, i8** [[TMP141]], align 8
9075 // CHECK13-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1
9076 // CHECK13-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64*
9077 // CHECK13-NEXT: store i64 [[TMP134]], i64* [[TMP143]], align 8
9078 // CHECK13-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1
9079 // CHECK13-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64*
9080 // CHECK13-NEXT: store i64 [[TMP134]], i64* [[TMP145]], align 8
9081 // CHECK13-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1
9082 // CHECK13-NEXT: store i64 4, i64* [[TMP146]], align 8
9083 // CHECK13-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1
9084 // CHECK13-NEXT: store i8* null, i8** [[TMP147]], align 8
9085 // CHECK13-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2
9086 // CHECK13-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64*
9087 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP149]], align 8
9088 // CHECK13-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2
9089 // CHECK13-NEXT: [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64*
9090 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP151]], align 8
9091 // CHECK13-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2
9092 // CHECK13-NEXT: store i64 8, i64* [[TMP152]], align 8
9093 // CHECK13-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2
9094 // CHECK13-NEXT: store i8* null, i8** [[TMP153]], align 8
9095 // CHECK13-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3
9096 // CHECK13-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32**
9097 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP155]], align 8
9098 // CHECK13-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3
9099 // CHECK13-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32**
9100 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP157]], align 8
9101 // CHECK13-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3
9102 // CHECK13-NEXT: store i64 [[TMP135]], i64* [[TMP158]], align 8
9103 // CHECK13-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3
9104 // CHECK13-NEXT: store i8* null, i8** [[TMP159]], align 8
9105 // CHECK13-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
9106 // CHECK13-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
9107 // CHECK13-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
9108 // CHECK13-NEXT: [[TMP163:%.*]] = load i32, i32* [[N]], align 4
9109 // CHECK13-NEXT: store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4
9110 // CHECK13-NEXT: [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4
9111 // CHECK13-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0
9112 // CHECK13-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1
9113 // CHECK13-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1
9114 // CHECK13-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4
9115 // CHECK13-NEXT: [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4
9116 // CHECK13-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1
9117 // CHECK13-NEXT: [[TMP166:%.*]] = zext i32 [[ADD63]] to i64
9118 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]])
9119 // CHECK13-NEXT: [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
9120 // CHECK13-NEXT: [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0
9121 // CHECK13-NEXT: br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
9122 // CHECK13: omp_offload.failed64:
9123 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
9124 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT65]]
9125 // CHECK13: omp_offload.cont65:
9126 // CHECK13-NEXT: [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
9127 // CHECK13-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]])
9128 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
9129 // CHECK13-NEXT: [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
9130 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP170]])
9131 // CHECK13-NEXT: [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4
9132 // CHECK13-NEXT: ret i32 [[TMP171]]
9133 //
9134 //
9135 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154
9136 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
9137 // CHECK13-NEXT: entry:
9138 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
9139 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
9140 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
9141 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
9142 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9143 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
9144 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
9145 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9146 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9147 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
9148 // CHECK13-NEXT: ret void
9149 //
9150 //
9151 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined.
9152 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
9153 // CHECK13-NEXT: entry:
9154 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9155 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9156 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
9157 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
9158 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
9159 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9160 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
9161 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9162 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9163 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
9164 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9165 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9166 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9167 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9168 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
9169 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9170 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9171 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
9172 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9173 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
9174 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
9175 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9176 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9177 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
9178 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
9179 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9180 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
9181 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9182 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9183 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9184 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
9185 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9186 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9187 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9188 // CHECK13: omp.precond.then:
9189 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9190 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9191 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
9192 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9193 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9194 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9195 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
9196 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9197 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9198 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9199 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
9200 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9201 // CHECK13: cond.true:
9202 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9203 // CHECK13-NEXT: br label [[COND_END:%.*]]
9204 // CHECK13: cond.false:
9205 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9206 // CHECK13-NEXT: br label [[COND_END]]
9207 // CHECK13: cond.end:
9208 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
9209 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9210 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9211 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
9212 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9213 // CHECK13: omp.inner.for.cond:
9214 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
9215 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
9216 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
9217 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9218 // CHECK13: omp.inner.for.body:
9219 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13
9220 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
9221 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
9222 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
9223 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !13
9224 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9225 // CHECK13: omp.inner.for.inc:
9226 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
9227 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13
9228 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
9229 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
9230 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
9231 // CHECK13: omp.inner.for.end:
9232 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9233 // CHECK13: omp.loop.exit:
9234 // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9235 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
9236 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
9237 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9238 // CHECK13-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
9239 // CHECK13-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9240 // CHECK13: .omp.final.then:
9241 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9242 // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0
9243 // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
9244 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
9245 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
9246 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
9247 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
9248 // CHECK13: .omp.final.done:
9249 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
9250 // CHECK13: omp.precond.end:
9251 // CHECK13-NEXT: ret void
9252 //
9253 //
9254 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1
9255 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
9256 // CHECK13-NEXT: entry:
9257 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9258 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9259 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9260 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9261 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
9262 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
9263 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
9264 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9265 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
9266 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9267 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9268 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
9269 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9270 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9271 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9272 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9273 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4
9274 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9275 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9276 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9277 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9278 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
9279 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9280 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
9281 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
9282 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9283 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9284 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
9285 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
9286 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9287 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
9288 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9289 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9290 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9291 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
9292 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9293 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9294 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9295 // CHECK13: omp.precond.then:
9296 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9297 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9298 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
9299 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9300 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
9301 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9302 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
9303 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9304 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
9305 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9306 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9307 // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9308 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
9309 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9310 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9311 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9312 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
9313 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9314 // CHECK13: cond.true:
9315 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9316 // CHECK13-NEXT: br label [[COND_END:%.*]]
9317 // CHECK13: cond.false:
9318 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9319 // CHECK13-NEXT: br label [[COND_END]]
9320 // CHECK13: cond.end:
9321 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
9322 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9323 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9324 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
9325 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9326 // CHECK13: omp.inner.for.cond:
9327 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
9328 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
9329 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
9330 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9331 // CHECK13: omp.inner.for.body:
9332 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
9333 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
9334 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9335 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !17
9336 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !17
9337 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
9338 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
9339 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17
9340 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9341 // CHECK13: omp.body.continue:
9342 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9343 // CHECK13: omp.inner.for.inc:
9344 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
9345 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
9346 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
9347 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
9348 // CHECK13: omp.inner.for.end:
9349 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9350 // CHECK13: omp.loop.exit:
9351 // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9352 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
9353 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
9354 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9355 // CHECK13-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
9356 // CHECK13-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9357 // CHECK13: .omp.final.then:
9358 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9359 // CHECK13-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
9360 // CHECK13-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
9361 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
9362 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
9363 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4
9364 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
9365 // CHECK13: .omp.final.done:
9366 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
9367 // CHECK13: omp.precond.end:
9368 // CHECK13-NEXT: ret void
9369 //
9370 //
9371 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159
9372 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
9373 // CHECK13-NEXT: entry:
9374 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
9375 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
9376 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
9377 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
9378 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9379 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
9380 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
9381 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9382 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9383 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
9384 // CHECK13-NEXT: ret void
9385 //
9386 //
9387 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2
9388 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
9389 // CHECK13-NEXT: entry:
9390 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9391 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9392 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
9393 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
9394 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
9395 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9396 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
9397 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9398 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9399 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
9400 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9401 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9402 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9403 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9404 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
9405 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9406 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9407 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
9408 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9409 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
9410 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
9411 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9412 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9413 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
9414 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
9415 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9416 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
9417 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9418 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9419 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9420 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
9421 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9422 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9423 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9424 // CHECK13: omp.precond.then:
9425 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9426 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9427 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
9428 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9429 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9430 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9431 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
9432 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9433 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9434 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9435 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
9436 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9437 // CHECK13: cond.true:
9438 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9439 // CHECK13-NEXT: br label [[COND_END:%.*]]
9440 // CHECK13: cond.false:
9441 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9442 // CHECK13-NEXT: br label [[COND_END]]
9443 // CHECK13: cond.end:
9444 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
9445 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9446 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9447 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
9448 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9449 // CHECK13: omp.inner.for.cond:
9450 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9451 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
9452 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
9453 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9454 // CHECK13: omp.inner.for.body:
9455 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !22
9456 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
9457 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
9458 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
9459 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !22
9460 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9461 // CHECK13: omp.inner.for.inc:
9462 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9463 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22
9464 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
9465 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9466 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
9467 // CHECK13: omp.inner.for.end:
9468 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9469 // CHECK13: omp.loop.exit:
9470 // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9471 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
9472 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
9473 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9474 // CHECK13-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
9475 // CHECK13-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9476 // CHECK13: .omp.final.then:
9477 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9478 // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0
9479 // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
9480 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
9481 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
9482 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
9483 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
9484 // CHECK13: .omp.final.done:
9485 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
9486 // CHECK13: omp.precond.end:
9487 // CHECK13-NEXT: ret void
9488 //
9489 //
9490 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3
9491 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
9492 // CHECK13-NEXT: entry:
9493 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9494 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9495 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9496 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9497 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
9498 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
9499 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
9500 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9501 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
9502 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9503 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9504 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
9505 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9506 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9507 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9508 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9509 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4
9510 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9511 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9512 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9513 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9514 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
9515 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9516 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
9517 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
9518 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9519 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9520 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
9521 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
9522 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9523 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
9524 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9525 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9526 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9527 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
9528 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9529 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9530 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9531 // CHECK13: omp.precond.then:
9532 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9533 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9534 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
9535 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9536 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
9537 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9538 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
9539 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9540 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
9541 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9542 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9543 // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9544 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
9545 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9546 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9547 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9548 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
9549 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9550 // CHECK13: cond.true:
9551 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9552 // CHECK13-NEXT: br label [[COND_END:%.*]]
9553 // CHECK13: cond.false:
9554 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9555 // CHECK13-NEXT: br label [[COND_END]]
9556 // CHECK13: cond.end:
9557 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
9558 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9559 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9560 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
9561 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9562 // CHECK13: omp.inner.for.cond:
9563 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9564 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
9565 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
9566 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9567 // CHECK13: omp.inner.for.body:
9568 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9569 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
9570 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9571 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !25
9572 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25
9573 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
9574 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
9575 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
9576 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9577 // CHECK13: omp.body.continue:
9578 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9579 // CHECK13: omp.inner.for.inc:
9580 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9581 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
9582 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9583 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
9584 // CHECK13: omp.inner.for.end:
9585 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9586 // CHECK13: omp.loop.exit:
9587 // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9588 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
9589 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
9590 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9591 // CHECK13-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
9592 // CHECK13-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9593 // CHECK13: .omp.final.then:
9594 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9595 // CHECK13-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
9596 // CHECK13-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
9597 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
9598 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
9599 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4
9600 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
9601 // CHECK13: .omp.final.done:
9602 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
9603 // CHECK13: omp.precond.end:
9604 // CHECK13-NEXT: ret void
9605 //
9606 //
9607 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164
9608 // CHECK13-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
9609 // CHECK13-NEXT: entry:
9610 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
9611 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
9612 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
9613 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
9614 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9615 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9616 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
9617 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
9618 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9619 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
9620 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
9621 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
9622 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9623 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9624 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
9625 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
9626 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9627 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
9628 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
9629 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9630 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
9631 // CHECK13-NEXT: ret void
9632 //
9633 //
9634 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5
9635 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9636 // CHECK13-NEXT: entry:
9637 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9638 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9639 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
9640 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
9641 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
9642 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9643 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9644 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
9645 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9646 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
9647 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
9648 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9649 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9650 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9651 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9652 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4
9653 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9654 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9655 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9656 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
9657 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9658 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
9659 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9660 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
9661 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9662 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9663 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
9664 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
9665 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9666 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9667 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
9668 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9669 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
9670 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
9671 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
9672 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9673 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9674 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9675 // CHECK13: omp.precond.then:
9676 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9677 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9678 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
9679 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9680 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9681 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8
9682 // CHECK13-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9683 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
9684 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
9685 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9686 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9687 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
9688 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9689 // CHECK13: cond.true:
9690 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9691 // CHECK13-NEXT: br label [[COND_END:%.*]]
9692 // CHECK13: cond.false:
9693 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9694 // CHECK13-NEXT: br label [[COND_END]]
9695 // CHECK13: cond.end:
9696 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
9697 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9698 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9699 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
9700 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9701 // CHECK13: omp.inner.for.cond:
9702 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
9703 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28
9704 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
9705 // CHECK13-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
9706 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9707 // CHECK13: omp.inner.for.body:
9708 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
9709 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
9710 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
9711 // CHECK13-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
9712 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !28
9713 // CHECK13-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
9714 // CHECK13-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4, !llvm.access.group !28
9715 // CHECK13-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !28
9716 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]), !llvm.access.group !28
9717 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9718 // CHECK13: omp.inner.for.inc:
9719 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
9720 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
9721 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
9722 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
9723 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
9724 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
9725 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
9726 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
9727 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
9728 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
9729 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
9730 // CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
9731 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
9732 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28
9733 // CHECK13-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]
9734 // CHECK13-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]]
9735 // CHECK13: cond.true12:
9736 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28
9737 // CHECK13-NEXT: br label [[COND_END14:%.*]]
9738 // CHECK13: cond.false13:
9739 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
9740 // CHECK13-NEXT: br label [[COND_END14]]
9741 // CHECK13: cond.end14:
9742 // CHECK13-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ]
9743 // CHECK13-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
9744 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
9745 // CHECK13-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
9746 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
9747 // CHECK13: omp.inner.for.end:
9748 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9749 // CHECK13: omp.loop.exit:
9750 // CHECK13-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9751 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
9752 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]])
9753 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9754 // CHECK13-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
9755 // CHECK13-NEXT: br i1 [[TMP37]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9756 // CHECK13: .omp.final.then:
9757 // CHECK13-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9758 // CHECK13-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP38]], 0
9759 // CHECK13-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1
9760 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV17]], 1
9761 // CHECK13-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL]]
9762 // CHECK13-NEXT: store i32 [[ADD18]], i32* [[I4]], align 4
9763 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
9764 // CHECK13: .omp.final.done:
9765 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
9766 // CHECK13: omp.precond.end:
9767 // CHECK13-NEXT: ret void
9768 //
9769 //
9770 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6
9771 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9772 // CHECK13-NEXT: entry:
9773 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9774 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9775 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9776 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9777 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
9778 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
9779 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
9780 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9781 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9782 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
9783 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9784 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
9785 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
9786 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9787 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9788 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9789 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9790 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
9791 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9792 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9793 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9794 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9795 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
9796 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9797 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
9798 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9799 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
9800 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9801 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9802 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
9803 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
9804 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9805 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9806 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
9807 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9808 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
9809 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
9810 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
9811 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9812 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9813 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9814 // CHECK13: omp.precond.then:
9815 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9816 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9817 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
9818 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9819 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
9820 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9821 // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
9822 // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
9823 // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
9824 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9825 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9826 // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9827 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
9828 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9829 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9830 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9831 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
9832 // CHECK13-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9833 // CHECK13: cond.true:
9834 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9835 // CHECK13-NEXT: br label [[COND_END:%.*]]
9836 // CHECK13: cond.false:
9837 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9838 // CHECK13-NEXT: br label [[COND_END]]
9839 // CHECK13: cond.end:
9840 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
9841 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9842 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9843 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
9844 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9845 // CHECK13: omp.inner.for.cond:
9846 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
9847 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !31
9848 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
9849 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9850 // CHECK13: omp.inner.for.body:
9851 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
9852 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
9853 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9854 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !31
9855 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !31
9856 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
9857 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
9858 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !31
9859 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9860 // CHECK13: omp.body.continue:
9861 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9862 // CHECK13: omp.inner.for.inc:
9863 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
9864 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
9865 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
9866 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
9867 // CHECK13: omp.inner.for.end:
9868 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9869 // CHECK13: omp.loop.exit:
9870 // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9871 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
9872 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
9873 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9874 // CHECK13-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
9875 // CHECK13-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9876 // CHECK13: .omp.final.then:
9877 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9878 // CHECK13-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP25]], 0
9879 // CHECK13-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
9880 // CHECK13-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
9881 // CHECK13-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
9882 // CHECK13-NEXT: store i32 [[ADD13]], i32* [[I6]], align 4
9883 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
9884 // CHECK13: .omp.final.done:
9885 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
9886 // CHECK13: omp.precond.end:
9887 // CHECK13-NEXT: ret void
9888 //
9889 //
9890 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169
9891 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
9892 // CHECK13-NEXT: entry:
9893 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
9894 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
9895 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
9896 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
9897 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9898 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
9899 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
9900 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9901 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9902 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
9903 // CHECK13-NEXT: ret void
9904 //
9905 //
9906 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8
9907 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
9908 // CHECK13-NEXT: entry:
9909 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9910 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9911 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
9912 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
9913 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
9914 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9915 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
9916 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9917 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9918 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
9919 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9920 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9921 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9922 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9923 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
9924 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9925 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9926 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
9927 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9928 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
9929 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
9930 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9931 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9932 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
9933 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
9934 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9935 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
9936 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9937 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9938 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9939 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
9940 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9941 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9942 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9943 // CHECK13: omp.precond.then:
9944 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9945 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9946 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
9947 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9948 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9949 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9950 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
9951 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9952 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9953 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9954 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
9955 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9956 // CHECK13: cond.true:
9957 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9958 // CHECK13-NEXT: br label [[COND_END:%.*]]
9959 // CHECK13: cond.false:
9960 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9961 // CHECK13-NEXT: br label [[COND_END]]
9962 // CHECK13: cond.end:
9963 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
9964 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9965 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9966 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
9967 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9968 // CHECK13: omp.inner.for.cond:
9969 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
9970 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
9971 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
9972 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9973 // CHECK13: omp.inner.for.body:
9974 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34
9975 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
9976 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
9977 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
9978 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !34
9979 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9980 // CHECK13: omp.inner.for.inc:
9981 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
9982 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
9983 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
9984 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
9985 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
9986 // CHECK13: omp.inner.for.end:
9987 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9988 // CHECK13: omp.loop.exit:
9989 // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9990 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
9991 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
9992 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9993 // CHECK13-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
9994 // CHECK13-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9995 // CHECK13: .omp.final.then:
9996 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9997 // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0
9998 // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
9999 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
10000 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
10001 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
10002 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
10003 // CHECK13: .omp.final.done:
10004 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
10005 // CHECK13: omp.precond.end:
10006 // CHECK13-NEXT: ret void
10007 //
10008 //
10009 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9
10010 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10011 // CHECK13-NEXT: entry:
10012 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10013 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10014 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10015 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10016 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
10017 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10018 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10019 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10020 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
10021 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10022 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10023 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
10024 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10025 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10026 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10027 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10028 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4
10029 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10030 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10031 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10032 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10033 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
10034 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10035 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10036 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10037 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10038 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10039 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10040 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
10041 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10042 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10043 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10044 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10045 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10046 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
10047 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10048 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10049 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10050 // CHECK13: omp.precond.then:
10051 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10052 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10053 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
10054 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10055 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
10056 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10057 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
10058 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10059 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
10060 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10061 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10062 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10063 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10064 // CHECK13-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10065 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
10066 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
10067 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
10068 // CHECK13: omp.dispatch.cond:
10069 // CHECK13-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10070 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
10071 // CHECK13-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
10072 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
10073 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10074 // CHECK13: omp.dispatch.body:
10075 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10076 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
10077 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10078 // CHECK13: omp.inner.for.cond:
10079 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
10080 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !37
10081 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
10082 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10083 // CHECK13: omp.inner.for.body:
10084 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
10085 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
10086 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10087 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !37
10088 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !37
10089 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
10090 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
10091 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !37
10092 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10093 // CHECK13: omp.body.continue:
10094 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10095 // CHECK13: omp.inner.for.inc:
10096 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
10097 // CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
10098 // CHECK13-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
10099 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]]
10100 // CHECK13: omp.inner.for.end:
10101 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
10102 // CHECK13: omp.dispatch.inc:
10103 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
10104 // CHECK13: omp.dispatch.end:
10105 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10106 // CHECK13-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
10107 // CHECK13-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10108 // CHECK13: .omp.final.then:
10109 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10110 // CHECK13-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0
10111 // CHECK13-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
10112 // CHECK13-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
10113 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
10114 // CHECK13-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
10115 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
10116 // CHECK13: .omp.final.done:
10117 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
10118 // CHECK13: omp.precond.end:
10119 // CHECK13-NEXT: ret void
10120 //
10121 //
10122 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174
10123 // CHECK13-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10124 // CHECK13-NEXT: entry:
10125 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
10126 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10127 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10128 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10129 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10130 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10131 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
10132 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10133 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10134 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10135 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
10136 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10137 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10138 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10139 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
10140 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
10141 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10142 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10143 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
10144 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10145 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
10146 // CHECK13-NEXT: ret void
10147 //
10148 //
10149 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11
10150 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10151 // CHECK13-NEXT: entry:
10152 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10153 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10154 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
10155 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10156 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10157 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10158 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10159 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
10160 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10161 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10162 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
10163 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10164 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10165 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10166 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10167 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4
10168 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10169 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10170 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10171 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
10172 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10173 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10174 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10175 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10176 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10177 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10178 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10179 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10180 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10181 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10182 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10183 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10184 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10185 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10186 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
10187 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10188 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10189 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10190 // CHECK13: omp.precond.then:
10191 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10192 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10193 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
10194 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10195 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10196 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10197 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
10198 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10199 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10200 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10201 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
10202 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10203 // CHECK13: cond.true:
10204 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10205 // CHECK13-NEXT: br label [[COND_END:%.*]]
10206 // CHECK13: cond.false:
10207 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10208 // CHECK13-NEXT: br label [[COND_END]]
10209 // CHECK13: cond.end:
10210 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
10211 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10212 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10213 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
10214 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10215 // CHECK13: omp.inner.for.cond:
10216 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
10217 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
10218 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
10219 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10220 // CHECK13: omp.inner.for.body:
10221 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !40
10222 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
10223 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
10224 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
10225 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !40
10226 // CHECK13-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10227 // CHECK13-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4, !llvm.access.group !40
10228 // CHECK13-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !40
10229 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]), !llvm.access.group !40
10230 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10231 // CHECK13: omp.inner.for.inc:
10232 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
10233 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !40
10234 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
10235 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
10236 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]]
10237 // CHECK13: omp.inner.for.end:
10238 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10239 // CHECK13: omp.loop.exit:
10240 // CHECK13-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10241 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
10242 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
10243 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10244 // CHECK13-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
10245 // CHECK13-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10246 // CHECK13: .omp.final.then:
10247 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10248 // CHECK13-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP28]], 0
10249 // CHECK13-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
10250 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV9]], 1
10251 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL]]
10252 // CHECK13-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
10253 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
10254 // CHECK13: .omp.final.done:
10255 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
10256 // CHECK13: omp.precond.end:
10257 // CHECK13-NEXT: ret void
10258 //
10259 //
10260 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..12
10261 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10262 // CHECK13-NEXT: entry:
10263 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10264 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10265 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10266 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10267 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
10268 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10269 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10270 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10271 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10272 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
10273 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10274 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10275 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
10276 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10277 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10278 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10279 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10280 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
10281 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10282 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10283 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10284 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10285 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
10286 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10287 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10288 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10289 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10290 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10291 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10292 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10293 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10294 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10295 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10296 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10297 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10298 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10299 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10300 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
10301 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10302 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10303 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10304 // CHECK13: omp.precond.then:
10305 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10306 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10307 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
10308 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10309 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
10310 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10311 // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
10312 // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
10313 // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
10314 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10315 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10316 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
10317 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10318 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10319 // CHECK13-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10320 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
10321 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
10322 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
10323 // CHECK13: omp.dispatch.cond:
10324 // CHECK13-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10325 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
10326 // CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
10327 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
10328 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10329 // CHECK13: omp.dispatch.body:
10330 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10331 // CHECK13-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
10332 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10333 // CHECK13: omp.inner.for.cond:
10334 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
10335 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !43
10336 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
10337 // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10338 // CHECK13: omp.inner.for.body:
10339 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
10340 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
10341 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10342 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !43
10343 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !43
10344 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
10345 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
10346 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !43
10347 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10348 // CHECK13: omp.body.continue:
10349 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10350 // CHECK13: omp.inner.for.inc:
10351 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
10352 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
10353 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
10354 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
10355 // CHECK13: omp.inner.for.end:
10356 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
10357 // CHECK13: omp.dispatch.inc:
10358 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
10359 // CHECK13: omp.dispatch.end:
10360 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10361 // CHECK13-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
10362 // CHECK13-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10363 // CHECK13: .omp.final.then:
10364 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10365 // CHECK13-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP25]], 0
10366 // CHECK13-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
10367 // CHECK13-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
10368 // CHECK13-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
10369 // CHECK13-NEXT: store i32 [[ADD12]], i32* [[I6]], align 4
10370 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
10371 // CHECK13: .omp.final.done:
10372 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
10373 // CHECK13: omp.precond.end:
10374 // CHECK13-NEXT: ret void
10375 //
10376 //
10377 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
10378 // CHECK13-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
10379 // CHECK13-NEXT: entry:
10380 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
10381 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
10382 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4
10383 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
10384 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
10385 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
10386 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
10387 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
10388 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
10389 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
10390 // CHECK13-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
10391 // CHECK13-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
10392 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8
10393 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8
10394 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8
10395 // CHECK13-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
10396 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8
10397 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8
10398 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8
10399 // CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
10400 // CHECK13-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8
10401 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8
10402 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8
10403 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8
10404 // CHECK13-NEXT: [[_TMP24:%.*]] = alloca i32, align 4
10405 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
10406 // CHECK13-NEXT: store i32 10, i32* [[M]], align 4
10407 // CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10408 // CHECK13-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
10409 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
10410 // CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10411 // CHECK13-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
10412 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
10413 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
10414 // CHECK13-NEXT: store i8* null, i8** [[TMP4]], align 8
10415 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10416 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10417 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
10418 // CHECK13-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10419 // CHECK13-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
10420 // CHECK13-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
10421 // CHECK13: omp_offload.failed:
10422 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122([10 x i32]* [[A]]) #[[ATTR3]]
10423 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
10424 // CHECK13: omp_offload.cont:
10425 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
10426 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
10427 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
10428 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
10429 // CHECK13-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
10430 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
10431 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
10432 // CHECK13-NEXT: store i8* null, i8** [[TMP13]], align 8
10433 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
10434 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
10435 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
10436 // CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10437 // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
10438 // CHECK13-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
10439 // CHECK13: omp_offload.failed5:
10440 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127([10 x i32]* [[A]]) #[[ATTR3]]
10441 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT6]]
10442 // CHECK13: omp_offload.cont6:
10443 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4
10444 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32*
10445 // CHECK13-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4
10446 // CHECK13-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8
10447 // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
10448 // CHECK13-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
10449 // CHECK13-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8
10450 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
10451 // CHECK13-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
10452 // CHECK13-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8
10453 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
10454 // CHECK13-NEXT: store i8* null, i8** [[TMP24]], align 8
10455 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
10456 // CHECK13-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
10457 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8
10458 // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
10459 // CHECK13-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
10460 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8
10461 // CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1
10462 // CHECK13-NEXT: store i8* null, i8** [[TMP29]], align 8
10463 // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
10464 // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
10465 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
10466 // CHECK13-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10467 // CHECK13-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
10468 // CHECK13-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
10469 // CHECK13: omp_offload.failed11:
10470 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
10471 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT12]]
10472 // CHECK13: omp_offload.cont12:
10473 // CHECK13-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
10474 // CHECK13-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
10475 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8
10476 // CHECK13-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
10477 // CHECK13-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
10478 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8
10479 // CHECK13-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0
10480 // CHECK13-NEXT: store i8* null, i8** [[TMP38]], align 8
10481 // CHECK13-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
10482 // CHECK13-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
10483 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
10484 // CHECK13-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10485 // CHECK13-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
10486 // CHECK13-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
10487 // CHECK13: omp_offload.failed17:
10488 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137([10 x i32]* [[A]]) #[[ATTR3]]
10489 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT18]]
10490 // CHECK13: omp_offload.cont18:
10491 // CHECK13-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4
10492 // CHECK13-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32*
10493 // CHECK13-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4
10494 // CHECK13-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8
10495 // CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
10496 // CHECK13-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
10497 // CHECK13-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8
10498 // CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
10499 // CHECK13-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
10500 // CHECK13-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8
10501 // CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
10502 // CHECK13-NEXT: store i8* null, i8** [[TMP49]], align 8
10503 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
10504 // CHECK13-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
10505 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8
10506 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
10507 // CHECK13-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
10508 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8
10509 // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
10510 // CHECK13-NEXT: store i8* null, i8** [[TMP54]], align 8
10511 // CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
10512 // CHECK13-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
10513 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
10514 // CHECK13-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10515 // CHECK13-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
10516 // CHECK13-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]]
10517 // CHECK13: omp_offload.failed25:
10518 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
10519 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT26]]
10520 // CHECK13: omp_offload.cont26:
10521 // CHECK13-NEXT: ret i32 0
10522 //
10523 //
10524 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122
10525 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
10526 // CHECK13-NEXT: entry:
10527 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
10528 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
10529 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
10530 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
10531 // CHECK13-NEXT: ret void
10532 //
10533 //
10534 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..14
10535 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
10536 // CHECK13-NEXT: entry:
10537 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10538 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10539 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
10540 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10541 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
10542 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10543 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10544 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10545 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10546 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
10547 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10548 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10549 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
10550 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
10551 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10552 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
10553 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10554 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10555 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10556 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
10557 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10558 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10559 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
10560 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10561 // CHECK13: cond.true:
10562 // CHECK13-NEXT: br label [[COND_END:%.*]]
10563 // CHECK13: cond.false:
10564 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10565 // CHECK13-NEXT: br label [[COND_END]]
10566 // CHECK13: cond.end:
10567 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
10568 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10569 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10570 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
10571 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10572 // CHECK13: omp.inner.for.cond:
10573 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
10574 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
10575 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
10576 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10577 // CHECK13: omp.inner.for.body:
10578 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46
10579 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
10580 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
10581 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
10582 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !46
10583 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10584 // CHECK13: omp.inner.for.inc:
10585 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
10586 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46
10587 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
10588 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
10589 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
10590 // CHECK13: omp.inner.for.end:
10591 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10592 // CHECK13: omp.loop.exit:
10593 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
10594 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10595 // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
10596 // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10597 // CHECK13: .omp.final.then:
10598 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
10599 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
10600 // CHECK13: .omp.final.done:
10601 // CHECK13-NEXT: ret void
10602 //
10603 //
10604 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..15
10605 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
10606 // CHECK13-NEXT: entry:
10607 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10608 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10609 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10610 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10611 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
10612 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10613 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
10614 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10615 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10616 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10617 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10618 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
10619 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10620 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10621 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10622 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10623 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
10624 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
10625 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10626 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
10627 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10628 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
10629 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10630 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
10631 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10632 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10633 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10634 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10635 // CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10636 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
10637 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10638 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10639 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
10640 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10641 // CHECK13: cond.true:
10642 // CHECK13-NEXT: br label [[COND_END:%.*]]
10643 // CHECK13: cond.false:
10644 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10645 // CHECK13-NEXT: br label [[COND_END]]
10646 // CHECK13: cond.end:
10647 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
10648 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10649 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10650 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
10651 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10652 // CHECK13: omp.inner.for.cond:
10653 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
10654 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49
10655 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
10656 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10657 // CHECK13: omp.inner.for.body:
10658 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
10659 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
10660 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10661 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49
10662 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !49
10663 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
10664 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
10665 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !49
10666 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10667 // CHECK13: omp.body.continue:
10668 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10669 // CHECK13: omp.inner.for.inc:
10670 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
10671 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
10672 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
10673 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]]
10674 // CHECK13: omp.inner.for.end:
10675 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10676 // CHECK13: omp.loop.exit:
10677 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
10678 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10679 // CHECK13-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
10680 // CHECK13-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10681 // CHECK13: .omp.final.then:
10682 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
10683 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
10684 // CHECK13: .omp.final.done:
10685 // CHECK13-NEXT: ret void
10686 //
10687 //
10688 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127
10689 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
10690 // CHECK13-NEXT: entry:
10691 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
10692 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
10693 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
10694 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
10695 // CHECK13-NEXT: ret void
10696 //
10697 //
10698 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..17
10699 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
10700 // CHECK13-NEXT: entry:
10701 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10702 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10703 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
10704 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10705 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
10706 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10707 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10708 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10709 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10710 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
10711 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10712 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10713 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
10714 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
10715 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10716 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
10717 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10718 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10719 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10720 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
10721 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10722 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10723 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
10724 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10725 // CHECK13: cond.true:
10726 // CHECK13-NEXT: br label [[COND_END:%.*]]
10727 // CHECK13: cond.false:
10728 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10729 // CHECK13-NEXT: br label [[COND_END]]
10730 // CHECK13: cond.end:
10731 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
10732 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10733 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10734 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
10735 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10736 // CHECK13: omp.inner.for.cond:
10737 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
10738 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52
10739 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
10740 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10741 // CHECK13: omp.inner.for.body:
10742 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !52
10743 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
10744 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52
10745 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
10746 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !52
10747 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10748 // CHECK13: omp.inner.for.inc:
10749 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
10750 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !52
10751 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
10752 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
10753 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
10754 // CHECK13: omp.inner.for.end:
10755 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10756 // CHECK13: omp.loop.exit:
10757 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
10758 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10759 // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
10760 // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10761 // CHECK13: .omp.final.then:
10762 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
10763 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
10764 // CHECK13: .omp.final.done:
10765 // CHECK13-NEXT: ret void
10766 //
10767 //
10768 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..18
10769 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
10770 // CHECK13-NEXT: entry:
10771 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10772 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10773 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10774 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10775 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
10776 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10777 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
10778 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10779 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10780 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10781 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10782 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
10783 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10784 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10785 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10786 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10787 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
10788 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
10789 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10790 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
10791 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10792 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
10793 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10794 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
10795 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10796 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10797 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10798 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10799 // CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10800 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
10801 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10802 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10803 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
10804 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10805 // CHECK13: cond.true:
10806 // CHECK13-NEXT: br label [[COND_END:%.*]]
10807 // CHECK13: cond.false:
10808 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10809 // CHECK13-NEXT: br label [[COND_END]]
10810 // CHECK13: cond.end:
10811 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
10812 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10813 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10814 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
10815 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10816 // CHECK13: omp.inner.for.cond:
10817 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
10818 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !55
10819 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
10820 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10821 // CHECK13: omp.inner.for.body:
10822 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
10823 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
10824 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10825 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !55
10826 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !55
10827 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
10828 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
10829 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !55
10830 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10831 // CHECK13: omp.body.continue:
10832 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10833 // CHECK13: omp.inner.for.inc:
10834 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
10835 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
10836 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
10837 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
10838 // CHECK13: omp.inner.for.end:
10839 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10840 // CHECK13: omp.loop.exit:
10841 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
10842 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10843 // CHECK13-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
10844 // CHECK13-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10845 // CHECK13: .omp.final.then:
10846 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
10847 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
10848 // CHECK13: .omp.final.done:
10849 // CHECK13-NEXT: ret void
10850 //
10851 //
10852 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132
10853 // CHECK13-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
10854 // CHECK13-NEXT: entry:
10855 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
10856 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
10857 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10858 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10859 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
10860 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
10861 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
10862 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
10863 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
10864 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
10865 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10866 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10867 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
10868 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10869 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
10870 // CHECK13-NEXT: ret void
10871 //
10872 //
10873 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..21
10874 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10875 // CHECK13-NEXT: entry:
10876 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10877 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10878 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
10879 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10880 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10881 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
10882 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10883 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10884 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10885 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10886 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
10887 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10888 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10889 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10890 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
10891 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10892 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
10893 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10894 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10895 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
10896 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10897 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10898 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10899 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
10900 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10901 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10902 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
10903 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10904 // CHECK13: cond.true:
10905 // CHECK13-NEXT: br label [[COND_END:%.*]]
10906 // CHECK13: cond.false:
10907 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10908 // CHECK13-NEXT: br label [[COND_END]]
10909 // CHECK13: cond.end:
10910 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
10911 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10912 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10913 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
10914 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10915 // CHECK13: omp.inner.for.cond:
10916 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
10917 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
10918 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
10919 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10920 // CHECK13: omp.inner.for.body:
10921 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !58
10922 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
10923 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
10924 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
10925 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !58
10926 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10927 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !58
10928 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !58
10929 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !58
10930 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10931 // CHECK13: omp.inner.for.inc:
10932 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
10933 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !58
10934 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
10935 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
10936 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
10937 // CHECK13: omp.inner.for.end:
10938 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10939 // CHECK13: omp.loop.exit:
10940 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
10941 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10942 // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
10943 // CHECK13-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10944 // CHECK13: .omp.final.then:
10945 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
10946 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
10947 // CHECK13: .omp.final.done:
10948 // CHECK13-NEXT: ret void
10949 //
10950 //
10951 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..22
10952 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10953 // CHECK13-NEXT: entry:
10954 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10955 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10956 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10957 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10958 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
10959 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10960 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10961 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
10962 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10963 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10964 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10965 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10966 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
10967 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10968 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10969 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10970 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10971 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
10972 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10973 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
10974 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10975 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10976 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
10977 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10978 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10979 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10980 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
10981 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
10982 // CHECK13-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
10983 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10984 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10985 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
10986 // CHECK13-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10987 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
10988 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
10989 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
10990 // CHECK13: omp.dispatch.cond:
10991 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10992 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10993 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
10994 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
10995 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10996 // CHECK13: cond.true:
10997 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10998 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
10999 // CHECK13-NEXT: br label [[COND_END:%.*]]
11000 // CHECK13: cond.false:
11001 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11002 // CHECK13-NEXT: br label [[COND_END]]
11003 // CHECK13: cond.end:
11004 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
11005 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11006 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11007 // CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
11008 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11009 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11010 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
11011 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11012 // CHECK13: omp.dispatch.body:
11013 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11014 // CHECK13: omp.inner.for.cond:
11015 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
11016 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61
11017 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
11018 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11019 // CHECK13: omp.inner.for.body:
11020 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
11021 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
11022 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11023 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !61
11024 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !61
11025 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
11026 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
11027 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !61
11028 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11029 // CHECK13: omp.body.continue:
11030 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11031 // CHECK13: omp.inner.for.inc:
11032 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
11033 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
11034 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
11035 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]]
11036 // CHECK13: omp.inner.for.end:
11037 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
11038 // CHECK13: omp.dispatch.inc:
11039 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11040 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11041 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
11042 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
11043 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11044 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11045 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
11046 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
11047 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
11048 // CHECK13: omp.dispatch.end:
11049 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
11050 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11051 // CHECK13-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
11052 // CHECK13-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11053 // CHECK13: .omp.final.then:
11054 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
11055 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
11056 // CHECK13: .omp.final.done:
11057 // CHECK13-NEXT: ret void
11058 //
11059 //
11060 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137
11061 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11062 // CHECK13-NEXT: entry:
11063 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11064 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11065 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11066 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
11067 // CHECK13-NEXT: ret void
11068 //
11069 //
11070 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..25
11071 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11072 // CHECK13-NEXT: entry:
11073 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11074 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11075 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11076 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11077 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
11078 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11079 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11080 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11081 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11082 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
11083 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11084 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11085 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11086 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11087 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11088 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11089 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11090 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11091 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11092 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11093 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11094 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11095 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11096 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11097 // CHECK13: cond.true:
11098 // CHECK13-NEXT: br label [[COND_END:%.*]]
11099 // CHECK13: cond.false:
11100 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11101 // CHECK13-NEXT: br label [[COND_END]]
11102 // CHECK13: cond.end:
11103 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11104 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11105 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11106 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11107 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11108 // CHECK13: omp.inner.for.cond:
11109 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
11110 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64
11111 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11112 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11113 // CHECK13: omp.inner.for.body:
11114 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !64
11115 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11116 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64
11117 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11118 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !64
11119 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11120 // CHECK13: omp.inner.for.inc:
11121 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
11122 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !64
11123 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11124 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
11125 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP65:![0-9]+]]
11126 // CHECK13: omp.inner.for.end:
11127 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11128 // CHECK13: omp.loop.exit:
11129 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
11130 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11131 // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
11132 // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11133 // CHECK13: .omp.final.then:
11134 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
11135 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
11136 // CHECK13: .omp.final.done:
11137 // CHECK13-NEXT: ret void
11138 //
11139 //
11140 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..26
11141 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11142 // CHECK13-NEXT: entry:
11143 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11144 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11145 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11146 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11147 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11148 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11149 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
11150 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11151 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11152 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11153 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11154 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
11155 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11156 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11157 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11158 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11159 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11160 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11161 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11162 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11163 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11164 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11165 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11166 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11167 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11168 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11169 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11170 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11171 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11172 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11173 // CHECK13-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11174 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
11175 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
11176 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
11177 // CHECK13: omp.dispatch.cond:
11178 // CHECK13-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
11179 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
11180 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11181 // CHECK13: omp.dispatch.body:
11182 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11183 // CHECK13-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
11184 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11185 // CHECK13: omp.inner.for.cond:
11186 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
11187 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !67
11188 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
11189 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11190 // CHECK13: omp.inner.for.body:
11191 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
11192 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
11193 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11194 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !67
11195 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !67
11196 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
11197 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
11198 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !67
11199 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11200 // CHECK13: omp.body.continue:
11201 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11202 // CHECK13: omp.inner.for.inc:
11203 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
11204 // CHECK13-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
11205 // CHECK13-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
11206 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP68:![0-9]+]]
11207 // CHECK13: omp.inner.for.end:
11208 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
11209 // CHECK13: omp.dispatch.inc:
11210 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
11211 // CHECK13: omp.dispatch.end:
11212 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11213 // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
11214 // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11215 // CHECK13: .omp.final.then:
11216 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
11217 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
11218 // CHECK13: .omp.final.done:
11219 // CHECK13-NEXT: ret void
11220 //
11221 //
11222 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142
11223 // CHECK13-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11224 // CHECK13-NEXT: entry:
11225 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
11226 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11227 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11228 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11229 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
11230 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11231 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
11232 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11233 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
11234 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
11235 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11236 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11237 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
11238 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11239 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
11240 // CHECK13-NEXT: ret void
11241 //
11242 //
11243 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..29
11244 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11245 // CHECK13-NEXT: entry:
11246 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11247 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11248 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11249 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11250 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11251 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
11252 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11253 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11254 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11255 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11256 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
11257 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11258 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11259 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11260 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11261 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11262 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11263 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11264 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11265 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11266 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11267 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11268 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11269 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11270 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11271 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11272 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11273 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11274 // CHECK13: cond.true:
11275 // CHECK13-NEXT: br label [[COND_END:%.*]]
11276 // CHECK13: cond.false:
11277 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11278 // CHECK13-NEXT: br label [[COND_END]]
11279 // CHECK13: cond.end:
11280 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11281 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11282 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11283 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11284 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11285 // CHECK13: omp.inner.for.cond:
11286 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
11287 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70
11288 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11289 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11290 // CHECK13: omp.inner.for.body:
11291 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !70
11292 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11293 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70
11294 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11295 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !70
11296 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11297 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !70
11298 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !70
11299 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !70
11300 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11301 // CHECK13: omp.inner.for.inc:
11302 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
11303 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !70
11304 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
11305 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
11306 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP71:![0-9]+]]
11307 // CHECK13: omp.inner.for.end:
11308 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11309 // CHECK13: omp.loop.exit:
11310 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
11311 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11312 // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
11313 // CHECK13-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11314 // CHECK13: .omp.final.then:
11315 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
11316 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
11317 // CHECK13: .omp.final.done:
11318 // CHECK13-NEXT: ret void
11319 //
11320 //
11321 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..30
11322 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11323 // CHECK13-NEXT: entry:
11324 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11325 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11326 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11327 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11328 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11329 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11330 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11331 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
11332 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11333 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11334 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11335 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11336 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
11337 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11338 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11339 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11340 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11341 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11342 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11343 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11344 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11345 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11346 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11347 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11348 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11349 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11350 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
11351 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
11352 // CHECK13-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
11353 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11354 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11355 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
11356 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11357 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11358 // CHECK13-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11359 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
11360 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
11361 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
11362 // CHECK13: omp.dispatch.cond:
11363 // CHECK13-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
11364 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
11365 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11366 // CHECK13: omp.dispatch.body:
11367 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11368 // CHECK13-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
11369 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11370 // CHECK13: omp.inner.for.cond:
11371 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
11372 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !73
11373 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
11374 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11375 // CHECK13: omp.inner.for.body:
11376 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
11377 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
11378 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11379 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !73
11380 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !73
11381 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
11382 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
11383 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !73
11384 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11385 // CHECK13: omp.body.continue:
11386 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11387 // CHECK13: omp.inner.for.inc:
11388 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
11389 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
11390 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
11391 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP74:![0-9]+]]
11392 // CHECK13: omp.inner.for.end:
11393 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
11394 // CHECK13: omp.dispatch.inc:
11395 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
11396 // CHECK13: omp.dispatch.end:
11397 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11398 // CHECK13-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
11399 // CHECK13-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11400 // CHECK13: .omp.final.then:
11401 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
11402 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
11403 // CHECK13: .omp.final.done:
11404 // CHECK13-NEXT: ret void
11405 //
11406 //
11407 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
11408 // CHECK13-SAME: () #[[ATTR5:[0-9]+]] {
11409 // CHECK13-NEXT: entry:
11410 // CHECK13-NEXT: call void @__tgt_register_requires(i64 1)
11411 // CHECK13-NEXT: ret void
11412 //
11413 //
11414 // CHECK14-LABEL: define {{[^@]+}}@main
11415 // CHECK14-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
11416 // CHECK14-NEXT: entry:
11417 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
11418 // CHECK14-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
11419 // CHECK14-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
11420 // CHECK14-NEXT: [[N:%.*]] = alloca i32, align 4
11421 // CHECK14-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
11422 // CHECK14-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
11423 // CHECK14-NEXT: [[M:%.*]] = alloca i32, align 4
11424 // CHECK14-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
11425 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
11426 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
11427 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
11428 // CHECK14-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
11429 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
11430 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11431 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11432 // CHECK14-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
11433 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
11434 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
11435 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
11436 // CHECK14-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
11437 // CHECK14-NEXT: [[_TMP9:%.*]] = alloca i32, align 4
11438 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
11439 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
11440 // CHECK14-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
11441 // CHECK14-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8
11442 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8
11443 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8
11444 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8
11445 // CHECK14-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8
11446 // CHECK14-NEXT: [[_TMP25:%.*]] = alloca i32, align 4
11447 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
11448 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
11449 // CHECK14-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8
11450 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8
11451 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8
11452 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8
11453 // CHECK14-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8
11454 // CHECK14-NEXT: [[_TMP40:%.*]] = alloca i32, align 4
11455 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
11456 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
11457 // CHECK14-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8
11458 // CHECK14-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8
11459 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8
11460 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8
11461 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8
11462 // CHECK14-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8
11463 // CHECK14-NEXT: [[_TMP57:%.*]] = alloca i32, align 4
11464 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
11465 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4
11466 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4
11467 // CHECK14-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
11468 // CHECK14-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
11469 // CHECK14-NEXT: store i32 100, i32* [[N]], align 4
11470 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
11471 // CHECK14-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
11472 // CHECK14-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
11473 // CHECK14-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
11474 // CHECK14-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
11475 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
11476 // CHECK14-NEXT: store i32 10, i32* [[M]], align 4
11477 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
11478 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
11479 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
11480 // CHECK14-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
11481 // CHECK14-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
11482 // CHECK14-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11483 // CHECK14-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
11484 // CHECK14-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
11485 // CHECK14-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11486 // CHECK14-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
11487 // CHECK14-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
11488 // CHECK14-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
11489 // CHECK14-NEXT: store i64 4, i64* [[TMP10]], align 8
11490 // CHECK14-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
11491 // CHECK14-NEXT: store i8* null, i8** [[TMP11]], align 8
11492 // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
11493 // CHECK14-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
11494 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
11495 // CHECK14-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
11496 // CHECK14-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
11497 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
11498 // CHECK14-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
11499 // CHECK14-NEXT: store i64 8, i64* [[TMP16]], align 8
11500 // CHECK14-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
11501 // CHECK14-NEXT: store i8* null, i8** [[TMP17]], align 8
11502 // CHECK14-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
11503 // CHECK14-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
11504 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8
11505 // CHECK14-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
11506 // CHECK14-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
11507 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8
11508 // CHECK14-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
11509 // CHECK14-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8
11510 // CHECK14-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
11511 // CHECK14-NEXT: store i8* null, i8** [[TMP23]], align 8
11512 // CHECK14-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11513 // CHECK14-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11514 // CHECK14-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
11515 // CHECK14-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
11516 // CHECK14-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
11517 // CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11518 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
11519 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11520 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11521 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11522 // CHECK14-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11523 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
11524 // CHECK14-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
11525 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
11526 // CHECK14-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11527 // CHECK14-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
11528 // CHECK14-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
11529 // CHECK14: omp_offload.failed:
11530 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
11531 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]]
11532 // CHECK14: omp_offload.cont:
11533 // CHECK14-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4
11534 // CHECK14-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
11535 // CHECK14-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4
11536 // CHECK14-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
11537 // CHECK14-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
11538 // CHECK14-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
11539 // CHECK14-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
11540 // CHECK14-NEXT: store i64 [[TMP34]], i64* [[TMP37]], align 8
11541 // CHECK14-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
11542 // CHECK14-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
11543 // CHECK14-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8
11544 // CHECK14-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
11545 // CHECK14-NEXT: store i64 4, i64* [[TMP40]], align 8
11546 // CHECK14-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
11547 // CHECK14-NEXT: store i8* null, i8** [[TMP41]], align 8
11548 // CHECK14-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
11549 // CHECK14-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
11550 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP43]], align 8
11551 // CHECK14-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
11552 // CHECK14-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
11553 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP45]], align 8
11554 // CHECK14-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
11555 // CHECK14-NEXT: store i64 8, i64* [[TMP46]], align 8
11556 // CHECK14-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
11557 // CHECK14-NEXT: store i8* null, i8** [[TMP47]], align 8
11558 // CHECK14-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
11559 // CHECK14-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
11560 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8
11561 // CHECK14-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
11562 // CHECK14-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
11563 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP51]], align 8
11564 // CHECK14-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
11565 // CHECK14-NEXT: store i64 [[TMP35]], i64* [[TMP52]], align 8
11566 // CHECK14-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
11567 // CHECK14-NEXT: store i8* null, i8** [[TMP53]], align 8
11568 // CHECK14-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
11569 // CHECK14-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
11570 // CHECK14-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
11571 // CHECK14-NEXT: [[TMP57:%.*]] = load i32, i32* [[N]], align 4
11572 // CHECK14-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
11573 // CHECK14-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
11574 // CHECK14-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
11575 // CHECK14-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
11576 // CHECK14-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
11577 // CHECK14-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
11578 // CHECK14-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
11579 // CHECK14-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
11580 // CHECK14-NEXT: [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
11581 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
11582 // CHECK14-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11583 // CHECK14-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
11584 // CHECK14-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
11585 // CHECK14: omp_offload.failed16:
11586 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
11587 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT17]]
11588 // CHECK14: omp_offload.cont17:
11589 // CHECK14-NEXT: [[TMP63:%.*]] = load i32, i32* [[M]], align 4
11590 // CHECK14-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
11591 // CHECK14-NEXT: store i32 [[TMP63]], i32* [[CONV18]], align 4
11592 // CHECK14-NEXT: [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8
11593 // CHECK14-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4
11594 // CHECK14-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
11595 // CHECK14-NEXT: store i32 [[TMP65]], i32* [[CONV20]], align 4
11596 // CHECK14-NEXT: [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8
11597 // CHECK14-NEXT: [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4
11598 // CHECK14-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
11599 // CHECK14-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64*
11600 // CHECK14-NEXT: store i64 [[TMP64]], i64* [[TMP69]], align 8
11601 // CHECK14-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
11602 // CHECK14-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64*
11603 // CHECK14-NEXT: store i64 [[TMP64]], i64* [[TMP71]], align 8
11604 // CHECK14-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
11605 // CHECK14-NEXT: store i64 4, i64* [[TMP72]], align 8
11606 // CHECK14-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
11607 // CHECK14-NEXT: store i8* null, i8** [[TMP73]], align 8
11608 // CHECK14-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
11609 // CHECK14-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64*
11610 // CHECK14-NEXT: store i64 [[TMP66]], i64* [[TMP75]], align 8
11611 // CHECK14-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
11612 // CHECK14-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64*
11613 // CHECK14-NEXT: store i64 [[TMP66]], i64* [[TMP77]], align 8
11614 // CHECK14-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1
11615 // CHECK14-NEXT: store i64 4, i64* [[TMP78]], align 8
11616 // CHECK14-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
11617 // CHECK14-NEXT: store i8* null, i8** [[TMP79]], align 8
11618 // CHECK14-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2
11619 // CHECK14-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64*
11620 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP81]], align 8
11621 // CHECK14-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2
11622 // CHECK14-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64*
11623 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP83]], align 8
11624 // CHECK14-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2
11625 // CHECK14-NEXT: store i64 8, i64* [[TMP84]], align 8
11626 // CHECK14-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2
11627 // CHECK14-NEXT: store i8* null, i8** [[TMP85]], align 8
11628 // CHECK14-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3
11629 // CHECK14-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32**
11630 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 8
11631 // CHECK14-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3
11632 // CHECK14-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
11633 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 8
11634 // CHECK14-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3
11635 // CHECK14-NEXT: store i64 [[TMP67]], i64* [[TMP90]], align 8
11636 // CHECK14-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3
11637 // CHECK14-NEXT: store i8* null, i8** [[TMP91]], align 8
11638 // CHECK14-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
11639 // CHECK14-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
11640 // CHECK14-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
11641 // CHECK14-NEXT: [[TMP95:%.*]] = load i32, i32* [[N]], align 4
11642 // CHECK14-NEXT: store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4
11643 // CHECK14-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
11644 // CHECK14-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0
11645 // CHECK14-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1
11646 // CHECK14-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1
11647 // CHECK14-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4
11648 // CHECK14-NEXT: [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
11649 // CHECK14-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1
11650 // CHECK14-NEXT: [[TMP98:%.*]] = zext i32 [[ADD31]] to i64
11651 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]])
11652 // CHECK14-NEXT: [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11653 // CHECK14-NEXT: [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0
11654 // CHECK14-NEXT: br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
11655 // CHECK14: omp_offload.failed32:
11656 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
11657 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT33]]
11658 // CHECK14: omp_offload.cont33:
11659 // CHECK14-NEXT: [[TMP101:%.*]] = load i32, i32* [[N]], align 4
11660 // CHECK14-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32*
11661 // CHECK14-NEXT: store i32 [[TMP101]], i32* [[CONV35]], align 4
11662 // CHECK14-NEXT: [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8
11663 // CHECK14-NEXT: [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4
11664 // CHECK14-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
11665 // CHECK14-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
11666 // CHECK14-NEXT: store i64 [[TMP102]], i64* [[TMP105]], align 8
11667 // CHECK14-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
11668 // CHECK14-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64*
11669 // CHECK14-NEXT: store i64 [[TMP102]], i64* [[TMP107]], align 8
11670 // CHECK14-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
11671 // CHECK14-NEXT: store i64 4, i64* [[TMP108]], align 8
11672 // CHECK14-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0
11673 // CHECK14-NEXT: store i8* null, i8** [[TMP109]], align 8
11674 // CHECK14-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1
11675 // CHECK14-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64*
11676 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP111]], align 8
11677 // CHECK14-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1
11678 // CHECK14-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64*
11679 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP113]], align 8
11680 // CHECK14-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1
11681 // CHECK14-NEXT: store i64 8, i64* [[TMP114]], align 8
11682 // CHECK14-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1
11683 // CHECK14-NEXT: store i8* null, i8** [[TMP115]], align 8
11684 // CHECK14-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2
11685 // CHECK14-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32**
11686 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 8
11687 // CHECK14-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2
11688 // CHECK14-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32**
11689 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP119]], align 8
11690 // CHECK14-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2
11691 // CHECK14-NEXT: store i64 [[TMP103]], i64* [[TMP120]], align 8
11692 // CHECK14-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2
11693 // CHECK14-NEXT: store i8* null, i8** [[TMP121]], align 8
11694 // CHECK14-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
11695 // CHECK14-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
11696 // CHECK14-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
11697 // CHECK14-NEXT: [[TMP125:%.*]] = load i32, i32* [[N]], align 4
11698 // CHECK14-NEXT: store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4
11699 // CHECK14-NEXT: [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
11700 // CHECK14-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0
11701 // CHECK14-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
11702 // CHECK14-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
11703 // CHECK14-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
11704 // CHECK14-NEXT: [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
11705 // CHECK14-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1
11706 // CHECK14-NEXT: [[TMP128:%.*]] = zext i32 [[ADD46]] to i64
11707 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]])
11708 // CHECK14-NEXT: [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11709 // CHECK14-NEXT: [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0
11710 // CHECK14-NEXT: br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
11711 // CHECK14: omp_offload.failed47:
11712 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
11713 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT48]]
11714 // CHECK14: omp_offload.cont48:
11715 // CHECK14-NEXT: [[TMP131:%.*]] = load i32, i32* [[M]], align 4
11716 // CHECK14-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32*
11717 // CHECK14-NEXT: store i32 [[TMP131]], i32* [[CONV50]], align 4
11718 // CHECK14-NEXT: [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8
11719 // CHECK14-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4
11720 // CHECK14-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32*
11721 // CHECK14-NEXT: store i32 [[TMP133]], i32* [[CONV52]], align 4
11722 // CHECK14-NEXT: [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8
11723 // CHECK14-NEXT: [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4
11724 // CHECK14-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
11725 // CHECK14-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
11726 // CHECK14-NEXT: store i64 [[TMP132]], i64* [[TMP137]], align 8
11727 // CHECK14-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
11728 // CHECK14-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64*
11729 // CHECK14-NEXT: store i64 [[TMP132]], i64* [[TMP139]], align 8
11730 // CHECK14-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
11731 // CHECK14-NEXT: store i64 4, i64* [[TMP140]], align 8
11732 // CHECK14-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0
11733 // CHECK14-NEXT: store i8* null, i8** [[TMP141]], align 8
11734 // CHECK14-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1
11735 // CHECK14-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64*
11736 // CHECK14-NEXT: store i64 [[TMP134]], i64* [[TMP143]], align 8
11737 // CHECK14-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1
11738 // CHECK14-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64*
11739 // CHECK14-NEXT: store i64 [[TMP134]], i64* [[TMP145]], align 8
11740 // CHECK14-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1
11741 // CHECK14-NEXT: store i64 4, i64* [[TMP146]], align 8
11742 // CHECK14-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1
11743 // CHECK14-NEXT: store i8* null, i8** [[TMP147]], align 8
11744 // CHECK14-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2
11745 // CHECK14-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64*
11746 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP149]], align 8
11747 // CHECK14-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2
11748 // CHECK14-NEXT: [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64*
11749 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP151]], align 8
11750 // CHECK14-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2
11751 // CHECK14-NEXT: store i64 8, i64* [[TMP152]], align 8
11752 // CHECK14-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2
11753 // CHECK14-NEXT: store i8* null, i8** [[TMP153]], align 8
11754 // CHECK14-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3
11755 // CHECK14-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32**
11756 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP155]], align 8
11757 // CHECK14-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3
11758 // CHECK14-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32**
11759 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP157]], align 8
11760 // CHECK14-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3
11761 // CHECK14-NEXT: store i64 [[TMP135]], i64* [[TMP158]], align 8
11762 // CHECK14-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3
11763 // CHECK14-NEXT: store i8* null, i8** [[TMP159]], align 8
11764 // CHECK14-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
11765 // CHECK14-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
11766 // CHECK14-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
11767 // CHECK14-NEXT: [[TMP163:%.*]] = load i32, i32* [[N]], align 4
11768 // CHECK14-NEXT: store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4
11769 // CHECK14-NEXT: [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4
11770 // CHECK14-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0
11771 // CHECK14-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1
11772 // CHECK14-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1
11773 // CHECK14-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4
11774 // CHECK14-NEXT: [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4
11775 // CHECK14-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1
11776 // CHECK14-NEXT: [[TMP166:%.*]] = zext i32 [[ADD63]] to i64
11777 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]])
11778 // CHECK14-NEXT: [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11779 // CHECK14-NEXT: [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0
11780 // CHECK14-NEXT: br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
11781 // CHECK14: omp_offload.failed64:
11782 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
11783 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT65]]
11784 // CHECK14: omp_offload.cont65:
11785 // CHECK14-NEXT: [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
11786 // CHECK14-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]])
11787 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
11788 // CHECK14-NEXT: [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
11789 // CHECK14-NEXT: call void @llvm.stackrestore(i8* [[TMP170]])
11790 // CHECK14-NEXT: [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4
11791 // CHECK14-NEXT: ret i32 [[TMP171]]
11792 //
11793 //
11794 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154
11795 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
11796 // CHECK14-NEXT: entry:
11797 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
11798 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11799 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
11800 // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
11801 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11802 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
11803 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11804 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11805 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11806 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
11807 // CHECK14-NEXT: ret void
11808 //
11809 //
11810 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined.
11811 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11812 // CHECK14-NEXT: entry:
11813 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11814 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11815 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
11816 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11817 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
11818 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11819 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
11820 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11821 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11822 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
11823 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11824 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11825 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11826 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11827 // CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4
11828 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11829 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11830 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
11831 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11832 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
11833 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
11834 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11835 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11836 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
11837 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
11838 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11839 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
11840 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11841 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11842 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11843 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4
11844 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11845 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
11846 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11847 // CHECK14: omp.precond.then:
11848 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11849 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11850 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
11851 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11852 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11853 // CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11854 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
11855 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11856 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11857 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11858 // CHECK14-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
11859 // CHECK14-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11860 // CHECK14: cond.true:
11861 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11862 // CHECK14-NEXT: br label [[COND_END:%.*]]
11863 // CHECK14: cond.false:
11864 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11865 // CHECK14-NEXT: br label [[COND_END]]
11866 // CHECK14: cond.end:
11867 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
11868 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11869 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11870 // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
11871 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11872 // CHECK14: omp.inner.for.cond:
11873 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
11874 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
11875 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
11876 // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11877 // CHECK14: omp.inner.for.body:
11878 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13
11879 // CHECK14-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
11880 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
11881 // CHECK14-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
11882 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !13
11883 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11884 // CHECK14: omp.inner.for.inc:
11885 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
11886 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13
11887 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
11888 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
11889 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
11890 // CHECK14: omp.inner.for.end:
11891 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11892 // CHECK14: omp.loop.exit:
11893 // CHECK14-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11894 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
11895 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
11896 // CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11897 // CHECK14-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
11898 // CHECK14-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11899 // CHECK14: .omp.final.then:
11900 // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11901 // CHECK14-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0
11902 // CHECK14-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
11903 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
11904 // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
11905 // CHECK14-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
11906 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
11907 // CHECK14: .omp.final.done:
11908 // CHECK14-NEXT: br label [[OMP_PRECOND_END]]
11909 // CHECK14: omp.precond.end:
11910 // CHECK14-NEXT: ret void
11911 //
11912 //
11913 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..1
11914 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11915 // CHECK14-NEXT: entry:
11916 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11917 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11918 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11919 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11920 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
11921 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11922 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
11923 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11924 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
11925 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11926 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11927 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
11928 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11929 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11930 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11931 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11932 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4
11933 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11934 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11935 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11936 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11937 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
11938 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11939 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
11940 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
11941 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11942 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11943 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
11944 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
11945 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11946 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
11947 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11948 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11949 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11950 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4
11951 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11952 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
11953 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11954 // CHECK14: omp.precond.then:
11955 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11956 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11957 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
11958 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11959 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
11960 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11961 // CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
11962 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11963 // CHECK14-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
11964 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11965 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11966 // CHECK14-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11967 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
11968 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11969 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11970 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11971 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
11972 // CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11973 // CHECK14: cond.true:
11974 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11975 // CHECK14-NEXT: br label [[COND_END:%.*]]
11976 // CHECK14: cond.false:
11977 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11978 // CHECK14-NEXT: br label [[COND_END]]
11979 // CHECK14: cond.end:
11980 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
11981 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11982 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11983 // CHECK14-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
11984 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11985 // CHECK14: omp.inner.for.cond:
11986 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
11987 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
11988 // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
11989 // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11990 // CHECK14: omp.inner.for.body:
11991 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
11992 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
11993 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11994 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !17
11995 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !17
11996 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
11997 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
11998 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17
11999 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12000 // CHECK14: omp.body.continue:
12001 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12002 // CHECK14: omp.inner.for.inc:
12003 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
12004 // CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
12005 // CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
12006 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
12007 // CHECK14: omp.inner.for.end:
12008 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12009 // CHECK14: omp.loop.exit:
12010 // CHECK14-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12011 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
12012 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
12013 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12014 // CHECK14-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
12015 // CHECK14-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12016 // CHECK14: .omp.final.then:
12017 // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12018 // CHECK14-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
12019 // CHECK14-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
12020 // CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
12021 // CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
12022 // CHECK14-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4
12023 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
12024 // CHECK14: .omp.final.done:
12025 // CHECK14-NEXT: br label [[OMP_PRECOND_END]]
12026 // CHECK14: omp.precond.end:
12027 // CHECK14-NEXT: ret void
12028 //
12029 //
12030 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159
12031 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12032 // CHECK14-NEXT: entry:
12033 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
12034 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
12035 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
12036 // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
12037 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
12038 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
12039 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
12040 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
12041 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
12042 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
12043 // CHECK14-NEXT: ret void
12044 //
12045 //
12046 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..2
12047 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12048 // CHECK14-NEXT: entry:
12049 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12050 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12051 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
12052 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
12053 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
12054 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12055 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
12056 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12057 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12058 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
12059 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12060 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12061 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12062 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12063 // CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4
12064 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12065 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12066 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
12067 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
12068 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
12069 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
12070 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
12071 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
12072 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
12073 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
12074 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12075 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12076 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12077 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12078 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12079 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4
12080 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12081 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12082 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12083 // CHECK14: omp.precond.then:
12084 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12085 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12086 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
12087 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12088 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12089 // CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12090 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
12091 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12092 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12093 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12094 // CHECK14-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
12095 // CHECK14-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12096 // CHECK14: cond.true:
12097 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12098 // CHECK14-NEXT: br label [[COND_END:%.*]]
12099 // CHECK14: cond.false:
12100 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12101 // CHECK14-NEXT: br label [[COND_END]]
12102 // CHECK14: cond.end:
12103 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
12104 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12105 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12106 // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
12107 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12108 // CHECK14: omp.inner.for.cond:
12109 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
12110 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
12111 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
12112 // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12113 // CHECK14: omp.inner.for.body:
12114 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !22
12115 // CHECK14-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
12116 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
12117 // CHECK14-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
12118 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !22
12119 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12120 // CHECK14: omp.inner.for.inc:
12121 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
12122 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22
12123 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
12124 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
12125 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
12126 // CHECK14: omp.inner.for.end:
12127 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12128 // CHECK14: omp.loop.exit:
12129 // CHECK14-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12130 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
12131 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
12132 // CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12133 // CHECK14-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
12134 // CHECK14-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12135 // CHECK14: .omp.final.then:
12136 // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12137 // CHECK14-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0
12138 // CHECK14-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
12139 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
12140 // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
12141 // CHECK14-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
12142 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
12143 // CHECK14: .omp.final.done:
12144 // CHECK14-NEXT: br label [[OMP_PRECOND_END]]
12145 // CHECK14: omp.precond.end:
12146 // CHECK14-NEXT: ret void
12147 //
12148 //
12149 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..3
12150 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12151 // CHECK14-NEXT: entry:
12152 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12153 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12154 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12155 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12156 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
12157 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
12158 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
12159 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12160 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
12161 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12162 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12163 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
12164 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12165 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12166 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12167 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12168 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4
12169 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12170 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12171 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12172 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12173 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
12174 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
12175 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
12176 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
12177 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
12178 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
12179 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
12180 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
12181 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12182 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12183 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12184 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12185 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12186 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4
12187 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12188 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12189 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12190 // CHECK14: omp.precond.then:
12191 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12192 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12193 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
12194 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12195 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
12196 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12197 // CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
12198 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
12199 // CHECK14-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
12200 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12201 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12202 // CHECK14-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12203 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
12204 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12205 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12206 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12207 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
12208 // CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12209 // CHECK14: cond.true:
12210 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12211 // CHECK14-NEXT: br label [[COND_END:%.*]]
12212 // CHECK14: cond.false:
12213 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12214 // CHECK14-NEXT: br label [[COND_END]]
12215 // CHECK14: cond.end:
12216 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
12217 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12218 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12219 // CHECK14-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
12220 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12221 // CHECK14: omp.inner.for.cond:
12222 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
12223 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
12224 // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
12225 // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12226 // CHECK14: omp.inner.for.body:
12227 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
12228 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
12229 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12230 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !25
12231 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25
12232 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
12233 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
12234 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
12235 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12236 // CHECK14: omp.body.continue:
12237 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12238 // CHECK14: omp.inner.for.inc:
12239 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
12240 // CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
12241 // CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
12242 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
12243 // CHECK14: omp.inner.for.end:
12244 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12245 // CHECK14: omp.loop.exit:
12246 // CHECK14-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12247 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
12248 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
12249 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12250 // CHECK14-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
12251 // CHECK14-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12252 // CHECK14: .omp.final.then:
12253 // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12254 // CHECK14-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
12255 // CHECK14-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
12256 // CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
12257 // CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
12258 // CHECK14-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4
12259 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
12260 // CHECK14: .omp.final.done:
12261 // CHECK14-NEXT: br label [[OMP_PRECOND_END]]
12262 // CHECK14: omp.precond.end:
12263 // CHECK14-NEXT: ret void
12264 //
12265 //
12266 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164
12267 // CHECK14-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12268 // CHECK14-NEXT: entry:
12269 // CHECK14-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
12270 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
12271 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
12272 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
12273 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12274 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12275 // CHECK14-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
12276 // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
12277 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
12278 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
12279 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
12280 // CHECK14-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
12281 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
12282 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
12283 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
12284 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
12285 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12286 // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12287 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
12288 // CHECK14-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
12289 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
12290 // CHECK14-NEXT: ret void
12291 //
12292 //
12293 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..5
12294 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12295 // CHECK14-NEXT: entry:
12296 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12297 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12298 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
12299 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
12300 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
12301 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12302 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12303 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
12304 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12305 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
12306 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
12307 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12308 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12309 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12310 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12311 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4
12312 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12313 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12314 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12315 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
12316 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
12317 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
12318 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12319 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
12320 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
12321 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
12322 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12323 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
12324 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12325 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12326 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12327 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12328 // CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
12329 // CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
12330 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4
12331 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12332 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12333 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12334 // CHECK14: omp.precond.then:
12335 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12336 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12337 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
12338 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12339 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12340 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8
12341 // CHECK14-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12342 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
12343 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
12344 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12345 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12346 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
12347 // CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12348 // CHECK14: cond.true:
12349 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12350 // CHECK14-NEXT: br label [[COND_END:%.*]]
12351 // CHECK14: cond.false:
12352 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12353 // CHECK14-NEXT: br label [[COND_END]]
12354 // CHECK14: cond.end:
12355 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
12356 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12357 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12358 // CHECK14-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
12359 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12360 // CHECK14: omp.inner.for.cond:
12361 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
12362 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28
12363 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
12364 // CHECK14-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
12365 // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12366 // CHECK14: omp.inner.for.body:
12367 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
12368 // CHECK14-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
12369 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
12370 // CHECK14-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
12371 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !28
12372 // CHECK14-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12373 // CHECK14-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4, !llvm.access.group !28
12374 // CHECK14-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !28
12375 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]), !llvm.access.group !28
12376 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12377 // CHECK14: omp.inner.for.inc:
12378 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
12379 // CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
12380 // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
12381 // CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
12382 // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
12383 // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
12384 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
12385 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
12386 // CHECK14-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
12387 // CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
12388 // CHECK14-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
12389 // CHECK14-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
12390 // CHECK14-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
12391 // CHECK14-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28
12392 // CHECK14-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]
12393 // CHECK14-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]]
12394 // CHECK14: cond.true12:
12395 // CHECK14-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28
12396 // CHECK14-NEXT: br label [[COND_END14:%.*]]
12397 // CHECK14: cond.false13:
12398 // CHECK14-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
12399 // CHECK14-NEXT: br label [[COND_END14]]
12400 // CHECK14: cond.end14:
12401 // CHECK14-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ]
12402 // CHECK14-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
12403 // CHECK14-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
12404 // CHECK14-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
12405 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
12406 // CHECK14: omp.inner.for.end:
12407 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12408 // CHECK14: omp.loop.exit:
12409 // CHECK14-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12410 // CHECK14-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
12411 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]])
12412 // CHECK14-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12413 // CHECK14-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
12414 // CHECK14-NEXT: br i1 [[TMP37]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12415 // CHECK14: .omp.final.then:
12416 // CHECK14-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12417 // CHECK14-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP38]], 0
12418 // CHECK14-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1
12419 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV17]], 1
12420 // CHECK14-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL]]
12421 // CHECK14-NEXT: store i32 [[ADD18]], i32* [[I4]], align 4
12422 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
12423 // CHECK14: .omp.final.done:
12424 // CHECK14-NEXT: br label [[OMP_PRECOND_END]]
12425 // CHECK14: omp.precond.end:
12426 // CHECK14-NEXT: ret void
12427 //
12428 //
12429 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..6
12430 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12431 // CHECK14-NEXT: entry:
12432 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12433 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12434 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12435 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12436 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
12437 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
12438 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
12439 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12440 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12441 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
12442 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12443 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
12444 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
12445 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12446 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12447 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12448 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12449 // CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4
12450 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12451 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12452 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12453 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12454 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
12455 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
12456 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
12457 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12458 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
12459 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
12460 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
12461 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12462 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
12463 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12464 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12465 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12466 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12467 // CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
12468 // CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
12469 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4
12470 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12471 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12472 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12473 // CHECK14: omp.precond.then:
12474 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12475 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12476 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
12477 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12478 // CHECK14-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
12479 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12480 // CHECK14-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
12481 // CHECK14-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
12482 // CHECK14-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
12483 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12484 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12485 // CHECK14-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12486 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
12487 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12488 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12489 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12490 // CHECK14-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
12491 // CHECK14-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12492 // CHECK14: cond.true:
12493 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12494 // CHECK14-NEXT: br label [[COND_END:%.*]]
12495 // CHECK14: cond.false:
12496 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12497 // CHECK14-NEXT: br label [[COND_END]]
12498 // CHECK14: cond.end:
12499 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
12500 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12501 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12502 // CHECK14-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
12503 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12504 // CHECK14: omp.inner.for.cond:
12505 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
12506 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !31
12507 // CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
12508 // CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12509 // CHECK14: omp.inner.for.body:
12510 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
12511 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
12512 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12513 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !31
12514 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !31
12515 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
12516 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
12517 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !31
12518 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12519 // CHECK14: omp.body.continue:
12520 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12521 // CHECK14: omp.inner.for.inc:
12522 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
12523 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
12524 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
12525 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
12526 // CHECK14: omp.inner.for.end:
12527 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12528 // CHECK14: omp.loop.exit:
12529 // CHECK14-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12530 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
12531 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
12532 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12533 // CHECK14-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
12534 // CHECK14-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12535 // CHECK14: .omp.final.then:
12536 // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12537 // CHECK14-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP25]], 0
12538 // CHECK14-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
12539 // CHECK14-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
12540 // CHECK14-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
12541 // CHECK14-NEXT: store i32 [[ADD13]], i32* [[I6]], align 4
12542 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
12543 // CHECK14: .omp.final.done:
12544 // CHECK14-NEXT: br label [[OMP_PRECOND_END]]
12545 // CHECK14: omp.precond.end:
12546 // CHECK14-NEXT: ret void
12547 //
12548 //
12549 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169
12550 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12551 // CHECK14-NEXT: entry:
12552 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
12553 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
12554 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
12555 // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
12556 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
12557 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
12558 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
12559 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
12560 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
12561 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
12562 // CHECK14-NEXT: ret void
12563 //
12564 //
12565 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..8
12566 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12567 // CHECK14-NEXT: entry:
12568 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12569 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12570 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
12571 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
12572 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
12573 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12574 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
12575 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12576 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12577 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
12578 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12579 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12580 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12581 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12582 // CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4
12583 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12584 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12585 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
12586 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
12587 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
12588 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
12589 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
12590 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
12591 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
12592 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
12593 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12594 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12595 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12596 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12597 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12598 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4
12599 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12600 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12601 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12602 // CHECK14: omp.precond.then:
12603 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12604 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12605 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
12606 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12607 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12608 // CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12609 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
12610 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12611 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12612 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12613 // CHECK14-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
12614 // CHECK14-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12615 // CHECK14: cond.true:
12616 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12617 // CHECK14-NEXT: br label [[COND_END:%.*]]
12618 // CHECK14: cond.false:
12619 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12620 // CHECK14-NEXT: br label [[COND_END]]
12621 // CHECK14: cond.end:
12622 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
12623 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12624 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12625 // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
12626 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12627 // CHECK14: omp.inner.for.cond:
12628 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
12629 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
12630 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
12631 // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12632 // CHECK14: omp.inner.for.body:
12633 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34
12634 // CHECK14-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
12635 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
12636 // CHECK14-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
12637 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !34
12638 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12639 // CHECK14: omp.inner.for.inc:
12640 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
12641 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
12642 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
12643 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
12644 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
12645 // CHECK14: omp.inner.for.end:
12646 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12647 // CHECK14: omp.loop.exit:
12648 // CHECK14-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12649 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
12650 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
12651 // CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12652 // CHECK14-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
12653 // CHECK14-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12654 // CHECK14: .omp.final.then:
12655 // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12656 // CHECK14-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0
12657 // CHECK14-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
12658 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
12659 // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
12660 // CHECK14-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
12661 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
12662 // CHECK14: .omp.final.done:
12663 // CHECK14-NEXT: br label [[OMP_PRECOND_END]]
12664 // CHECK14: omp.precond.end:
12665 // CHECK14-NEXT: ret void
12666 //
12667 //
12668 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..9
12669 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12670 // CHECK14-NEXT: entry:
12671 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12672 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12673 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12674 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12675 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
12676 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
12677 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
12678 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12679 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
12680 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12681 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12682 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
12683 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12684 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12685 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12686 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12687 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4
12688 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12689 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12690 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12691 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12692 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
12693 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
12694 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
12695 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
12696 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
12697 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
12698 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
12699 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
12700 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12701 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12702 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12703 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12704 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12705 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4
12706 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12707 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12708 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12709 // CHECK14: omp.precond.then:
12710 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12711 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12712 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
12713 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12714 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
12715 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12716 // CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
12717 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
12718 // CHECK14-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
12719 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12720 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12721 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12722 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12723 // CHECK14-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12724 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
12725 // CHECK14-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
12726 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
12727 // CHECK14: omp.dispatch.cond:
12728 // CHECK14-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12729 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
12730 // CHECK14-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
12731 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
12732 // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12733 // CHECK14: omp.dispatch.body:
12734 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12735 // CHECK14-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
12736 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12737 // CHECK14: omp.inner.for.cond:
12738 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
12739 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !37
12740 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
12741 // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12742 // CHECK14: omp.inner.for.body:
12743 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
12744 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
12745 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12746 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !37
12747 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !37
12748 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
12749 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
12750 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !37
12751 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12752 // CHECK14: omp.body.continue:
12753 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12754 // CHECK14: omp.inner.for.inc:
12755 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
12756 // CHECK14-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
12757 // CHECK14-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
12758 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]]
12759 // CHECK14: omp.inner.for.end:
12760 // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
12761 // CHECK14: omp.dispatch.inc:
12762 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]]
12763 // CHECK14: omp.dispatch.end:
12764 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12765 // CHECK14-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
12766 // CHECK14-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12767 // CHECK14: .omp.final.then:
12768 // CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12769 // CHECK14-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0
12770 // CHECK14-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
12771 // CHECK14-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
12772 // CHECK14-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
12773 // CHECK14-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
12774 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
12775 // CHECK14: .omp.final.done:
12776 // CHECK14-NEXT: br label [[OMP_PRECOND_END]]
12777 // CHECK14: omp.precond.end:
12778 // CHECK14-NEXT: ret void
12779 //
12780 //
12781 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174
12782 // CHECK14-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12783 // CHECK14-NEXT: entry:
12784 // CHECK14-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
12785 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
12786 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
12787 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
12788 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12789 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12790 // CHECK14-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
12791 // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
12792 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
12793 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
12794 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
12795 // CHECK14-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
12796 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
12797 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
12798 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
12799 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
12800 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12801 // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12802 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
12803 // CHECK14-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
12804 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
12805 // CHECK14-NEXT: ret void
12806 //
12807 //
12808 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..11
12809 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12810 // CHECK14-NEXT: entry:
12811 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12812 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12813 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
12814 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
12815 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
12816 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12817 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12818 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
12819 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12820 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
12821 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
12822 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12823 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12824 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12825 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12826 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4
12827 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12828 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12829 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12830 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
12831 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
12832 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
12833 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12834 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
12835 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
12836 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
12837 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12838 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
12839 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12840 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12841 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12842 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12843 // CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
12844 // CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
12845 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4
12846 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12847 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12848 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12849 // CHECK14: omp.precond.then:
12850 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12851 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12852 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
12853 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12854 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12855 // CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12856 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
12857 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12858 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12859 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12860 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
12861 // CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12862 // CHECK14: cond.true:
12863 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12864 // CHECK14-NEXT: br label [[COND_END:%.*]]
12865 // CHECK14: cond.false:
12866 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12867 // CHECK14-NEXT: br label [[COND_END]]
12868 // CHECK14: cond.end:
12869 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
12870 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12871 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12872 // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
12873 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12874 // CHECK14: omp.inner.for.cond:
12875 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
12876 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
12877 // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
12878 // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12879 // CHECK14: omp.inner.for.body:
12880 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !40
12881 // CHECK14-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
12882 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
12883 // CHECK14-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
12884 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !40
12885 // CHECK14-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12886 // CHECK14-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4, !llvm.access.group !40
12887 // CHECK14-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !40
12888 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]), !llvm.access.group !40
12889 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12890 // CHECK14: omp.inner.for.inc:
12891 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
12892 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !40
12893 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
12894 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
12895 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]]
12896 // CHECK14: omp.inner.for.end:
12897 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12898 // CHECK14: omp.loop.exit:
12899 // CHECK14-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12900 // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
12901 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
12902 // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12903 // CHECK14-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
12904 // CHECK14-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12905 // CHECK14: .omp.final.then:
12906 // CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12907 // CHECK14-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP28]], 0
12908 // CHECK14-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
12909 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV9]], 1
12910 // CHECK14-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL]]
12911 // CHECK14-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
12912 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
12913 // CHECK14: .omp.final.done:
12914 // CHECK14-NEXT: br label [[OMP_PRECOND_END]]
12915 // CHECK14: omp.precond.end:
12916 // CHECK14-NEXT: ret void
12917 //
12918 //
12919 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..12
12920 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12921 // CHECK14-NEXT: entry:
12922 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12923 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12924 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12925 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12926 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
12927 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
12928 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
12929 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12930 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12931 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
12932 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12933 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
12934 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
12935 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12936 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12937 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12938 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12939 // CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4
12940 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12941 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12942 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12943 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12944 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
12945 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
12946 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
12947 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12948 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
12949 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
12950 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
12951 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12952 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
12953 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12954 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12955 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12956 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12957 // CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
12958 // CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
12959 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4
12960 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12961 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12962 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12963 // CHECK14: omp.precond.then:
12964 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12965 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12966 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
12967 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12968 // CHECK14-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
12969 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12970 // CHECK14-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
12971 // CHECK14-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
12972 // CHECK14-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
12973 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12974 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12975 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
12976 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12977 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12978 // CHECK14-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12979 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
12980 // CHECK14-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
12981 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
12982 // CHECK14: omp.dispatch.cond:
12983 // CHECK14-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12984 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
12985 // CHECK14-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
12986 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
12987 // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12988 // CHECK14: omp.dispatch.body:
12989 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12990 // CHECK14-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
12991 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12992 // CHECK14: omp.inner.for.cond:
12993 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
12994 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !43
12995 // CHECK14-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
12996 // CHECK14-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12997 // CHECK14: omp.inner.for.body:
12998 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
12999 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
13000 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13001 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !43
13002 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !43
13003 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
13004 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
13005 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !43
13006 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13007 // CHECK14: omp.body.continue:
13008 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13009 // CHECK14: omp.inner.for.inc:
13010 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
13011 // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
13012 // CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
13013 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
13014 // CHECK14: omp.inner.for.end:
13015 // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
13016 // CHECK14: omp.dispatch.inc:
13017 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]]
13018 // CHECK14: omp.dispatch.end:
13019 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13020 // CHECK14-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
13021 // CHECK14-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13022 // CHECK14: .omp.final.then:
13023 // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13024 // CHECK14-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP25]], 0
13025 // CHECK14-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
13026 // CHECK14-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
13027 // CHECK14-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
13028 // CHECK14-NEXT: store i32 [[ADD12]], i32* [[I6]], align 4
13029 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
13030 // CHECK14: .omp.final.done:
13031 // CHECK14-NEXT: br label [[OMP_PRECOND_END]]
13032 // CHECK14: omp.precond.end:
13033 // CHECK14-NEXT: ret void
13034 //
13035 //
13036 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
13037 // CHECK14-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
13038 // CHECK14-NEXT: entry:
13039 // CHECK14-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
13040 // CHECK14-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
13041 // CHECK14-NEXT: [[M:%.*]] = alloca i32, align 4
13042 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
13043 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
13044 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
13045 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
13046 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
13047 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
13048 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
13049 // CHECK14-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
13050 // CHECK14-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
13051 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8
13052 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8
13053 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8
13054 // CHECK14-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
13055 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8
13056 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8
13057 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8
13058 // CHECK14-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
13059 // CHECK14-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8
13060 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8
13061 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8
13062 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8
13063 // CHECK14-NEXT: [[_TMP24:%.*]] = alloca i32, align 4
13064 // CHECK14-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
13065 // CHECK14-NEXT: store i32 10, i32* [[M]], align 4
13066 // CHECK14-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13067 // CHECK14-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
13068 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
13069 // CHECK14-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13070 // CHECK14-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
13071 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
13072 // CHECK14-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
13073 // CHECK14-NEXT: store i8* null, i8** [[TMP4]], align 8
13074 // CHECK14-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13075 // CHECK14-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13076 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
13077 // CHECK14-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13078 // CHECK14-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
13079 // CHECK14-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
13080 // CHECK14: omp_offload.failed:
13081 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122([10 x i32]* [[A]]) #[[ATTR3]]
13082 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]]
13083 // CHECK14: omp_offload.cont:
13084 // CHECK14-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
13085 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
13086 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
13087 // CHECK14-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
13088 // CHECK14-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
13089 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
13090 // CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
13091 // CHECK14-NEXT: store i8* null, i8** [[TMP13]], align 8
13092 // CHECK14-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
13093 // CHECK14-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
13094 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
13095 // CHECK14-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13096 // CHECK14-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
13097 // CHECK14-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
13098 // CHECK14: omp_offload.failed5:
13099 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127([10 x i32]* [[A]]) #[[ATTR3]]
13100 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT6]]
13101 // CHECK14: omp_offload.cont6:
13102 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4
13103 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32*
13104 // CHECK14-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4
13105 // CHECK14-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8
13106 // CHECK14-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
13107 // CHECK14-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
13108 // CHECK14-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8
13109 // CHECK14-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
13110 // CHECK14-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
13111 // CHECK14-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8
13112 // CHECK14-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
13113 // CHECK14-NEXT: store i8* null, i8** [[TMP24]], align 8
13114 // CHECK14-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
13115 // CHECK14-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
13116 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8
13117 // CHECK14-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
13118 // CHECK14-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
13119 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8
13120 // CHECK14-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1
13121 // CHECK14-NEXT: store i8* null, i8** [[TMP29]], align 8
13122 // CHECK14-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
13123 // CHECK14-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
13124 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
13125 // CHECK14-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13126 // CHECK14-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
13127 // CHECK14-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
13128 // CHECK14: omp_offload.failed11:
13129 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
13130 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT12]]
13131 // CHECK14: omp_offload.cont12:
13132 // CHECK14-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
13133 // CHECK14-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
13134 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8
13135 // CHECK14-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
13136 // CHECK14-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
13137 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8
13138 // CHECK14-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0
13139 // CHECK14-NEXT: store i8* null, i8** [[TMP38]], align 8
13140 // CHECK14-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
13141 // CHECK14-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
13142 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
13143 // CHECK14-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13144 // CHECK14-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
13145 // CHECK14-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
13146 // CHECK14: omp_offload.failed17:
13147 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137([10 x i32]* [[A]]) #[[ATTR3]]
13148 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT18]]
13149 // CHECK14: omp_offload.cont18:
13150 // CHECK14-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4
13151 // CHECK14-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32*
13152 // CHECK14-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4
13153 // CHECK14-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8
13154 // CHECK14-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
13155 // CHECK14-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
13156 // CHECK14-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8
13157 // CHECK14-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
13158 // CHECK14-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
13159 // CHECK14-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8
13160 // CHECK14-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
13161 // CHECK14-NEXT: store i8* null, i8** [[TMP49]], align 8
13162 // CHECK14-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
13163 // CHECK14-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
13164 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8
13165 // CHECK14-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
13166 // CHECK14-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
13167 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8
13168 // CHECK14-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
13169 // CHECK14-NEXT: store i8* null, i8** [[TMP54]], align 8
13170 // CHECK14-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
13171 // CHECK14-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
13172 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
13173 // CHECK14-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13174 // CHECK14-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
13175 // CHECK14-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]]
13176 // CHECK14: omp_offload.failed25:
13177 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
13178 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT26]]
13179 // CHECK14: omp_offload.cont26:
13180 // CHECK14-NEXT: ret i32 0
13181 //
13182 //
13183 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122
13184 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13185 // CHECK14-NEXT: entry:
13186 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13187 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13188 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13189 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
13190 // CHECK14-NEXT: ret void
13191 //
13192 //
13193 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..14
13194 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13195 // CHECK14-NEXT: entry:
13196 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13197 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13198 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13199 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13200 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
13201 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13202 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13203 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13204 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13205 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
13206 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13207 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13208 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13209 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13210 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13211 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
13212 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13213 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13214 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13215 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
13216 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13217 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13218 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
13219 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13220 // CHECK14: cond.true:
13221 // CHECK14-NEXT: br label [[COND_END:%.*]]
13222 // CHECK14: cond.false:
13223 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13224 // CHECK14-NEXT: br label [[COND_END]]
13225 // CHECK14: cond.end:
13226 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
13227 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13228 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13229 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
13230 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13231 // CHECK14: omp.inner.for.cond:
13232 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
13233 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
13234 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
13235 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13236 // CHECK14: omp.inner.for.body:
13237 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46
13238 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
13239 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
13240 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
13241 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !46
13242 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13243 // CHECK14: omp.inner.for.inc:
13244 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
13245 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46
13246 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
13247 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
13248 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
13249 // CHECK14: omp.inner.for.end:
13250 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13251 // CHECK14: omp.loop.exit:
13252 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
13253 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13254 // CHECK14-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
13255 // CHECK14-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13256 // CHECK14: .omp.final.then:
13257 // CHECK14-NEXT: store i32 10, i32* [[I]], align 4
13258 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
13259 // CHECK14: .omp.final.done:
13260 // CHECK14-NEXT: ret void
13261 //
13262 //
13263 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..15
13264 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13265 // CHECK14-NEXT: entry:
13266 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13267 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13268 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
13269 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
13270 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13271 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13272 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
13273 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13274 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13275 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13276 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13277 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
13278 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13279 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13280 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13281 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13282 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13283 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13284 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13285 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
13286 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13287 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
13288 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13289 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
13290 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
13291 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
13292 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13293 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13294 // CHECK14-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13295 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
13296 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13297 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13298 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
13299 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13300 // CHECK14: cond.true:
13301 // CHECK14-NEXT: br label [[COND_END:%.*]]
13302 // CHECK14: cond.false:
13303 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13304 // CHECK14-NEXT: br label [[COND_END]]
13305 // CHECK14: cond.end:
13306 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
13307 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13308 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13309 // CHECK14-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
13310 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13311 // CHECK14: omp.inner.for.cond:
13312 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
13313 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49
13314 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
13315 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13316 // CHECK14: omp.inner.for.body:
13317 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
13318 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
13319 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13320 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49
13321 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !49
13322 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
13323 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
13324 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !49
13325 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13326 // CHECK14: omp.body.continue:
13327 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13328 // CHECK14: omp.inner.for.inc:
13329 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
13330 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
13331 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
13332 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]]
13333 // CHECK14: omp.inner.for.end:
13334 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13335 // CHECK14: omp.loop.exit:
13336 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
13337 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13338 // CHECK14-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
13339 // CHECK14-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13340 // CHECK14: .omp.final.then:
13341 // CHECK14-NEXT: store i32 10, i32* [[I]], align 4
13342 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
13343 // CHECK14: .omp.final.done:
13344 // CHECK14-NEXT: ret void
13345 //
13346 //
13347 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127
13348 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13349 // CHECK14-NEXT: entry:
13350 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13351 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13352 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13353 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
13354 // CHECK14-NEXT: ret void
13355 //
13356 //
13357 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..17
13358 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13359 // CHECK14-NEXT: entry:
13360 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13361 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13362 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13363 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13364 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
13365 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13366 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13367 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13368 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13369 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
13370 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13371 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13372 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13373 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13374 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13375 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
13376 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13377 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13378 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13379 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
13380 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13381 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13382 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
13383 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13384 // CHECK14: cond.true:
13385 // CHECK14-NEXT: br label [[COND_END:%.*]]
13386 // CHECK14: cond.false:
13387 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13388 // CHECK14-NEXT: br label [[COND_END]]
13389 // CHECK14: cond.end:
13390 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
13391 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13392 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13393 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
13394 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13395 // CHECK14: omp.inner.for.cond:
13396 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
13397 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52
13398 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
13399 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13400 // CHECK14: omp.inner.for.body:
13401 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !52
13402 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
13403 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52
13404 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
13405 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !52
13406 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13407 // CHECK14: omp.inner.for.inc:
13408 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
13409 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !52
13410 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
13411 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
13412 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
13413 // CHECK14: omp.inner.for.end:
13414 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13415 // CHECK14: omp.loop.exit:
13416 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
13417 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13418 // CHECK14-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
13419 // CHECK14-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13420 // CHECK14: .omp.final.then:
13421 // CHECK14-NEXT: store i32 10, i32* [[I]], align 4
13422 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
13423 // CHECK14: .omp.final.done:
13424 // CHECK14-NEXT: ret void
13425 //
13426 //
13427 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..18
13428 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13429 // CHECK14-NEXT: entry:
13430 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13431 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13432 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
13433 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
13434 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13435 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13436 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
13437 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13438 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13439 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13440 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13441 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
13442 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13443 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13444 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13445 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13446 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13447 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13448 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13449 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
13450 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13451 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
13452 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13453 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
13454 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
13455 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
13456 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13457 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13458 // CHECK14-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13459 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
13460 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13461 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13462 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
13463 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13464 // CHECK14: cond.true:
13465 // CHECK14-NEXT: br label [[COND_END:%.*]]
13466 // CHECK14: cond.false:
13467 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13468 // CHECK14-NEXT: br label [[COND_END]]
13469 // CHECK14: cond.end:
13470 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
13471 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13472 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13473 // CHECK14-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
13474 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13475 // CHECK14: omp.inner.for.cond:
13476 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
13477 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !55
13478 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
13479 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13480 // CHECK14: omp.inner.for.body:
13481 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
13482 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
13483 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13484 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !55
13485 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !55
13486 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
13487 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
13488 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !55
13489 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13490 // CHECK14: omp.body.continue:
13491 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13492 // CHECK14: omp.inner.for.inc:
13493 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
13494 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
13495 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
13496 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
13497 // CHECK14: omp.inner.for.end:
13498 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13499 // CHECK14: omp.loop.exit:
13500 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
13501 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13502 // CHECK14-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
13503 // CHECK14-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13504 // CHECK14: .omp.final.then:
13505 // CHECK14-NEXT: store i32 10, i32* [[I]], align 4
13506 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
13507 // CHECK14: .omp.final.done:
13508 // CHECK14-NEXT: ret void
13509 //
13510 //
13511 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132
13512 // CHECK14-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13513 // CHECK14-NEXT: entry:
13514 // CHECK14-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
13515 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13516 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13517 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
13518 // CHECK14-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
13519 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13520 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
13521 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13522 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
13523 // CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
13524 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13525 // CHECK14-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
13526 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
13527 // CHECK14-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
13528 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
13529 // CHECK14-NEXT: ret void
13530 //
13531 //
13532 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..21
13533 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13534 // CHECK14-NEXT: entry:
13535 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13536 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13537 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13538 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
13539 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13540 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
13541 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13542 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13543 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13544 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13545 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
13546 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
13547 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13548 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13549 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13550 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
13551 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13552 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
13553 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13554 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
13555 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13556 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13557 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13558 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
13559 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13560 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13561 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
13562 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13563 // CHECK14: cond.true:
13564 // CHECK14-NEXT: br label [[COND_END:%.*]]
13565 // CHECK14: cond.false:
13566 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13567 // CHECK14-NEXT: br label [[COND_END]]
13568 // CHECK14: cond.end:
13569 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
13570 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13571 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13572 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
13573 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13574 // CHECK14: omp.inner.for.cond:
13575 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
13576 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
13577 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
13578 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13579 // CHECK14: omp.inner.for.body:
13580 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !58
13581 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
13582 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
13583 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
13584 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !58
13585 // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
13586 // CHECK14-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !58
13587 // CHECK14-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !58
13588 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !58
13589 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13590 // CHECK14: omp.inner.for.inc:
13591 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
13592 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !58
13593 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
13594 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
13595 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
13596 // CHECK14: omp.inner.for.end:
13597 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13598 // CHECK14: omp.loop.exit:
13599 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
13600 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13601 // CHECK14-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
13602 // CHECK14-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13603 // CHECK14: .omp.final.then:
13604 // CHECK14-NEXT: store i32 10, i32* [[I]], align 4
13605 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
13606 // CHECK14: .omp.final.done:
13607 // CHECK14-NEXT: ret void
13608 //
13609 //
13610 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..22
13611 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13612 // CHECK14-NEXT: entry:
13613 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13614 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13615 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
13616 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
13617 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13618 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
13619 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13620 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
13621 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13622 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13623 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13624 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13625 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
13626 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13627 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13628 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13629 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13630 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13631 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
13632 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13633 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
13634 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13635 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
13636 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13637 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
13638 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13639 // CHECK14-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
13640 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
13641 // CHECK14-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
13642 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13643 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13644 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
13645 // CHECK14-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13646 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
13647 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
13648 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
13649 // CHECK14: omp.dispatch.cond:
13650 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13651 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13652 // CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
13653 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
13654 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13655 // CHECK14: cond.true:
13656 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13657 // CHECK14-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
13658 // CHECK14-NEXT: br label [[COND_END:%.*]]
13659 // CHECK14: cond.false:
13660 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13661 // CHECK14-NEXT: br label [[COND_END]]
13662 // CHECK14: cond.end:
13663 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
13664 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13665 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13666 // CHECK14-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
13667 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13668 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13669 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
13670 // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13671 // CHECK14: omp.dispatch.body:
13672 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13673 // CHECK14: omp.inner.for.cond:
13674 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
13675 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61
13676 // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
13677 // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13678 // CHECK14: omp.inner.for.body:
13679 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
13680 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
13681 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13682 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !61
13683 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !61
13684 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
13685 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
13686 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !61
13687 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13688 // CHECK14: omp.body.continue:
13689 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13690 // CHECK14: omp.inner.for.inc:
13691 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
13692 // CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
13693 // CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
13694 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]]
13695 // CHECK14: omp.inner.for.end:
13696 // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
13697 // CHECK14: omp.dispatch.inc:
13698 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13699 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13700 // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
13701 // CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
13702 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13703 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13704 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
13705 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
13706 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]]
13707 // CHECK14: omp.dispatch.end:
13708 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
13709 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13710 // CHECK14-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
13711 // CHECK14-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13712 // CHECK14: .omp.final.then:
13713 // CHECK14-NEXT: store i32 10, i32* [[I]], align 4
13714 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
13715 // CHECK14: .omp.final.done:
13716 // CHECK14-NEXT: ret void
13717 //
13718 //
13719 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137
13720 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13721 // CHECK14-NEXT: entry:
13722 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13723 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13724 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13725 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
13726 // CHECK14-NEXT: ret void
13727 //
13728 //
13729 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..25
13730 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13731 // CHECK14-NEXT: entry:
13732 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13733 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13734 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13735 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13736 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
13737 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13738 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13739 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13740 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13741 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
13742 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13743 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13744 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13745 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13746 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13747 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
13748 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13749 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13750 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13751 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
13752 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13753 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13754 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
13755 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13756 // CHECK14: cond.true:
13757 // CHECK14-NEXT: br label [[COND_END:%.*]]
13758 // CHECK14: cond.false:
13759 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13760 // CHECK14-NEXT: br label [[COND_END]]
13761 // CHECK14: cond.end:
13762 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
13763 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13764 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13765 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
13766 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13767 // CHECK14: omp.inner.for.cond:
13768 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
13769 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64
13770 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
13771 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13772 // CHECK14: omp.inner.for.body:
13773 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !64
13774 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
13775 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64
13776 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
13777 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !64
13778 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13779 // CHECK14: omp.inner.for.inc:
13780 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
13781 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !64
13782 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
13783 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
13784 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP65:![0-9]+]]
13785 // CHECK14: omp.inner.for.end:
13786 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13787 // CHECK14: omp.loop.exit:
13788 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
13789 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13790 // CHECK14-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
13791 // CHECK14-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13792 // CHECK14: .omp.final.then:
13793 // CHECK14-NEXT: store i32 10, i32* [[I]], align 4
13794 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
13795 // CHECK14: .omp.final.done:
13796 // CHECK14-NEXT: ret void
13797 //
13798 //
13799 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..26
13800 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13801 // CHECK14-NEXT: entry:
13802 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13803 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13804 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
13805 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
13806 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13807 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13808 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
13809 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13810 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13811 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13812 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13813 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
13814 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13815 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13816 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13817 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13818 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13819 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13820 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13821 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
13822 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13823 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
13824 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13825 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
13826 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
13827 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
13828 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13829 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13830 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13831 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13832 // CHECK14-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13833 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
13834 // CHECK14-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
13835 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
13836 // CHECK14: omp.dispatch.cond:
13837 // CHECK14-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
13838 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
13839 // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13840 // CHECK14: omp.dispatch.body:
13841 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13842 // CHECK14-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
13843 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13844 // CHECK14: omp.inner.for.cond:
13845 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
13846 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !67
13847 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
13848 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13849 // CHECK14: omp.inner.for.body:
13850 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
13851 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
13852 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13853 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !67
13854 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !67
13855 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
13856 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
13857 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !67
13858 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13859 // CHECK14: omp.body.continue:
13860 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13861 // CHECK14: omp.inner.for.inc:
13862 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
13863 // CHECK14-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
13864 // CHECK14-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
13865 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP68:![0-9]+]]
13866 // CHECK14: omp.inner.for.end:
13867 // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
13868 // CHECK14: omp.dispatch.inc:
13869 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]]
13870 // CHECK14: omp.dispatch.end:
13871 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13872 // CHECK14-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
13873 // CHECK14-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13874 // CHECK14: .omp.final.then:
13875 // CHECK14-NEXT: store i32 10, i32* [[I]], align 4
13876 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
13877 // CHECK14: .omp.final.done:
13878 // CHECK14-NEXT: ret void
13879 //
13880 //
13881 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142
13882 // CHECK14-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13883 // CHECK14-NEXT: entry:
13884 // CHECK14-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
13885 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13886 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13887 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
13888 // CHECK14-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
13889 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13890 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
13891 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13892 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
13893 // CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
13894 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13895 // CHECK14-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
13896 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
13897 // CHECK14-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
13898 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
13899 // CHECK14-NEXT: ret void
13900 //
13901 //
13902 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..29
13903 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13904 // CHECK14-NEXT: entry:
13905 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13906 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13907 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13908 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
13909 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13910 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
13911 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13912 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13913 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13914 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13915 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
13916 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
13917 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13918 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13919 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13920 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
13921 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13922 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
13923 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13924 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
13925 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13926 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13927 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13928 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
13929 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13930 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13931 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
13932 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13933 // CHECK14: cond.true:
13934 // CHECK14-NEXT: br label [[COND_END:%.*]]
13935 // CHECK14: cond.false:
13936 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13937 // CHECK14-NEXT: br label [[COND_END]]
13938 // CHECK14: cond.end:
13939 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
13940 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13941 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13942 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
13943 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13944 // CHECK14: omp.inner.for.cond:
13945 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
13946 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70
13947 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
13948 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13949 // CHECK14: omp.inner.for.body:
13950 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !70
13951 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
13952 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70
13953 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
13954 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !70
13955 // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
13956 // CHECK14-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !70
13957 // CHECK14-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !70
13958 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !70
13959 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13960 // CHECK14: omp.inner.for.inc:
13961 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
13962 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !70
13963 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
13964 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
13965 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP71:![0-9]+]]
13966 // CHECK14: omp.inner.for.end:
13967 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13968 // CHECK14: omp.loop.exit:
13969 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
13970 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13971 // CHECK14-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
13972 // CHECK14-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13973 // CHECK14: .omp.final.then:
13974 // CHECK14-NEXT: store i32 10, i32* [[I]], align 4
13975 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
13976 // CHECK14: .omp.final.done:
13977 // CHECK14-NEXT: ret void
13978 //
13979 //
13980 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..30
13981 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13982 // CHECK14-NEXT: entry:
13983 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13984 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13985 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
13986 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
13987 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13988 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
13989 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13990 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
13991 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13992 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13993 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13994 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13995 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
13996 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13997 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13998 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13999 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
14000 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
14001 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
14002 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
14003 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
14004 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14005 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
14006 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
14007 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
14008 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
14009 // CHECK14-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
14010 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
14011 // CHECK14-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
14012 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14013 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14014 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
14015 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14016 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14017 // CHECK14-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
14018 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
14019 // CHECK14-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
14020 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
14021 // CHECK14: omp.dispatch.cond:
14022 // CHECK14-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
14023 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
14024 // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14025 // CHECK14: omp.dispatch.body:
14026 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14027 // CHECK14-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
14028 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14029 // CHECK14: omp.inner.for.cond:
14030 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
14031 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !73
14032 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
14033 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14034 // CHECK14: omp.inner.for.body:
14035 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
14036 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
14037 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14038 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !73
14039 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !73
14040 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
14041 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
14042 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !73
14043 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14044 // CHECK14: omp.body.continue:
14045 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14046 // CHECK14: omp.inner.for.inc:
14047 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
14048 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
14049 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
14050 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP74:![0-9]+]]
14051 // CHECK14: omp.inner.for.end:
14052 // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
14053 // CHECK14: omp.dispatch.inc:
14054 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]]
14055 // CHECK14: omp.dispatch.end:
14056 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
14057 // CHECK14-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
14058 // CHECK14-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
14059 // CHECK14: .omp.final.then:
14060 // CHECK14-NEXT: store i32 10, i32* [[I]], align 4
14061 // CHECK14-NEXT: br label [[DOTOMP_FINAL_DONE]]
14062 // CHECK14: .omp.final.done:
14063 // CHECK14-NEXT: ret void
14064 //
14065 //
14066 // CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
14067 // CHECK14-SAME: () #[[ATTR5:[0-9]+]] {
14068 // CHECK14-NEXT: entry:
14069 // CHECK14-NEXT: call void @__tgt_register_requires(i64 1)
14070 // CHECK14-NEXT: ret void
14071 //
14072 //
14073 // CHECK15-LABEL: define {{[^@]+}}@main
14074 // CHECK15-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
14075 // CHECK15-NEXT: entry:
14076 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
14077 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
14078 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
14079 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4
14080 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
14081 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
14082 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4
14083 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
14084 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
14085 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
14086 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
14087 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
14088 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
14089 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14090 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14091 // CHECK15-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
14092 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
14093 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
14094 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
14095 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
14096 // CHECK15-NEXT: [[_TMP9:%.*]] = alloca i32, align 4
14097 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
14098 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
14099 // CHECK15-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
14100 // CHECK15-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8
14101 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8
14102 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8
14103 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8
14104 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8
14105 // CHECK15-NEXT: [[_TMP25:%.*]] = alloca i32, align 4
14106 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
14107 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
14108 // CHECK15-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8
14109 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8
14110 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8
14111 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8
14112 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8
14113 // CHECK15-NEXT: [[_TMP40:%.*]] = alloca i32, align 4
14114 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
14115 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
14116 // CHECK15-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8
14117 // CHECK15-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8
14118 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8
14119 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8
14120 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8
14121 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8
14122 // CHECK15-NEXT: [[_TMP57:%.*]] = alloca i32, align 4
14123 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
14124 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4
14125 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
14126 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
14127 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
14128 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4
14129 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
14130 // CHECK15-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
14131 // CHECK15-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
14132 // CHECK15-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
14133 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
14134 // CHECK15-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
14135 // CHECK15-NEXT: store i32 10, i32* [[M]], align 4
14136 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
14137 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
14138 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
14139 // CHECK15-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
14140 // CHECK15-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
14141 // CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
14142 // CHECK15-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
14143 // CHECK15-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
14144 // CHECK15-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
14145 // CHECK15-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
14146 // CHECK15-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
14147 // CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
14148 // CHECK15-NEXT: store i64 4, i64* [[TMP10]], align 8
14149 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
14150 // CHECK15-NEXT: store i8* null, i8** [[TMP11]], align 8
14151 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
14152 // CHECK15-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
14153 // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
14154 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
14155 // CHECK15-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
14156 // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
14157 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
14158 // CHECK15-NEXT: store i64 8, i64* [[TMP16]], align 8
14159 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
14160 // CHECK15-NEXT: store i8* null, i8** [[TMP17]], align 8
14161 // CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
14162 // CHECK15-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
14163 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8
14164 // CHECK15-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
14165 // CHECK15-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
14166 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8
14167 // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
14168 // CHECK15-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8
14169 // CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
14170 // CHECK15-NEXT: store i8* null, i8** [[TMP23]], align 8
14171 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
14172 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
14173 // CHECK15-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
14174 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
14175 // CHECK15-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
14176 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14177 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
14178 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14179 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
14180 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14181 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14182 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
14183 // CHECK15-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
14184 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
14185 // CHECK15-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14186 // CHECK15-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
14187 // CHECK15-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
14188 // CHECK15: omp_offload.failed:
14189 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
14190 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]]
14191 // CHECK15: omp_offload.cont:
14192 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4
14193 // CHECK15-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
14194 // CHECK15-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4
14195 // CHECK15-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
14196 // CHECK15-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
14197 // CHECK15-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
14198 // CHECK15-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
14199 // CHECK15-NEXT: store i64 [[TMP34]], i64* [[TMP37]], align 8
14200 // CHECK15-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
14201 // CHECK15-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
14202 // CHECK15-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8
14203 // CHECK15-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
14204 // CHECK15-NEXT: store i64 4, i64* [[TMP40]], align 8
14205 // CHECK15-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
14206 // CHECK15-NEXT: store i8* null, i8** [[TMP41]], align 8
14207 // CHECK15-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
14208 // CHECK15-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
14209 // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP43]], align 8
14210 // CHECK15-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
14211 // CHECK15-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
14212 // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP45]], align 8
14213 // CHECK15-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
14214 // CHECK15-NEXT: store i64 8, i64* [[TMP46]], align 8
14215 // CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
14216 // CHECK15-NEXT: store i8* null, i8** [[TMP47]], align 8
14217 // CHECK15-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
14218 // CHECK15-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
14219 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8
14220 // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
14221 // CHECK15-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
14222 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP51]], align 8
14223 // CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
14224 // CHECK15-NEXT: store i64 [[TMP35]], i64* [[TMP52]], align 8
14225 // CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
14226 // CHECK15-NEXT: store i8* null, i8** [[TMP53]], align 8
14227 // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
14228 // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
14229 // CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
14230 // CHECK15-NEXT: [[TMP57:%.*]] = load i32, i32* [[N]], align 4
14231 // CHECK15-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
14232 // CHECK15-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
14233 // CHECK15-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
14234 // CHECK15-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
14235 // CHECK15-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
14236 // CHECK15-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
14237 // CHECK15-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
14238 // CHECK15-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
14239 // CHECK15-NEXT: [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
14240 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
14241 // CHECK15-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14242 // CHECK15-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
14243 // CHECK15-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
14244 // CHECK15: omp_offload.failed16:
14245 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
14246 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT17]]
14247 // CHECK15: omp_offload.cont17:
14248 // CHECK15-NEXT: [[TMP63:%.*]] = load i32, i32* [[M]], align 4
14249 // CHECK15-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
14250 // CHECK15-NEXT: store i32 [[TMP63]], i32* [[CONV18]], align 4
14251 // CHECK15-NEXT: [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8
14252 // CHECK15-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4
14253 // CHECK15-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
14254 // CHECK15-NEXT: store i32 [[TMP65]], i32* [[CONV20]], align 4
14255 // CHECK15-NEXT: [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8
14256 // CHECK15-NEXT: [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4
14257 // CHECK15-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
14258 // CHECK15-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64*
14259 // CHECK15-NEXT: store i64 [[TMP64]], i64* [[TMP69]], align 8
14260 // CHECK15-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
14261 // CHECK15-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64*
14262 // CHECK15-NEXT: store i64 [[TMP64]], i64* [[TMP71]], align 8
14263 // CHECK15-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
14264 // CHECK15-NEXT: store i64 4, i64* [[TMP72]], align 8
14265 // CHECK15-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
14266 // CHECK15-NEXT: store i8* null, i8** [[TMP73]], align 8
14267 // CHECK15-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
14268 // CHECK15-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64*
14269 // CHECK15-NEXT: store i64 [[TMP66]], i64* [[TMP75]], align 8
14270 // CHECK15-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
14271 // CHECK15-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64*
14272 // CHECK15-NEXT: store i64 [[TMP66]], i64* [[TMP77]], align 8
14273 // CHECK15-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1
14274 // CHECK15-NEXT: store i64 4, i64* [[TMP78]], align 8
14275 // CHECK15-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
14276 // CHECK15-NEXT: store i8* null, i8** [[TMP79]], align 8
14277 // CHECK15-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2
14278 // CHECK15-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64*
14279 // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP81]], align 8
14280 // CHECK15-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2
14281 // CHECK15-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64*
14282 // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP83]], align 8
14283 // CHECK15-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2
14284 // CHECK15-NEXT: store i64 8, i64* [[TMP84]], align 8
14285 // CHECK15-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2
14286 // CHECK15-NEXT: store i8* null, i8** [[TMP85]], align 8
14287 // CHECK15-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3
14288 // CHECK15-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32**
14289 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 8
14290 // CHECK15-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3
14291 // CHECK15-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
14292 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 8
14293 // CHECK15-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3
14294 // CHECK15-NEXT: store i64 [[TMP67]], i64* [[TMP90]], align 8
14295 // CHECK15-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3
14296 // CHECK15-NEXT: store i8* null, i8** [[TMP91]], align 8
14297 // CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
14298 // CHECK15-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
14299 // CHECK15-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
14300 // CHECK15-NEXT: [[TMP95:%.*]] = load i32, i32* [[N]], align 4
14301 // CHECK15-NEXT: store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4
14302 // CHECK15-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
14303 // CHECK15-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0
14304 // CHECK15-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1
14305 // CHECK15-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1
14306 // CHECK15-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4
14307 // CHECK15-NEXT: [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
14308 // CHECK15-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1
14309 // CHECK15-NEXT: [[TMP98:%.*]] = zext i32 [[ADD31]] to i64
14310 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]])
14311 // CHECK15-NEXT: [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14312 // CHECK15-NEXT: [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0
14313 // CHECK15-NEXT: br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
14314 // CHECK15: omp_offload.failed32:
14315 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
14316 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT33]]
14317 // CHECK15: omp_offload.cont33:
14318 // CHECK15-NEXT: [[TMP101:%.*]] = load i32, i32* [[N]], align 4
14319 // CHECK15-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32*
14320 // CHECK15-NEXT: store i32 [[TMP101]], i32* [[CONV35]], align 4
14321 // CHECK15-NEXT: [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8
14322 // CHECK15-NEXT: [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4
14323 // CHECK15-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
14324 // CHECK15-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
14325 // CHECK15-NEXT: store i64 [[TMP102]], i64* [[TMP105]], align 8
14326 // CHECK15-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
14327 // CHECK15-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64*
14328 // CHECK15-NEXT: store i64 [[TMP102]], i64* [[TMP107]], align 8
14329 // CHECK15-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
14330 // CHECK15-NEXT: store i64 4, i64* [[TMP108]], align 8
14331 // CHECK15-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0
14332 // CHECK15-NEXT: store i8* null, i8** [[TMP109]], align 8
14333 // CHECK15-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1
14334 // CHECK15-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64*
14335 // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP111]], align 8
14336 // CHECK15-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1
14337 // CHECK15-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64*
14338 // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP113]], align 8
14339 // CHECK15-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1
14340 // CHECK15-NEXT: store i64 8, i64* [[TMP114]], align 8
14341 // CHECK15-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1
14342 // CHECK15-NEXT: store i8* null, i8** [[TMP115]], align 8
14343 // CHECK15-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2
14344 // CHECK15-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32**
14345 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 8
14346 // CHECK15-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2
14347 // CHECK15-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32**
14348 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP119]], align 8
14349 // CHECK15-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2
14350 // CHECK15-NEXT: store i64 [[TMP103]], i64* [[TMP120]], align 8
14351 // CHECK15-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2
14352 // CHECK15-NEXT: store i8* null, i8** [[TMP121]], align 8
14353 // CHECK15-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
14354 // CHECK15-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
14355 // CHECK15-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
14356 // CHECK15-NEXT: [[TMP125:%.*]] = load i32, i32* [[N]], align 4
14357 // CHECK15-NEXT: store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4
14358 // CHECK15-NEXT: [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
14359 // CHECK15-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0
14360 // CHECK15-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
14361 // CHECK15-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
14362 // CHECK15-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
14363 // CHECK15-NEXT: [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
14364 // CHECK15-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1
14365 // CHECK15-NEXT: [[TMP128:%.*]] = zext i32 [[ADD46]] to i64
14366 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]])
14367 // CHECK15-NEXT: [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14368 // CHECK15-NEXT: [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0
14369 // CHECK15-NEXT: br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
14370 // CHECK15: omp_offload.failed47:
14371 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
14372 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT48]]
14373 // CHECK15: omp_offload.cont48:
14374 // CHECK15-NEXT: [[TMP131:%.*]] = load i32, i32* [[M]], align 4
14375 // CHECK15-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32*
14376 // CHECK15-NEXT: store i32 [[TMP131]], i32* [[CONV50]], align 4
14377 // CHECK15-NEXT: [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8
14378 // CHECK15-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4
14379 // CHECK15-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32*
14380 // CHECK15-NEXT: store i32 [[TMP133]], i32* [[CONV52]], align 4
14381 // CHECK15-NEXT: [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8
14382 // CHECK15-NEXT: [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4
14383 // CHECK15-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
14384 // CHECK15-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
14385 // CHECK15-NEXT: store i64 [[TMP132]], i64* [[TMP137]], align 8
14386 // CHECK15-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
14387 // CHECK15-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64*
14388 // CHECK15-NEXT: store i64 [[TMP132]], i64* [[TMP139]], align 8
14389 // CHECK15-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
14390 // CHECK15-NEXT: store i64 4, i64* [[TMP140]], align 8
14391 // CHECK15-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0
14392 // CHECK15-NEXT: store i8* null, i8** [[TMP141]], align 8
14393 // CHECK15-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1
14394 // CHECK15-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64*
14395 // CHECK15-NEXT: store i64 [[TMP134]], i64* [[TMP143]], align 8
14396 // CHECK15-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1
14397 // CHECK15-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64*
14398 // CHECK15-NEXT: store i64 [[TMP134]], i64* [[TMP145]], align 8
14399 // CHECK15-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1
14400 // CHECK15-NEXT: store i64 4, i64* [[TMP146]], align 8
14401 // CHECK15-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1
14402 // CHECK15-NEXT: store i8* null, i8** [[TMP147]], align 8
14403 // CHECK15-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2
14404 // CHECK15-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64*
14405 // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP149]], align 8
14406 // CHECK15-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2
14407 // CHECK15-NEXT: [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64*
14408 // CHECK15-NEXT: store i64 [[TMP1]], i64* [[TMP151]], align 8
14409 // CHECK15-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2
14410 // CHECK15-NEXT: store i64 8, i64* [[TMP152]], align 8
14411 // CHECK15-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2
14412 // CHECK15-NEXT: store i8* null, i8** [[TMP153]], align 8
14413 // CHECK15-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3
14414 // CHECK15-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32**
14415 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP155]], align 8
14416 // CHECK15-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3
14417 // CHECK15-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32**
14418 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP157]], align 8
14419 // CHECK15-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3
14420 // CHECK15-NEXT: store i64 [[TMP135]], i64* [[TMP158]], align 8
14421 // CHECK15-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3
14422 // CHECK15-NEXT: store i8* null, i8** [[TMP159]], align 8
14423 // CHECK15-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
14424 // CHECK15-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
14425 // CHECK15-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
14426 // CHECK15-NEXT: [[TMP163:%.*]] = load i32, i32* [[N]], align 4
14427 // CHECK15-NEXT: store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4
14428 // CHECK15-NEXT: [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4
14429 // CHECK15-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0
14430 // CHECK15-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1
14431 // CHECK15-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1
14432 // CHECK15-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4
14433 // CHECK15-NEXT: [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4
14434 // CHECK15-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1
14435 // CHECK15-NEXT: [[TMP166:%.*]] = zext i32 [[ADD63]] to i64
14436 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]])
14437 // CHECK15-NEXT: [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14438 // CHECK15-NEXT: [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0
14439 // CHECK15-NEXT: br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
14440 // CHECK15: omp_offload.failed64:
14441 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
14442 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT65]]
14443 // CHECK15: omp_offload.cont65:
14444 // CHECK15-NEXT: [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
14445 // CHECK15-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]])
14446 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
14447 // CHECK15-NEXT: [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
14448 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP170]])
14449 // CHECK15-NEXT: [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4
14450 // CHECK15-NEXT: ret i32 [[TMP171]]
14451 //
14452 //
14453 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154
14454 // CHECK15-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
14455 // CHECK15-NEXT: entry:
14456 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
14457 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
14458 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
14459 // CHECK15-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
14460 // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
14461 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
14462 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
14463 // CHECK15-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
14464 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
14465 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
14466 // CHECK15-NEXT: ret void
14467 //
14468 //
14469 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined.
14470 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
14471 // CHECK15-NEXT: entry:
14472 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
14473 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
14474 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
14475 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
14476 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
14477 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14478 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
14479 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14480 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14481 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
14482 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14483 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14484 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14485 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14486 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
14487 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
14488 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
14489 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
14490 // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
14491 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
14492 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
14493 // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
14494 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
14495 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
14496 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
14497 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14498 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
14499 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14500 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
14501 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14502 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
14503 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14504 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
14505 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
14506 // CHECK15: omp.precond.then:
14507 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14508 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14509 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
14510 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14511 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14512 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
14513 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
14514 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14515 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14516 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14517 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
14518 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14519 // CHECK15: cond.true:
14520 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14521 // CHECK15-NEXT: br label [[COND_END:%.*]]
14522 // CHECK15: cond.false:
14523 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14524 // CHECK15-NEXT: br label [[COND_END]]
14525 // CHECK15: cond.end:
14526 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
14527 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14528 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14529 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
14530 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14531 // CHECK15: omp.inner.for.cond:
14532 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
14533 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
14534 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
14535 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14536 // CHECK15: omp.inner.for.body:
14537 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13
14538 // CHECK15-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
14539 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
14540 // CHECK15-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
14541 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !13
14542 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14543 // CHECK15: omp.inner.for.inc:
14544 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
14545 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13
14546 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
14547 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
14548 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
14549 // CHECK15: omp.inner.for.end:
14550 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14551 // CHECK15: omp.loop.exit:
14552 // CHECK15-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
14553 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
14554 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
14555 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
14556 // CHECK15-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
14557 // CHECK15-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
14558 // CHECK15: .omp.final.then:
14559 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14560 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0
14561 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
14562 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
14563 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
14564 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
14565 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
14566 // CHECK15: .omp.final.done:
14567 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
14568 // CHECK15: omp.precond.end:
14569 // CHECK15-NEXT: ret void
14570 //
14571 //
14572 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..1
14573 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
14574 // CHECK15-NEXT: entry:
14575 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
14576 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
14577 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
14578 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
14579 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
14580 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
14581 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
14582 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14583 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
14584 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14585 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14586 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
14587 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14588 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14589 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14590 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14591 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
14592 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
14593 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
14594 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
14595 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
14596 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
14597 // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
14598 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
14599 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
14600 // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
14601 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
14602 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
14603 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
14604 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14605 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
14606 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14607 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
14608 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14609 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
14610 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14611 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
14612 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
14613 // CHECK15: omp.precond.then:
14614 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14615 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14616 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
14617 // CHECK15-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
14618 // CHECK15-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
14619 // CHECK15-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
14620 // CHECK15-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
14621 // CHECK15-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
14622 // CHECK15-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
14623 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14624 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14625 // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
14626 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
14627 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14628 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14629 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14630 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
14631 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14632 // CHECK15: cond.true:
14633 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14634 // CHECK15-NEXT: br label [[COND_END:%.*]]
14635 // CHECK15: cond.false:
14636 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14637 // CHECK15-NEXT: br label [[COND_END]]
14638 // CHECK15: cond.end:
14639 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
14640 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14641 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14642 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
14643 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14644 // CHECK15: omp.inner.for.cond:
14645 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
14646 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
14647 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
14648 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14649 // CHECK15: omp.inner.for.body:
14650 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
14651 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
14652 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14653 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !17
14654 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !17
14655 // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
14656 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
14657 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17
14658 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14659 // CHECK15: omp.body.continue:
14660 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14661 // CHECK15: omp.inner.for.inc:
14662 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
14663 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
14664 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
14665 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
14666 // CHECK15: omp.inner.for.end:
14667 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14668 // CHECK15: omp.loop.exit:
14669 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
14670 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
14671 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
14672 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
14673 // CHECK15-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
14674 // CHECK15-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
14675 // CHECK15: .omp.final.then:
14676 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14677 // CHECK15-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
14678 // CHECK15-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
14679 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
14680 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
14681 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4
14682 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
14683 // CHECK15: .omp.final.done:
14684 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
14685 // CHECK15: omp.precond.end:
14686 // CHECK15-NEXT: ret void
14687 //
14688 //
14689 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159
14690 // CHECK15-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
14691 // CHECK15-NEXT: entry:
14692 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
14693 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
14694 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
14695 // CHECK15-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
14696 // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
14697 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
14698 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
14699 // CHECK15-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
14700 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
14701 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
14702 // CHECK15-NEXT: ret void
14703 //
14704 //
14705 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..2
14706 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
14707 // CHECK15-NEXT: entry:
14708 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
14709 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
14710 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
14711 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
14712 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
14713 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14714 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
14715 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14716 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14717 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
14718 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14719 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14720 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14721 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14722 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
14723 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
14724 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
14725 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
14726 // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
14727 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
14728 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
14729 // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
14730 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
14731 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
14732 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
14733 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14734 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
14735 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14736 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
14737 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14738 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
14739 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14740 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
14741 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
14742 // CHECK15: omp.precond.then:
14743 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14744 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14745 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
14746 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14747 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14748 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
14749 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
14750 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14751 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14752 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14753 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
14754 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14755 // CHECK15: cond.true:
14756 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14757 // CHECK15-NEXT: br label [[COND_END:%.*]]
14758 // CHECK15: cond.false:
14759 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14760 // CHECK15-NEXT: br label [[COND_END]]
14761 // CHECK15: cond.end:
14762 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
14763 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14764 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14765 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
14766 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14767 // CHECK15: omp.inner.for.cond:
14768 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14769 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
14770 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
14771 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14772 // CHECK15: omp.inner.for.body:
14773 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !22
14774 // CHECK15-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
14775 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
14776 // CHECK15-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
14777 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !22
14778 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14779 // CHECK15: omp.inner.for.inc:
14780 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14781 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22
14782 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
14783 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14784 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
14785 // CHECK15: omp.inner.for.end:
14786 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14787 // CHECK15: omp.loop.exit:
14788 // CHECK15-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
14789 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
14790 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
14791 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
14792 // CHECK15-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
14793 // CHECK15-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
14794 // CHECK15: .omp.final.then:
14795 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14796 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0
14797 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
14798 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
14799 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
14800 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
14801 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
14802 // CHECK15: .omp.final.done:
14803 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
14804 // CHECK15: omp.precond.end:
14805 // CHECK15-NEXT: ret void
14806 //
14807 //
14808 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..3
14809 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
14810 // CHECK15-NEXT: entry:
14811 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
14812 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
14813 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
14814 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
14815 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
14816 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
14817 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
14818 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14819 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
14820 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14821 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14822 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
14823 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14824 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14825 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14826 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14827 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
14828 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
14829 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
14830 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
14831 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
14832 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
14833 // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
14834 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
14835 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
14836 // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
14837 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
14838 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
14839 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
14840 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14841 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
14842 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14843 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
14844 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14845 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
14846 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14847 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
14848 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
14849 // CHECK15: omp.precond.then:
14850 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14851 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14852 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
14853 // CHECK15-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
14854 // CHECK15-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
14855 // CHECK15-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
14856 // CHECK15-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
14857 // CHECK15-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
14858 // CHECK15-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
14859 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14860 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14861 // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
14862 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
14863 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14864 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14865 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14866 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
14867 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14868 // CHECK15: cond.true:
14869 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14870 // CHECK15-NEXT: br label [[COND_END:%.*]]
14871 // CHECK15: cond.false:
14872 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14873 // CHECK15-NEXT: br label [[COND_END]]
14874 // CHECK15: cond.end:
14875 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
14876 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14877 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14878 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
14879 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14880 // CHECK15: omp.inner.for.cond:
14881 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14882 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
14883 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
14884 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14885 // CHECK15: omp.inner.for.body:
14886 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14887 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
14888 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14889 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !25
14890 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25
14891 // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
14892 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
14893 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
14894 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14895 // CHECK15: omp.body.continue:
14896 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14897 // CHECK15: omp.inner.for.inc:
14898 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14899 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
14900 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14901 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
14902 // CHECK15: omp.inner.for.end:
14903 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14904 // CHECK15: omp.loop.exit:
14905 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
14906 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
14907 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
14908 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
14909 // CHECK15-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
14910 // CHECK15-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
14911 // CHECK15: .omp.final.then:
14912 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14913 // CHECK15-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
14914 // CHECK15-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
14915 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
14916 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
14917 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4
14918 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
14919 // CHECK15: .omp.final.done:
14920 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
14921 // CHECK15: omp.precond.end:
14922 // CHECK15-NEXT: ret void
14923 //
14924 //
14925 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164
14926 // CHECK15-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
14927 // CHECK15-NEXT: entry:
14928 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
14929 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
14930 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
14931 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
14932 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14933 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
14934 // CHECK15-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
14935 // CHECK15-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
14936 // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
14937 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
14938 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
14939 // CHECK15-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
14940 // CHECK15-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
14941 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
14942 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
14943 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
14944 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14945 // CHECK15-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
14946 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
14947 // CHECK15-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
14948 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
14949 // CHECK15-NEXT: ret void
14950 //
14951 //
14952 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..5
14953 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14954 // CHECK15-NEXT: entry:
14955 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
14956 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
14957 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
14958 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
14959 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
14960 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
14961 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14962 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
14963 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14964 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
14965 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
14966 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14967 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14968 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14969 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14970 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
14971 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
14972 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
14973 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
14974 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
14975 // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
14976 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
14977 // CHECK15-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
14978 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
14979 // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
14980 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
14981 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
14982 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
14983 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14984 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14985 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
14986 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14987 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
14988 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
14989 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
14990 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14991 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
14992 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
14993 // CHECK15: omp.precond.then:
14994 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14995 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
14996 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
14997 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14998 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14999 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8
15000 // CHECK15-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
15001 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
15002 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
15003 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15004 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15005 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
15006 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15007 // CHECK15: cond.true:
15008 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15009 // CHECK15-NEXT: br label [[COND_END:%.*]]
15010 // CHECK15: cond.false:
15011 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15012 // CHECK15-NEXT: br label [[COND_END]]
15013 // CHECK15: cond.end:
15014 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
15015 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15016 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15017 // CHECK15-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
15018 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15019 // CHECK15: omp.inner.for.cond:
15020 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
15021 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28
15022 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
15023 // CHECK15-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
15024 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15025 // CHECK15: omp.inner.for.body:
15026 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
15027 // CHECK15-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
15028 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
15029 // CHECK15-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
15030 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !28
15031 // CHECK15-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
15032 // CHECK15-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4, !llvm.access.group !28
15033 // CHECK15-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !28
15034 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]), !llvm.access.group !28
15035 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15036 // CHECK15: omp.inner.for.inc:
15037 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
15038 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
15039 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
15040 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
15041 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
15042 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
15043 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
15044 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
15045 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
15046 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
15047 // CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
15048 // CHECK15-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
15049 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
15050 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28
15051 // CHECK15-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]
15052 // CHECK15-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]]
15053 // CHECK15: cond.true12:
15054 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28
15055 // CHECK15-NEXT: br label [[COND_END14:%.*]]
15056 // CHECK15: cond.false13:
15057 // CHECK15-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
15058 // CHECK15-NEXT: br label [[COND_END14]]
15059 // CHECK15: cond.end14:
15060 // CHECK15-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ]
15061 // CHECK15-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
15062 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
15063 // CHECK15-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
15064 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
15065 // CHECK15: omp.inner.for.end:
15066 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15067 // CHECK15: omp.loop.exit:
15068 // CHECK15-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
15069 // CHECK15-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
15070 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]])
15071 // CHECK15-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15072 // CHECK15-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
15073 // CHECK15-NEXT: br i1 [[TMP37]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15074 // CHECK15: .omp.final.then:
15075 // CHECK15-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15076 // CHECK15-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP38]], 0
15077 // CHECK15-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1
15078 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV17]], 1
15079 // CHECK15-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL]]
15080 // CHECK15-NEXT: store i32 [[ADD18]], i32* [[I4]], align 4
15081 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
15082 // CHECK15: .omp.final.done:
15083 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
15084 // CHECK15: omp.precond.end:
15085 // CHECK15-NEXT: ret void
15086 //
15087 //
15088 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..6
15089 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
15090 // CHECK15-NEXT: entry:
15091 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
15092 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
15093 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
15094 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
15095 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
15096 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
15097 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
15098 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
15099 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15100 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
15101 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15102 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
15103 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
15104 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15105 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15106 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15107 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15108 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
15109 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
15110 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
15111 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
15112 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
15113 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
15114 // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
15115 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
15116 // CHECK15-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
15117 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
15118 // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
15119 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
15120 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
15121 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15122 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15123 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15124 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15125 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15126 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
15127 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
15128 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
15129 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15130 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15131 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15132 // CHECK15: omp.precond.then:
15133 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
15134 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15135 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
15136 // CHECK15-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
15137 // CHECK15-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
15138 // CHECK15-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
15139 // CHECK15-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
15140 // CHECK15-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
15141 // CHECK15-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
15142 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15143 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15144 // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
15145 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
15146 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15147 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15148 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15149 // CHECK15-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
15150 // CHECK15-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15151 // CHECK15: cond.true:
15152 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15153 // CHECK15-NEXT: br label [[COND_END:%.*]]
15154 // CHECK15: cond.false:
15155 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15156 // CHECK15-NEXT: br label [[COND_END]]
15157 // CHECK15: cond.end:
15158 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
15159 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15160 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15161 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
15162 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15163 // CHECK15: omp.inner.for.cond:
15164 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
15165 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !31
15166 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
15167 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15168 // CHECK15: omp.inner.for.body:
15169 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
15170 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
15171 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15172 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !31
15173 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !31
15174 // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
15175 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
15176 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !31
15177 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15178 // CHECK15: omp.body.continue:
15179 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15180 // CHECK15: omp.inner.for.inc:
15181 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
15182 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
15183 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
15184 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
15185 // CHECK15: omp.inner.for.end:
15186 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15187 // CHECK15: omp.loop.exit:
15188 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
15189 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
15190 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
15191 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15192 // CHECK15-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
15193 // CHECK15-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15194 // CHECK15: .omp.final.then:
15195 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15196 // CHECK15-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP25]], 0
15197 // CHECK15-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
15198 // CHECK15-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
15199 // CHECK15-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
15200 // CHECK15-NEXT: store i32 [[ADD13]], i32* [[I6]], align 4
15201 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
15202 // CHECK15: .omp.final.done:
15203 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
15204 // CHECK15: omp.precond.end:
15205 // CHECK15-NEXT: ret void
15206 //
15207 //
15208 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169
15209 // CHECK15-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15210 // CHECK15-NEXT: entry:
15211 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
15212 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
15213 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
15214 // CHECK15-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
15215 // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
15216 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
15217 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
15218 // CHECK15-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
15219 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
15220 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
15221 // CHECK15-NEXT: ret void
15222 //
15223 //
15224 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..8
15225 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15226 // CHECK15-NEXT: entry:
15227 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
15228 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
15229 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
15230 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
15231 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
15232 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15233 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
15234 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15235 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15236 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
15237 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15238 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15239 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15240 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15241 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
15242 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
15243 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
15244 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
15245 // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
15246 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
15247 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
15248 // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
15249 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
15250 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15251 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
15252 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15253 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15254 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15255 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15256 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15257 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
15258 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15259 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15260 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15261 // CHECK15: omp.precond.then:
15262 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15263 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15264 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
15265 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15266 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15267 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
15268 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
15269 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15270 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15271 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15272 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
15273 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15274 // CHECK15: cond.true:
15275 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15276 // CHECK15-NEXT: br label [[COND_END:%.*]]
15277 // CHECK15: cond.false:
15278 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15279 // CHECK15-NEXT: br label [[COND_END]]
15280 // CHECK15: cond.end:
15281 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
15282 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15283 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15284 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
15285 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15286 // CHECK15: omp.inner.for.cond:
15287 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
15288 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
15289 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
15290 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15291 // CHECK15: omp.inner.for.body:
15292 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34
15293 // CHECK15-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
15294 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
15295 // CHECK15-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
15296 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !34
15297 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15298 // CHECK15: omp.inner.for.inc:
15299 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
15300 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
15301 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
15302 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
15303 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
15304 // CHECK15: omp.inner.for.end:
15305 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15306 // CHECK15: omp.loop.exit:
15307 // CHECK15-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
15308 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
15309 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
15310 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15311 // CHECK15-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
15312 // CHECK15-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15313 // CHECK15: .omp.final.then:
15314 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15315 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0
15316 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
15317 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
15318 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
15319 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
15320 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
15321 // CHECK15: .omp.final.done:
15322 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
15323 // CHECK15: omp.precond.end:
15324 // CHECK15-NEXT: ret void
15325 //
15326 //
15327 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..9
15328 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15329 // CHECK15-NEXT: entry:
15330 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
15331 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
15332 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
15333 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
15334 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
15335 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
15336 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
15337 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15338 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
15339 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15340 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15341 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
15342 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15343 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15344 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15345 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15346 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
15347 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
15348 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
15349 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
15350 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
15351 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
15352 // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
15353 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
15354 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
15355 // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
15356 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
15357 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15358 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
15359 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15360 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15361 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15362 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15363 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15364 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
15365 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15366 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15367 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15368 // CHECK15: omp.precond.then:
15369 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
15370 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15371 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
15372 // CHECK15-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
15373 // CHECK15-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
15374 // CHECK15-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
15375 // CHECK15-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
15376 // CHECK15-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
15377 // CHECK15-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
15378 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15379 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15380 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15381 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15382 // CHECK15-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
15383 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
15384 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
15385 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
15386 // CHECK15: omp.dispatch.cond:
15387 // CHECK15-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
15388 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
15389 // CHECK15-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
15390 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
15391 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
15392 // CHECK15: omp.dispatch.body:
15393 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15394 // CHECK15-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
15395 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15396 // CHECK15: omp.inner.for.cond:
15397 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
15398 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !37
15399 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
15400 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15401 // CHECK15: omp.inner.for.body:
15402 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
15403 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
15404 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15405 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !37
15406 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !37
15407 // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
15408 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
15409 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !37
15410 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15411 // CHECK15: omp.body.continue:
15412 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15413 // CHECK15: omp.inner.for.inc:
15414 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
15415 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
15416 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
15417 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]]
15418 // CHECK15: omp.inner.for.end:
15419 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
15420 // CHECK15: omp.dispatch.inc:
15421 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
15422 // CHECK15: omp.dispatch.end:
15423 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15424 // CHECK15-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
15425 // CHECK15-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15426 // CHECK15: .omp.final.then:
15427 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15428 // CHECK15-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0
15429 // CHECK15-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
15430 // CHECK15-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
15431 // CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
15432 // CHECK15-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
15433 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
15434 // CHECK15: .omp.final.done:
15435 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
15436 // CHECK15: omp.precond.end:
15437 // CHECK15-NEXT: ret void
15438 //
15439 //
15440 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174
15441 // CHECK15-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15442 // CHECK15-NEXT: entry:
15443 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
15444 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
15445 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
15446 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
15447 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15448 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
15449 // CHECK15-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
15450 // CHECK15-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
15451 // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
15452 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
15453 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
15454 // CHECK15-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
15455 // CHECK15-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
15456 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
15457 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
15458 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
15459 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15460 // CHECK15-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
15461 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
15462 // CHECK15-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
15463 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
15464 // CHECK15-NEXT: ret void
15465 //
15466 //
15467 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..11
15468 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
15469 // CHECK15-NEXT: entry:
15470 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
15471 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
15472 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
15473 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
15474 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
15475 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
15476 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15477 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
15478 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15479 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
15480 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
15481 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15482 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15483 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15484 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15485 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
15486 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
15487 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
15488 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
15489 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
15490 // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
15491 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
15492 // CHECK15-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
15493 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
15494 // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
15495 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
15496 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
15497 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15498 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15499 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15500 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15501 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15502 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
15503 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
15504 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
15505 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15506 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15507 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15508 // CHECK15: omp.precond.then:
15509 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15510 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15511 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
15512 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15513 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15514 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
15515 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
15516 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15517 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15518 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15519 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
15520 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15521 // CHECK15: cond.true:
15522 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15523 // CHECK15-NEXT: br label [[COND_END:%.*]]
15524 // CHECK15: cond.false:
15525 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15526 // CHECK15-NEXT: br label [[COND_END]]
15527 // CHECK15: cond.end:
15528 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
15529 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15530 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15531 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
15532 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15533 // CHECK15: omp.inner.for.cond:
15534 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
15535 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
15536 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
15537 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15538 // CHECK15: omp.inner.for.body:
15539 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !40
15540 // CHECK15-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
15541 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
15542 // CHECK15-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
15543 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !40
15544 // CHECK15-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
15545 // CHECK15-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4, !llvm.access.group !40
15546 // CHECK15-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !40
15547 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]), !llvm.access.group !40
15548 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15549 // CHECK15: omp.inner.for.inc:
15550 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
15551 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !40
15552 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
15553 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
15554 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]]
15555 // CHECK15: omp.inner.for.end:
15556 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15557 // CHECK15: omp.loop.exit:
15558 // CHECK15-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
15559 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
15560 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
15561 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15562 // CHECK15-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
15563 // CHECK15-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15564 // CHECK15: .omp.final.then:
15565 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15566 // CHECK15-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP28]], 0
15567 // CHECK15-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
15568 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV9]], 1
15569 // CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL]]
15570 // CHECK15-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
15571 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
15572 // CHECK15: .omp.final.done:
15573 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
15574 // CHECK15: omp.precond.end:
15575 // CHECK15-NEXT: ret void
15576 //
15577 //
15578 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..12
15579 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
15580 // CHECK15-NEXT: entry:
15581 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
15582 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
15583 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
15584 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
15585 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
15586 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
15587 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
15588 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
15589 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15590 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
15591 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15592 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
15593 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
15594 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15595 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15596 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15597 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15598 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
15599 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
15600 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
15601 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
15602 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
15603 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
15604 // CHECK15-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
15605 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
15606 // CHECK15-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
15607 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
15608 // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
15609 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
15610 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
15611 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15612 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15613 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15614 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15615 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15616 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
15617 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
15618 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
15619 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15620 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15621 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15622 // CHECK15: omp.precond.then:
15623 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
15624 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15625 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
15626 // CHECK15-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
15627 // CHECK15-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
15628 // CHECK15-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
15629 // CHECK15-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
15630 // CHECK15-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
15631 // CHECK15-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
15632 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15633 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15634 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
15635 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15636 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15637 // CHECK15-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
15638 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
15639 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
15640 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
15641 // CHECK15: omp.dispatch.cond:
15642 // CHECK15-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
15643 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
15644 // CHECK15-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
15645 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
15646 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
15647 // CHECK15: omp.dispatch.body:
15648 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15649 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
15650 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15651 // CHECK15: omp.inner.for.cond:
15652 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
15653 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !43
15654 // CHECK15-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
15655 // CHECK15-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15656 // CHECK15: omp.inner.for.body:
15657 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
15658 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
15659 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15660 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !43
15661 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !43
15662 // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
15663 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
15664 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !43
15665 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15666 // CHECK15: omp.body.continue:
15667 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15668 // CHECK15: omp.inner.for.inc:
15669 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
15670 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
15671 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
15672 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
15673 // CHECK15: omp.inner.for.end:
15674 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
15675 // CHECK15: omp.dispatch.inc:
15676 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
15677 // CHECK15: omp.dispatch.end:
15678 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15679 // CHECK15-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
15680 // CHECK15-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15681 // CHECK15: .omp.final.then:
15682 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15683 // CHECK15-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP25]], 0
15684 // CHECK15-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
15685 // CHECK15-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
15686 // CHECK15-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
15687 // CHECK15-NEXT: store i32 [[ADD12]], i32* [[I6]], align 4
15688 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
15689 // CHECK15: .omp.final.done:
15690 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
15691 // CHECK15: omp.precond.end:
15692 // CHECK15-NEXT: ret void
15693 //
15694 //
15695 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
15696 // CHECK15-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
15697 // CHECK15-NEXT: entry:
15698 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
15699 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
15700 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4
15701 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
15702 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
15703 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
15704 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
15705 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
15706 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
15707 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
15708 // CHECK15-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
15709 // CHECK15-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
15710 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8
15711 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8
15712 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8
15713 // CHECK15-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
15714 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8
15715 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8
15716 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8
15717 // CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
15718 // CHECK15-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8
15719 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8
15720 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8
15721 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8
15722 // CHECK15-NEXT: [[_TMP24:%.*]] = alloca i32, align 4
15723 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
15724 // CHECK15-NEXT: store i32 10, i32* [[M]], align 4
15725 // CHECK15-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
15726 // CHECK15-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
15727 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
15728 // CHECK15-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
15729 // CHECK15-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
15730 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
15731 // CHECK15-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
15732 // CHECK15-NEXT: store i8* null, i8** [[TMP4]], align 8
15733 // CHECK15-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
15734 // CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
15735 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
15736 // CHECK15-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15737 // CHECK15-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
15738 // CHECK15-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
15739 // CHECK15: omp_offload.failed:
15740 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122([10 x i32]* [[A]]) #[[ATTR3]]
15741 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]]
15742 // CHECK15: omp_offload.cont:
15743 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
15744 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
15745 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
15746 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
15747 // CHECK15-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
15748 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
15749 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
15750 // CHECK15-NEXT: store i8* null, i8** [[TMP13]], align 8
15751 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
15752 // CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
15753 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
15754 // CHECK15-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15755 // CHECK15-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
15756 // CHECK15-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
15757 // CHECK15: omp_offload.failed5:
15758 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127([10 x i32]* [[A]]) #[[ATTR3]]
15759 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT6]]
15760 // CHECK15: omp_offload.cont6:
15761 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4
15762 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32*
15763 // CHECK15-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4
15764 // CHECK15-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8
15765 // CHECK15-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
15766 // CHECK15-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
15767 // CHECK15-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8
15768 // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
15769 // CHECK15-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
15770 // CHECK15-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8
15771 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
15772 // CHECK15-NEXT: store i8* null, i8** [[TMP24]], align 8
15773 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
15774 // CHECK15-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
15775 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8
15776 // CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
15777 // CHECK15-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
15778 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8
15779 // CHECK15-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1
15780 // CHECK15-NEXT: store i8* null, i8** [[TMP29]], align 8
15781 // CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
15782 // CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
15783 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
15784 // CHECK15-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15785 // CHECK15-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
15786 // CHECK15-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
15787 // CHECK15: omp_offload.failed11:
15788 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
15789 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT12]]
15790 // CHECK15: omp_offload.cont12:
15791 // CHECK15-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
15792 // CHECK15-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
15793 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8
15794 // CHECK15-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
15795 // CHECK15-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
15796 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8
15797 // CHECK15-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0
15798 // CHECK15-NEXT: store i8* null, i8** [[TMP38]], align 8
15799 // CHECK15-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
15800 // CHECK15-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
15801 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
15802 // CHECK15-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15803 // CHECK15-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
15804 // CHECK15-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
15805 // CHECK15: omp_offload.failed17:
15806 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137([10 x i32]* [[A]]) #[[ATTR3]]
15807 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT18]]
15808 // CHECK15: omp_offload.cont18:
15809 // CHECK15-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4
15810 // CHECK15-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32*
15811 // CHECK15-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4
15812 // CHECK15-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8
15813 // CHECK15-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
15814 // CHECK15-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
15815 // CHECK15-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8
15816 // CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
15817 // CHECK15-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
15818 // CHECK15-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8
15819 // CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
15820 // CHECK15-NEXT: store i8* null, i8** [[TMP49]], align 8
15821 // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
15822 // CHECK15-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
15823 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8
15824 // CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
15825 // CHECK15-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
15826 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8
15827 // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
15828 // CHECK15-NEXT: store i8* null, i8** [[TMP54]], align 8
15829 // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
15830 // CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
15831 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
15832 // CHECK15-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15833 // CHECK15-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
15834 // CHECK15-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]]
15835 // CHECK15: omp_offload.failed25:
15836 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
15837 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT26]]
15838 // CHECK15: omp_offload.cont26:
15839 // CHECK15-NEXT: ret i32 0
15840 //
15841 //
15842 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122
15843 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
15844 // CHECK15-NEXT: entry:
15845 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
15846 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
15847 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
15848 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
15849 // CHECK15-NEXT: ret void
15850 //
15851 //
15852 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..14
15853 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
15854 // CHECK15-NEXT: entry:
15855 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
15856 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
15857 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
15858 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15859 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
15860 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15861 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15862 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15863 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15864 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
15865 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
15866 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
15867 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
15868 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
15869 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15870 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
15871 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15872 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15873 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
15874 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
15875 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15876 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15877 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
15878 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15879 // CHECK15: cond.true:
15880 // CHECK15-NEXT: br label [[COND_END:%.*]]
15881 // CHECK15: cond.false:
15882 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15883 // CHECK15-NEXT: br label [[COND_END]]
15884 // CHECK15: cond.end:
15885 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
15886 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15887 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15888 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
15889 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15890 // CHECK15: omp.inner.for.cond:
15891 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
15892 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
15893 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
15894 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15895 // CHECK15: omp.inner.for.body:
15896 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46
15897 // CHECK15-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
15898 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
15899 // CHECK15-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
15900 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !46
15901 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15902 // CHECK15: omp.inner.for.inc:
15903 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
15904 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46
15905 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
15906 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
15907 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
15908 // CHECK15: omp.inner.for.end:
15909 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15910 // CHECK15: omp.loop.exit:
15911 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
15912 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15913 // CHECK15-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
15914 // CHECK15-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15915 // CHECK15: .omp.final.then:
15916 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
15917 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
15918 // CHECK15: .omp.final.done:
15919 // CHECK15-NEXT: ret void
15920 //
15921 //
15922 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..15
15923 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
15924 // CHECK15-NEXT: entry:
15925 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
15926 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
15927 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
15928 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
15929 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
15930 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15931 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
15932 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15933 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15934 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15935 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15936 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
15937 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
15938 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
15939 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
15940 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
15941 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
15942 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
15943 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
15944 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
15945 // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
15946 // CHECK15-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
15947 // CHECK15-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
15948 // CHECK15-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
15949 // CHECK15-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
15950 // CHECK15-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
15951 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15952 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15953 // CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
15954 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
15955 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15956 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15957 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
15958 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15959 // CHECK15: cond.true:
15960 // CHECK15-NEXT: br label [[COND_END:%.*]]
15961 // CHECK15: cond.false:
15962 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15963 // CHECK15-NEXT: br label [[COND_END]]
15964 // CHECK15: cond.end:
15965 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
15966 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15967 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15968 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
15969 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15970 // CHECK15: omp.inner.for.cond:
15971 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
15972 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49
15973 // CHECK15-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
15974 // CHECK15-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15975 // CHECK15: omp.inner.for.body:
15976 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
15977 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
15978 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15979 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49
15980 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !49
15981 // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
15982 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
15983 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !49
15984 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15985 // CHECK15: omp.body.continue:
15986 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15987 // CHECK15: omp.inner.for.inc:
15988 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
15989 // CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
15990 // CHECK15-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
15991 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]]
15992 // CHECK15: omp.inner.for.end:
15993 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15994 // CHECK15: omp.loop.exit:
15995 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
15996 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15997 // CHECK15-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
15998 // CHECK15-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15999 // CHECK15: .omp.final.then:
16000 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
16001 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
16002 // CHECK15: .omp.final.done:
16003 // CHECK15-NEXT: ret void
16004 //
16005 //
16006 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127
16007 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16008 // CHECK15-NEXT: entry:
16009 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
16010 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
16011 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
16012 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
16013 // CHECK15-NEXT: ret void
16014 //
16015 //
16016 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..17
16017 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16018 // CHECK15-NEXT: entry:
16019 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
16020 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
16021 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
16022 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16023 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
16024 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16025 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16026 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16027 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16028 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
16029 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
16030 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
16031 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
16032 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
16033 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16034 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
16035 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16036 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16037 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
16038 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
16039 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16040 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16041 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
16042 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16043 // CHECK15: cond.true:
16044 // CHECK15-NEXT: br label [[COND_END:%.*]]
16045 // CHECK15: cond.false:
16046 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16047 // CHECK15-NEXT: br label [[COND_END]]
16048 // CHECK15: cond.end:
16049 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
16050 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16051 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16052 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
16053 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16054 // CHECK15: omp.inner.for.cond:
16055 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
16056 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52
16057 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
16058 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16059 // CHECK15: omp.inner.for.body:
16060 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !52
16061 // CHECK15-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
16062 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52
16063 // CHECK15-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
16064 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !52
16065 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16066 // CHECK15: omp.inner.for.inc:
16067 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
16068 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !52
16069 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
16070 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
16071 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
16072 // CHECK15: omp.inner.for.end:
16073 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
16074 // CHECK15: omp.loop.exit:
16075 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
16076 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
16077 // CHECK15-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
16078 // CHECK15-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16079 // CHECK15: .omp.final.then:
16080 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
16081 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
16082 // CHECK15: .omp.final.done:
16083 // CHECK15-NEXT: ret void
16084 //
16085 //
16086 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..18
16087 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16088 // CHECK15-NEXT: entry:
16089 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
16090 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
16091 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
16092 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
16093 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
16094 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16095 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
16096 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16097 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16098 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16099 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16100 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
16101 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
16102 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
16103 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
16104 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
16105 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
16106 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
16107 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
16108 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
16109 // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
16110 // CHECK15-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
16111 // CHECK15-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
16112 // CHECK15-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
16113 // CHECK15-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
16114 // CHECK15-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
16115 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16116 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16117 // CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
16118 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
16119 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16120 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16121 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
16122 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16123 // CHECK15: cond.true:
16124 // CHECK15-NEXT: br label [[COND_END:%.*]]
16125 // CHECK15: cond.false:
16126 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16127 // CHECK15-NEXT: br label [[COND_END]]
16128 // CHECK15: cond.end:
16129 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
16130 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
16131 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16132 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
16133 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16134 // CHECK15: omp.inner.for.cond:
16135 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
16136 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !55
16137 // CHECK15-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
16138 // CHECK15-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16139 // CHECK15: omp.inner.for.body:
16140 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
16141 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
16142 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16143 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !55
16144 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !55
16145 // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
16146 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
16147 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !55
16148 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16149 // CHECK15: omp.body.continue:
16150 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16151 // CHECK15: omp.inner.for.inc:
16152 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
16153 // CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
16154 // CHECK15-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
16155 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
16156 // CHECK15: omp.inner.for.end:
16157 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
16158 // CHECK15: omp.loop.exit:
16159 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
16160 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
16161 // CHECK15-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
16162 // CHECK15-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16163 // CHECK15: .omp.final.then:
16164 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
16165 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
16166 // CHECK15: .omp.final.done:
16167 // CHECK15-NEXT: ret void
16168 //
16169 //
16170 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132
16171 // CHECK15-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16172 // CHECK15-NEXT: entry:
16173 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
16174 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
16175 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
16176 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
16177 // CHECK15-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
16178 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
16179 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
16180 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
16181 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
16182 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
16183 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16184 // CHECK15-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
16185 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
16186 // CHECK15-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
16187 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
16188 // CHECK15-NEXT: ret void
16189 //
16190 //
16191 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..21
16192 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16193 // CHECK15-NEXT: entry:
16194 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
16195 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
16196 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
16197 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
16198 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16199 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
16200 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16201 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16202 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16203 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16204 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
16205 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
16206 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
16207 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
16208 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
16209 // CHECK15-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
16210 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
16211 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
16212 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16213 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
16214 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16215 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16216 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
16217 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
16218 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16219 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16220 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
16221 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16222 // CHECK15: cond.true:
16223 // CHECK15-NEXT: br label [[COND_END:%.*]]
16224 // CHECK15: cond.false:
16225 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16226 // CHECK15-NEXT: br label [[COND_END]]
16227 // CHECK15: cond.end:
16228 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
16229 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16230 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16231 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
16232 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16233 // CHECK15: omp.inner.for.cond:
16234 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
16235 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
16236 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
16237 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16238 // CHECK15: omp.inner.for.body:
16239 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !58
16240 // CHECK15-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
16241 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
16242 // CHECK15-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
16243 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !58
16244 // CHECK15-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
16245 // CHECK15-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !58
16246 // CHECK15-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !58
16247 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !58
16248 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16249 // CHECK15: omp.inner.for.inc:
16250 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
16251 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !58
16252 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
16253 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
16254 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
16255 // CHECK15: omp.inner.for.end:
16256 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
16257 // CHECK15: omp.loop.exit:
16258 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
16259 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
16260 // CHECK15-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
16261 // CHECK15-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16262 // CHECK15: .omp.final.then:
16263 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
16264 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
16265 // CHECK15: .omp.final.done:
16266 // CHECK15-NEXT: ret void
16267 //
16268 //
16269 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..22
16270 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16271 // CHECK15-NEXT: entry:
16272 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
16273 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
16274 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
16275 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
16276 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
16277 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
16278 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16279 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
16280 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16281 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16282 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16283 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16284 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
16285 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
16286 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
16287 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
16288 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
16289 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
16290 // CHECK15-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
16291 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
16292 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
16293 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
16294 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
16295 // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
16296 // CHECK15-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
16297 // CHECK15-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
16298 // CHECK15-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
16299 // CHECK15-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
16300 // CHECK15-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
16301 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16302 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16303 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
16304 // CHECK15-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
16305 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
16306 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
16307 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
16308 // CHECK15: omp.dispatch.cond:
16309 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16310 // CHECK15-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
16311 // CHECK15-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
16312 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
16313 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16314 // CHECK15: cond.true:
16315 // CHECK15-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
16316 // CHECK15-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
16317 // CHECK15-NEXT: br label [[COND_END:%.*]]
16318 // CHECK15: cond.false:
16319 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16320 // CHECK15-NEXT: br label [[COND_END]]
16321 // CHECK15: cond.end:
16322 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
16323 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
16324 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16325 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
16326 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16327 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16328 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
16329 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16330 // CHECK15: omp.dispatch.body:
16331 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16332 // CHECK15: omp.inner.for.cond:
16333 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
16334 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61
16335 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
16336 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16337 // CHECK15: omp.inner.for.body:
16338 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
16339 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
16340 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16341 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !61
16342 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !61
16343 // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
16344 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
16345 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !61
16346 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16347 // CHECK15: omp.body.continue:
16348 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16349 // CHECK15: omp.inner.for.inc:
16350 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
16351 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
16352 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
16353 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]]
16354 // CHECK15: omp.inner.for.end:
16355 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
16356 // CHECK15: omp.dispatch.inc:
16357 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16358 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16359 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
16360 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
16361 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16362 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16363 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
16364 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
16365 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
16366 // CHECK15: omp.dispatch.end:
16367 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
16368 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
16369 // CHECK15-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
16370 // CHECK15-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16371 // CHECK15: .omp.final.then:
16372 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
16373 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
16374 // CHECK15: .omp.final.done:
16375 // CHECK15-NEXT: ret void
16376 //
16377 //
16378 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137
16379 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16380 // CHECK15-NEXT: entry:
16381 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
16382 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
16383 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
16384 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
16385 // CHECK15-NEXT: ret void
16386 //
16387 //
16388 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..25
16389 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16390 // CHECK15-NEXT: entry:
16391 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
16392 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
16393 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
16394 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16395 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
16396 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16397 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16398 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16399 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16400 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
16401 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
16402 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
16403 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
16404 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
16405 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16406 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
16407 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16408 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16409 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
16410 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
16411 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16412 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16413 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
16414 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16415 // CHECK15: cond.true:
16416 // CHECK15-NEXT: br label [[COND_END:%.*]]
16417 // CHECK15: cond.false:
16418 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16419 // CHECK15-NEXT: br label [[COND_END]]
16420 // CHECK15: cond.end:
16421 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
16422 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16423 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16424 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
16425 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16426 // CHECK15: omp.inner.for.cond:
16427 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
16428 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64
16429 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
16430 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16431 // CHECK15: omp.inner.for.body:
16432 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !64
16433 // CHECK15-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
16434 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64
16435 // CHECK15-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
16436 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !64
16437 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16438 // CHECK15: omp.inner.for.inc:
16439 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
16440 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !64
16441 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
16442 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
16443 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP65:![0-9]+]]
16444 // CHECK15: omp.inner.for.end:
16445 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
16446 // CHECK15: omp.loop.exit:
16447 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
16448 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
16449 // CHECK15-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
16450 // CHECK15-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16451 // CHECK15: .omp.final.then:
16452 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
16453 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
16454 // CHECK15: .omp.final.done:
16455 // CHECK15-NEXT: ret void
16456 //
16457 //
16458 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..26
16459 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16460 // CHECK15-NEXT: entry:
16461 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
16462 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
16463 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
16464 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
16465 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
16466 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16467 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
16468 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16469 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16470 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16471 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16472 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
16473 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
16474 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
16475 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
16476 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
16477 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
16478 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
16479 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
16480 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
16481 // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
16482 // CHECK15-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
16483 // CHECK15-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
16484 // CHECK15-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
16485 // CHECK15-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
16486 // CHECK15-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
16487 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16488 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16489 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16490 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16491 // CHECK15-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
16492 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
16493 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
16494 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
16495 // CHECK15: omp.dispatch.cond:
16496 // CHECK15-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
16497 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
16498 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16499 // CHECK15: omp.dispatch.body:
16500 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16501 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
16502 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16503 // CHECK15: omp.inner.for.cond:
16504 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
16505 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !67
16506 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
16507 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16508 // CHECK15: omp.inner.for.body:
16509 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
16510 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
16511 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16512 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !67
16513 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !67
16514 // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
16515 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
16516 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !67
16517 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16518 // CHECK15: omp.body.continue:
16519 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16520 // CHECK15: omp.inner.for.inc:
16521 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
16522 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
16523 // CHECK15-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
16524 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP68:![0-9]+]]
16525 // CHECK15: omp.inner.for.end:
16526 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
16527 // CHECK15: omp.dispatch.inc:
16528 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
16529 // CHECK15: omp.dispatch.end:
16530 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
16531 // CHECK15-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
16532 // CHECK15-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16533 // CHECK15: .omp.final.then:
16534 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
16535 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
16536 // CHECK15: .omp.final.done:
16537 // CHECK15-NEXT: ret void
16538 //
16539 //
16540 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142
16541 // CHECK15-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16542 // CHECK15-NEXT: entry:
16543 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
16544 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
16545 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
16546 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
16547 // CHECK15-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
16548 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
16549 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
16550 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
16551 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
16552 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
16553 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16554 // CHECK15-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
16555 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
16556 // CHECK15-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
16557 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
16558 // CHECK15-NEXT: ret void
16559 //
16560 //
16561 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..29
16562 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16563 // CHECK15-NEXT: entry:
16564 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
16565 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
16566 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
16567 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
16568 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16569 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
16570 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16571 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16572 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16573 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16574 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
16575 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
16576 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
16577 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
16578 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
16579 // CHECK15-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
16580 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
16581 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
16582 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16583 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
16584 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16585 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16586 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
16587 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
16588 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16589 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16590 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
16591 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16592 // CHECK15: cond.true:
16593 // CHECK15-NEXT: br label [[COND_END:%.*]]
16594 // CHECK15: cond.false:
16595 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16596 // CHECK15-NEXT: br label [[COND_END]]
16597 // CHECK15: cond.end:
16598 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
16599 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16600 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16601 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
16602 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16603 // CHECK15: omp.inner.for.cond:
16604 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
16605 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70
16606 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
16607 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16608 // CHECK15: omp.inner.for.body:
16609 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !70
16610 // CHECK15-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
16611 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70
16612 // CHECK15-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
16613 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !70
16614 // CHECK15-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
16615 // CHECK15-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !70
16616 // CHECK15-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !70
16617 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !70
16618 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16619 // CHECK15: omp.inner.for.inc:
16620 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
16621 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !70
16622 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
16623 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
16624 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP71:![0-9]+]]
16625 // CHECK15: omp.inner.for.end:
16626 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
16627 // CHECK15: omp.loop.exit:
16628 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
16629 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
16630 // CHECK15-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
16631 // CHECK15-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16632 // CHECK15: .omp.final.then:
16633 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
16634 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
16635 // CHECK15: .omp.final.done:
16636 // CHECK15-NEXT: ret void
16637 //
16638 //
16639 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..30
16640 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16641 // CHECK15-NEXT: entry:
16642 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
16643 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
16644 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
16645 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
16646 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
16647 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
16648 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16649 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
16650 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16651 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16652 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16653 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16654 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
16655 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
16656 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
16657 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
16658 // CHECK15-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
16659 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
16660 // CHECK15-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
16661 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
16662 // CHECK15-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
16663 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
16664 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
16665 // CHECK15-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
16666 // CHECK15-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
16667 // CHECK15-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
16668 // CHECK15-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
16669 // CHECK15-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
16670 // CHECK15-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
16671 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16672 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16673 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
16674 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16675 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16676 // CHECK15-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
16677 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
16678 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
16679 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
16680 // CHECK15: omp.dispatch.cond:
16681 // CHECK15-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
16682 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
16683 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16684 // CHECK15: omp.dispatch.body:
16685 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16686 // CHECK15-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
16687 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16688 // CHECK15: omp.inner.for.cond:
16689 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
16690 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !73
16691 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
16692 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16693 // CHECK15: omp.inner.for.body:
16694 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
16695 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
16696 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16697 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !73
16698 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !73
16699 // CHECK15-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
16700 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
16701 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !73
16702 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16703 // CHECK15: omp.body.continue:
16704 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16705 // CHECK15: omp.inner.for.inc:
16706 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
16707 // CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
16708 // CHECK15-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
16709 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP74:![0-9]+]]
16710 // CHECK15: omp.inner.for.end:
16711 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
16712 // CHECK15: omp.dispatch.inc:
16713 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
16714 // CHECK15: omp.dispatch.end:
16715 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
16716 // CHECK15-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
16717 // CHECK15-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16718 // CHECK15: .omp.final.then:
16719 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
16720 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
16721 // CHECK15: .omp.final.done:
16722 // CHECK15-NEXT: ret void
16723 //
16724 //
16725 // CHECK15-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
16726 // CHECK15-SAME: () #[[ATTR5:[0-9]+]] {
16727 // CHECK15-NEXT: entry:
16728 // CHECK15-NEXT: call void @__tgt_register_requires(i64 1)
16729 // CHECK15-NEXT: ret void
16730 //
16731 //
16732 // CHECK16-LABEL: define {{[^@]+}}@main
16733 // CHECK16-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
16734 // CHECK16-NEXT: entry:
16735 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
16736 // CHECK16-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
16737 // CHECK16-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
16738 // CHECK16-NEXT: [[N:%.*]] = alloca i32, align 4
16739 // CHECK16-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
16740 // CHECK16-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
16741 // CHECK16-NEXT: [[M:%.*]] = alloca i32, align 4
16742 // CHECK16-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
16743 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
16744 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
16745 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
16746 // CHECK16-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
16747 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
16748 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
16749 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
16750 // CHECK16-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
16751 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
16752 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
16753 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
16754 // CHECK16-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
16755 // CHECK16-NEXT: [[_TMP9:%.*]] = alloca i32, align 4
16756 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
16757 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
16758 // CHECK16-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
16759 // CHECK16-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8
16760 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8
16761 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8
16762 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8
16763 // CHECK16-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8
16764 // CHECK16-NEXT: [[_TMP25:%.*]] = alloca i32, align 4
16765 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
16766 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
16767 // CHECK16-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8
16768 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8
16769 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8
16770 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8
16771 // CHECK16-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8
16772 // CHECK16-NEXT: [[_TMP40:%.*]] = alloca i32, align 4
16773 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
16774 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
16775 // CHECK16-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8
16776 // CHECK16-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8
16777 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8
16778 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8
16779 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8
16780 // CHECK16-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8
16781 // CHECK16-NEXT: [[_TMP57:%.*]] = alloca i32, align 4
16782 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
16783 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4
16784 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4
16785 // CHECK16-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
16786 // CHECK16-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
16787 // CHECK16-NEXT: store i32 100, i32* [[N]], align 4
16788 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
16789 // CHECK16-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
16790 // CHECK16-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
16791 // CHECK16-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
16792 // CHECK16-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
16793 // CHECK16-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
16794 // CHECK16-NEXT: store i32 10, i32* [[M]], align 4
16795 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
16796 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
16797 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
16798 // CHECK16-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
16799 // CHECK16-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
16800 // CHECK16-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
16801 // CHECK16-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
16802 // CHECK16-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8
16803 // CHECK16-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
16804 // CHECK16-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
16805 // CHECK16-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8
16806 // CHECK16-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
16807 // CHECK16-NEXT: store i64 4, i64* [[TMP10]], align 8
16808 // CHECK16-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
16809 // CHECK16-NEXT: store i8* null, i8** [[TMP11]], align 8
16810 // CHECK16-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
16811 // CHECK16-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
16812 // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
16813 // CHECK16-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
16814 // CHECK16-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
16815 // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
16816 // CHECK16-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
16817 // CHECK16-NEXT: store i64 8, i64* [[TMP16]], align 8
16818 // CHECK16-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
16819 // CHECK16-NEXT: store i8* null, i8** [[TMP17]], align 8
16820 // CHECK16-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
16821 // CHECK16-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
16822 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8
16823 // CHECK16-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
16824 // CHECK16-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
16825 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8
16826 // CHECK16-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
16827 // CHECK16-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8
16828 // CHECK16-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
16829 // CHECK16-NEXT: store i8* null, i8** [[TMP23]], align 8
16830 // CHECK16-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
16831 // CHECK16-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
16832 // CHECK16-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
16833 // CHECK16-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
16834 // CHECK16-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
16835 // CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16836 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
16837 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
16838 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
16839 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
16840 // CHECK16-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16841 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
16842 // CHECK16-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
16843 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
16844 // CHECK16-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16845 // CHECK16-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
16846 // CHECK16-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
16847 // CHECK16: omp_offload.failed:
16848 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
16849 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT]]
16850 // CHECK16: omp_offload.cont:
16851 // CHECK16-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4
16852 // CHECK16-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
16853 // CHECK16-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4
16854 // CHECK16-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
16855 // CHECK16-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
16856 // CHECK16-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
16857 // CHECK16-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
16858 // CHECK16-NEXT: store i64 [[TMP34]], i64* [[TMP37]], align 8
16859 // CHECK16-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
16860 // CHECK16-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
16861 // CHECK16-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8
16862 // CHECK16-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
16863 // CHECK16-NEXT: store i64 4, i64* [[TMP40]], align 8
16864 // CHECK16-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
16865 // CHECK16-NEXT: store i8* null, i8** [[TMP41]], align 8
16866 // CHECK16-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
16867 // CHECK16-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
16868 // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP43]], align 8
16869 // CHECK16-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
16870 // CHECK16-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
16871 // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP45]], align 8
16872 // CHECK16-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
16873 // CHECK16-NEXT: store i64 8, i64* [[TMP46]], align 8
16874 // CHECK16-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
16875 // CHECK16-NEXT: store i8* null, i8** [[TMP47]], align 8
16876 // CHECK16-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
16877 // CHECK16-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
16878 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8
16879 // CHECK16-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
16880 // CHECK16-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
16881 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP51]], align 8
16882 // CHECK16-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
16883 // CHECK16-NEXT: store i64 [[TMP35]], i64* [[TMP52]], align 8
16884 // CHECK16-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
16885 // CHECK16-NEXT: store i8* null, i8** [[TMP53]], align 8
16886 // CHECK16-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
16887 // CHECK16-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
16888 // CHECK16-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
16889 // CHECK16-NEXT: [[TMP57:%.*]] = load i32, i32* [[N]], align 4
16890 // CHECK16-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
16891 // CHECK16-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
16892 // CHECK16-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
16893 // CHECK16-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
16894 // CHECK16-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
16895 // CHECK16-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
16896 // CHECK16-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
16897 // CHECK16-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
16898 // CHECK16-NEXT: [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
16899 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
16900 // CHECK16-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16901 // CHECK16-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
16902 // CHECK16-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
16903 // CHECK16: omp_offload.failed16:
16904 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
16905 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT17]]
16906 // CHECK16: omp_offload.cont17:
16907 // CHECK16-NEXT: [[TMP63:%.*]] = load i32, i32* [[M]], align 4
16908 // CHECK16-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
16909 // CHECK16-NEXT: store i32 [[TMP63]], i32* [[CONV18]], align 4
16910 // CHECK16-NEXT: [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8
16911 // CHECK16-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4
16912 // CHECK16-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
16913 // CHECK16-NEXT: store i32 [[TMP65]], i32* [[CONV20]], align 4
16914 // CHECK16-NEXT: [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8
16915 // CHECK16-NEXT: [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4
16916 // CHECK16-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
16917 // CHECK16-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64*
16918 // CHECK16-NEXT: store i64 [[TMP64]], i64* [[TMP69]], align 8
16919 // CHECK16-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
16920 // CHECK16-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64*
16921 // CHECK16-NEXT: store i64 [[TMP64]], i64* [[TMP71]], align 8
16922 // CHECK16-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
16923 // CHECK16-NEXT: store i64 4, i64* [[TMP72]], align 8
16924 // CHECK16-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
16925 // CHECK16-NEXT: store i8* null, i8** [[TMP73]], align 8
16926 // CHECK16-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
16927 // CHECK16-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64*
16928 // CHECK16-NEXT: store i64 [[TMP66]], i64* [[TMP75]], align 8
16929 // CHECK16-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
16930 // CHECK16-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64*
16931 // CHECK16-NEXT: store i64 [[TMP66]], i64* [[TMP77]], align 8
16932 // CHECK16-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1
16933 // CHECK16-NEXT: store i64 4, i64* [[TMP78]], align 8
16934 // CHECK16-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
16935 // CHECK16-NEXT: store i8* null, i8** [[TMP79]], align 8
16936 // CHECK16-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2
16937 // CHECK16-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64*
16938 // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP81]], align 8
16939 // CHECK16-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2
16940 // CHECK16-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64*
16941 // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP83]], align 8
16942 // CHECK16-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2
16943 // CHECK16-NEXT: store i64 8, i64* [[TMP84]], align 8
16944 // CHECK16-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2
16945 // CHECK16-NEXT: store i8* null, i8** [[TMP85]], align 8
16946 // CHECK16-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3
16947 // CHECK16-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32**
16948 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 8
16949 // CHECK16-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3
16950 // CHECK16-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
16951 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 8
16952 // CHECK16-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3
16953 // CHECK16-NEXT: store i64 [[TMP67]], i64* [[TMP90]], align 8
16954 // CHECK16-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3
16955 // CHECK16-NEXT: store i8* null, i8** [[TMP91]], align 8
16956 // CHECK16-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
16957 // CHECK16-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
16958 // CHECK16-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
16959 // CHECK16-NEXT: [[TMP95:%.*]] = load i32, i32* [[N]], align 4
16960 // CHECK16-NEXT: store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4
16961 // CHECK16-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
16962 // CHECK16-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0
16963 // CHECK16-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1
16964 // CHECK16-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1
16965 // CHECK16-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4
16966 // CHECK16-NEXT: [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
16967 // CHECK16-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1
16968 // CHECK16-NEXT: [[TMP98:%.*]] = zext i32 [[ADD31]] to i64
16969 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]])
16970 // CHECK16-NEXT: [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16971 // CHECK16-NEXT: [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0
16972 // CHECK16-NEXT: br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
16973 // CHECK16: omp_offload.failed32:
16974 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
16975 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT33]]
16976 // CHECK16: omp_offload.cont33:
16977 // CHECK16-NEXT: [[TMP101:%.*]] = load i32, i32* [[N]], align 4
16978 // CHECK16-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32*
16979 // CHECK16-NEXT: store i32 [[TMP101]], i32* [[CONV35]], align 4
16980 // CHECK16-NEXT: [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8
16981 // CHECK16-NEXT: [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4
16982 // CHECK16-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
16983 // CHECK16-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
16984 // CHECK16-NEXT: store i64 [[TMP102]], i64* [[TMP105]], align 8
16985 // CHECK16-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
16986 // CHECK16-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64*
16987 // CHECK16-NEXT: store i64 [[TMP102]], i64* [[TMP107]], align 8
16988 // CHECK16-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
16989 // CHECK16-NEXT: store i64 4, i64* [[TMP108]], align 8
16990 // CHECK16-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0
16991 // CHECK16-NEXT: store i8* null, i8** [[TMP109]], align 8
16992 // CHECK16-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1
16993 // CHECK16-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64*
16994 // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP111]], align 8
16995 // CHECK16-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1
16996 // CHECK16-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64*
16997 // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP113]], align 8
16998 // CHECK16-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1
16999 // CHECK16-NEXT: store i64 8, i64* [[TMP114]], align 8
17000 // CHECK16-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1
17001 // CHECK16-NEXT: store i8* null, i8** [[TMP115]], align 8
17002 // CHECK16-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2
17003 // CHECK16-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32**
17004 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 8
17005 // CHECK16-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2
17006 // CHECK16-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32**
17007 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP119]], align 8
17008 // CHECK16-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2
17009 // CHECK16-NEXT: store i64 [[TMP103]], i64* [[TMP120]], align 8
17010 // CHECK16-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2
17011 // CHECK16-NEXT: store i8* null, i8** [[TMP121]], align 8
17012 // CHECK16-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
17013 // CHECK16-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
17014 // CHECK16-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
17015 // CHECK16-NEXT: [[TMP125:%.*]] = load i32, i32* [[N]], align 4
17016 // CHECK16-NEXT: store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4
17017 // CHECK16-NEXT: [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
17018 // CHECK16-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0
17019 // CHECK16-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
17020 // CHECK16-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
17021 // CHECK16-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
17022 // CHECK16-NEXT: [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
17023 // CHECK16-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1
17024 // CHECK16-NEXT: [[TMP128:%.*]] = zext i32 [[ADD46]] to i64
17025 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]])
17026 // CHECK16-NEXT: [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17027 // CHECK16-NEXT: [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0
17028 // CHECK16-NEXT: br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
17029 // CHECK16: omp_offload.failed47:
17030 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
17031 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT48]]
17032 // CHECK16: omp_offload.cont48:
17033 // CHECK16-NEXT: [[TMP131:%.*]] = load i32, i32* [[M]], align 4
17034 // CHECK16-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32*
17035 // CHECK16-NEXT: store i32 [[TMP131]], i32* [[CONV50]], align 4
17036 // CHECK16-NEXT: [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8
17037 // CHECK16-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4
17038 // CHECK16-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32*
17039 // CHECK16-NEXT: store i32 [[TMP133]], i32* [[CONV52]], align 4
17040 // CHECK16-NEXT: [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8
17041 // CHECK16-NEXT: [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4
17042 // CHECK16-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
17043 // CHECK16-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
17044 // CHECK16-NEXT: store i64 [[TMP132]], i64* [[TMP137]], align 8
17045 // CHECK16-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
17046 // CHECK16-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64*
17047 // CHECK16-NEXT: store i64 [[TMP132]], i64* [[TMP139]], align 8
17048 // CHECK16-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
17049 // CHECK16-NEXT: store i64 4, i64* [[TMP140]], align 8
17050 // CHECK16-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0
17051 // CHECK16-NEXT: store i8* null, i8** [[TMP141]], align 8
17052 // CHECK16-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1
17053 // CHECK16-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64*
17054 // CHECK16-NEXT: store i64 [[TMP134]], i64* [[TMP143]], align 8
17055 // CHECK16-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1
17056 // CHECK16-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64*
17057 // CHECK16-NEXT: store i64 [[TMP134]], i64* [[TMP145]], align 8
17058 // CHECK16-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1
17059 // CHECK16-NEXT: store i64 4, i64* [[TMP146]], align 8
17060 // CHECK16-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1
17061 // CHECK16-NEXT: store i8* null, i8** [[TMP147]], align 8
17062 // CHECK16-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2
17063 // CHECK16-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64*
17064 // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP149]], align 8
17065 // CHECK16-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2
17066 // CHECK16-NEXT: [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64*
17067 // CHECK16-NEXT: store i64 [[TMP1]], i64* [[TMP151]], align 8
17068 // CHECK16-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2
17069 // CHECK16-NEXT: store i64 8, i64* [[TMP152]], align 8
17070 // CHECK16-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2
17071 // CHECK16-NEXT: store i8* null, i8** [[TMP153]], align 8
17072 // CHECK16-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3
17073 // CHECK16-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32**
17074 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP155]], align 8
17075 // CHECK16-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3
17076 // CHECK16-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32**
17077 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP157]], align 8
17078 // CHECK16-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3
17079 // CHECK16-NEXT: store i64 [[TMP135]], i64* [[TMP158]], align 8
17080 // CHECK16-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3
17081 // CHECK16-NEXT: store i8* null, i8** [[TMP159]], align 8
17082 // CHECK16-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
17083 // CHECK16-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
17084 // CHECK16-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
17085 // CHECK16-NEXT: [[TMP163:%.*]] = load i32, i32* [[N]], align 4
17086 // CHECK16-NEXT: store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4
17087 // CHECK16-NEXT: [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4
17088 // CHECK16-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0
17089 // CHECK16-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1
17090 // CHECK16-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1
17091 // CHECK16-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4
17092 // CHECK16-NEXT: [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4
17093 // CHECK16-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1
17094 // CHECK16-NEXT: [[TMP166:%.*]] = zext i32 [[ADD63]] to i64
17095 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]])
17096 // CHECK16-NEXT: [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17097 // CHECK16-NEXT: [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0
17098 // CHECK16-NEXT: br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
17099 // CHECK16: omp_offload.failed64:
17100 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
17101 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT65]]
17102 // CHECK16: omp_offload.cont65:
17103 // CHECK16-NEXT: [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
17104 // CHECK16-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]])
17105 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
17106 // CHECK16-NEXT: [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
17107 // CHECK16-NEXT: call void @llvm.stackrestore(i8* [[TMP170]])
17108 // CHECK16-NEXT: [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4
17109 // CHECK16-NEXT: ret i32 [[TMP171]]
17110 //
17111 //
17112 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154
17113 // CHECK16-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
17114 // CHECK16-NEXT: entry:
17115 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
17116 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
17117 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
17118 // CHECK16-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
17119 // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17120 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
17121 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
17122 // CHECK16-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17123 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17124 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
17125 // CHECK16-NEXT: ret void
17126 //
17127 //
17128 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined.
17129 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17130 // CHECK16-NEXT: entry:
17131 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17132 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17133 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
17134 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
17135 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
17136 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17137 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
17138 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17139 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17140 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
17141 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
17142 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
17143 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17144 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17145 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4
17146 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17147 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17148 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
17149 // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17150 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
17151 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
17152 // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17153 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17154 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
17155 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
17156 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17157 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
17158 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17159 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
17160 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17161 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4
17162 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17163 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
17164 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17165 // CHECK16: omp.precond.then:
17166 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
17167 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17168 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
17169 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17170 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17171 // CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17172 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
17173 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17174 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17175 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17176 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
17177 // CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17178 // CHECK16: cond.true:
17179 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17180 // CHECK16-NEXT: br label [[COND_END:%.*]]
17181 // CHECK16: cond.false:
17182 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17183 // CHECK16-NEXT: br label [[COND_END]]
17184 // CHECK16: cond.end:
17185 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
17186 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
17187 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17188 // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
17189 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17190 // CHECK16: omp.inner.for.cond:
17191 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
17192 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
17193 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
17194 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17195 // CHECK16: omp.inner.for.body:
17196 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13
17197 // CHECK16-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
17198 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
17199 // CHECK16-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
17200 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !13
17201 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17202 // CHECK16: omp.inner.for.inc:
17203 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
17204 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13
17205 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
17206 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
17207 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
17208 // CHECK16: omp.inner.for.end:
17209 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
17210 // CHECK16: omp.loop.exit:
17211 // CHECK16-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17212 // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
17213 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
17214 // CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
17215 // CHECK16-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
17216 // CHECK16-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
17217 // CHECK16: .omp.final.then:
17218 // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17219 // CHECK16-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0
17220 // CHECK16-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
17221 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
17222 // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
17223 // CHECK16-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
17224 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
17225 // CHECK16: .omp.final.done:
17226 // CHECK16-NEXT: br label [[OMP_PRECOND_END]]
17227 // CHECK16: omp.precond.end:
17228 // CHECK16-NEXT: ret void
17229 //
17230 //
17231 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..1
17232 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17233 // CHECK16-NEXT: entry:
17234 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17235 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17236 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
17237 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
17238 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
17239 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
17240 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
17241 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17242 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
17243 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17244 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17245 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
17246 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17247 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17248 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17249 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17250 // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4
17251 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17252 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17253 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
17254 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
17255 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
17256 // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17257 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
17258 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
17259 // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17260 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17261 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
17262 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
17263 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17264 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
17265 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17266 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
17267 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17268 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4
17269 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17270 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
17271 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17272 // CHECK16: omp.precond.then:
17273 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
17274 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17275 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
17276 // CHECK16-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
17277 // CHECK16-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
17278 // CHECK16-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
17279 // CHECK16-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
17280 // CHECK16-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
17281 // CHECK16-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
17282 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17283 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17284 // CHECK16-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17285 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
17286 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17287 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17288 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17289 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
17290 // CHECK16-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17291 // CHECK16: cond.true:
17292 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17293 // CHECK16-NEXT: br label [[COND_END:%.*]]
17294 // CHECK16: cond.false:
17295 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17296 // CHECK16-NEXT: br label [[COND_END]]
17297 // CHECK16: cond.end:
17298 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
17299 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
17300 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17301 // CHECK16-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
17302 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17303 // CHECK16: omp.inner.for.cond:
17304 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
17305 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
17306 // CHECK16-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
17307 // CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17308 // CHECK16: omp.inner.for.body:
17309 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
17310 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
17311 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17312 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !17
17313 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !17
17314 // CHECK16-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
17315 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
17316 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17
17317 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17318 // CHECK16: omp.body.continue:
17319 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17320 // CHECK16: omp.inner.for.inc:
17321 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
17322 // CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
17323 // CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
17324 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
17325 // CHECK16: omp.inner.for.end:
17326 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
17327 // CHECK16: omp.loop.exit:
17328 // CHECK16-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17329 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
17330 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
17331 // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
17332 // CHECK16-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
17333 // CHECK16-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
17334 // CHECK16: .omp.final.then:
17335 // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17336 // CHECK16-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
17337 // CHECK16-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
17338 // CHECK16-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
17339 // CHECK16-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
17340 // CHECK16-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4
17341 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
17342 // CHECK16: .omp.final.done:
17343 // CHECK16-NEXT: br label [[OMP_PRECOND_END]]
17344 // CHECK16: omp.precond.end:
17345 // CHECK16-NEXT: ret void
17346 //
17347 //
17348 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159
17349 // CHECK16-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17350 // CHECK16-NEXT: entry:
17351 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
17352 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
17353 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
17354 // CHECK16-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
17355 // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17356 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
17357 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
17358 // CHECK16-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17359 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17360 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
17361 // CHECK16-NEXT: ret void
17362 //
17363 //
17364 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..2
17365 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17366 // CHECK16-NEXT: entry:
17367 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17368 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17369 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
17370 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
17371 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
17372 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17373 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
17374 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17375 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17376 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
17377 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
17378 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
17379 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17380 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17381 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4
17382 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17383 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17384 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
17385 // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17386 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
17387 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
17388 // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17389 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17390 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
17391 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
17392 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17393 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
17394 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17395 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
17396 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17397 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4
17398 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17399 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
17400 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17401 // CHECK16: omp.precond.then:
17402 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
17403 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17404 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
17405 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17406 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17407 // CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17408 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
17409 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17410 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17411 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17412 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
17413 // CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17414 // CHECK16: cond.true:
17415 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17416 // CHECK16-NEXT: br label [[COND_END:%.*]]
17417 // CHECK16: cond.false:
17418 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17419 // CHECK16-NEXT: br label [[COND_END]]
17420 // CHECK16: cond.end:
17421 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
17422 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
17423 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17424 // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
17425 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17426 // CHECK16: omp.inner.for.cond:
17427 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
17428 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
17429 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
17430 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17431 // CHECK16: omp.inner.for.body:
17432 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !22
17433 // CHECK16-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
17434 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
17435 // CHECK16-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
17436 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !22
17437 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17438 // CHECK16: omp.inner.for.inc:
17439 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
17440 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22
17441 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
17442 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
17443 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
17444 // CHECK16: omp.inner.for.end:
17445 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
17446 // CHECK16: omp.loop.exit:
17447 // CHECK16-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17448 // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
17449 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
17450 // CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
17451 // CHECK16-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
17452 // CHECK16-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
17453 // CHECK16: .omp.final.then:
17454 // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17455 // CHECK16-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0
17456 // CHECK16-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
17457 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
17458 // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
17459 // CHECK16-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
17460 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
17461 // CHECK16: .omp.final.done:
17462 // CHECK16-NEXT: br label [[OMP_PRECOND_END]]
17463 // CHECK16: omp.precond.end:
17464 // CHECK16-NEXT: ret void
17465 //
17466 //
17467 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..3
17468 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17469 // CHECK16-NEXT: entry:
17470 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17471 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17472 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
17473 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
17474 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
17475 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
17476 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
17477 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17478 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
17479 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17480 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17481 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
17482 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17483 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17484 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17485 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17486 // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4
17487 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17488 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17489 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
17490 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
17491 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
17492 // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17493 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
17494 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
17495 // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17496 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17497 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
17498 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
17499 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17500 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
17501 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17502 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
17503 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17504 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4
17505 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17506 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
17507 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17508 // CHECK16: omp.precond.then:
17509 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
17510 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17511 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
17512 // CHECK16-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
17513 // CHECK16-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
17514 // CHECK16-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
17515 // CHECK16-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
17516 // CHECK16-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
17517 // CHECK16-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
17518 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17519 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17520 // CHECK16-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17521 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
17522 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17523 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17524 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17525 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
17526 // CHECK16-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17527 // CHECK16: cond.true:
17528 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17529 // CHECK16-NEXT: br label [[COND_END:%.*]]
17530 // CHECK16: cond.false:
17531 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17532 // CHECK16-NEXT: br label [[COND_END]]
17533 // CHECK16: cond.end:
17534 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
17535 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
17536 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17537 // CHECK16-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
17538 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17539 // CHECK16: omp.inner.for.cond:
17540 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
17541 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
17542 // CHECK16-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
17543 // CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17544 // CHECK16: omp.inner.for.body:
17545 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
17546 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
17547 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17548 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !25
17549 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !25
17550 // CHECK16-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
17551 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
17552 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
17553 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17554 // CHECK16: omp.body.continue:
17555 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17556 // CHECK16: omp.inner.for.inc:
17557 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
17558 // CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
17559 // CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
17560 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
17561 // CHECK16: omp.inner.for.end:
17562 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
17563 // CHECK16: omp.loop.exit:
17564 // CHECK16-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17565 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
17566 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
17567 // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
17568 // CHECK16-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
17569 // CHECK16-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
17570 // CHECK16: .omp.final.then:
17571 // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17572 // CHECK16-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
17573 // CHECK16-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
17574 // CHECK16-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
17575 // CHECK16-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
17576 // CHECK16-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4
17577 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
17578 // CHECK16: .omp.final.done:
17579 // CHECK16-NEXT: br label [[OMP_PRECOND_END]]
17580 // CHECK16: omp.precond.end:
17581 // CHECK16-NEXT: ret void
17582 //
17583 //
17584 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164
17585 // CHECK16-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17586 // CHECK16-NEXT: entry:
17587 // CHECK16-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
17588 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
17589 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
17590 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
17591 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17592 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
17593 // CHECK16-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
17594 // CHECK16-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
17595 // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17596 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
17597 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
17598 // CHECK16-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
17599 // CHECK16-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17600 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17601 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
17602 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
17603 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17604 // CHECK16-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
17605 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
17606 // CHECK16-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
17607 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
17608 // CHECK16-NEXT: ret void
17609 //
17610 //
17611 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..5
17612 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
17613 // CHECK16-NEXT: entry:
17614 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17615 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17616 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
17617 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
17618 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
17619 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
17620 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17621 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
17622 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17623 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
17624 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
17625 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
17626 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
17627 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17628 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17629 // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4
17630 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
17631 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17632 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17633 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
17634 // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17635 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
17636 // CHECK16-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
17637 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
17638 // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17639 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17640 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
17641 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
17642 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17643 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17644 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
17645 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17646 // CHECK16-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
17647 // CHECK16-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
17648 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4
17649 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17650 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
17651 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17652 // CHECK16: omp.precond.then:
17653 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
17654 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
17655 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
17656 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17657 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17658 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8
17659 // CHECK16-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17660 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
17661 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
17662 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17663 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
17664 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
17665 // CHECK16-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17666 // CHECK16: cond.true:
17667 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
17668 // CHECK16-NEXT: br label [[COND_END:%.*]]
17669 // CHECK16: cond.false:
17670 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17671 // CHECK16-NEXT: br label [[COND_END]]
17672 // CHECK16: cond.end:
17673 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
17674 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
17675 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17676 // CHECK16-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
17677 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17678 // CHECK16: omp.inner.for.cond:
17679 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
17680 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28
17681 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
17682 // CHECK16-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
17683 // CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17684 // CHECK16: omp.inner.for.body:
17685 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
17686 // CHECK16-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
17687 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
17688 // CHECK16-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
17689 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !28
17690 // CHECK16-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
17691 // CHECK16-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4, !llvm.access.group !28
17692 // CHECK16-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !28
17693 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]), !llvm.access.group !28
17694 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17695 // CHECK16: omp.inner.for.inc:
17696 // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
17697 // CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
17698 // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
17699 // CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
17700 // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
17701 // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
17702 // CHECK16-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
17703 // CHECK16-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
17704 // CHECK16-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
17705 // CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
17706 // CHECK16-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
17707 // CHECK16-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
17708 // CHECK16-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
17709 // CHECK16-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28
17710 // CHECK16-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]
17711 // CHECK16-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]]
17712 // CHECK16: cond.true12:
17713 // CHECK16-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !28
17714 // CHECK16-NEXT: br label [[COND_END14:%.*]]
17715 // CHECK16: cond.false13:
17716 // CHECK16-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
17717 // CHECK16-NEXT: br label [[COND_END14]]
17718 // CHECK16: cond.end14:
17719 // CHECK16-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ]
17720 // CHECK16-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
17721 // CHECK16-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
17722 // CHECK16-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
17723 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
17724 // CHECK16: omp.inner.for.end:
17725 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
17726 // CHECK16: omp.loop.exit:
17727 // CHECK16-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17728 // CHECK16-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
17729 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]])
17730 // CHECK16-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
17731 // CHECK16-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
17732 // CHECK16-NEXT: br i1 [[TMP37]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
17733 // CHECK16: .omp.final.then:
17734 // CHECK16-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17735 // CHECK16-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP38]], 0
17736 // CHECK16-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1
17737 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV17]], 1
17738 // CHECK16-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL]]
17739 // CHECK16-NEXT: store i32 [[ADD18]], i32* [[I4]], align 4
17740 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
17741 // CHECK16: .omp.final.done:
17742 // CHECK16-NEXT: br label [[OMP_PRECOND_END]]
17743 // CHECK16: omp.precond.end:
17744 // CHECK16-NEXT: ret void
17745 //
17746 //
17747 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..6
17748 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
17749 // CHECK16-NEXT: entry:
17750 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17751 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17752 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
17753 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
17754 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
17755 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
17756 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
17757 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
17758 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17759 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
17760 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17761 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
17762 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
17763 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
17764 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
17765 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17766 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17767 // CHECK16-NEXT: [[I6:%.*]] = alloca i32, align 4
17768 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17769 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17770 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
17771 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
17772 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
17773 // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17774 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
17775 // CHECK16-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
17776 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
17777 // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17778 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17779 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
17780 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
17781 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17782 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17783 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
17784 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17785 // CHECK16-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
17786 // CHECK16-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
17787 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4
17788 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17789 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
17790 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17791 // CHECK16: omp.precond.then:
17792 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
17793 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
17794 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
17795 // CHECK16-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
17796 // CHECK16-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
17797 // CHECK16-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
17798 // CHECK16-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
17799 // CHECK16-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
17800 // CHECK16-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
17801 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17802 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17803 // CHECK16-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17804 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
17805 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17806 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17807 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
17808 // CHECK16-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
17809 // CHECK16-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17810 // CHECK16: cond.true:
17811 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
17812 // CHECK16-NEXT: br label [[COND_END:%.*]]
17813 // CHECK16: cond.false:
17814 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17815 // CHECK16-NEXT: br label [[COND_END]]
17816 // CHECK16: cond.end:
17817 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
17818 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
17819 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17820 // CHECK16-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
17821 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17822 // CHECK16: omp.inner.for.cond:
17823 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
17824 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !31
17825 // CHECK16-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
17826 // CHECK16-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17827 // CHECK16: omp.inner.for.body:
17828 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
17829 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
17830 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17831 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !31
17832 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !31
17833 // CHECK16-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
17834 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
17835 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !31
17836 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
17837 // CHECK16: omp.body.continue:
17838 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17839 // CHECK16: omp.inner.for.inc:
17840 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
17841 // CHECK16-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
17842 // CHECK16-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
17843 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
17844 // CHECK16: omp.inner.for.end:
17845 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
17846 // CHECK16: omp.loop.exit:
17847 // CHECK16-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17848 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
17849 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
17850 // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
17851 // CHECK16-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
17852 // CHECK16-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
17853 // CHECK16: .omp.final.then:
17854 // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17855 // CHECK16-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP25]], 0
17856 // CHECK16-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
17857 // CHECK16-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
17858 // CHECK16-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
17859 // CHECK16-NEXT: store i32 [[ADD13]], i32* [[I6]], align 4
17860 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
17861 // CHECK16: .omp.final.done:
17862 // CHECK16-NEXT: br label [[OMP_PRECOND_END]]
17863 // CHECK16: omp.precond.end:
17864 // CHECK16-NEXT: ret void
17865 //
17866 //
17867 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169
17868 // CHECK16-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17869 // CHECK16-NEXT: entry:
17870 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
17871 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
17872 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
17873 // CHECK16-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
17874 // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17875 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
17876 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
17877 // CHECK16-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17878 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17879 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
17880 // CHECK16-NEXT: ret void
17881 //
17882 //
17883 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..8
17884 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17885 // CHECK16-NEXT: entry:
17886 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17887 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17888 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
17889 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
17890 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
17891 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17892 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
17893 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17894 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17895 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
17896 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
17897 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
17898 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17899 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17900 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4
17901 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17902 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17903 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
17904 // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17905 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
17906 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
17907 // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17908 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17909 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
17910 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
17911 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17912 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
17913 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17914 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
17915 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17916 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4
17917 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17918 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
17919 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17920 // CHECK16: omp.precond.then:
17921 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
17922 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17923 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
17924 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17925 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17926 // CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17927 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
17928 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17929 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17930 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17931 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
17932 // CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17933 // CHECK16: cond.true:
17934 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17935 // CHECK16-NEXT: br label [[COND_END:%.*]]
17936 // CHECK16: cond.false:
17937 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17938 // CHECK16-NEXT: br label [[COND_END]]
17939 // CHECK16: cond.end:
17940 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
17941 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
17942 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17943 // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
17944 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
17945 // CHECK16: omp.inner.for.cond:
17946 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
17947 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
17948 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
17949 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17950 // CHECK16: omp.inner.for.body:
17951 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34
17952 // CHECK16-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
17953 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
17954 // CHECK16-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
17955 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !34
17956 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
17957 // CHECK16: omp.inner.for.inc:
17958 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
17959 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
17960 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
17961 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
17962 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
17963 // CHECK16: omp.inner.for.end:
17964 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
17965 // CHECK16: omp.loop.exit:
17966 // CHECK16-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17967 // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
17968 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
17969 // CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
17970 // CHECK16-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
17971 // CHECK16-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
17972 // CHECK16: .omp.final.then:
17973 // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17974 // CHECK16-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP26]], 0
17975 // CHECK16-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
17976 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
17977 // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
17978 // CHECK16-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
17979 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
17980 // CHECK16: .omp.final.done:
17981 // CHECK16-NEXT: br label [[OMP_PRECOND_END]]
17982 // CHECK16: omp.precond.end:
17983 // CHECK16-NEXT: ret void
17984 //
17985 //
17986 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..9
17987 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17988 // CHECK16-NEXT: entry:
17989 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17990 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17991 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
17992 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
17993 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
17994 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
17995 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
17996 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
17997 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
17998 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17999 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18000 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
18001 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18002 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18003 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18004 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18005 // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4
18006 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18007 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18008 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18009 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18010 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
18011 // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18012 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
18013 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18014 // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18015 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18016 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18017 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
18018 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18019 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18020 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18021 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
18022 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18023 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4
18024 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18025 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18026 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18027 // CHECK16: omp.precond.then:
18028 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
18029 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18030 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
18031 // CHECK16-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18032 // CHECK16-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
18033 // CHECK16-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18034 // CHECK16-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
18035 // CHECK16-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
18036 // CHECK16-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
18037 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18038 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18039 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18040 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18041 // CHECK16-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18042 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
18043 // CHECK16-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
18044 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
18045 // CHECK16: omp.dispatch.cond:
18046 // CHECK16-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18047 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
18048 // CHECK16-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
18049 // CHECK16-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
18050 // CHECK16-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
18051 // CHECK16: omp.dispatch.body:
18052 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18053 // CHECK16-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
18054 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18055 // CHECK16: omp.inner.for.cond:
18056 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
18057 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !37
18058 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
18059 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18060 // CHECK16: omp.inner.for.body:
18061 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
18062 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
18063 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18064 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !37
18065 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !37
18066 // CHECK16-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
18067 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
18068 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !37
18069 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18070 // CHECK16: omp.body.continue:
18071 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18072 // CHECK16: omp.inner.for.inc:
18073 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
18074 // CHECK16-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
18075 // CHECK16-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
18076 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]]
18077 // CHECK16: omp.inner.for.end:
18078 // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
18079 // CHECK16: omp.dispatch.inc:
18080 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]]
18081 // CHECK16: omp.dispatch.end:
18082 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
18083 // CHECK16-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
18084 // CHECK16-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
18085 // CHECK16: .omp.final.then:
18086 // CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18087 // CHECK16-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0
18088 // CHECK16-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
18089 // CHECK16-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
18090 // CHECK16-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
18091 // CHECK16-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
18092 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
18093 // CHECK16: .omp.final.done:
18094 // CHECK16-NEXT: br label [[OMP_PRECOND_END]]
18095 // CHECK16: omp.precond.end:
18096 // CHECK16-NEXT: ret void
18097 //
18098 //
18099 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174
18100 // CHECK16-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18101 // CHECK16-NEXT: entry:
18102 // CHECK16-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
18103 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
18104 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
18105 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
18106 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18107 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
18108 // CHECK16-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
18109 // CHECK16-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
18110 // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18111 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
18112 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
18113 // CHECK16-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18114 // CHECK16-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18115 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18116 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
18117 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
18118 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18119 // CHECK16-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18120 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
18121 // CHECK16-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
18122 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
18123 // CHECK16-NEXT: ret void
18124 //
18125 //
18126 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..11
18127 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
18128 // CHECK16-NEXT: entry:
18129 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18130 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18131 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
18132 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
18133 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
18134 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18135 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18136 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
18137 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18138 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
18139 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
18140 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18141 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18142 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18143 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18144 // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4
18145 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
18146 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18147 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18148 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
18149 // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18150 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
18151 // CHECK16-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18152 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18153 // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18154 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18155 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18156 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18157 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18158 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18159 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18160 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18161 // CHECK16-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
18162 // CHECK16-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
18163 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4
18164 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18165 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18166 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18167 // CHECK16: omp.precond.then:
18168 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18169 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18170 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
18171 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18172 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18173 // CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18174 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
18175 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18176 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18177 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18178 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
18179 // CHECK16-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18180 // CHECK16: cond.true:
18181 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18182 // CHECK16-NEXT: br label [[COND_END:%.*]]
18183 // CHECK16: cond.false:
18184 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18185 // CHECK16-NEXT: br label [[COND_END]]
18186 // CHECK16: cond.end:
18187 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
18188 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18189 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18190 // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
18191 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18192 // CHECK16: omp.inner.for.cond:
18193 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
18194 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
18195 // CHECK16-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
18196 // CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18197 // CHECK16: omp.inner.for.body:
18198 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !40
18199 // CHECK16-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
18200 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
18201 // CHECK16-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
18202 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !40
18203 // CHECK16-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18204 // CHECK16-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4, !llvm.access.group !40
18205 // CHECK16-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !40
18206 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]), !llvm.access.group !40
18207 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18208 // CHECK16: omp.inner.for.inc:
18209 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
18210 // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !40
18211 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
18212 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
18213 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]]
18214 // CHECK16: omp.inner.for.end:
18215 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18216 // CHECK16: omp.loop.exit:
18217 // CHECK16-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18218 // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
18219 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
18220 // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
18221 // CHECK16-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
18222 // CHECK16-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
18223 // CHECK16: .omp.final.then:
18224 // CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18225 // CHECK16-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP28]], 0
18226 // CHECK16-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
18227 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV9]], 1
18228 // CHECK16-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL]]
18229 // CHECK16-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
18230 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
18231 // CHECK16: .omp.final.done:
18232 // CHECK16-NEXT: br label [[OMP_PRECOND_END]]
18233 // CHECK16: omp.precond.end:
18234 // CHECK16-NEXT: ret void
18235 //
18236 //
18237 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..12
18238 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
18239 // CHECK16-NEXT: entry:
18240 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18241 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18242 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
18243 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
18244 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
18245 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
18246 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
18247 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18248 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18249 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
18250 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18251 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
18252 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
18253 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18254 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18255 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18256 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18257 // CHECK16-NEXT: [[I6:%.*]] = alloca i32, align 4
18258 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18259 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18260 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18261 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18262 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
18263 // CHECK16-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18264 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
18265 // CHECK16-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18266 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18267 // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18268 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18269 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18270 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18271 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18272 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18273 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18274 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18275 // CHECK16-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
18276 // CHECK16-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
18277 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4
18278 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18279 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18280 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18281 // CHECK16: omp.precond.then:
18282 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
18283 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18284 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
18285 // CHECK16-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18286 // CHECK16-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
18287 // CHECK16-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18288 // CHECK16-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
18289 // CHECK16-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
18290 // CHECK16-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
18291 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18292 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18293 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
18294 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18295 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18296 // CHECK16-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18297 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
18298 // CHECK16-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
18299 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
18300 // CHECK16: omp.dispatch.cond:
18301 // CHECK16-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18302 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
18303 // CHECK16-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
18304 // CHECK16-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
18305 // CHECK16-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
18306 // CHECK16: omp.dispatch.body:
18307 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18308 // CHECK16-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
18309 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18310 // CHECK16: omp.inner.for.cond:
18311 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
18312 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !43
18313 // CHECK16-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
18314 // CHECK16-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18315 // CHECK16: omp.inner.for.body:
18316 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
18317 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
18318 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18319 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !43
18320 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !43
18321 // CHECK16-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
18322 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
18323 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !43
18324 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18325 // CHECK16: omp.body.continue:
18326 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18327 // CHECK16: omp.inner.for.inc:
18328 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
18329 // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
18330 // CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
18331 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
18332 // CHECK16: omp.inner.for.end:
18333 // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
18334 // CHECK16: omp.dispatch.inc:
18335 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]]
18336 // CHECK16: omp.dispatch.end:
18337 // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
18338 // CHECK16-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
18339 // CHECK16-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
18340 // CHECK16: .omp.final.then:
18341 // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18342 // CHECK16-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP25]], 0
18343 // CHECK16-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
18344 // CHECK16-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
18345 // CHECK16-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
18346 // CHECK16-NEXT: store i32 [[ADD12]], i32* [[I6]], align 4
18347 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
18348 // CHECK16: .omp.final.done:
18349 // CHECK16-NEXT: br label [[OMP_PRECOND_END]]
18350 // CHECK16: omp.precond.end:
18351 // CHECK16-NEXT: ret void
18352 //
18353 //
18354 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
18355 // CHECK16-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
18356 // CHECK16-NEXT: entry:
18357 // CHECK16-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
18358 // CHECK16-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
18359 // CHECK16-NEXT: [[M:%.*]] = alloca i32, align 4
18360 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
18361 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
18362 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
18363 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
18364 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
18365 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
18366 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
18367 // CHECK16-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
18368 // CHECK16-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
18369 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8
18370 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8
18371 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8
18372 // CHECK16-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
18373 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8
18374 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8
18375 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8
18376 // CHECK16-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
18377 // CHECK16-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8
18378 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8
18379 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8
18380 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8
18381 // CHECK16-NEXT: [[_TMP24:%.*]] = alloca i32, align 4
18382 // CHECK16-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
18383 // CHECK16-NEXT: store i32 10, i32* [[M]], align 4
18384 // CHECK16-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
18385 // CHECK16-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
18386 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
18387 // CHECK16-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
18388 // CHECK16-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
18389 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
18390 // CHECK16-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
18391 // CHECK16-NEXT: store i8* null, i8** [[TMP4]], align 8
18392 // CHECK16-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
18393 // CHECK16-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
18394 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
18395 // CHECK16-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
18396 // CHECK16-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
18397 // CHECK16-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
18398 // CHECK16: omp_offload.failed:
18399 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122([10 x i32]* [[A]]) #[[ATTR3]]
18400 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT]]
18401 // CHECK16: omp_offload.cont:
18402 // CHECK16-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
18403 // CHECK16-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
18404 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
18405 // CHECK16-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
18406 // CHECK16-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
18407 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
18408 // CHECK16-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
18409 // CHECK16-NEXT: store i8* null, i8** [[TMP13]], align 8
18410 // CHECK16-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
18411 // CHECK16-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
18412 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
18413 // CHECK16-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
18414 // CHECK16-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
18415 // CHECK16-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
18416 // CHECK16: omp_offload.failed5:
18417 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127([10 x i32]* [[A]]) #[[ATTR3]]
18418 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT6]]
18419 // CHECK16: omp_offload.cont6:
18420 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4
18421 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32*
18422 // CHECK16-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4
18423 // CHECK16-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8
18424 // CHECK16-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
18425 // CHECK16-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
18426 // CHECK16-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8
18427 // CHECK16-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
18428 // CHECK16-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
18429 // CHECK16-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8
18430 // CHECK16-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
18431 // CHECK16-NEXT: store i8* null, i8** [[TMP24]], align 8
18432 // CHECK16-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
18433 // CHECK16-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
18434 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8
18435 // CHECK16-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
18436 // CHECK16-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
18437 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8
18438 // CHECK16-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1
18439 // CHECK16-NEXT: store i8* null, i8** [[TMP29]], align 8
18440 // CHECK16-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
18441 // CHECK16-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
18442 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
18443 // CHECK16-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
18444 // CHECK16-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
18445 // CHECK16-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
18446 // CHECK16: omp_offload.failed11:
18447 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
18448 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT12]]
18449 // CHECK16: omp_offload.cont12:
18450 // CHECK16-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
18451 // CHECK16-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
18452 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8
18453 // CHECK16-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
18454 // CHECK16-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
18455 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8
18456 // CHECK16-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0
18457 // CHECK16-NEXT: store i8* null, i8** [[TMP38]], align 8
18458 // CHECK16-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
18459 // CHECK16-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
18460 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
18461 // CHECK16-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
18462 // CHECK16-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
18463 // CHECK16-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
18464 // CHECK16: omp_offload.failed17:
18465 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137([10 x i32]* [[A]]) #[[ATTR3]]
18466 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT18]]
18467 // CHECK16: omp_offload.cont18:
18468 // CHECK16-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4
18469 // CHECK16-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32*
18470 // CHECK16-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4
18471 // CHECK16-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8
18472 // CHECK16-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
18473 // CHECK16-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
18474 // CHECK16-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8
18475 // CHECK16-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
18476 // CHECK16-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
18477 // CHECK16-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8
18478 // CHECK16-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
18479 // CHECK16-NEXT: store i8* null, i8** [[TMP49]], align 8
18480 // CHECK16-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
18481 // CHECK16-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
18482 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8
18483 // CHECK16-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
18484 // CHECK16-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
18485 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8
18486 // CHECK16-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
18487 // CHECK16-NEXT: store i8* null, i8** [[TMP54]], align 8
18488 // CHECK16-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
18489 // CHECK16-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
18490 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
18491 // CHECK16-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
18492 // CHECK16-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
18493 // CHECK16-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]]
18494 // CHECK16: omp_offload.failed25:
18495 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
18496 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT26]]
18497 // CHECK16: omp_offload.cont26:
18498 // CHECK16-NEXT: ret i32 0
18499 //
18500 //
18501 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122
18502 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
18503 // CHECK16-NEXT: entry:
18504 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
18505 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
18506 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
18507 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
18508 // CHECK16-NEXT: ret void
18509 //
18510 //
18511 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..14
18512 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
18513 // CHECK16-NEXT: entry:
18514 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18515 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18516 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
18517 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18518 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
18519 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18520 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18521 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18522 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18523 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
18524 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18525 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18526 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
18527 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
18528 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18529 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
18530 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18531 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18532 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18533 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
18534 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18535 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18536 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
18537 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18538 // CHECK16: cond.true:
18539 // CHECK16-NEXT: br label [[COND_END:%.*]]
18540 // CHECK16: cond.false:
18541 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18542 // CHECK16-NEXT: br label [[COND_END]]
18543 // CHECK16: cond.end:
18544 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
18545 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18546 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18547 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
18548 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18549 // CHECK16: omp.inner.for.cond:
18550 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
18551 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
18552 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
18553 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18554 // CHECK16: omp.inner.for.body:
18555 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46
18556 // CHECK16-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
18557 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
18558 // CHECK16-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
18559 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !46
18560 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18561 // CHECK16: omp.inner.for.inc:
18562 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
18563 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46
18564 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
18565 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
18566 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
18567 // CHECK16: omp.inner.for.end:
18568 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18569 // CHECK16: omp.loop.exit:
18570 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
18571 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
18572 // CHECK16-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
18573 // CHECK16-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
18574 // CHECK16: .omp.final.then:
18575 // CHECK16-NEXT: store i32 10, i32* [[I]], align 4
18576 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
18577 // CHECK16: .omp.final.done:
18578 // CHECK16-NEXT: ret void
18579 //
18580 //
18581 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..15
18582 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
18583 // CHECK16-NEXT: entry:
18584 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18585 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18586 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
18587 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
18588 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
18589 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18590 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
18591 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18592 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18593 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18594 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18595 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
18596 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18597 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18598 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18599 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18600 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
18601 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
18602 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
18603 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
18604 // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18605 // CHECK16-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
18606 // CHECK16-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18607 // CHECK16-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
18608 // CHECK16-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
18609 // CHECK16-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
18610 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18611 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18612 // CHECK16-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18613 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
18614 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18615 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18616 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
18617 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18618 // CHECK16: cond.true:
18619 // CHECK16-NEXT: br label [[COND_END:%.*]]
18620 // CHECK16: cond.false:
18621 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18622 // CHECK16-NEXT: br label [[COND_END]]
18623 // CHECK16: cond.end:
18624 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
18625 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18626 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18627 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
18628 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18629 // CHECK16: omp.inner.for.cond:
18630 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
18631 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49
18632 // CHECK16-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
18633 // CHECK16-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18634 // CHECK16: omp.inner.for.body:
18635 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
18636 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
18637 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18638 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49
18639 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !49
18640 // CHECK16-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
18641 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
18642 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !49
18643 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18644 // CHECK16: omp.body.continue:
18645 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18646 // CHECK16: omp.inner.for.inc:
18647 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
18648 // CHECK16-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
18649 // CHECK16-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
18650 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]]
18651 // CHECK16: omp.inner.for.end:
18652 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18653 // CHECK16: omp.loop.exit:
18654 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
18655 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
18656 // CHECK16-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
18657 // CHECK16-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
18658 // CHECK16: .omp.final.then:
18659 // CHECK16-NEXT: store i32 10, i32* [[I]], align 4
18660 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
18661 // CHECK16: .omp.final.done:
18662 // CHECK16-NEXT: ret void
18663 //
18664 //
18665 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127
18666 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
18667 // CHECK16-NEXT: entry:
18668 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
18669 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
18670 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
18671 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
18672 // CHECK16-NEXT: ret void
18673 //
18674 //
18675 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..17
18676 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
18677 // CHECK16-NEXT: entry:
18678 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18679 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18680 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
18681 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18682 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
18683 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18684 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18685 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18686 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18687 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
18688 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18689 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18690 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
18691 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
18692 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18693 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
18694 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18695 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18696 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18697 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
18698 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18699 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18700 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
18701 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18702 // CHECK16: cond.true:
18703 // CHECK16-NEXT: br label [[COND_END:%.*]]
18704 // CHECK16: cond.false:
18705 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18706 // CHECK16-NEXT: br label [[COND_END]]
18707 // CHECK16: cond.end:
18708 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
18709 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18710 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18711 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
18712 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18713 // CHECK16: omp.inner.for.cond:
18714 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
18715 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52
18716 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
18717 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18718 // CHECK16: omp.inner.for.body:
18719 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !52
18720 // CHECK16-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
18721 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52
18722 // CHECK16-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
18723 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !52
18724 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18725 // CHECK16: omp.inner.for.inc:
18726 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
18727 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !52
18728 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
18729 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
18730 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
18731 // CHECK16: omp.inner.for.end:
18732 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18733 // CHECK16: omp.loop.exit:
18734 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
18735 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
18736 // CHECK16-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
18737 // CHECK16-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
18738 // CHECK16: .omp.final.then:
18739 // CHECK16-NEXT: store i32 10, i32* [[I]], align 4
18740 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
18741 // CHECK16: .omp.final.done:
18742 // CHECK16-NEXT: ret void
18743 //
18744 //
18745 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..18
18746 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
18747 // CHECK16-NEXT: entry:
18748 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18749 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18750 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
18751 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
18752 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
18753 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18754 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
18755 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18756 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18757 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18758 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18759 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
18760 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18761 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18762 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18763 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18764 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
18765 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
18766 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
18767 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
18768 // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18769 // CHECK16-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
18770 // CHECK16-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18771 // CHECK16-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
18772 // CHECK16-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
18773 // CHECK16-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
18774 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18775 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18776 // CHECK16-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18777 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
18778 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18779 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18780 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
18781 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18782 // CHECK16: cond.true:
18783 // CHECK16-NEXT: br label [[COND_END:%.*]]
18784 // CHECK16: cond.false:
18785 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18786 // CHECK16-NEXT: br label [[COND_END]]
18787 // CHECK16: cond.end:
18788 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
18789 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18790 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18791 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
18792 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18793 // CHECK16: omp.inner.for.cond:
18794 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
18795 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !55
18796 // CHECK16-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
18797 // CHECK16-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18798 // CHECK16: omp.inner.for.body:
18799 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
18800 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
18801 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18802 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !55
18803 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !55
18804 // CHECK16-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
18805 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
18806 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !55
18807 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
18808 // CHECK16: omp.body.continue:
18809 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18810 // CHECK16: omp.inner.for.inc:
18811 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
18812 // CHECK16-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
18813 // CHECK16-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
18814 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
18815 // CHECK16: omp.inner.for.end:
18816 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18817 // CHECK16: omp.loop.exit:
18818 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
18819 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
18820 // CHECK16-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
18821 // CHECK16-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
18822 // CHECK16: .omp.final.then:
18823 // CHECK16-NEXT: store i32 10, i32* [[I]], align 4
18824 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
18825 // CHECK16: .omp.final.done:
18826 // CHECK16-NEXT: ret void
18827 //
18828 //
18829 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132
18830 // CHECK16-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
18831 // CHECK16-NEXT: entry:
18832 // CHECK16-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
18833 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
18834 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18835 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
18836 // CHECK16-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
18837 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
18838 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
18839 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
18840 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
18841 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
18842 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18843 // CHECK16-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18844 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
18845 // CHECK16-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
18846 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
18847 // CHECK16-NEXT: ret void
18848 //
18849 //
18850 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..21
18851 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
18852 // CHECK16-NEXT: entry:
18853 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18854 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18855 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
18856 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18857 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18858 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
18859 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18860 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18861 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18862 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18863 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
18864 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
18865 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18866 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18867 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
18868 // CHECK16-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18869 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
18870 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18871 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18872 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
18873 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18874 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18875 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18876 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
18877 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18878 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18879 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
18880 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18881 // CHECK16: cond.true:
18882 // CHECK16-NEXT: br label [[COND_END:%.*]]
18883 // CHECK16: cond.false:
18884 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18885 // CHECK16-NEXT: br label [[COND_END]]
18886 // CHECK16: cond.end:
18887 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
18888 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18889 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18890 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
18891 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18892 // CHECK16: omp.inner.for.cond:
18893 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
18894 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
18895 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
18896 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18897 // CHECK16: omp.inner.for.body:
18898 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !58
18899 // CHECK16-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
18900 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
18901 // CHECK16-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
18902 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !58
18903 // CHECK16-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18904 // CHECK16-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !58
18905 // CHECK16-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !58
18906 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !58
18907 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
18908 // CHECK16: omp.inner.for.inc:
18909 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
18910 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !58
18911 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
18912 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
18913 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
18914 // CHECK16: omp.inner.for.end:
18915 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
18916 // CHECK16: omp.loop.exit:
18917 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
18918 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
18919 // CHECK16-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
18920 // CHECK16-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
18921 // CHECK16: .omp.final.then:
18922 // CHECK16-NEXT: store i32 10, i32* [[I]], align 4
18923 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
18924 // CHECK16: .omp.final.done:
18925 // CHECK16-NEXT: ret void
18926 //
18927 //
18928 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..22
18929 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
18930 // CHECK16-NEXT: entry:
18931 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18932 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18933 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
18934 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
18935 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
18936 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18937 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
18938 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
18939 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
18940 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
18941 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18942 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18943 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
18944 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18945 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18946 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18947 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18948 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
18949 // CHECK16-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18950 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
18951 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18952 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
18953 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
18954 // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18955 // CHECK16-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
18956 // CHECK16-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18957 // CHECK16-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
18958 // CHECK16-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
18959 // CHECK16-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
18960 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18961 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18962 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
18963 // CHECK16-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18964 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
18965 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
18966 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
18967 // CHECK16: omp.dispatch.cond:
18968 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18969 // CHECK16-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18970 // CHECK16-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
18971 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
18972 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18973 // CHECK16: cond.true:
18974 // CHECK16-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18975 // CHECK16-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
18976 // CHECK16-NEXT: br label [[COND_END:%.*]]
18977 // CHECK16: cond.false:
18978 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18979 // CHECK16-NEXT: br label [[COND_END]]
18980 // CHECK16: cond.end:
18981 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
18982 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18983 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18984 // CHECK16-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
18985 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18986 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18987 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
18988 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
18989 // CHECK16: omp.dispatch.body:
18990 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
18991 // CHECK16: omp.inner.for.cond:
18992 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
18993 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61
18994 // CHECK16-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
18995 // CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18996 // CHECK16: omp.inner.for.body:
18997 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
18998 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
18999 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19000 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !61
19001 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !61
19002 // CHECK16-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
19003 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
19004 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !61
19005 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19006 // CHECK16: omp.body.continue:
19007 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19008 // CHECK16: omp.inner.for.inc:
19009 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
19010 // CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
19011 // CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
19012 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]]
19013 // CHECK16: omp.inner.for.end:
19014 // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
19015 // CHECK16: omp.dispatch.inc:
19016 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19017 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19018 // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
19019 // CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
19020 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19021 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19022 // CHECK16-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
19023 // CHECK16-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
19024 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]]
19025 // CHECK16: omp.dispatch.end:
19026 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
19027 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
19028 // CHECK16-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
19029 // CHECK16-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
19030 // CHECK16: .omp.final.then:
19031 // CHECK16-NEXT: store i32 10, i32* [[I]], align 4
19032 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
19033 // CHECK16: .omp.final.done:
19034 // CHECK16-NEXT: ret void
19035 //
19036 //
19037 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137
19038 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19039 // CHECK16-NEXT: entry:
19040 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19041 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19042 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19043 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
19044 // CHECK16-NEXT: ret void
19045 //
19046 //
19047 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..25
19048 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19049 // CHECK16-NEXT: entry:
19050 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19051 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19052 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19053 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19054 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
19055 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19056 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19057 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19058 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19059 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
19060 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19061 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19062 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19063 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19064 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
19065 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
19066 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19067 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19068 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19069 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
19070 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19071 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19072 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
19073 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19074 // CHECK16: cond.true:
19075 // CHECK16-NEXT: br label [[COND_END:%.*]]
19076 // CHECK16: cond.false:
19077 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19078 // CHECK16-NEXT: br label [[COND_END]]
19079 // CHECK16: cond.end:
19080 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
19081 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
19082 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19083 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
19084 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19085 // CHECK16: omp.inner.for.cond:
19086 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
19087 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64
19088 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
19089 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19090 // CHECK16: omp.inner.for.body:
19091 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !64
19092 // CHECK16-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
19093 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64
19094 // CHECK16-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
19095 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !64
19096 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19097 // CHECK16: omp.inner.for.inc:
19098 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
19099 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !64
19100 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
19101 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
19102 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP65:![0-9]+]]
19103 // CHECK16: omp.inner.for.end:
19104 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19105 // CHECK16: omp.loop.exit:
19106 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
19107 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
19108 // CHECK16-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
19109 // CHECK16-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
19110 // CHECK16: .omp.final.then:
19111 // CHECK16-NEXT: store i32 10, i32* [[I]], align 4
19112 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
19113 // CHECK16: .omp.final.done:
19114 // CHECK16-NEXT: ret void
19115 //
19116 //
19117 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..26
19118 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19119 // CHECK16-NEXT: entry:
19120 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19121 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19122 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19123 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19124 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19125 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19126 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
19127 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19128 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19129 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19130 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19131 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
19132 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19133 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19134 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19135 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19136 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19137 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19138 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
19139 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
19140 // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19141 // CHECK16-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
19142 // CHECK16-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19143 // CHECK16-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
19144 // CHECK16-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
19145 // CHECK16-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
19146 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19147 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19148 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19149 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19150 // CHECK16-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19151 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
19152 // CHECK16-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
19153 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
19154 // CHECK16: omp.dispatch.cond:
19155 // CHECK16-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
19156 // CHECK16-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
19157 // CHECK16-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
19158 // CHECK16: omp.dispatch.body:
19159 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19160 // CHECK16-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
19161 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19162 // CHECK16: omp.inner.for.cond:
19163 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
19164 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !67
19165 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
19166 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19167 // CHECK16: omp.inner.for.body:
19168 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
19169 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
19170 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19171 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !67
19172 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !67
19173 // CHECK16-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
19174 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
19175 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !67
19176 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19177 // CHECK16: omp.body.continue:
19178 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19179 // CHECK16: omp.inner.for.inc:
19180 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
19181 // CHECK16-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
19182 // CHECK16-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
19183 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP68:![0-9]+]]
19184 // CHECK16: omp.inner.for.end:
19185 // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
19186 // CHECK16: omp.dispatch.inc:
19187 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]]
19188 // CHECK16: omp.dispatch.end:
19189 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
19190 // CHECK16-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
19191 // CHECK16-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
19192 // CHECK16: .omp.final.then:
19193 // CHECK16-NEXT: store i32 10, i32* [[I]], align 4
19194 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
19195 // CHECK16: .omp.final.done:
19196 // CHECK16-NEXT: ret void
19197 //
19198 //
19199 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142
19200 // CHECK16-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19201 // CHECK16-NEXT: entry:
19202 // CHECK16-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
19203 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19204 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
19205 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
19206 // CHECK16-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
19207 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19208 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
19209 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19210 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
19211 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
19212 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19213 // CHECK16-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
19214 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
19215 // CHECK16-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
19216 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
19217 // CHECK16-NEXT: ret void
19218 //
19219 //
19220 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..29
19221 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19222 // CHECK16-NEXT: entry:
19223 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19224 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19225 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19226 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19227 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19228 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
19229 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19230 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19231 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19232 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19233 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
19234 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
19235 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19236 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19237 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19238 // CHECK16-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
19239 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19240 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
19241 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
19242 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
19243 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19244 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19245 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19246 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
19247 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19248 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19249 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
19250 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19251 // CHECK16: cond.true:
19252 // CHECK16-NEXT: br label [[COND_END:%.*]]
19253 // CHECK16: cond.false:
19254 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19255 // CHECK16-NEXT: br label [[COND_END]]
19256 // CHECK16: cond.end:
19257 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
19258 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
19259 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19260 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
19261 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19262 // CHECK16: omp.inner.for.cond:
19263 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
19264 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70
19265 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
19266 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19267 // CHECK16: omp.inner.for.body:
19268 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !70
19269 // CHECK16-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
19270 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70
19271 // CHECK16-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
19272 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group !70
19273 // CHECK16-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
19274 // CHECK16-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !70
19275 // CHECK16-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !70
19276 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !70
19277 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19278 // CHECK16: omp.inner.for.inc:
19279 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
19280 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !70
19281 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
19282 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
19283 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP71:![0-9]+]]
19284 // CHECK16: omp.inner.for.end:
19285 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19286 // CHECK16: omp.loop.exit:
19287 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
19288 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
19289 // CHECK16-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
19290 // CHECK16-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
19291 // CHECK16: .omp.final.then:
19292 // CHECK16-NEXT: store i32 10, i32* [[I]], align 4
19293 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
19294 // CHECK16: .omp.final.done:
19295 // CHECK16-NEXT: ret void
19296 //
19297 //
19298 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..30
19299 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19300 // CHECK16-NEXT: entry:
19301 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19302 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19303 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19304 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19305 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19306 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19307 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19308 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
19309 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19310 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19311 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19312 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19313 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
19314 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19315 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19316 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19317 // CHECK16-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19318 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19319 // CHECK16-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
19320 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19321 // CHECK16-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
19322 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
19323 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
19324 // CHECK16-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19325 // CHECK16-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
19326 // CHECK16-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19327 // CHECK16-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
19328 // CHECK16-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
19329 // CHECK16-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
19330 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19331 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19332 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
19333 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19334 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19335 // CHECK16-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19336 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
19337 // CHECK16-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
19338 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
19339 // CHECK16: omp.dispatch.cond:
19340 // CHECK16-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
19341 // CHECK16-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
19342 // CHECK16-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
19343 // CHECK16: omp.dispatch.body:
19344 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19345 // CHECK16-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
19346 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19347 // CHECK16: omp.inner.for.cond:
19348 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
19349 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !73
19350 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
19351 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19352 // CHECK16: omp.inner.for.body:
19353 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
19354 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
19355 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19356 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !73
19357 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !73
19358 // CHECK16-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
19359 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
19360 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !73
19361 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19362 // CHECK16: omp.body.continue:
19363 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19364 // CHECK16: omp.inner.for.inc:
19365 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
19366 // CHECK16-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
19367 // CHECK16-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
19368 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP74:![0-9]+]]
19369 // CHECK16: omp.inner.for.end:
19370 // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
19371 // CHECK16: omp.dispatch.inc:
19372 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]]
19373 // CHECK16: omp.dispatch.end:
19374 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
19375 // CHECK16-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
19376 // CHECK16-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
19377 // CHECK16: .omp.final.then:
19378 // CHECK16-NEXT: store i32 10, i32* [[I]], align 4
19379 // CHECK16-NEXT: br label [[DOTOMP_FINAL_DONE]]
19380 // CHECK16: .omp.final.done:
19381 // CHECK16-NEXT: ret void
19382 //
19383 //
19384 // CHECK16-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
19385 // CHECK16-SAME: () #[[ATTR5:[0-9]+]] {
19386 // CHECK16-NEXT: entry:
19387 // CHECK16-NEXT: call void @__tgt_register_requires(i64 1)
19388 // CHECK16-NEXT: ret void
19389 //
19390 //
19391 // CHECK17-LABEL: define {{[^@]+}}@main
19392 // CHECK17-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
19393 // CHECK17-NEXT: entry:
19394 // CHECK17-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
19395 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
19396 // CHECK17-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
19397 // CHECK17-NEXT: [[N:%.*]] = alloca i32, align 4
19398 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
19399 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
19400 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4
19401 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
19402 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
19403 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
19404 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
19405 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
19406 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
19407 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
19408 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
19409 // CHECK17-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
19410 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
19411 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
19412 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
19413 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
19414 // CHECK17-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
19415 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
19416 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
19417 // CHECK17-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
19418 // CHECK17-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4
19419 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4
19420 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4
19421 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4
19422 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4
19423 // CHECK17-NEXT: [[_TMP22:%.*]] = alloca i32, align 4
19424 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4
19425 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
19426 // CHECK17-NEXT: [[N_CASTED31:%.*]] = alloca i32, align 4
19427 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4
19428 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4
19429 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4
19430 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4
19431 // CHECK17-NEXT: [[_TMP36:%.*]] = alloca i32, align 4
19432 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4
19433 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
19434 // CHECK17-NEXT: [[M_CASTED45:%.*]] = alloca i32, align 4
19435 // CHECK17-NEXT: [[N_CASTED46:%.*]] = alloca i32, align 4
19436 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4
19437 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4
19438 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4
19439 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4
19440 // CHECK17-NEXT: [[_TMP51:%.*]] = alloca i32, align 4
19441 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4
19442 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4
19443 // CHECK17-NEXT: store i32 0, i32* [[RETVAL]], align 4
19444 // CHECK17-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
19445 // CHECK17-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
19446 // CHECK17-NEXT: store i32 100, i32* [[N]], align 4
19447 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
19448 // CHECK17-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
19449 // CHECK17-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
19450 // CHECK17-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
19451 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
19452 // CHECK17-NEXT: store i32 10, i32* [[M]], align 4
19453 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
19454 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
19455 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
19456 // CHECK17-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
19457 // CHECK17-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
19458 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
19459 // CHECK17-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
19460 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4
19461 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
19462 // CHECK17-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
19463 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4
19464 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
19465 // CHECK17-NEXT: store i64 4, i64* [[TMP10]], align 4
19466 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
19467 // CHECK17-NEXT: store i8* null, i8** [[TMP11]], align 4
19468 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
19469 // CHECK17-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
19470 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
19471 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
19472 // CHECK17-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
19473 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
19474 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
19475 // CHECK17-NEXT: store i64 4, i64* [[TMP16]], align 4
19476 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
19477 // CHECK17-NEXT: store i8* null, i8** [[TMP17]], align 4
19478 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
19479 // CHECK17-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
19480 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4
19481 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
19482 // CHECK17-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
19483 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4
19484 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
19485 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4
19486 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
19487 // CHECK17-NEXT: store i8* null, i8** [[TMP23]], align 4
19488 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
19489 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
19490 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
19491 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
19492 // CHECK17-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
19493 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19494 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
19495 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
19496 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
19497 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
19498 // CHECK17-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
19499 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
19500 // CHECK17-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
19501 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
19502 // CHECK17-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19503 // CHECK17-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
19504 // CHECK17-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
19505 // CHECK17: omp_offload.failed:
19506 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
19507 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]
19508 // CHECK17: omp_offload.cont:
19509 // CHECK17-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4
19510 // CHECK17-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
19511 // CHECK17-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
19512 // CHECK17-NEXT: [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
19513 // CHECK17-NEXT: [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
19514 // CHECK17-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
19515 // CHECK17-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
19516 // CHECK17-NEXT: store i32 [[TMP34]], i32* [[TMP38]], align 4
19517 // CHECK17-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
19518 // CHECK17-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
19519 // CHECK17-NEXT: store i32 [[TMP34]], i32* [[TMP40]], align 4
19520 // CHECK17-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
19521 // CHECK17-NEXT: store i64 4, i64* [[TMP41]], align 4
19522 // CHECK17-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
19523 // CHECK17-NEXT: store i8* null, i8** [[TMP42]], align 4
19524 // CHECK17-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
19525 // CHECK17-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
19526 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[TMP44]], align 4
19527 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
19528 // CHECK17-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
19529 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[TMP46]], align 4
19530 // CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
19531 // CHECK17-NEXT: store i64 4, i64* [[TMP47]], align 4
19532 // CHECK17-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
19533 // CHECK17-NEXT: store i8* null, i8** [[TMP48]], align 4
19534 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
19535 // CHECK17-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
19536 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4
19537 // CHECK17-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
19538 // CHECK17-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
19539 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP52]], align 4
19540 // CHECK17-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
19541 // CHECK17-NEXT: store i64 [[TMP36]], i64* [[TMP53]], align 4
19542 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
19543 // CHECK17-NEXT: store i8* null, i8** [[TMP54]], align 4
19544 // CHECK17-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
19545 // CHECK17-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
19546 // CHECK17-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
19547 // CHECK17-NEXT: [[TMP58:%.*]] = load i32, i32* [[N]], align 4
19548 // CHECK17-NEXT: store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
19549 // CHECK17-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
19550 // CHECK17-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
19551 // CHECK17-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
19552 // CHECK17-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
19553 // CHECK17-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
19554 // CHECK17-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
19555 // CHECK17-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
19556 // CHECK17-NEXT: [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
19557 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]])
19558 // CHECK17-NEXT: [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19559 // CHECK17-NEXT: [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
19560 // CHECK17-NEXT: br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
19561 // CHECK17: omp_offload.failed15:
19562 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
19563 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT16]]
19564 // CHECK17: omp_offload.cont16:
19565 // CHECK17-NEXT: [[TMP64:%.*]] = load i32, i32* [[M]], align 4
19566 // CHECK17-NEXT: store i32 [[TMP64]], i32* [[M_CASTED]], align 4
19567 // CHECK17-NEXT: [[TMP65:%.*]] = load i32, i32* [[M_CASTED]], align 4
19568 // CHECK17-NEXT: [[TMP66:%.*]] = load i32, i32* [[N]], align 4
19569 // CHECK17-NEXT: store i32 [[TMP66]], i32* [[N_CASTED17]], align 4
19570 // CHECK17-NEXT: [[TMP67:%.*]] = load i32, i32* [[N_CASTED17]], align 4
19571 // CHECK17-NEXT: [[TMP68:%.*]] = mul nuw i32 [[TMP0]], 4
19572 // CHECK17-NEXT: [[TMP69:%.*]] = sext i32 [[TMP68]] to i64
19573 // CHECK17-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
19574 // CHECK17-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32*
19575 // CHECK17-NEXT: store i32 [[TMP65]], i32* [[TMP71]], align 4
19576 // CHECK17-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
19577 // CHECK17-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32*
19578 // CHECK17-NEXT: store i32 [[TMP65]], i32* [[TMP73]], align 4
19579 // CHECK17-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
19580 // CHECK17-NEXT: store i64 4, i64* [[TMP74]], align 4
19581 // CHECK17-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0
19582 // CHECK17-NEXT: store i8* null, i8** [[TMP75]], align 4
19583 // CHECK17-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1
19584 // CHECK17-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32*
19585 // CHECK17-NEXT: store i32 [[TMP67]], i32* [[TMP77]], align 4
19586 // CHECK17-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1
19587 // CHECK17-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32*
19588 // CHECK17-NEXT: store i32 [[TMP67]], i32* [[TMP79]], align 4
19589 // CHECK17-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1
19590 // CHECK17-NEXT: store i64 4, i64* [[TMP80]], align 4
19591 // CHECK17-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1
19592 // CHECK17-NEXT: store i8* null, i8** [[TMP81]], align 4
19593 // CHECK17-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2
19594 // CHECK17-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32*
19595 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[TMP83]], align 4
19596 // CHECK17-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2
19597 // CHECK17-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32*
19598 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[TMP85]], align 4
19599 // CHECK17-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2
19600 // CHECK17-NEXT: store i64 4, i64* [[TMP86]], align 4
19601 // CHECK17-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2
19602 // CHECK17-NEXT: store i8* null, i8** [[TMP87]], align 4
19603 // CHECK17-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3
19604 // CHECK17-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
19605 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 4
19606 // CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3
19607 // CHECK17-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32**
19608 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP91]], align 4
19609 // CHECK17-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3
19610 // CHECK17-NEXT: store i64 [[TMP69]], i64* [[TMP92]], align 4
19611 // CHECK17-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3
19612 // CHECK17-NEXT: store i8* null, i8** [[TMP93]], align 4
19613 // CHECK17-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
19614 // CHECK17-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
19615 // CHECK17-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
19616 // CHECK17-NEXT: [[TMP97:%.*]] = load i32, i32* [[N]], align 4
19617 // CHECK17-NEXT: store i32 [[TMP97]], i32* [[DOTCAPTURE_EXPR_23]], align 4
19618 // CHECK17-NEXT: [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4
19619 // CHECK17-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP98]], 0
19620 // CHECK17-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
19621 // CHECK17-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1
19622 // CHECK17-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4
19623 // CHECK17-NEXT: [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
19624 // CHECK17-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP99]], 1
19625 // CHECK17-NEXT: [[TMP100:%.*]] = zext i32 [[ADD28]] to i64
19626 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP100]])
19627 // CHECK17-NEXT: [[TMP101:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164.region_id, i32 4, i8** [[TMP94]], i8** [[TMP95]], i64* [[TMP96]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19628 // CHECK17-NEXT: [[TMP102:%.*]] = icmp ne i32 [[TMP101]], 0
19629 // CHECK17-NEXT: br i1 [[TMP102]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
19630 // CHECK17: omp_offload.failed29:
19631 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164(i32 [[TMP65]], i32 [[TMP67]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
19632 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT30]]
19633 // CHECK17: omp_offload.cont30:
19634 // CHECK17-NEXT: [[TMP103:%.*]] = load i32, i32* [[N]], align 4
19635 // CHECK17-NEXT: store i32 [[TMP103]], i32* [[N_CASTED31]], align 4
19636 // CHECK17-NEXT: [[TMP104:%.*]] = load i32, i32* [[N_CASTED31]], align 4
19637 // CHECK17-NEXT: [[TMP105:%.*]] = mul nuw i32 [[TMP0]], 4
19638 // CHECK17-NEXT: [[TMP106:%.*]] = sext i32 [[TMP105]] to i64
19639 // CHECK17-NEXT: [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
19640 // CHECK17-NEXT: [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i32*
19641 // CHECK17-NEXT: store i32 [[TMP104]], i32* [[TMP108]], align 4
19642 // CHECK17-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
19643 // CHECK17-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32*
19644 // CHECK17-NEXT: store i32 [[TMP104]], i32* [[TMP110]], align 4
19645 // CHECK17-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
19646 // CHECK17-NEXT: store i64 4, i64* [[TMP111]], align 4
19647 // CHECK17-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0
19648 // CHECK17-NEXT: store i8* null, i8** [[TMP112]], align 4
19649 // CHECK17-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1
19650 // CHECK17-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32*
19651 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[TMP114]], align 4
19652 // CHECK17-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1
19653 // CHECK17-NEXT: [[TMP116:%.*]] = bitcast i8** [[TMP115]] to i32*
19654 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[TMP116]], align 4
19655 // CHECK17-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 1
19656 // CHECK17-NEXT: store i64 4, i64* [[TMP117]], align 4
19657 // CHECK17-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1
19658 // CHECK17-NEXT: store i8* null, i8** [[TMP118]], align 4
19659 // CHECK17-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2
19660 // CHECK17-NEXT: [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32**
19661 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP120]], align 4
19662 // CHECK17-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2
19663 // CHECK17-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32**
19664 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP122]], align 4
19665 // CHECK17-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2
19666 // CHECK17-NEXT: store i64 [[TMP106]], i64* [[TMP123]], align 4
19667 // CHECK17-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2
19668 // CHECK17-NEXT: store i8* null, i8** [[TMP124]], align 4
19669 // CHECK17-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
19670 // CHECK17-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
19671 // CHECK17-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
19672 // CHECK17-NEXT: [[TMP128:%.*]] = load i32, i32* [[N]], align 4
19673 // CHECK17-NEXT: store i32 [[TMP128]], i32* [[DOTCAPTURE_EXPR_37]], align 4
19674 // CHECK17-NEXT: [[TMP129:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4
19675 // CHECK17-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP129]], 0
19676 // CHECK17-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
19677 // CHECK17-NEXT: [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1
19678 // CHECK17-NEXT: store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4
19679 // CHECK17-NEXT: [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4
19680 // CHECK17-NEXT: [[ADD42:%.*]] = add nsw i32 [[TMP130]], 1
19681 // CHECK17-NEXT: [[TMP131:%.*]] = zext i32 [[ADD42]] to i64
19682 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP131]])
19683 // CHECK17-NEXT: [[TMP132:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169.region_id, i32 3, i8** [[TMP125]], i8** [[TMP126]], i64* [[TMP127]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19684 // CHECK17-NEXT: [[TMP133:%.*]] = icmp ne i32 [[TMP132]], 0
19685 // CHECK17-NEXT: br i1 [[TMP133]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]]
19686 // CHECK17: omp_offload.failed43:
19687 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169(i32 [[TMP104]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
19688 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT44]]
19689 // CHECK17: omp_offload.cont44:
19690 // CHECK17-NEXT: [[TMP134:%.*]] = load i32, i32* [[M]], align 4
19691 // CHECK17-NEXT: store i32 [[TMP134]], i32* [[M_CASTED45]], align 4
19692 // CHECK17-NEXT: [[TMP135:%.*]] = load i32, i32* [[M_CASTED45]], align 4
19693 // CHECK17-NEXT: [[TMP136:%.*]] = load i32, i32* [[N]], align 4
19694 // CHECK17-NEXT: store i32 [[TMP136]], i32* [[N_CASTED46]], align 4
19695 // CHECK17-NEXT: [[TMP137:%.*]] = load i32, i32* [[N_CASTED46]], align 4
19696 // CHECK17-NEXT: [[TMP138:%.*]] = mul nuw i32 [[TMP0]], 4
19697 // CHECK17-NEXT: [[TMP139:%.*]] = sext i32 [[TMP138]] to i64
19698 // CHECK17-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
19699 // CHECK17-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32*
19700 // CHECK17-NEXT: store i32 [[TMP135]], i32* [[TMP141]], align 4
19701 // CHECK17-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
19702 // CHECK17-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32*
19703 // CHECK17-NEXT: store i32 [[TMP135]], i32* [[TMP143]], align 4
19704 // CHECK17-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
19705 // CHECK17-NEXT: store i64 4, i64* [[TMP144]], align 4
19706 // CHECK17-NEXT: [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0
19707 // CHECK17-NEXT: store i8* null, i8** [[TMP145]], align 4
19708 // CHECK17-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1
19709 // CHECK17-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32*
19710 // CHECK17-NEXT: store i32 [[TMP137]], i32* [[TMP147]], align 4
19711 // CHECK17-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1
19712 // CHECK17-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32*
19713 // CHECK17-NEXT: store i32 [[TMP137]], i32* [[TMP149]], align 4
19714 // CHECK17-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 1
19715 // CHECK17-NEXT: store i64 4, i64* [[TMP150]], align 4
19716 // CHECK17-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1
19717 // CHECK17-NEXT: store i8* null, i8** [[TMP151]], align 4
19718 // CHECK17-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2
19719 // CHECK17-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
19720 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[TMP153]], align 4
19721 // CHECK17-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2
19722 // CHECK17-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
19723 // CHECK17-NEXT: store i32 [[TMP0]], i32* [[TMP155]], align 4
19724 // CHECK17-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 2
19725 // CHECK17-NEXT: store i64 4, i64* [[TMP156]], align 4
19726 // CHECK17-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2
19727 // CHECK17-NEXT: store i8* null, i8** [[TMP157]], align 4
19728 // CHECK17-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3
19729 // CHECK17-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32**
19730 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP159]], align 4
19731 // CHECK17-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3
19732 // CHECK17-NEXT: [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32**
19733 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP161]], align 4
19734 // CHECK17-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3
19735 // CHECK17-NEXT: store i64 [[TMP139]], i64* [[TMP162]], align 4
19736 // CHECK17-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3
19737 // CHECK17-NEXT: store i8* null, i8** [[TMP163]], align 4
19738 // CHECK17-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
19739 // CHECK17-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
19740 // CHECK17-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
19741 // CHECK17-NEXT: [[TMP167:%.*]] = load i32, i32* [[N]], align 4
19742 // CHECK17-NEXT: store i32 [[TMP167]], i32* [[DOTCAPTURE_EXPR_52]], align 4
19743 // CHECK17-NEXT: [[TMP168:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4
19744 // CHECK17-NEXT: [[SUB54:%.*]] = sub nsw i32 [[TMP168]], 0
19745 // CHECK17-NEXT: [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1
19746 // CHECK17-NEXT: [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1
19747 // CHECK17-NEXT: store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4
19748 // CHECK17-NEXT: [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4
19749 // CHECK17-NEXT: [[ADD57:%.*]] = add nsw i32 [[TMP169]], 1
19750 // CHECK17-NEXT: [[TMP170:%.*]] = zext i32 [[ADD57]] to i64
19751 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP170]])
19752 // CHECK17-NEXT: [[TMP171:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174.region_id, i32 4, i8** [[TMP164]], i8** [[TMP165]], i64* [[TMP166]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19753 // CHECK17-NEXT: [[TMP172:%.*]] = icmp ne i32 [[TMP171]], 0
19754 // CHECK17-NEXT: br i1 [[TMP172]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]]
19755 // CHECK17: omp_offload.failed58:
19756 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174(i32 [[TMP135]], i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
19757 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT59]]
19758 // CHECK17: omp_offload.cont59:
19759 // CHECK17-NEXT: [[TMP173:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
19760 // CHECK17-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP173]])
19761 // CHECK17-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
19762 // CHECK17-NEXT: [[TMP174:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
19763 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP174]])
19764 // CHECK17-NEXT: [[TMP175:%.*]] = load i32, i32* [[RETVAL]], align 4
19765 // CHECK17-NEXT: ret i32 [[TMP175]]
19766 //
19767 //
19768 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154
19769 // CHECK17-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
19770 // CHECK17-NEXT: entry:
19771 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
19772 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
19773 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
19774 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
19775 // CHECK17-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
19776 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
19777 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
19778 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
19779 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
19780 // CHECK17-NEXT: ret void
19781 //
19782 //
19783 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined.
19784 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
19785 // CHECK17-NEXT: entry:
19786 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
19787 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
19788 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
19789 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
19790 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
19791 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19792 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
19793 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
19794 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
19795 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
19796 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19797 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19798 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19799 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19800 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4
19801 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
19802 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
19803 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
19804 // CHECK17-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
19805 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
19806 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
19807 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
19808 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
19809 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
19810 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
19811 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19812 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
19813 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
19814 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
19815 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
19816 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
19817 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19818 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
19819 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
19820 // CHECK17: omp.precond.then:
19821 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
19822 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
19823 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
19824 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19825 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19826 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
19827 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
19828 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19829 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19830 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
19831 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
19832 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19833 // CHECK17: cond.true:
19834 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
19835 // CHECK17-NEXT: br label [[COND_END:%.*]]
19836 // CHECK17: cond.false:
19837 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19838 // CHECK17-NEXT: br label [[COND_END]]
19839 // CHECK17: cond.end:
19840 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
19841 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
19842 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19843 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
19844 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19845 // CHECK17: omp.inner.for.cond:
19846 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
19847 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
19848 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
19849 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19850 // CHECK17: omp.inner.for.body:
19851 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !14
19852 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
19853 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !14
19854 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19855 // CHECK17: omp.inner.for.inc:
19856 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
19857 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !14
19858 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
19859 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
19860 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
19861 // CHECK17: omp.inner.for.end:
19862 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19863 // CHECK17: omp.loop.exit:
19864 // CHECK17-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
19865 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
19866 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
19867 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
19868 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
19869 // CHECK17-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
19870 // CHECK17: .omp.final.then:
19871 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19872 // CHECK17-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0
19873 // CHECK17-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
19874 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
19875 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
19876 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
19877 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
19878 // CHECK17: .omp.final.done:
19879 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
19880 // CHECK17: omp.precond.end:
19881 // CHECK17-NEXT: ret void
19882 //
19883 //
19884 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1
19885 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
19886 // CHECK17-NEXT: entry:
19887 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
19888 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
19889 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
19890 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
19891 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
19892 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
19893 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
19894 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
19895 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
19896 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
19897 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
19898 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
19899 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
19900 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
19901 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19902 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19903 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4
19904 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
19905 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
19906 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
19907 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
19908 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
19909 // CHECK17-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
19910 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
19911 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
19912 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
19913 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
19914 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
19915 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
19916 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19917 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
19918 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
19919 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
19920 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
19921 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
19922 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19923 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
19924 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
19925 // CHECK17: omp.precond.then:
19926 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
19927 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
19928 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
19929 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
19930 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
19931 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
19932 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
19933 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19934 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19935 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
19936 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
19937 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19938 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19939 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
19940 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
19941 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19942 // CHECK17: cond.true:
19943 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
19944 // CHECK17-NEXT: br label [[COND_END:%.*]]
19945 // CHECK17: cond.false:
19946 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19947 // CHECK17-NEXT: br label [[COND_END]]
19948 // CHECK17: cond.end:
19949 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
19950 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19951 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19952 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
19953 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
19954 // CHECK17: omp.inner.for.cond:
19955 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
19956 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
19957 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
19958 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19959 // CHECK17: omp.inner.for.body:
19960 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
19961 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
19962 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19963 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !18
19964 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !18
19965 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
19966 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
19967 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
19968 // CHECK17: omp.body.continue:
19969 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
19970 // CHECK17: omp.inner.for.inc:
19971 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
19972 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
19973 // CHECK17-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
19974 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
19975 // CHECK17: omp.inner.for.end:
19976 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
19977 // CHECK17: omp.loop.exit:
19978 // CHECK17-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
19979 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
19980 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
19981 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
19982 // CHECK17-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
19983 // CHECK17-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
19984 // CHECK17: .omp.final.then:
19985 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19986 // CHECK17-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0
19987 // CHECK17-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
19988 // CHECK17-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
19989 // CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
19990 // CHECK17-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
19991 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
19992 // CHECK17: .omp.final.done:
19993 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
19994 // CHECK17: omp.precond.end:
19995 // CHECK17-NEXT: ret void
19996 //
19997 //
19998 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159
19999 // CHECK17-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20000 // CHECK17-NEXT: entry:
20001 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
20002 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
20003 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
20004 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
20005 // CHECK17-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
20006 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
20007 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
20008 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
20009 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
20010 // CHECK17-NEXT: ret void
20011 //
20012 //
20013 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..2
20014 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20015 // CHECK17-NEXT: entry:
20016 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
20017 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
20018 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
20019 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
20020 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
20021 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20022 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
20023 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20024 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20025 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
20026 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20027 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20028 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20029 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20030 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4
20031 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
20032 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
20033 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
20034 // CHECK17-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
20035 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
20036 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
20037 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
20038 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
20039 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20040 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
20041 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20042 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20043 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20044 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20045 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20046 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
20047 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20048 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20049 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20050 // CHECK17: omp.precond.then:
20051 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
20052 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20053 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
20054 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20055 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20056 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20057 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
20058 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20059 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20060 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20061 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
20062 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20063 // CHECK17: cond.true:
20064 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20065 // CHECK17-NEXT: br label [[COND_END:%.*]]
20066 // CHECK17: cond.false:
20067 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20068 // CHECK17-NEXT: br label [[COND_END]]
20069 // CHECK17: cond.end:
20070 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
20071 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
20072 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20073 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
20074 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20075 // CHECK17: omp.inner.for.cond:
20076 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
20077 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
20078 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
20079 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20080 // CHECK17: omp.inner.for.body:
20081 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23
20082 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
20083 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !23
20084 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20085 // CHECK17: omp.inner.for.inc:
20086 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
20087 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23
20088 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
20089 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
20090 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
20091 // CHECK17: omp.inner.for.end:
20092 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20093 // CHECK17: omp.loop.exit:
20094 // CHECK17-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20095 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
20096 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
20097 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
20098 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
20099 // CHECK17-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
20100 // CHECK17: .omp.final.then:
20101 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20102 // CHECK17-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0
20103 // CHECK17-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
20104 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
20105 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
20106 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
20107 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
20108 // CHECK17: .omp.final.done:
20109 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
20110 // CHECK17: omp.precond.end:
20111 // CHECK17-NEXT: ret void
20112 //
20113 //
20114 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..3
20115 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20116 // CHECK17-NEXT: entry:
20117 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
20118 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
20119 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
20120 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
20121 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
20122 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
20123 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
20124 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20125 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
20126 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20127 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20128 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
20129 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
20130 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
20131 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20132 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20133 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4
20134 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
20135 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
20136 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
20137 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
20138 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
20139 // CHECK17-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
20140 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
20141 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
20142 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
20143 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
20144 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20145 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
20146 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20147 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20148 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20149 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20150 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20151 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
20152 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20153 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20154 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20155 // CHECK17: omp.precond.then:
20156 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
20157 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20158 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
20159 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
20160 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
20161 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
20162 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
20163 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20164 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20165 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20166 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
20167 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20168 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20169 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20170 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
20171 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20172 // CHECK17: cond.true:
20173 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20174 // CHECK17-NEXT: br label [[COND_END:%.*]]
20175 // CHECK17: cond.false:
20176 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20177 // CHECK17-NEXT: br label [[COND_END]]
20178 // CHECK17: cond.end:
20179 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
20180 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
20181 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20182 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
20183 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20184 // CHECK17: omp.inner.for.cond:
20185 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
20186 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26
20187 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
20188 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20189 // CHECK17: omp.inner.for.body:
20190 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
20191 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
20192 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20193 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !26
20194 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !26
20195 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
20196 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26
20197 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
20198 // CHECK17: omp.body.continue:
20199 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20200 // CHECK17: omp.inner.for.inc:
20201 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
20202 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
20203 // CHECK17-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
20204 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
20205 // CHECK17: omp.inner.for.end:
20206 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20207 // CHECK17: omp.loop.exit:
20208 // CHECK17-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20209 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
20210 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
20211 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
20212 // CHECK17-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
20213 // CHECK17-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
20214 // CHECK17: .omp.final.then:
20215 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20216 // CHECK17-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0
20217 // CHECK17-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
20218 // CHECK17-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
20219 // CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
20220 // CHECK17-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
20221 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
20222 // CHECK17: .omp.final.done:
20223 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
20224 // CHECK17: omp.precond.end:
20225 // CHECK17-NEXT: ret void
20226 //
20227 //
20228 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164
20229 // CHECK17-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20230 // CHECK17-NEXT: entry:
20231 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
20232 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
20233 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
20234 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
20235 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20236 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
20237 // CHECK17-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
20238 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
20239 // CHECK17-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
20240 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
20241 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
20242 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
20243 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
20244 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
20245 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20246 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
20247 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
20248 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
20249 // CHECK17-NEXT: ret void
20250 //
20251 //
20252 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..5
20253 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
20254 // CHECK17-NEXT: entry:
20255 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
20256 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
20257 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
20258 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
20259 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
20260 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
20261 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20262 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
20263 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20264 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
20265 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
20266 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20267 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20268 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20269 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20270 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4
20271 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
20272 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
20273 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
20274 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
20275 // CHECK17-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
20276 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
20277 // CHECK17-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
20278 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
20279 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
20280 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
20281 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20282 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20283 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20284 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20285 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20286 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
20287 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
20288 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
20289 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20290 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20291 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20292 // CHECK17: omp.precond.then:
20293 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
20294 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20295 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
20296 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20297 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20298 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
20299 // CHECK17-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20300 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
20301 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
20302 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20303 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20304 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
20305 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20306 // CHECK17: cond.true:
20307 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20308 // CHECK17-NEXT: br label [[COND_END:%.*]]
20309 // CHECK17: cond.false:
20310 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20311 // CHECK17-NEXT: br label [[COND_END]]
20312 // CHECK17: cond.end:
20313 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
20314 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
20315 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20316 // CHECK17-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
20317 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20318 // CHECK17: omp.inner.for.cond:
20319 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
20320 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
20321 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
20322 // CHECK17-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
20323 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20324 // CHECK17: omp.inner.for.body:
20325 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
20326 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
20327 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !29
20328 // CHECK17-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !29
20329 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !29
20330 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]]), !llvm.access.group !29
20331 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20332 // CHECK17: omp.inner.for.inc:
20333 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
20334 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
20335 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
20336 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
20337 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
20338 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
20339 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
20340 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
20341 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
20342 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
20343 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
20344 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
20345 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
20346 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
20347 // CHECK17-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]
20348 // CHECK17-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
20349 // CHECK17: cond.true11:
20350 // CHECK17-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
20351 // CHECK17-NEXT: br label [[COND_END13:%.*]]
20352 // CHECK17: cond.false12:
20353 // CHECK17-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
20354 // CHECK17-NEXT: br label [[COND_END13]]
20355 // CHECK17: cond.end13:
20356 // CHECK17-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]
20357 // CHECK17-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
20358 // CHECK17-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
20359 // CHECK17-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
20360 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
20361 // CHECK17: omp.inner.for.end:
20362 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20363 // CHECK17: omp.loop.exit:
20364 // CHECK17-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20365 // CHECK17-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
20366 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
20367 // CHECK17-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
20368 // CHECK17-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
20369 // CHECK17-NEXT: br i1 [[TMP35]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
20370 // CHECK17: .omp.final.then:
20371 // CHECK17-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20372 // CHECK17-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP36]], 0
20373 // CHECK17-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
20374 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
20375 // CHECK17-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
20376 // CHECK17-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
20377 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
20378 // CHECK17: .omp.final.done:
20379 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
20380 // CHECK17: omp.precond.end:
20381 // CHECK17-NEXT: ret void
20382 //
20383 //
20384 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..6
20385 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
20386 // CHECK17-NEXT: entry:
20387 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
20388 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
20389 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
20390 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
20391 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
20392 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
20393 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
20394 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
20395 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20396 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
20397 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20398 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
20399 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
20400 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
20401 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
20402 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20403 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20404 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4
20405 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
20406 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
20407 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
20408 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
20409 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
20410 // CHECK17-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
20411 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
20412 // CHECK17-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
20413 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
20414 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
20415 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
20416 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20417 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20418 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20419 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20420 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20421 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
20422 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
20423 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
20424 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20425 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20426 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20427 // CHECK17: omp.precond.then:
20428 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
20429 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20430 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
20431 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
20432 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
20433 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
20434 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
20435 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20436 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20437 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20438 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
20439 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20440 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20441 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20442 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
20443 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20444 // CHECK17: cond.true:
20445 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20446 // CHECK17-NEXT: br label [[COND_END:%.*]]
20447 // CHECK17: cond.false:
20448 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20449 // CHECK17-NEXT: br label [[COND_END]]
20450 // CHECK17: cond.end:
20451 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
20452 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
20453 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20454 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
20455 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20456 // CHECK17: omp.inner.for.cond:
20457 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
20458 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32
20459 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
20460 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20461 // CHECK17: omp.inner.for.body:
20462 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
20463 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
20464 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20465 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !32
20466 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !32
20467 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
20468 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !32
20469 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
20470 // CHECK17: omp.body.continue:
20471 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20472 // CHECK17: omp.inner.for.inc:
20473 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
20474 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
20475 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
20476 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
20477 // CHECK17: omp.inner.for.end:
20478 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20479 // CHECK17: omp.loop.exit:
20480 // CHECK17-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20481 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
20482 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
20483 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
20484 // CHECK17-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
20485 // CHECK17-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
20486 // CHECK17: .omp.final.then:
20487 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20488 // CHECK17-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
20489 // CHECK17-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
20490 // CHECK17-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
20491 // CHECK17-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
20492 // CHECK17-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4
20493 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
20494 // CHECK17: .omp.final.done:
20495 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
20496 // CHECK17: omp.precond.end:
20497 // CHECK17-NEXT: ret void
20498 //
20499 //
20500 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169
20501 // CHECK17-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20502 // CHECK17-NEXT: entry:
20503 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
20504 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
20505 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
20506 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
20507 // CHECK17-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
20508 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
20509 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
20510 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
20511 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
20512 // CHECK17-NEXT: ret void
20513 //
20514 //
20515 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..8
20516 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20517 // CHECK17-NEXT: entry:
20518 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
20519 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
20520 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
20521 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
20522 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
20523 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20524 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
20525 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20526 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20527 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
20528 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20529 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20530 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20531 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20532 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4
20533 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
20534 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
20535 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
20536 // CHECK17-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
20537 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
20538 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
20539 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
20540 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
20541 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20542 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
20543 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20544 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20545 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20546 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20547 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20548 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
20549 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20550 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20551 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20552 // CHECK17: omp.precond.then:
20553 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
20554 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20555 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
20556 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20557 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20558 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20559 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
20560 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20561 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20562 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20563 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
20564 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20565 // CHECK17: cond.true:
20566 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20567 // CHECK17-NEXT: br label [[COND_END:%.*]]
20568 // CHECK17: cond.false:
20569 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20570 // CHECK17-NEXT: br label [[COND_END]]
20571 // CHECK17: cond.end:
20572 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
20573 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
20574 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20575 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
20576 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20577 // CHECK17: omp.inner.for.cond:
20578 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
20579 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
20580 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
20581 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20582 // CHECK17: omp.inner.for.body:
20583 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !35
20584 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
20585 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !35
20586 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20587 // CHECK17: omp.inner.for.inc:
20588 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
20589 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !35
20590 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
20591 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
20592 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
20593 // CHECK17: omp.inner.for.end:
20594 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20595 // CHECK17: omp.loop.exit:
20596 // CHECK17-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20597 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
20598 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
20599 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
20600 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
20601 // CHECK17-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
20602 // CHECK17: .omp.final.then:
20603 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20604 // CHECK17-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0
20605 // CHECK17-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
20606 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
20607 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
20608 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
20609 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
20610 // CHECK17: .omp.final.done:
20611 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
20612 // CHECK17: omp.precond.end:
20613 // CHECK17-NEXT: ret void
20614 //
20615 //
20616 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..9
20617 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20618 // CHECK17-NEXT: entry:
20619 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
20620 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
20621 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
20622 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
20623 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
20624 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
20625 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
20626 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20627 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
20628 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20629 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20630 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
20631 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
20632 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
20633 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20634 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20635 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4
20636 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
20637 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
20638 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
20639 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
20640 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
20641 // CHECK17-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
20642 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
20643 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
20644 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
20645 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
20646 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20647 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
20648 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20649 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20650 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20651 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20652 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20653 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
20654 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20655 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20656 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20657 // CHECK17: omp.precond.then:
20658 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
20659 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20660 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
20661 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
20662 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
20663 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
20664 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
20665 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20666 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20667 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20668 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20669 // CHECK17-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20670 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
20671 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
20672 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
20673 // CHECK17: omp.dispatch.cond:
20674 // CHECK17-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20675 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
20676 // CHECK17-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
20677 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
20678 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
20679 // CHECK17: omp.dispatch.body:
20680 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20681 // CHECK17-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
20682 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20683 // CHECK17: omp.inner.for.cond:
20684 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
20685 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38
20686 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
20687 // CHECK17-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20688 // CHECK17: omp.inner.for.body:
20689 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
20690 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
20691 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20692 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !38
20693 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !38
20694 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]]
20695 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !38
20696 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
20697 // CHECK17: omp.body.continue:
20698 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20699 // CHECK17: omp.inner.for.inc:
20700 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
20701 // CHECK17-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1
20702 // CHECK17-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
20703 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
20704 // CHECK17: omp.inner.for.end:
20705 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
20706 // CHECK17: omp.dispatch.inc:
20707 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
20708 // CHECK17: omp.dispatch.end:
20709 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
20710 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
20711 // CHECK17-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
20712 // CHECK17: .omp.final.then:
20713 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20714 // CHECK17-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0
20715 // CHECK17-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
20716 // CHECK17-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
20717 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
20718 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
20719 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
20720 // CHECK17: .omp.final.done:
20721 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
20722 // CHECK17: omp.precond.end:
20723 // CHECK17-NEXT: ret void
20724 //
20725 //
20726 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174
20727 // CHECK17-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20728 // CHECK17-NEXT: entry:
20729 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
20730 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
20731 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
20732 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
20733 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20734 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
20735 // CHECK17-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
20736 // CHECK17-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
20737 // CHECK17-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
20738 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
20739 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
20740 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
20741 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
20742 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
20743 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20744 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
20745 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
20746 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
20747 // CHECK17-NEXT: ret void
20748 //
20749 //
20750 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..11
20751 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
20752 // CHECK17-NEXT: entry:
20753 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
20754 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
20755 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
20756 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
20757 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
20758 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
20759 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20760 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
20761 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20762 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
20763 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
20764 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20765 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20766 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20767 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20768 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4
20769 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
20770 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
20771 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
20772 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
20773 // CHECK17-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
20774 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
20775 // CHECK17-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
20776 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
20777 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
20778 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
20779 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20780 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20781 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20782 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20783 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20784 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
20785 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
20786 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
20787 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20788 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20789 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20790 // CHECK17: omp.precond.then:
20791 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
20792 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20793 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
20794 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20795 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20796 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20797 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
20798 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20799 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20800 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20801 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
20802 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20803 // CHECK17: cond.true:
20804 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20805 // CHECK17-NEXT: br label [[COND_END:%.*]]
20806 // CHECK17: cond.false:
20807 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20808 // CHECK17-NEXT: br label [[COND_END]]
20809 // CHECK17: cond.end:
20810 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
20811 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
20812 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20813 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
20814 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20815 // CHECK17: omp.inner.for.cond:
20816 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
20817 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !41
20818 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
20819 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20820 // CHECK17: omp.inner.for.body:
20821 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !41
20822 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !41
20823 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !41
20824 // CHECK17-NEXT: store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !41
20825 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !41
20826 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]]), !llvm.access.group !41
20827 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20828 // CHECK17: omp.inner.for.inc:
20829 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
20830 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !41
20831 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
20832 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
20833 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
20834 // CHECK17: omp.inner.for.end:
20835 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
20836 // CHECK17: omp.loop.exit:
20837 // CHECK17-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20838 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
20839 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
20840 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
20841 // CHECK17-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
20842 // CHECK17-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
20843 // CHECK17: .omp.final.then:
20844 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20845 // CHECK17-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0
20846 // CHECK17-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
20847 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
20848 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
20849 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[I4]], align 4
20850 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
20851 // CHECK17: .omp.final.done:
20852 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
20853 // CHECK17: omp.precond.end:
20854 // CHECK17-NEXT: ret void
20855 //
20856 //
20857 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..12
20858 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
20859 // CHECK17-NEXT: entry:
20860 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
20861 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
20862 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
20863 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
20864 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
20865 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
20866 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
20867 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
20868 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
20869 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
20870 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20871 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
20872 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
20873 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
20874 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
20875 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20876 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20877 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4
20878 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
20879 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
20880 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
20881 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
20882 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
20883 // CHECK17-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
20884 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
20885 // CHECK17-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
20886 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
20887 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
20888 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
20889 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20890 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20891 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20892 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20893 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20894 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
20895 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
20896 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
20897 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20898 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20899 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20900 // CHECK17: omp.precond.then:
20901 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
20902 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20903 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
20904 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
20905 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
20906 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
20907 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
20908 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20909 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20910 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
20911 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20912 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20913 // CHECK17-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20914 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
20915 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
20916 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
20917 // CHECK17: omp.dispatch.cond:
20918 // CHECK17-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
20919 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
20920 // CHECK17-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
20921 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
20922 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
20923 // CHECK17: omp.dispatch.body:
20924 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20925 // CHECK17-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
20926 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
20927 // CHECK17: omp.inner.for.cond:
20928 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
20929 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !44
20930 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
20931 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20932 // CHECK17: omp.inner.for.body:
20933 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
20934 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
20935 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20936 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !44
20937 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !44
20938 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]]
20939 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !44
20940 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
20941 // CHECK17: omp.body.continue:
20942 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
20943 // CHECK17: omp.inner.for.inc:
20944 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
20945 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1
20946 // CHECK17-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
20947 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
20948 // CHECK17: omp.inner.for.end:
20949 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
20950 // CHECK17: omp.dispatch.inc:
20951 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
20952 // CHECK17: omp.dispatch.end:
20953 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
20954 // CHECK17-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
20955 // CHECK17-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
20956 // CHECK17: .omp.final.then:
20957 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20958 // CHECK17-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0
20959 // CHECK17-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
20960 // CHECK17-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
20961 // CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
20962 // CHECK17-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
20963 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
20964 // CHECK17: .omp.final.done:
20965 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
20966 // CHECK17: omp.precond.end:
20967 // CHECK17-NEXT: ret void
20968 //
20969 //
20970 // CHECK17-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
20971 // CHECK17-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
20972 // CHECK17-NEXT: entry:
20973 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
20974 // CHECK17-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
20975 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4
20976 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
20977 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
20978 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
20979 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
20980 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
20981 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
20982 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
20983 // CHECK17-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
20984 // CHECK17-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
20985 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4
20986 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4
20987 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4
20988 // CHECK17-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
20989 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4
20990 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4
20991 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4
20992 // CHECK17-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
20993 // CHECK17-NEXT: [[M_CASTED19:%.*]] = alloca i32, align 4
20994 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4
20995 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4
20996 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4
20997 // CHECK17-NEXT: [[_TMP23:%.*]] = alloca i32, align 4
20998 // CHECK17-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
20999 // CHECK17-NEXT: store i32 10, i32* [[M]], align 4
21000 // CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
21001 // CHECK17-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
21002 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
21003 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
21004 // CHECK17-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
21005 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
21006 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
21007 // CHECK17-NEXT: store i8* null, i8** [[TMP4]], align 4
21008 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
21009 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
21010 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21011 // CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21012 // CHECK17-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
21013 // CHECK17-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
21014 // CHECK17: omp_offload.failed:
21015 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122([10 x i32]* [[A]]) #[[ATTR3]]
21016 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]
21017 // CHECK17: omp_offload.cont:
21018 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
21019 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
21020 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
21021 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
21022 // CHECK17-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
21023 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
21024 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
21025 // CHECK17-NEXT: store i8* null, i8** [[TMP13]], align 4
21026 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
21027 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
21028 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21029 // CHECK17-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21030 // CHECK17-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
21031 // CHECK17-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
21032 // CHECK17: omp_offload.failed5:
21033 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127([10 x i32]* [[A]]) #[[ATTR3]]
21034 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT6]]
21035 // CHECK17: omp_offload.cont6:
21036 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4
21037 // CHECK17-NEXT: store i32 [[TMP18]], i32* [[M_CASTED]], align 4
21038 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4
21039 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
21040 // CHECK17-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
21041 // CHECK17-NEXT: store i32 [[TMP19]], i32* [[TMP21]], align 4
21042 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
21043 // CHECK17-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
21044 // CHECK17-NEXT: store i32 [[TMP19]], i32* [[TMP23]], align 4
21045 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
21046 // CHECK17-NEXT: store i8* null, i8** [[TMP24]], align 4
21047 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
21048 // CHECK17-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
21049 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4
21050 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
21051 // CHECK17-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
21052 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4
21053 // CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1
21054 // CHECK17-NEXT: store i8* null, i8** [[TMP29]], align 4
21055 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
21056 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
21057 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21058 // CHECK17-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21059 // CHECK17-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
21060 // CHECK17-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
21061 // CHECK17: omp_offload.failed11:
21062 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
21063 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT12]]
21064 // CHECK17: omp_offload.cont12:
21065 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
21066 // CHECK17-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
21067 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4
21068 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
21069 // CHECK17-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
21070 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4
21071 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
21072 // CHECK17-NEXT: store i8* null, i8** [[TMP38]], align 4
21073 // CHECK17-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
21074 // CHECK17-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
21075 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21076 // CHECK17-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21077 // CHECK17-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
21078 // CHECK17-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
21079 // CHECK17: omp_offload.failed17:
21080 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137([10 x i32]* [[A]]) #[[ATTR3]]
21081 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT18]]
21082 // CHECK17: omp_offload.cont18:
21083 // CHECK17-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4
21084 // CHECK17-NEXT: store i32 [[TMP43]], i32* [[M_CASTED19]], align 4
21085 // CHECK17-NEXT: [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4
21086 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
21087 // CHECK17-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
21088 // CHECK17-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4
21089 // CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
21090 // CHECK17-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
21091 // CHECK17-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4
21092 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
21093 // CHECK17-NEXT: store i8* null, i8** [[TMP49]], align 4
21094 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
21095 // CHECK17-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
21096 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4
21097 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
21098 // CHECK17-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
21099 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4
21100 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
21101 // CHECK17-NEXT: store i8* null, i8** [[TMP54]], align 4
21102 // CHECK17-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
21103 // CHECK17-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
21104 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21105 // CHECK17-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21106 // CHECK17-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
21107 // CHECK17-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
21108 // CHECK17: omp_offload.failed24:
21109 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
21110 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT25]]
21111 // CHECK17: omp_offload.cont25:
21112 // CHECK17-NEXT: ret i32 0
21113 //
21114 //
21115 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122
21116 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21117 // CHECK17-NEXT: entry:
21118 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
21119 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
21120 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
21121 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
21122 // CHECK17-NEXT: ret void
21123 //
21124 //
21125 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..14
21126 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21127 // CHECK17-NEXT: entry:
21128 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
21129 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
21130 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
21131 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21132 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
21133 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21134 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21135 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21136 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21137 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
21138 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
21139 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
21140 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
21141 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
21142 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21143 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
21144 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21145 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21146 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
21147 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
21148 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21149 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21150 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
21151 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21152 // CHECK17: cond.true:
21153 // CHECK17-NEXT: br label [[COND_END:%.*]]
21154 // CHECK17: cond.false:
21155 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21156 // CHECK17-NEXT: br label [[COND_END]]
21157 // CHECK17: cond.end:
21158 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
21159 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21160 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21161 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
21162 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21163 // CHECK17: omp.inner.for.cond:
21164 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
21165 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !47
21166 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
21167 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21168 // CHECK17: omp.inner.for.body:
21169 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !47
21170 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !47
21171 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !47
21172 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21173 // CHECK17: omp.inner.for.inc:
21174 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
21175 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !47
21176 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
21177 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
21178 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
21179 // CHECK17: omp.inner.for.end:
21180 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
21181 // CHECK17: omp.loop.exit:
21182 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
21183 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
21184 // CHECK17-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
21185 // CHECK17-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21186 // CHECK17: .omp.final.then:
21187 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
21188 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
21189 // CHECK17: .omp.final.done:
21190 // CHECK17-NEXT: ret void
21191 //
21192 //
21193 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..15
21194 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21195 // CHECK17-NEXT: entry:
21196 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
21197 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
21198 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
21199 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
21200 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
21201 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21202 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
21203 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
21204 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
21205 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21206 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21207 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
21208 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
21209 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
21210 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
21211 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
21212 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
21213 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
21214 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
21215 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
21216 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
21217 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
21218 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
21219 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
21220 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21221 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21222 // CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
21223 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
21224 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21225 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21226 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
21227 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21228 // CHECK17: cond.true:
21229 // CHECK17-NEXT: br label [[COND_END:%.*]]
21230 // CHECK17: cond.false:
21231 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21232 // CHECK17-NEXT: br label [[COND_END]]
21233 // CHECK17: cond.end:
21234 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
21235 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
21236 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21237 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
21238 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21239 // CHECK17: omp.inner.for.cond:
21240 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
21241 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !50
21242 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
21243 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21244 // CHECK17: omp.inner.for.body:
21245 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
21246 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
21247 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21248 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !50
21249 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !50
21250 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
21251 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !50
21252 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
21253 // CHECK17: omp.body.continue:
21254 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21255 // CHECK17: omp.inner.for.inc:
21256 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
21257 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
21258 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
21259 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
21260 // CHECK17: omp.inner.for.end:
21261 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
21262 // CHECK17: omp.loop.exit:
21263 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
21264 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
21265 // CHECK17-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
21266 // CHECK17-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21267 // CHECK17: .omp.final.then:
21268 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
21269 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
21270 // CHECK17: .omp.final.done:
21271 // CHECK17-NEXT: ret void
21272 //
21273 //
21274 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127
21275 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21276 // CHECK17-NEXT: entry:
21277 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
21278 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
21279 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
21280 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
21281 // CHECK17-NEXT: ret void
21282 //
21283 //
21284 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..17
21285 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21286 // CHECK17-NEXT: entry:
21287 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
21288 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
21289 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
21290 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21291 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
21292 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21293 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21294 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21295 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21296 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
21297 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
21298 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
21299 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
21300 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
21301 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21302 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
21303 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21304 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21305 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
21306 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
21307 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21308 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21309 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
21310 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21311 // CHECK17: cond.true:
21312 // CHECK17-NEXT: br label [[COND_END:%.*]]
21313 // CHECK17: cond.false:
21314 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21315 // CHECK17-NEXT: br label [[COND_END]]
21316 // CHECK17: cond.end:
21317 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
21318 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21319 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21320 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
21321 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21322 // CHECK17: omp.inner.for.cond:
21323 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
21324 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !53
21325 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
21326 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21327 // CHECK17: omp.inner.for.body:
21328 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !53
21329 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !53
21330 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !53
21331 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21332 // CHECK17: omp.inner.for.inc:
21333 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
21334 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !53
21335 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
21336 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
21337 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
21338 // CHECK17: omp.inner.for.end:
21339 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
21340 // CHECK17: omp.loop.exit:
21341 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
21342 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
21343 // CHECK17-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
21344 // CHECK17-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21345 // CHECK17: .omp.final.then:
21346 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
21347 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
21348 // CHECK17: .omp.final.done:
21349 // CHECK17-NEXT: ret void
21350 //
21351 //
21352 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..18
21353 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21354 // CHECK17-NEXT: entry:
21355 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
21356 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
21357 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
21358 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
21359 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
21360 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21361 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
21362 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
21363 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
21364 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21365 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21366 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
21367 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
21368 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
21369 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
21370 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
21371 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
21372 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
21373 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
21374 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
21375 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
21376 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
21377 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
21378 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
21379 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21380 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21381 // CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
21382 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
21383 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21384 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21385 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
21386 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21387 // CHECK17: cond.true:
21388 // CHECK17-NEXT: br label [[COND_END:%.*]]
21389 // CHECK17: cond.false:
21390 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21391 // CHECK17-NEXT: br label [[COND_END]]
21392 // CHECK17: cond.end:
21393 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
21394 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
21395 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21396 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
21397 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21398 // CHECK17: omp.inner.for.cond:
21399 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
21400 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !56
21401 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
21402 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21403 // CHECK17: omp.inner.for.body:
21404 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
21405 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
21406 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21407 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !56
21408 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !56
21409 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
21410 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !56
21411 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
21412 // CHECK17: omp.body.continue:
21413 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21414 // CHECK17: omp.inner.for.inc:
21415 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
21416 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
21417 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
21418 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
21419 // CHECK17: omp.inner.for.end:
21420 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
21421 // CHECK17: omp.loop.exit:
21422 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
21423 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
21424 // CHECK17-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
21425 // CHECK17-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21426 // CHECK17: .omp.final.then:
21427 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
21428 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
21429 // CHECK17: .omp.final.done:
21430 // CHECK17-NEXT: ret void
21431 //
21432 //
21433 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132
21434 // CHECK17-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21435 // CHECK17-NEXT: entry:
21436 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
21437 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
21438 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
21439 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
21440 // CHECK17-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
21441 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
21442 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
21443 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
21444 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
21445 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
21446 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
21447 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
21448 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
21449 // CHECK17-NEXT: ret void
21450 //
21451 //
21452 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..21
21453 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21454 // CHECK17-NEXT: entry:
21455 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
21456 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
21457 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
21458 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
21459 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21460 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
21461 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21462 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21463 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21464 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21465 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
21466 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
21467 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
21468 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
21469 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
21470 // CHECK17-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
21471 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
21472 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21473 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
21474 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21475 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21476 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
21477 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
21478 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21479 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21480 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
21481 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21482 // CHECK17: cond.true:
21483 // CHECK17-NEXT: br label [[COND_END:%.*]]
21484 // CHECK17: cond.false:
21485 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21486 // CHECK17-NEXT: br label [[COND_END]]
21487 // CHECK17: cond.end:
21488 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
21489 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21490 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21491 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
21492 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21493 // CHECK17: omp.inner.for.cond:
21494 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
21495 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !59
21496 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
21497 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21498 // CHECK17: omp.inner.for.body:
21499 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !59
21500 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !59
21501 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !59
21502 // CHECK17-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !59
21503 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !59
21504 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]), !llvm.access.group !59
21505 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21506 // CHECK17: omp.inner.for.inc:
21507 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
21508 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !59
21509 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
21510 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
21511 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
21512 // CHECK17: omp.inner.for.end:
21513 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
21514 // CHECK17: omp.loop.exit:
21515 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
21516 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
21517 // CHECK17-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
21518 // CHECK17-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21519 // CHECK17: .omp.final.then:
21520 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
21521 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
21522 // CHECK17: .omp.final.done:
21523 // CHECK17-NEXT: ret void
21524 //
21525 //
21526 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..22
21527 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21528 // CHECK17-NEXT: entry:
21529 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
21530 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
21531 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
21532 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
21533 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
21534 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
21535 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21536 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
21537 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
21538 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
21539 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21540 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21541 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
21542 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
21543 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
21544 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
21545 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
21546 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
21547 // CHECK17-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
21548 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
21549 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
21550 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
21551 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
21552 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
21553 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
21554 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
21555 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21556 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21557 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
21558 // CHECK17-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
21559 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
21560 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
21561 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
21562 // CHECK17: omp.dispatch.cond:
21563 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21564 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
21565 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
21566 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21567 // CHECK17: cond.true:
21568 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
21569 // CHECK17-NEXT: br label [[COND_END:%.*]]
21570 // CHECK17: cond.false:
21571 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21572 // CHECK17-NEXT: br label [[COND_END]]
21573 // CHECK17: cond.end:
21574 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
21575 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
21576 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21577 // CHECK17-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
21578 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21579 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21580 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
21581 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
21582 // CHECK17: omp.dispatch.body:
21583 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21584 // CHECK17: omp.inner.for.cond:
21585 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
21586 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !62
21587 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
21588 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21589 // CHECK17: omp.inner.for.body:
21590 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
21591 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
21592 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21593 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !62
21594 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !62
21595 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
21596 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !62
21597 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
21598 // CHECK17: omp.body.continue:
21599 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21600 // CHECK17: omp.inner.for.inc:
21601 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
21602 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
21603 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
21604 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP63:![0-9]+]]
21605 // CHECK17: omp.inner.for.end:
21606 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
21607 // CHECK17: omp.dispatch.inc:
21608 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21609 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21610 // CHECK17-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
21611 // CHECK17-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
21612 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21613 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21614 // CHECK17-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
21615 // CHECK17-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
21616 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
21617 // CHECK17: omp.dispatch.end:
21618 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
21619 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
21620 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
21621 // CHECK17-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21622 // CHECK17: .omp.final.then:
21623 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
21624 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
21625 // CHECK17: .omp.final.done:
21626 // CHECK17-NEXT: ret void
21627 //
21628 //
21629 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137
21630 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21631 // CHECK17-NEXT: entry:
21632 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
21633 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
21634 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
21635 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
21636 // CHECK17-NEXT: ret void
21637 //
21638 //
21639 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..25
21640 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21641 // CHECK17-NEXT: entry:
21642 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
21643 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
21644 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
21645 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21646 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
21647 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21648 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21649 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21650 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21651 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
21652 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
21653 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
21654 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
21655 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
21656 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21657 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
21658 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21659 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21660 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
21661 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
21662 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21663 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21664 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
21665 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21666 // CHECK17: cond.true:
21667 // CHECK17-NEXT: br label [[COND_END:%.*]]
21668 // CHECK17: cond.false:
21669 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21670 // CHECK17-NEXT: br label [[COND_END]]
21671 // CHECK17: cond.end:
21672 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
21673 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21674 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21675 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
21676 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21677 // CHECK17: omp.inner.for.cond:
21678 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
21679 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !65
21680 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
21681 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21682 // CHECK17: omp.inner.for.body:
21683 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !65
21684 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !65
21685 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !65
21686 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21687 // CHECK17: omp.inner.for.inc:
21688 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
21689 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !65
21690 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
21691 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
21692 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP66:![0-9]+]]
21693 // CHECK17: omp.inner.for.end:
21694 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
21695 // CHECK17: omp.loop.exit:
21696 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
21697 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
21698 // CHECK17-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
21699 // CHECK17-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21700 // CHECK17: .omp.final.then:
21701 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
21702 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
21703 // CHECK17: .omp.final.done:
21704 // CHECK17-NEXT: ret void
21705 //
21706 //
21707 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..26
21708 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21709 // CHECK17-NEXT: entry:
21710 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
21711 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
21712 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
21713 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
21714 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
21715 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21716 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
21717 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
21718 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
21719 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21720 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21721 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
21722 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
21723 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
21724 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
21725 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
21726 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
21727 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
21728 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
21729 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
21730 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
21731 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
21732 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
21733 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
21734 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21735 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21736 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21737 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21738 // CHECK17-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
21739 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
21740 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
21741 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
21742 // CHECK17: omp.dispatch.cond:
21743 // CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
21744 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
21745 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
21746 // CHECK17: omp.dispatch.body:
21747 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21748 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
21749 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21750 // CHECK17: omp.inner.for.cond:
21751 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
21752 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !68
21753 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
21754 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21755 // CHECK17: omp.inner.for.body:
21756 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
21757 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
21758 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21759 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !68
21760 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !68
21761 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
21762 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !68
21763 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
21764 // CHECK17: omp.body.continue:
21765 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21766 // CHECK17: omp.inner.for.inc:
21767 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
21768 // CHECK17-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
21769 // CHECK17-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
21770 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP69:![0-9]+]]
21771 // CHECK17: omp.inner.for.end:
21772 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
21773 // CHECK17: omp.dispatch.inc:
21774 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
21775 // CHECK17: omp.dispatch.end:
21776 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
21777 // CHECK17-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
21778 // CHECK17-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21779 // CHECK17: .omp.final.then:
21780 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
21781 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
21782 // CHECK17: .omp.final.done:
21783 // CHECK17-NEXT: ret void
21784 //
21785 //
21786 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142
21787 // CHECK17-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21788 // CHECK17-NEXT: entry:
21789 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
21790 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
21791 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
21792 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
21793 // CHECK17-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
21794 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
21795 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
21796 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
21797 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
21798 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
21799 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
21800 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
21801 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
21802 // CHECK17-NEXT: ret void
21803 //
21804 //
21805 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..29
21806 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21807 // CHECK17-NEXT: entry:
21808 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
21809 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
21810 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
21811 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
21812 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21813 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
21814 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21815 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21816 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21817 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21818 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
21819 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
21820 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
21821 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
21822 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
21823 // CHECK17-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
21824 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
21825 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21826 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
21827 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21828 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21829 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
21830 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
21831 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21832 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21833 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
21834 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21835 // CHECK17: cond.true:
21836 // CHECK17-NEXT: br label [[COND_END:%.*]]
21837 // CHECK17: cond.false:
21838 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21839 // CHECK17-NEXT: br label [[COND_END]]
21840 // CHECK17: cond.end:
21841 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
21842 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21843 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21844 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
21845 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21846 // CHECK17: omp.inner.for.cond:
21847 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
21848 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !71
21849 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
21850 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21851 // CHECK17: omp.inner.for.body:
21852 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !71
21853 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !71
21854 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !71
21855 // CHECK17-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !71
21856 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !71
21857 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]), !llvm.access.group !71
21858 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21859 // CHECK17: omp.inner.for.inc:
21860 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
21861 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !71
21862 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
21863 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
21864 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP72:![0-9]+]]
21865 // CHECK17: omp.inner.for.end:
21866 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
21867 // CHECK17: omp.loop.exit:
21868 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
21869 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
21870 // CHECK17-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
21871 // CHECK17-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21872 // CHECK17: .omp.final.then:
21873 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
21874 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
21875 // CHECK17: .omp.final.done:
21876 // CHECK17-NEXT: ret void
21877 //
21878 //
21879 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..30
21880 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21881 // CHECK17-NEXT: entry:
21882 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
21883 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
21884 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
21885 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
21886 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
21887 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
21888 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
21889 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
21890 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
21891 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
21892 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21893 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21894 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
21895 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
21896 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
21897 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
21898 // CHECK17-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
21899 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
21900 // CHECK17-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
21901 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
21902 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
21903 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
21904 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
21905 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
21906 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
21907 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
21908 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21909 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21910 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
21911 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21912 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21913 // CHECK17-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
21914 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
21915 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
21916 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
21917 // CHECK17: omp.dispatch.cond:
21918 // CHECK17-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
21919 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
21920 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
21921 // CHECK17: omp.dispatch.body:
21922 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21923 // CHECK17-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
21924 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
21925 // CHECK17: omp.inner.for.cond:
21926 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
21927 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !74
21928 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
21929 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21930 // CHECK17: omp.inner.for.body:
21931 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
21932 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
21933 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21934 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !74
21935 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !74
21936 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
21937 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !74
21938 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
21939 // CHECK17: omp.body.continue:
21940 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
21941 // CHECK17: omp.inner.for.inc:
21942 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
21943 // CHECK17-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
21944 // CHECK17-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
21945 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP75:![0-9]+]]
21946 // CHECK17: omp.inner.for.end:
21947 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
21948 // CHECK17: omp.dispatch.inc:
21949 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
21950 // CHECK17: omp.dispatch.end:
21951 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
21952 // CHECK17-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
21953 // CHECK17-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
21954 // CHECK17: .omp.final.then:
21955 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
21956 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
21957 // CHECK17: .omp.final.done:
21958 // CHECK17-NEXT: ret void
21959 //
21960 //
21961 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
21962 // CHECK17-SAME: () #[[ATTR5:[0-9]+]] {
21963 // CHECK17-NEXT: entry:
21964 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1)
21965 // CHECK17-NEXT: ret void
21966 //
21967 //
21968 // CHECK18-LABEL: define {{[^@]+}}@main
21969 // CHECK18-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
21970 // CHECK18-NEXT: entry:
21971 // CHECK18-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
21972 // CHECK18-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
21973 // CHECK18-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
21974 // CHECK18-NEXT: [[N:%.*]] = alloca i32, align 4
21975 // CHECK18-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
21976 // CHECK18-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
21977 // CHECK18-NEXT: [[M:%.*]] = alloca i32, align 4
21978 // CHECK18-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
21979 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
21980 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
21981 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
21982 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
21983 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
21984 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
21985 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
21986 // CHECK18-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
21987 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
21988 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
21989 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
21990 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
21991 // CHECK18-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
21992 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
21993 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
21994 // CHECK18-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
21995 // CHECK18-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4
21996 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4
21997 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4
21998 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4
21999 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4
22000 // CHECK18-NEXT: [[_TMP22:%.*]] = alloca i32, align 4
22001 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4
22002 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
22003 // CHECK18-NEXT: [[N_CASTED31:%.*]] = alloca i32, align 4
22004 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4
22005 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4
22006 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4
22007 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4
22008 // CHECK18-NEXT: [[_TMP36:%.*]] = alloca i32, align 4
22009 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4
22010 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
22011 // CHECK18-NEXT: [[M_CASTED45:%.*]] = alloca i32, align 4
22012 // CHECK18-NEXT: [[N_CASTED46:%.*]] = alloca i32, align 4
22013 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4
22014 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4
22015 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4
22016 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4
22017 // CHECK18-NEXT: [[_TMP51:%.*]] = alloca i32, align 4
22018 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4
22019 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4
22020 // CHECK18-NEXT: store i32 0, i32* [[RETVAL]], align 4
22021 // CHECK18-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
22022 // CHECK18-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
22023 // CHECK18-NEXT: store i32 100, i32* [[N]], align 4
22024 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
22025 // CHECK18-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
22026 // CHECK18-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
22027 // CHECK18-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
22028 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
22029 // CHECK18-NEXT: store i32 10, i32* [[M]], align 4
22030 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
22031 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
22032 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
22033 // CHECK18-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
22034 // CHECK18-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
22035 // CHECK18-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
22036 // CHECK18-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
22037 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4
22038 // CHECK18-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
22039 // CHECK18-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
22040 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4
22041 // CHECK18-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
22042 // CHECK18-NEXT: store i64 4, i64* [[TMP10]], align 4
22043 // CHECK18-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
22044 // CHECK18-NEXT: store i8* null, i8** [[TMP11]], align 4
22045 // CHECK18-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
22046 // CHECK18-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
22047 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
22048 // CHECK18-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
22049 // CHECK18-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
22050 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
22051 // CHECK18-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
22052 // CHECK18-NEXT: store i64 4, i64* [[TMP16]], align 4
22053 // CHECK18-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
22054 // CHECK18-NEXT: store i8* null, i8** [[TMP17]], align 4
22055 // CHECK18-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
22056 // CHECK18-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
22057 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4
22058 // CHECK18-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
22059 // CHECK18-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
22060 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4
22061 // CHECK18-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
22062 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4
22063 // CHECK18-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
22064 // CHECK18-NEXT: store i8* null, i8** [[TMP23]], align 4
22065 // CHECK18-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
22066 // CHECK18-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
22067 // CHECK18-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
22068 // CHECK18-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
22069 // CHECK18-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
22070 // CHECK18-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22071 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
22072 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22073 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
22074 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22075 // CHECK18-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22076 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
22077 // CHECK18-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
22078 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
22079 // CHECK18-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22080 // CHECK18-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
22081 // CHECK18-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
22082 // CHECK18: omp_offload.failed:
22083 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
22084 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]]
22085 // CHECK18: omp_offload.cont:
22086 // CHECK18-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4
22087 // CHECK18-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
22088 // CHECK18-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
22089 // CHECK18-NEXT: [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
22090 // CHECK18-NEXT: [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
22091 // CHECK18-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
22092 // CHECK18-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
22093 // CHECK18-NEXT: store i32 [[TMP34]], i32* [[TMP38]], align 4
22094 // CHECK18-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
22095 // CHECK18-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
22096 // CHECK18-NEXT: store i32 [[TMP34]], i32* [[TMP40]], align 4
22097 // CHECK18-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
22098 // CHECK18-NEXT: store i64 4, i64* [[TMP41]], align 4
22099 // CHECK18-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
22100 // CHECK18-NEXT: store i8* null, i8** [[TMP42]], align 4
22101 // CHECK18-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
22102 // CHECK18-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
22103 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[TMP44]], align 4
22104 // CHECK18-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
22105 // CHECK18-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
22106 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[TMP46]], align 4
22107 // CHECK18-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
22108 // CHECK18-NEXT: store i64 4, i64* [[TMP47]], align 4
22109 // CHECK18-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
22110 // CHECK18-NEXT: store i8* null, i8** [[TMP48]], align 4
22111 // CHECK18-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
22112 // CHECK18-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
22113 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4
22114 // CHECK18-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
22115 // CHECK18-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
22116 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP52]], align 4
22117 // CHECK18-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
22118 // CHECK18-NEXT: store i64 [[TMP36]], i64* [[TMP53]], align 4
22119 // CHECK18-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
22120 // CHECK18-NEXT: store i8* null, i8** [[TMP54]], align 4
22121 // CHECK18-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
22122 // CHECK18-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
22123 // CHECK18-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
22124 // CHECK18-NEXT: [[TMP58:%.*]] = load i32, i32* [[N]], align 4
22125 // CHECK18-NEXT: store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
22126 // CHECK18-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
22127 // CHECK18-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
22128 // CHECK18-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
22129 // CHECK18-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
22130 // CHECK18-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
22131 // CHECK18-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
22132 // CHECK18-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
22133 // CHECK18-NEXT: [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
22134 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]])
22135 // CHECK18-NEXT: [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22136 // CHECK18-NEXT: [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
22137 // CHECK18-NEXT: br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
22138 // CHECK18: omp_offload.failed15:
22139 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
22140 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT16]]
22141 // CHECK18: omp_offload.cont16:
22142 // CHECK18-NEXT: [[TMP64:%.*]] = load i32, i32* [[M]], align 4
22143 // CHECK18-NEXT: store i32 [[TMP64]], i32* [[M_CASTED]], align 4
22144 // CHECK18-NEXT: [[TMP65:%.*]] = load i32, i32* [[M_CASTED]], align 4
22145 // CHECK18-NEXT: [[TMP66:%.*]] = load i32, i32* [[N]], align 4
22146 // CHECK18-NEXT: store i32 [[TMP66]], i32* [[N_CASTED17]], align 4
22147 // CHECK18-NEXT: [[TMP67:%.*]] = load i32, i32* [[N_CASTED17]], align 4
22148 // CHECK18-NEXT: [[TMP68:%.*]] = mul nuw i32 [[TMP0]], 4
22149 // CHECK18-NEXT: [[TMP69:%.*]] = sext i32 [[TMP68]] to i64
22150 // CHECK18-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
22151 // CHECK18-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32*
22152 // CHECK18-NEXT: store i32 [[TMP65]], i32* [[TMP71]], align 4
22153 // CHECK18-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
22154 // CHECK18-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32*
22155 // CHECK18-NEXT: store i32 [[TMP65]], i32* [[TMP73]], align 4
22156 // CHECK18-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
22157 // CHECK18-NEXT: store i64 4, i64* [[TMP74]], align 4
22158 // CHECK18-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0
22159 // CHECK18-NEXT: store i8* null, i8** [[TMP75]], align 4
22160 // CHECK18-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1
22161 // CHECK18-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32*
22162 // CHECK18-NEXT: store i32 [[TMP67]], i32* [[TMP77]], align 4
22163 // CHECK18-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1
22164 // CHECK18-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32*
22165 // CHECK18-NEXT: store i32 [[TMP67]], i32* [[TMP79]], align 4
22166 // CHECK18-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1
22167 // CHECK18-NEXT: store i64 4, i64* [[TMP80]], align 4
22168 // CHECK18-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1
22169 // CHECK18-NEXT: store i8* null, i8** [[TMP81]], align 4
22170 // CHECK18-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2
22171 // CHECK18-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32*
22172 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[TMP83]], align 4
22173 // CHECK18-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2
22174 // CHECK18-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32*
22175 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[TMP85]], align 4
22176 // CHECK18-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2
22177 // CHECK18-NEXT: store i64 4, i64* [[TMP86]], align 4
22178 // CHECK18-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2
22179 // CHECK18-NEXT: store i8* null, i8** [[TMP87]], align 4
22180 // CHECK18-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3
22181 // CHECK18-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
22182 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 4
22183 // CHECK18-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3
22184 // CHECK18-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32**
22185 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP91]], align 4
22186 // CHECK18-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3
22187 // CHECK18-NEXT: store i64 [[TMP69]], i64* [[TMP92]], align 4
22188 // CHECK18-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3
22189 // CHECK18-NEXT: store i8* null, i8** [[TMP93]], align 4
22190 // CHECK18-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
22191 // CHECK18-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
22192 // CHECK18-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
22193 // CHECK18-NEXT: [[TMP97:%.*]] = load i32, i32* [[N]], align 4
22194 // CHECK18-NEXT: store i32 [[TMP97]], i32* [[DOTCAPTURE_EXPR_23]], align 4
22195 // CHECK18-NEXT: [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4
22196 // CHECK18-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP98]], 0
22197 // CHECK18-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
22198 // CHECK18-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1
22199 // CHECK18-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4
22200 // CHECK18-NEXT: [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
22201 // CHECK18-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP99]], 1
22202 // CHECK18-NEXT: [[TMP100:%.*]] = zext i32 [[ADD28]] to i64
22203 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP100]])
22204 // CHECK18-NEXT: [[TMP101:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164.region_id, i32 4, i8** [[TMP94]], i8** [[TMP95]], i64* [[TMP96]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22205 // CHECK18-NEXT: [[TMP102:%.*]] = icmp ne i32 [[TMP101]], 0
22206 // CHECK18-NEXT: br i1 [[TMP102]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
22207 // CHECK18: omp_offload.failed29:
22208 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164(i32 [[TMP65]], i32 [[TMP67]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
22209 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT30]]
22210 // CHECK18: omp_offload.cont30:
22211 // CHECK18-NEXT: [[TMP103:%.*]] = load i32, i32* [[N]], align 4
22212 // CHECK18-NEXT: store i32 [[TMP103]], i32* [[N_CASTED31]], align 4
22213 // CHECK18-NEXT: [[TMP104:%.*]] = load i32, i32* [[N_CASTED31]], align 4
22214 // CHECK18-NEXT: [[TMP105:%.*]] = mul nuw i32 [[TMP0]], 4
22215 // CHECK18-NEXT: [[TMP106:%.*]] = sext i32 [[TMP105]] to i64
22216 // CHECK18-NEXT: [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
22217 // CHECK18-NEXT: [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i32*
22218 // CHECK18-NEXT: store i32 [[TMP104]], i32* [[TMP108]], align 4
22219 // CHECK18-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
22220 // CHECK18-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32*
22221 // CHECK18-NEXT: store i32 [[TMP104]], i32* [[TMP110]], align 4
22222 // CHECK18-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
22223 // CHECK18-NEXT: store i64 4, i64* [[TMP111]], align 4
22224 // CHECK18-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0
22225 // CHECK18-NEXT: store i8* null, i8** [[TMP112]], align 4
22226 // CHECK18-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1
22227 // CHECK18-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32*
22228 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[TMP114]], align 4
22229 // CHECK18-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1
22230 // CHECK18-NEXT: [[TMP116:%.*]] = bitcast i8** [[TMP115]] to i32*
22231 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[TMP116]], align 4
22232 // CHECK18-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 1
22233 // CHECK18-NEXT: store i64 4, i64* [[TMP117]], align 4
22234 // CHECK18-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1
22235 // CHECK18-NEXT: store i8* null, i8** [[TMP118]], align 4
22236 // CHECK18-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2
22237 // CHECK18-NEXT: [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32**
22238 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP120]], align 4
22239 // CHECK18-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2
22240 // CHECK18-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32**
22241 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP122]], align 4
22242 // CHECK18-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2
22243 // CHECK18-NEXT: store i64 [[TMP106]], i64* [[TMP123]], align 4
22244 // CHECK18-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2
22245 // CHECK18-NEXT: store i8* null, i8** [[TMP124]], align 4
22246 // CHECK18-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
22247 // CHECK18-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
22248 // CHECK18-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
22249 // CHECK18-NEXT: [[TMP128:%.*]] = load i32, i32* [[N]], align 4
22250 // CHECK18-NEXT: store i32 [[TMP128]], i32* [[DOTCAPTURE_EXPR_37]], align 4
22251 // CHECK18-NEXT: [[TMP129:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4
22252 // CHECK18-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP129]], 0
22253 // CHECK18-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
22254 // CHECK18-NEXT: [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1
22255 // CHECK18-NEXT: store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4
22256 // CHECK18-NEXT: [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4
22257 // CHECK18-NEXT: [[ADD42:%.*]] = add nsw i32 [[TMP130]], 1
22258 // CHECK18-NEXT: [[TMP131:%.*]] = zext i32 [[ADD42]] to i64
22259 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP131]])
22260 // CHECK18-NEXT: [[TMP132:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169.region_id, i32 3, i8** [[TMP125]], i8** [[TMP126]], i64* [[TMP127]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22261 // CHECK18-NEXT: [[TMP133:%.*]] = icmp ne i32 [[TMP132]], 0
22262 // CHECK18-NEXT: br i1 [[TMP133]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]]
22263 // CHECK18: omp_offload.failed43:
22264 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169(i32 [[TMP104]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
22265 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT44]]
22266 // CHECK18: omp_offload.cont44:
22267 // CHECK18-NEXT: [[TMP134:%.*]] = load i32, i32* [[M]], align 4
22268 // CHECK18-NEXT: store i32 [[TMP134]], i32* [[M_CASTED45]], align 4
22269 // CHECK18-NEXT: [[TMP135:%.*]] = load i32, i32* [[M_CASTED45]], align 4
22270 // CHECK18-NEXT: [[TMP136:%.*]] = load i32, i32* [[N]], align 4
22271 // CHECK18-NEXT: store i32 [[TMP136]], i32* [[N_CASTED46]], align 4
22272 // CHECK18-NEXT: [[TMP137:%.*]] = load i32, i32* [[N_CASTED46]], align 4
22273 // CHECK18-NEXT: [[TMP138:%.*]] = mul nuw i32 [[TMP0]], 4
22274 // CHECK18-NEXT: [[TMP139:%.*]] = sext i32 [[TMP138]] to i64
22275 // CHECK18-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
22276 // CHECK18-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32*
22277 // CHECK18-NEXT: store i32 [[TMP135]], i32* [[TMP141]], align 4
22278 // CHECK18-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
22279 // CHECK18-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32*
22280 // CHECK18-NEXT: store i32 [[TMP135]], i32* [[TMP143]], align 4
22281 // CHECK18-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
22282 // CHECK18-NEXT: store i64 4, i64* [[TMP144]], align 4
22283 // CHECK18-NEXT: [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0
22284 // CHECK18-NEXT: store i8* null, i8** [[TMP145]], align 4
22285 // CHECK18-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1
22286 // CHECK18-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32*
22287 // CHECK18-NEXT: store i32 [[TMP137]], i32* [[TMP147]], align 4
22288 // CHECK18-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1
22289 // CHECK18-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32*
22290 // CHECK18-NEXT: store i32 [[TMP137]], i32* [[TMP149]], align 4
22291 // CHECK18-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 1
22292 // CHECK18-NEXT: store i64 4, i64* [[TMP150]], align 4
22293 // CHECK18-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1
22294 // CHECK18-NEXT: store i8* null, i8** [[TMP151]], align 4
22295 // CHECK18-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2
22296 // CHECK18-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
22297 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[TMP153]], align 4
22298 // CHECK18-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2
22299 // CHECK18-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
22300 // CHECK18-NEXT: store i32 [[TMP0]], i32* [[TMP155]], align 4
22301 // CHECK18-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 2
22302 // CHECK18-NEXT: store i64 4, i64* [[TMP156]], align 4
22303 // CHECK18-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2
22304 // CHECK18-NEXT: store i8* null, i8** [[TMP157]], align 4
22305 // CHECK18-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3
22306 // CHECK18-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32**
22307 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP159]], align 4
22308 // CHECK18-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3
22309 // CHECK18-NEXT: [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32**
22310 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP161]], align 4
22311 // CHECK18-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3
22312 // CHECK18-NEXT: store i64 [[TMP139]], i64* [[TMP162]], align 4
22313 // CHECK18-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3
22314 // CHECK18-NEXT: store i8* null, i8** [[TMP163]], align 4
22315 // CHECK18-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
22316 // CHECK18-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
22317 // CHECK18-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
22318 // CHECK18-NEXT: [[TMP167:%.*]] = load i32, i32* [[N]], align 4
22319 // CHECK18-NEXT: store i32 [[TMP167]], i32* [[DOTCAPTURE_EXPR_52]], align 4
22320 // CHECK18-NEXT: [[TMP168:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4
22321 // CHECK18-NEXT: [[SUB54:%.*]] = sub nsw i32 [[TMP168]], 0
22322 // CHECK18-NEXT: [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1
22323 // CHECK18-NEXT: [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1
22324 // CHECK18-NEXT: store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4
22325 // CHECK18-NEXT: [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4
22326 // CHECK18-NEXT: [[ADD57:%.*]] = add nsw i32 [[TMP169]], 1
22327 // CHECK18-NEXT: [[TMP170:%.*]] = zext i32 [[ADD57]] to i64
22328 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP170]])
22329 // CHECK18-NEXT: [[TMP171:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174.region_id, i32 4, i8** [[TMP164]], i8** [[TMP165]], i64* [[TMP166]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22330 // CHECK18-NEXT: [[TMP172:%.*]] = icmp ne i32 [[TMP171]], 0
22331 // CHECK18-NEXT: br i1 [[TMP172]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]]
22332 // CHECK18: omp_offload.failed58:
22333 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174(i32 [[TMP135]], i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
22334 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT59]]
22335 // CHECK18: omp_offload.cont59:
22336 // CHECK18-NEXT: [[TMP173:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
22337 // CHECK18-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP173]])
22338 // CHECK18-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
22339 // CHECK18-NEXT: [[TMP174:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
22340 // CHECK18-NEXT: call void @llvm.stackrestore(i8* [[TMP174]])
22341 // CHECK18-NEXT: [[TMP175:%.*]] = load i32, i32* [[RETVAL]], align 4
22342 // CHECK18-NEXT: ret i32 [[TMP175]]
22343 //
22344 //
22345 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154
22346 // CHECK18-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
22347 // CHECK18-NEXT: entry:
22348 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
22349 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
22350 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
22351 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
22352 // CHECK18-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22353 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
22354 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22355 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22356 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
22357 // CHECK18-NEXT: ret void
22358 //
22359 //
22360 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined.
22361 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22362 // CHECK18-NEXT: entry:
22363 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
22364 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
22365 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
22366 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
22367 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
22368 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22369 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
22370 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22371 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22372 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
22373 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22374 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22375 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22376 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22377 // CHECK18-NEXT: [[I3:%.*]] = alloca i32, align 4
22378 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
22379 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
22380 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
22381 // CHECK18-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22382 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
22383 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
22384 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22385 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22386 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
22387 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
22388 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22389 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
22390 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22391 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
22392 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22393 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4
22394 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22395 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
22396 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
22397 // CHECK18: omp.precond.then:
22398 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
22399 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22400 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
22401 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22402 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22403 // CHECK18-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22404 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
22405 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22406 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22407 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22408 // CHECK18-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
22409 // CHECK18-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22410 // CHECK18: cond.true:
22411 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22412 // CHECK18-NEXT: br label [[COND_END:%.*]]
22413 // CHECK18: cond.false:
22414 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22415 // CHECK18-NEXT: br label [[COND_END]]
22416 // CHECK18: cond.end:
22417 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
22418 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
22419 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22420 // CHECK18-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
22421 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
22422 // CHECK18: omp.inner.for.cond:
22423 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
22424 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
22425 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
22426 // CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22427 // CHECK18: omp.inner.for.body:
22428 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !14
22429 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
22430 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !14
22431 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
22432 // CHECK18: omp.inner.for.inc:
22433 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
22434 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !14
22435 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
22436 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
22437 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
22438 // CHECK18: omp.inner.for.end:
22439 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
22440 // CHECK18: omp.loop.exit:
22441 // CHECK18-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22442 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
22443 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
22444 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
22445 // CHECK18-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
22446 // CHECK18-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
22447 // CHECK18: .omp.final.then:
22448 // CHECK18-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22449 // CHECK18-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0
22450 // CHECK18-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
22451 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
22452 // CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
22453 // CHECK18-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
22454 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
22455 // CHECK18: .omp.final.done:
22456 // CHECK18-NEXT: br label [[OMP_PRECOND_END]]
22457 // CHECK18: omp.precond.end:
22458 // CHECK18-NEXT: ret void
22459 //
22460 //
22461 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..1
22462 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22463 // CHECK18-NEXT: entry:
22464 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
22465 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
22466 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
22467 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
22468 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
22469 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
22470 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
22471 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22472 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
22473 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22474 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22475 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
22476 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
22477 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
22478 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22479 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22480 // CHECK18-NEXT: [[I3:%.*]] = alloca i32, align 4
22481 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
22482 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
22483 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
22484 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
22485 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
22486 // CHECK18-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22487 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
22488 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
22489 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22490 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22491 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
22492 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
22493 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22494 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
22495 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22496 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
22497 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22498 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4
22499 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22500 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
22501 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
22502 // CHECK18: omp.precond.then:
22503 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
22504 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22505 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
22506 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
22507 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
22508 // CHECK18-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
22509 // CHECK18-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
22510 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22511 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22512 // CHECK18-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22513 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
22514 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22515 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22516 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22517 // CHECK18-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
22518 // CHECK18-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22519 // CHECK18: cond.true:
22520 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22521 // CHECK18-NEXT: br label [[COND_END:%.*]]
22522 // CHECK18: cond.false:
22523 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22524 // CHECK18-NEXT: br label [[COND_END]]
22525 // CHECK18: cond.end:
22526 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
22527 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
22528 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22529 // CHECK18-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
22530 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
22531 // CHECK18: omp.inner.for.cond:
22532 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
22533 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
22534 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
22535 // CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22536 // CHECK18: omp.inner.for.body:
22537 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
22538 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
22539 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22540 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !18
22541 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !18
22542 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
22543 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
22544 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
22545 // CHECK18: omp.body.continue:
22546 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
22547 // CHECK18: omp.inner.for.inc:
22548 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
22549 // CHECK18-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
22550 // CHECK18-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
22551 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
22552 // CHECK18: omp.inner.for.end:
22553 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
22554 // CHECK18: omp.loop.exit:
22555 // CHECK18-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22556 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
22557 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
22558 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
22559 // CHECK18-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
22560 // CHECK18-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
22561 // CHECK18: .omp.final.then:
22562 // CHECK18-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22563 // CHECK18-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0
22564 // CHECK18-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
22565 // CHECK18-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
22566 // CHECK18-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
22567 // CHECK18-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
22568 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
22569 // CHECK18: .omp.final.done:
22570 // CHECK18-NEXT: br label [[OMP_PRECOND_END]]
22571 // CHECK18: omp.precond.end:
22572 // CHECK18-NEXT: ret void
22573 //
22574 //
22575 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159
22576 // CHECK18-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22577 // CHECK18-NEXT: entry:
22578 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
22579 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
22580 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
22581 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
22582 // CHECK18-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22583 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
22584 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22585 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22586 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
22587 // CHECK18-NEXT: ret void
22588 //
22589 //
22590 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..2
22591 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22592 // CHECK18-NEXT: entry:
22593 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
22594 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
22595 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
22596 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
22597 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
22598 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22599 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
22600 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22601 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22602 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
22603 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22604 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22605 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22606 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22607 // CHECK18-NEXT: [[I3:%.*]] = alloca i32, align 4
22608 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
22609 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
22610 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
22611 // CHECK18-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22612 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
22613 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
22614 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22615 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22616 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
22617 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
22618 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22619 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
22620 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22621 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
22622 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22623 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4
22624 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22625 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
22626 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
22627 // CHECK18: omp.precond.then:
22628 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
22629 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22630 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
22631 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22632 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22633 // CHECK18-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22634 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
22635 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22636 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22637 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22638 // CHECK18-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
22639 // CHECK18-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22640 // CHECK18: cond.true:
22641 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22642 // CHECK18-NEXT: br label [[COND_END:%.*]]
22643 // CHECK18: cond.false:
22644 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22645 // CHECK18-NEXT: br label [[COND_END]]
22646 // CHECK18: cond.end:
22647 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
22648 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
22649 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22650 // CHECK18-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
22651 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
22652 // CHECK18: omp.inner.for.cond:
22653 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
22654 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
22655 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
22656 // CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22657 // CHECK18: omp.inner.for.body:
22658 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23
22659 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
22660 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !23
22661 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
22662 // CHECK18: omp.inner.for.inc:
22663 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
22664 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23
22665 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
22666 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
22667 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
22668 // CHECK18: omp.inner.for.end:
22669 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
22670 // CHECK18: omp.loop.exit:
22671 // CHECK18-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22672 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
22673 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
22674 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
22675 // CHECK18-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
22676 // CHECK18-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
22677 // CHECK18: .omp.final.then:
22678 // CHECK18-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22679 // CHECK18-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0
22680 // CHECK18-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
22681 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
22682 // CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
22683 // CHECK18-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
22684 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
22685 // CHECK18: .omp.final.done:
22686 // CHECK18-NEXT: br label [[OMP_PRECOND_END]]
22687 // CHECK18: omp.precond.end:
22688 // CHECK18-NEXT: ret void
22689 //
22690 //
22691 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..3
22692 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22693 // CHECK18-NEXT: entry:
22694 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
22695 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
22696 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
22697 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
22698 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
22699 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
22700 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
22701 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22702 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
22703 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22704 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22705 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
22706 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
22707 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
22708 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22709 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22710 // CHECK18-NEXT: [[I3:%.*]] = alloca i32, align 4
22711 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
22712 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
22713 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
22714 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
22715 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
22716 // CHECK18-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22717 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
22718 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
22719 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22720 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22721 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
22722 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
22723 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22724 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
22725 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22726 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
22727 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22728 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4
22729 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22730 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
22731 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
22732 // CHECK18: omp.precond.then:
22733 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
22734 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22735 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
22736 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
22737 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
22738 // CHECK18-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
22739 // CHECK18-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
22740 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22741 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22742 // CHECK18-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22743 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
22744 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22745 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22746 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22747 // CHECK18-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
22748 // CHECK18-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22749 // CHECK18: cond.true:
22750 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22751 // CHECK18-NEXT: br label [[COND_END:%.*]]
22752 // CHECK18: cond.false:
22753 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22754 // CHECK18-NEXT: br label [[COND_END]]
22755 // CHECK18: cond.end:
22756 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
22757 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
22758 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22759 // CHECK18-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
22760 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
22761 // CHECK18: omp.inner.for.cond:
22762 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
22763 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26
22764 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
22765 // CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22766 // CHECK18: omp.inner.for.body:
22767 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
22768 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
22769 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22770 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !26
22771 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !26
22772 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
22773 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26
22774 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
22775 // CHECK18: omp.body.continue:
22776 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
22777 // CHECK18: omp.inner.for.inc:
22778 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
22779 // CHECK18-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
22780 // CHECK18-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
22781 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
22782 // CHECK18: omp.inner.for.end:
22783 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
22784 // CHECK18: omp.loop.exit:
22785 // CHECK18-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22786 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
22787 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
22788 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
22789 // CHECK18-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
22790 // CHECK18-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
22791 // CHECK18: .omp.final.then:
22792 // CHECK18-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22793 // CHECK18-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0
22794 // CHECK18-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
22795 // CHECK18-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
22796 // CHECK18-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
22797 // CHECK18-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
22798 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
22799 // CHECK18: .omp.final.done:
22800 // CHECK18-NEXT: br label [[OMP_PRECOND_END]]
22801 // CHECK18: omp.precond.end:
22802 // CHECK18-NEXT: ret void
22803 //
22804 //
22805 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164
22806 // CHECK18-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22807 // CHECK18-NEXT: entry:
22808 // CHECK18-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
22809 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
22810 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
22811 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
22812 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22813 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
22814 // CHECK18-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
22815 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
22816 // CHECK18-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22817 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
22818 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22819 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22820 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
22821 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
22822 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22823 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
22824 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
22825 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
22826 // CHECK18-NEXT: ret void
22827 //
22828 //
22829 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..5
22830 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
22831 // CHECK18-NEXT: entry:
22832 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
22833 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
22834 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
22835 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
22836 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
22837 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
22838 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22839 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
22840 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22841 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
22842 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
22843 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22844 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22845 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22846 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22847 // CHECK18-NEXT: [[I4:%.*]] = alloca i32, align 4
22848 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
22849 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
22850 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
22851 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
22852 // CHECK18-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22853 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
22854 // CHECK18-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
22855 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
22856 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22857 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22858 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
22859 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22860 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22861 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
22862 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22863 // CHECK18-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
22864 // CHECK18-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
22865 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4
22866 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22867 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
22868 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
22869 // CHECK18: omp.precond.then:
22870 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
22871 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
22872 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
22873 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22874 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22875 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
22876 // CHECK18-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22877 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
22878 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
22879 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22880 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
22881 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
22882 // CHECK18-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22883 // CHECK18: cond.true:
22884 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
22885 // CHECK18-NEXT: br label [[COND_END:%.*]]
22886 // CHECK18: cond.false:
22887 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22888 // CHECK18-NEXT: br label [[COND_END]]
22889 // CHECK18: cond.end:
22890 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
22891 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
22892 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22893 // CHECK18-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
22894 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
22895 // CHECK18: omp.inner.for.cond:
22896 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
22897 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
22898 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
22899 // CHECK18-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
22900 // CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22901 // CHECK18: omp.inner.for.body:
22902 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
22903 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
22904 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !29
22905 // CHECK18-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !29
22906 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !29
22907 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]]), !llvm.access.group !29
22908 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
22909 // CHECK18: omp.inner.for.inc:
22910 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
22911 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
22912 // CHECK18-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
22913 // CHECK18-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
22914 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
22915 // CHECK18-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
22916 // CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
22917 // CHECK18-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
22918 // CHECK18-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
22919 // CHECK18-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
22920 // CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
22921 // CHECK18-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
22922 // CHECK18-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
22923 // CHECK18-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
22924 // CHECK18-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]
22925 // CHECK18-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
22926 // CHECK18: cond.true11:
22927 // CHECK18-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
22928 // CHECK18-NEXT: br label [[COND_END13:%.*]]
22929 // CHECK18: cond.false12:
22930 // CHECK18-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
22931 // CHECK18-NEXT: br label [[COND_END13]]
22932 // CHECK18: cond.end13:
22933 // CHECK18-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]
22934 // CHECK18-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
22935 // CHECK18-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
22936 // CHECK18-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
22937 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
22938 // CHECK18: omp.inner.for.end:
22939 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
22940 // CHECK18: omp.loop.exit:
22941 // CHECK18-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22942 // CHECK18-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
22943 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
22944 // CHECK18-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
22945 // CHECK18-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
22946 // CHECK18-NEXT: br i1 [[TMP35]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
22947 // CHECK18: .omp.final.then:
22948 // CHECK18-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22949 // CHECK18-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP36]], 0
22950 // CHECK18-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
22951 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
22952 // CHECK18-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
22953 // CHECK18-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
22954 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
22955 // CHECK18: .omp.final.done:
22956 // CHECK18-NEXT: br label [[OMP_PRECOND_END]]
22957 // CHECK18: omp.precond.end:
22958 // CHECK18-NEXT: ret void
22959 //
22960 //
22961 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..6
22962 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
22963 // CHECK18-NEXT: entry:
22964 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
22965 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
22966 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
22967 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
22968 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
22969 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
22970 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
22971 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
22972 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
22973 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
22974 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22975 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
22976 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
22977 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
22978 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
22979 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22980 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22981 // CHECK18-NEXT: [[I4:%.*]] = alloca i32, align 4
22982 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
22983 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
22984 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
22985 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
22986 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
22987 // CHECK18-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22988 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
22989 // CHECK18-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
22990 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
22991 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22992 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22993 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
22994 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22995 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22996 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
22997 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22998 // CHECK18-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
22999 // CHECK18-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
23000 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4
23001 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23002 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23003 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23004 // CHECK18: omp.precond.then:
23005 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
23006 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23007 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
23008 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23009 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23010 // CHECK18-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
23011 // CHECK18-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
23012 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23013 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23014 // CHECK18-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23015 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
23016 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23017 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23018 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23019 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
23020 // CHECK18-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23021 // CHECK18: cond.true:
23022 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23023 // CHECK18-NEXT: br label [[COND_END:%.*]]
23024 // CHECK18: cond.false:
23025 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23026 // CHECK18-NEXT: br label [[COND_END]]
23027 // CHECK18: cond.end:
23028 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
23029 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
23030 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23031 // CHECK18-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
23032 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23033 // CHECK18: omp.inner.for.cond:
23034 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
23035 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32
23036 // CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
23037 // CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23038 // CHECK18: omp.inner.for.body:
23039 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
23040 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
23041 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23042 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !32
23043 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !32
23044 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
23045 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !32
23046 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
23047 // CHECK18: omp.body.continue:
23048 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23049 // CHECK18: omp.inner.for.inc:
23050 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
23051 // CHECK18-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
23052 // CHECK18-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
23053 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
23054 // CHECK18: omp.inner.for.end:
23055 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
23056 // CHECK18: omp.loop.exit:
23057 // CHECK18-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23058 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
23059 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
23060 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
23061 // CHECK18-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
23062 // CHECK18-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
23063 // CHECK18: .omp.final.then:
23064 // CHECK18-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23065 // CHECK18-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
23066 // CHECK18-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
23067 // CHECK18-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
23068 // CHECK18-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
23069 // CHECK18-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4
23070 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
23071 // CHECK18: .omp.final.done:
23072 // CHECK18-NEXT: br label [[OMP_PRECOND_END]]
23073 // CHECK18: omp.precond.end:
23074 // CHECK18-NEXT: ret void
23075 //
23076 //
23077 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169
23078 // CHECK18-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23079 // CHECK18-NEXT: entry:
23080 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
23081 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
23082 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
23083 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
23084 // CHECK18-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23085 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
23086 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23087 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23088 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
23089 // CHECK18-NEXT: ret void
23090 //
23091 //
23092 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..8
23093 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23094 // CHECK18-NEXT: entry:
23095 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23096 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23097 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
23098 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
23099 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
23100 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23101 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
23102 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23103 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23104 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
23105 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23106 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23107 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23108 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23109 // CHECK18-NEXT: [[I3:%.*]] = alloca i32, align 4
23110 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23111 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23112 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
23113 // CHECK18-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23114 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
23115 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23116 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23117 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23118 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23119 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
23120 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23121 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23122 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23123 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
23124 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23125 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4
23126 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23127 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23128 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23129 // CHECK18: omp.precond.then:
23130 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23131 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23132 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
23133 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23134 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23135 // CHECK18-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23136 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
23137 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23138 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23139 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23140 // CHECK18-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
23141 // CHECK18-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23142 // CHECK18: cond.true:
23143 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23144 // CHECK18-NEXT: br label [[COND_END:%.*]]
23145 // CHECK18: cond.false:
23146 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23147 // CHECK18-NEXT: br label [[COND_END]]
23148 // CHECK18: cond.end:
23149 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
23150 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
23151 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23152 // CHECK18-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
23153 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23154 // CHECK18: omp.inner.for.cond:
23155 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
23156 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
23157 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
23158 // CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23159 // CHECK18: omp.inner.for.body:
23160 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !35
23161 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
23162 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !35
23163 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23164 // CHECK18: omp.inner.for.inc:
23165 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
23166 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !35
23167 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
23168 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
23169 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
23170 // CHECK18: omp.inner.for.end:
23171 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
23172 // CHECK18: omp.loop.exit:
23173 // CHECK18-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23174 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
23175 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
23176 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
23177 // CHECK18-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
23178 // CHECK18-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
23179 // CHECK18: .omp.final.then:
23180 // CHECK18-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23181 // CHECK18-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0
23182 // CHECK18-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
23183 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
23184 // CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
23185 // CHECK18-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
23186 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
23187 // CHECK18: .omp.final.done:
23188 // CHECK18-NEXT: br label [[OMP_PRECOND_END]]
23189 // CHECK18: omp.precond.end:
23190 // CHECK18-NEXT: ret void
23191 //
23192 //
23193 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..9
23194 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23195 // CHECK18-NEXT: entry:
23196 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23197 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23198 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23199 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23200 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
23201 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
23202 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
23203 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23204 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
23205 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23206 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23207 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
23208 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
23209 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
23210 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23211 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23212 // CHECK18-NEXT: [[I3:%.*]] = alloca i32, align 4
23213 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23214 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23215 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23216 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23217 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
23218 // CHECK18-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23219 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
23220 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23221 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23222 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23223 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23224 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
23225 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23226 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23227 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23228 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
23229 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23230 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4
23231 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23232 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23233 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23234 // CHECK18: omp.precond.then:
23235 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
23236 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23237 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
23238 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23239 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23240 // CHECK18-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
23241 // CHECK18-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
23242 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23243 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23244 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23245 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23246 // CHECK18-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23247 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
23248 // CHECK18-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
23249 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
23250 // CHECK18: omp.dispatch.cond:
23251 // CHECK18-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23252 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
23253 // CHECK18-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
23254 // CHECK18-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
23255 // CHECK18-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
23256 // CHECK18: omp.dispatch.body:
23257 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23258 // CHECK18-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
23259 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23260 // CHECK18: omp.inner.for.cond:
23261 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
23262 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38
23263 // CHECK18-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
23264 // CHECK18-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23265 // CHECK18: omp.inner.for.body:
23266 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
23267 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
23268 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23269 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !38
23270 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !38
23271 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]]
23272 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !38
23273 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
23274 // CHECK18: omp.body.continue:
23275 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23276 // CHECK18: omp.inner.for.inc:
23277 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
23278 // CHECK18-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1
23279 // CHECK18-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
23280 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
23281 // CHECK18: omp.inner.for.end:
23282 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
23283 // CHECK18: omp.dispatch.inc:
23284 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]]
23285 // CHECK18: omp.dispatch.end:
23286 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
23287 // CHECK18-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
23288 // CHECK18-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
23289 // CHECK18: .omp.final.then:
23290 // CHECK18-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23291 // CHECK18-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0
23292 // CHECK18-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
23293 // CHECK18-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
23294 // CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
23295 // CHECK18-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
23296 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
23297 // CHECK18: .omp.final.done:
23298 // CHECK18-NEXT: br label [[OMP_PRECOND_END]]
23299 // CHECK18: omp.precond.end:
23300 // CHECK18-NEXT: ret void
23301 //
23302 //
23303 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174
23304 // CHECK18-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23305 // CHECK18-NEXT: entry:
23306 // CHECK18-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
23307 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
23308 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
23309 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
23310 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23311 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
23312 // CHECK18-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
23313 // CHECK18-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
23314 // CHECK18-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23315 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
23316 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23317 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23318 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
23319 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
23320 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23321 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23322 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23323 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
23324 // CHECK18-NEXT: ret void
23325 //
23326 //
23327 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..11
23328 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
23329 // CHECK18-NEXT: entry:
23330 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23331 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23332 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
23333 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
23334 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
23335 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
23336 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23337 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
23338 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23339 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
23340 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
23341 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23342 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23343 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23344 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23345 // CHECK18-NEXT: [[I4:%.*]] = alloca i32, align 4
23346 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
23347 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23348 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23349 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
23350 // CHECK18-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23351 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
23352 // CHECK18-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23353 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23354 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23355 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23356 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23357 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23358 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23359 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23360 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23361 // CHECK18-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
23362 // CHECK18-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
23363 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4
23364 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23365 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23366 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23367 // CHECK18: omp.precond.then:
23368 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23369 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23370 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
23371 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23372 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23373 // CHECK18-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23374 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
23375 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23376 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23377 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23378 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
23379 // CHECK18-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23380 // CHECK18: cond.true:
23381 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23382 // CHECK18-NEXT: br label [[COND_END:%.*]]
23383 // CHECK18: cond.false:
23384 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23385 // CHECK18-NEXT: br label [[COND_END]]
23386 // CHECK18: cond.end:
23387 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
23388 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
23389 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23390 // CHECK18-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
23391 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23392 // CHECK18: omp.inner.for.cond:
23393 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
23394 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !41
23395 // CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
23396 // CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23397 // CHECK18: omp.inner.for.body:
23398 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !41
23399 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !41
23400 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !41
23401 // CHECK18-NEXT: store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !41
23402 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !41
23403 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]]), !llvm.access.group !41
23404 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23405 // CHECK18: omp.inner.for.inc:
23406 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
23407 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !41
23408 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
23409 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
23410 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
23411 // CHECK18: omp.inner.for.end:
23412 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
23413 // CHECK18: omp.loop.exit:
23414 // CHECK18-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23415 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
23416 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
23417 // CHECK18-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
23418 // CHECK18-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
23419 // CHECK18-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
23420 // CHECK18: .omp.final.then:
23421 // CHECK18-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23422 // CHECK18-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0
23423 // CHECK18-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
23424 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
23425 // CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
23426 // CHECK18-NEXT: store i32 [[ADD9]], i32* [[I4]], align 4
23427 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
23428 // CHECK18: .omp.final.done:
23429 // CHECK18-NEXT: br label [[OMP_PRECOND_END]]
23430 // CHECK18: omp.precond.end:
23431 // CHECK18-NEXT: ret void
23432 //
23433 //
23434 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..12
23435 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
23436 // CHECK18-NEXT: entry:
23437 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23438 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23439 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23440 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23441 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
23442 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
23443 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
23444 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
23445 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23446 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
23447 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23448 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
23449 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
23450 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
23451 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
23452 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23453 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23454 // CHECK18-NEXT: [[I4:%.*]] = alloca i32, align 4
23455 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23456 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23457 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23458 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23459 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
23460 // CHECK18-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23461 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
23462 // CHECK18-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23463 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23464 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23465 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23466 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23467 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23468 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23469 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23470 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23471 // CHECK18-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
23472 // CHECK18-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
23473 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4
23474 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23475 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23476 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23477 // CHECK18: omp.precond.then:
23478 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
23479 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23480 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
23481 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23482 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23483 // CHECK18-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
23484 // CHECK18-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
23485 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23486 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23487 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23488 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23489 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23490 // CHECK18-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23491 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
23492 // CHECK18-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
23493 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
23494 // CHECK18: omp.dispatch.cond:
23495 // CHECK18-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23496 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
23497 // CHECK18-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
23498 // CHECK18-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
23499 // CHECK18-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
23500 // CHECK18: omp.dispatch.body:
23501 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23502 // CHECK18-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
23503 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23504 // CHECK18: omp.inner.for.cond:
23505 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
23506 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !44
23507 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
23508 // CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23509 // CHECK18: omp.inner.for.body:
23510 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
23511 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
23512 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23513 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !44
23514 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !44
23515 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]]
23516 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !44
23517 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
23518 // CHECK18: omp.body.continue:
23519 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23520 // CHECK18: omp.inner.for.inc:
23521 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
23522 // CHECK18-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1
23523 // CHECK18-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
23524 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
23525 // CHECK18: omp.inner.for.end:
23526 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
23527 // CHECK18: omp.dispatch.inc:
23528 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]]
23529 // CHECK18: omp.dispatch.end:
23530 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
23531 // CHECK18-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
23532 // CHECK18-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
23533 // CHECK18: .omp.final.then:
23534 // CHECK18-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23535 // CHECK18-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0
23536 // CHECK18-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
23537 // CHECK18-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
23538 // CHECK18-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
23539 // CHECK18-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
23540 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
23541 // CHECK18: .omp.final.done:
23542 // CHECK18-NEXT: br label [[OMP_PRECOND_END]]
23543 // CHECK18: omp.precond.end:
23544 // CHECK18-NEXT: ret void
23545 //
23546 //
23547 // CHECK18-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
23548 // CHECK18-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
23549 // CHECK18-NEXT: entry:
23550 // CHECK18-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
23551 // CHECK18-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
23552 // CHECK18-NEXT: [[M:%.*]] = alloca i32, align 4
23553 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
23554 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
23555 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
23556 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
23557 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
23558 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
23559 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
23560 // CHECK18-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
23561 // CHECK18-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
23562 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4
23563 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4
23564 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4
23565 // CHECK18-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
23566 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4
23567 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4
23568 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4
23569 // CHECK18-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
23570 // CHECK18-NEXT: [[M_CASTED19:%.*]] = alloca i32, align 4
23571 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4
23572 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4
23573 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4
23574 // CHECK18-NEXT: [[_TMP23:%.*]] = alloca i32, align 4
23575 // CHECK18-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
23576 // CHECK18-NEXT: store i32 10, i32* [[M]], align 4
23577 // CHECK18-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
23578 // CHECK18-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
23579 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
23580 // CHECK18-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
23581 // CHECK18-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
23582 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
23583 // CHECK18-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
23584 // CHECK18-NEXT: store i8* null, i8** [[TMP4]], align 4
23585 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
23586 // CHECK18-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
23587 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
23588 // CHECK18-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
23589 // CHECK18-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
23590 // CHECK18-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
23591 // CHECK18: omp_offload.failed:
23592 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122([10 x i32]* [[A]]) #[[ATTR3]]
23593 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]]
23594 // CHECK18: omp_offload.cont:
23595 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
23596 // CHECK18-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
23597 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
23598 // CHECK18-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
23599 // CHECK18-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
23600 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
23601 // CHECK18-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
23602 // CHECK18-NEXT: store i8* null, i8** [[TMP13]], align 4
23603 // CHECK18-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
23604 // CHECK18-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
23605 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
23606 // CHECK18-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
23607 // CHECK18-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
23608 // CHECK18-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
23609 // CHECK18: omp_offload.failed5:
23610 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127([10 x i32]* [[A]]) #[[ATTR3]]
23611 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT6]]
23612 // CHECK18: omp_offload.cont6:
23613 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4
23614 // CHECK18-NEXT: store i32 [[TMP18]], i32* [[M_CASTED]], align 4
23615 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4
23616 // CHECK18-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
23617 // CHECK18-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
23618 // CHECK18-NEXT: store i32 [[TMP19]], i32* [[TMP21]], align 4
23619 // CHECK18-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
23620 // CHECK18-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
23621 // CHECK18-NEXT: store i32 [[TMP19]], i32* [[TMP23]], align 4
23622 // CHECK18-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
23623 // CHECK18-NEXT: store i8* null, i8** [[TMP24]], align 4
23624 // CHECK18-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
23625 // CHECK18-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
23626 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4
23627 // CHECK18-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
23628 // CHECK18-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
23629 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4
23630 // CHECK18-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1
23631 // CHECK18-NEXT: store i8* null, i8** [[TMP29]], align 4
23632 // CHECK18-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
23633 // CHECK18-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
23634 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
23635 // CHECK18-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
23636 // CHECK18-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
23637 // CHECK18-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
23638 // CHECK18: omp_offload.failed11:
23639 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
23640 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT12]]
23641 // CHECK18: omp_offload.cont12:
23642 // CHECK18-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
23643 // CHECK18-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
23644 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4
23645 // CHECK18-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
23646 // CHECK18-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
23647 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4
23648 // CHECK18-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
23649 // CHECK18-NEXT: store i8* null, i8** [[TMP38]], align 4
23650 // CHECK18-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
23651 // CHECK18-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
23652 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
23653 // CHECK18-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
23654 // CHECK18-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
23655 // CHECK18-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
23656 // CHECK18: omp_offload.failed17:
23657 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137([10 x i32]* [[A]]) #[[ATTR3]]
23658 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT18]]
23659 // CHECK18: omp_offload.cont18:
23660 // CHECK18-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4
23661 // CHECK18-NEXT: store i32 [[TMP43]], i32* [[M_CASTED19]], align 4
23662 // CHECK18-NEXT: [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4
23663 // CHECK18-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
23664 // CHECK18-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
23665 // CHECK18-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4
23666 // CHECK18-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
23667 // CHECK18-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
23668 // CHECK18-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4
23669 // CHECK18-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
23670 // CHECK18-NEXT: store i8* null, i8** [[TMP49]], align 4
23671 // CHECK18-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
23672 // CHECK18-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
23673 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4
23674 // CHECK18-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
23675 // CHECK18-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
23676 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4
23677 // CHECK18-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
23678 // CHECK18-NEXT: store i8* null, i8** [[TMP54]], align 4
23679 // CHECK18-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
23680 // CHECK18-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
23681 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
23682 // CHECK18-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
23683 // CHECK18-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
23684 // CHECK18-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
23685 // CHECK18: omp_offload.failed24:
23686 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
23687 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT25]]
23688 // CHECK18: omp_offload.cont25:
23689 // CHECK18-NEXT: ret i32 0
23690 //
23691 //
23692 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122
23693 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
23694 // CHECK18-NEXT: entry:
23695 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
23696 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
23697 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
23698 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
23699 // CHECK18-NEXT: ret void
23700 //
23701 //
23702 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..14
23703 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
23704 // CHECK18-NEXT: entry:
23705 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23706 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23707 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
23708 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23709 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
23710 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23711 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23712 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23713 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23714 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
23715 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23716 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23717 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
23718 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
23719 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23720 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
23721 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23722 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23723 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23724 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
23725 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23726 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23727 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
23728 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23729 // CHECK18: cond.true:
23730 // CHECK18-NEXT: br label [[COND_END:%.*]]
23731 // CHECK18: cond.false:
23732 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23733 // CHECK18-NEXT: br label [[COND_END]]
23734 // CHECK18: cond.end:
23735 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
23736 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
23737 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23738 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
23739 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23740 // CHECK18: omp.inner.for.cond:
23741 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
23742 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !47
23743 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
23744 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23745 // CHECK18: omp.inner.for.body:
23746 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !47
23747 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !47
23748 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !47
23749 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23750 // CHECK18: omp.inner.for.inc:
23751 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
23752 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !47
23753 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
23754 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
23755 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
23756 // CHECK18: omp.inner.for.end:
23757 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
23758 // CHECK18: omp.loop.exit:
23759 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
23760 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
23761 // CHECK18-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
23762 // CHECK18-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
23763 // CHECK18: .omp.final.then:
23764 // CHECK18-NEXT: store i32 10, i32* [[I]], align 4
23765 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
23766 // CHECK18: .omp.final.done:
23767 // CHECK18-NEXT: ret void
23768 //
23769 //
23770 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..15
23771 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
23772 // CHECK18-NEXT: entry:
23773 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23774 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23775 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23776 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23777 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
23778 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23779 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
23780 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
23781 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
23782 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23783 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23784 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
23785 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23786 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23787 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23788 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23789 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
23790 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
23791 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
23792 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
23793 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23794 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23795 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
23796 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
23797 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23798 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23799 // CHECK18-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23800 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
23801 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23802 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23803 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
23804 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23805 // CHECK18: cond.true:
23806 // CHECK18-NEXT: br label [[COND_END:%.*]]
23807 // CHECK18: cond.false:
23808 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23809 // CHECK18-NEXT: br label [[COND_END]]
23810 // CHECK18: cond.end:
23811 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
23812 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
23813 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23814 // CHECK18-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
23815 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23816 // CHECK18: omp.inner.for.cond:
23817 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
23818 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !50
23819 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
23820 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23821 // CHECK18: omp.inner.for.body:
23822 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
23823 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
23824 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23825 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !50
23826 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !50
23827 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
23828 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !50
23829 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
23830 // CHECK18: omp.body.continue:
23831 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23832 // CHECK18: omp.inner.for.inc:
23833 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
23834 // CHECK18-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
23835 // CHECK18-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
23836 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
23837 // CHECK18: omp.inner.for.end:
23838 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
23839 // CHECK18: omp.loop.exit:
23840 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
23841 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
23842 // CHECK18-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
23843 // CHECK18-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
23844 // CHECK18: .omp.final.then:
23845 // CHECK18-NEXT: store i32 10, i32* [[I]], align 4
23846 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
23847 // CHECK18: .omp.final.done:
23848 // CHECK18-NEXT: ret void
23849 //
23850 //
23851 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127
23852 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
23853 // CHECK18-NEXT: entry:
23854 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
23855 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
23856 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
23857 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
23858 // CHECK18-NEXT: ret void
23859 //
23860 //
23861 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..17
23862 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
23863 // CHECK18-NEXT: entry:
23864 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23865 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23866 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
23867 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23868 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
23869 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23870 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23871 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23872 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23873 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
23874 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23875 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23876 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
23877 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
23878 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23879 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
23880 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23881 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23882 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23883 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
23884 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23885 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23886 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
23887 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23888 // CHECK18: cond.true:
23889 // CHECK18-NEXT: br label [[COND_END:%.*]]
23890 // CHECK18: cond.false:
23891 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23892 // CHECK18-NEXT: br label [[COND_END]]
23893 // CHECK18: cond.end:
23894 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
23895 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
23896 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23897 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
23898 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23899 // CHECK18: omp.inner.for.cond:
23900 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
23901 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !53
23902 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
23903 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23904 // CHECK18: omp.inner.for.body:
23905 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !53
23906 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !53
23907 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !53
23908 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23909 // CHECK18: omp.inner.for.inc:
23910 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
23911 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !53
23912 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
23913 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
23914 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
23915 // CHECK18: omp.inner.for.end:
23916 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
23917 // CHECK18: omp.loop.exit:
23918 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
23919 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
23920 // CHECK18-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
23921 // CHECK18-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
23922 // CHECK18: .omp.final.then:
23923 // CHECK18-NEXT: store i32 10, i32* [[I]], align 4
23924 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
23925 // CHECK18: .omp.final.done:
23926 // CHECK18-NEXT: ret void
23927 //
23928 //
23929 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..18
23930 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
23931 // CHECK18-NEXT: entry:
23932 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23933 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23934 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23935 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23936 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
23937 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
23938 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
23939 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
23940 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
23941 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23942 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23943 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
23944 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23945 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23946 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23947 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23948 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
23949 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
23950 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
23951 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
23952 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23953 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23954 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
23955 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
23956 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23957 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23958 // CHECK18-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23959 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
23960 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23961 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23962 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
23963 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23964 // CHECK18: cond.true:
23965 // CHECK18-NEXT: br label [[COND_END:%.*]]
23966 // CHECK18: cond.false:
23967 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23968 // CHECK18-NEXT: br label [[COND_END]]
23969 // CHECK18: cond.end:
23970 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
23971 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
23972 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23973 // CHECK18-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
23974 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
23975 // CHECK18: omp.inner.for.cond:
23976 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
23977 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !56
23978 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
23979 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23980 // CHECK18: omp.inner.for.body:
23981 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
23982 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
23983 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23984 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !56
23985 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !56
23986 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
23987 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !56
23988 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
23989 // CHECK18: omp.body.continue:
23990 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
23991 // CHECK18: omp.inner.for.inc:
23992 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
23993 // CHECK18-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
23994 // CHECK18-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
23995 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
23996 // CHECK18: omp.inner.for.end:
23997 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
23998 // CHECK18: omp.loop.exit:
23999 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
24000 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
24001 // CHECK18-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
24002 // CHECK18-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
24003 // CHECK18: .omp.final.then:
24004 // CHECK18-NEXT: store i32 10, i32* [[I]], align 4
24005 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
24006 // CHECK18: .omp.final.done:
24007 // CHECK18-NEXT: ret void
24008 //
24009 //
24010 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132
24011 // CHECK18-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24012 // CHECK18-NEXT: entry:
24013 // CHECK18-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
24014 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24015 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
24016 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
24017 // CHECK18-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
24018 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24019 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24020 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
24021 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
24022 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
24023 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24024 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24025 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
24026 // CHECK18-NEXT: ret void
24027 //
24028 //
24029 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..21
24030 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24031 // CHECK18-NEXT: entry:
24032 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24033 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24034 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24035 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24036 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24037 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
24038 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24039 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24040 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24041 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24042 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
24043 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
24044 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24045 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24046 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24047 // CHECK18-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24048 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24049 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
24050 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
24051 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24052 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24053 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24054 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
24055 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24056 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24057 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
24058 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24059 // CHECK18: cond.true:
24060 // CHECK18-NEXT: br label [[COND_END:%.*]]
24061 // CHECK18: cond.false:
24062 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24063 // CHECK18-NEXT: br label [[COND_END]]
24064 // CHECK18: cond.end:
24065 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
24066 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24067 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24068 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
24069 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24070 // CHECK18: omp.inner.for.cond:
24071 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
24072 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !59
24073 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
24074 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24075 // CHECK18: omp.inner.for.body:
24076 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !59
24077 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !59
24078 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !59
24079 // CHECK18-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !59
24080 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !59
24081 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]), !llvm.access.group !59
24082 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24083 // CHECK18: omp.inner.for.inc:
24084 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
24085 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !59
24086 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
24087 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
24088 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
24089 // CHECK18: omp.inner.for.end:
24090 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
24091 // CHECK18: omp.loop.exit:
24092 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
24093 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
24094 // CHECK18-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
24095 // CHECK18-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
24096 // CHECK18: .omp.final.then:
24097 // CHECK18-NEXT: store i32 10, i32* [[I]], align 4
24098 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
24099 // CHECK18: .omp.final.done:
24100 // CHECK18-NEXT: ret void
24101 //
24102 //
24103 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..22
24104 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24105 // CHECK18-NEXT: entry:
24106 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24107 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24108 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24109 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24110 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24111 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24112 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24113 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
24114 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
24115 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
24116 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24117 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24118 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
24119 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24120 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24121 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24122 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24123 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24124 // CHECK18-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24125 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24126 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
24127 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
24128 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24129 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24130 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
24131 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
24132 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24133 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24134 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24135 // CHECK18-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24136 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
24137 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
24138 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
24139 // CHECK18: omp.dispatch.cond:
24140 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24141 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24142 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
24143 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24144 // CHECK18: cond.true:
24145 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24146 // CHECK18-NEXT: br label [[COND_END:%.*]]
24147 // CHECK18: cond.false:
24148 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24149 // CHECK18-NEXT: br label [[COND_END]]
24150 // CHECK18: cond.end:
24151 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
24152 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
24153 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24154 // CHECK18-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
24155 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24156 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24157 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
24158 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24159 // CHECK18: omp.dispatch.body:
24160 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24161 // CHECK18: omp.inner.for.cond:
24162 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
24163 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !62
24164 // CHECK18-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
24165 // CHECK18-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24166 // CHECK18: omp.inner.for.body:
24167 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
24168 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
24169 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24170 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !62
24171 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !62
24172 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
24173 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !62
24174 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
24175 // CHECK18: omp.body.continue:
24176 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24177 // CHECK18: omp.inner.for.inc:
24178 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
24179 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
24180 // CHECK18-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
24181 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP63:![0-9]+]]
24182 // CHECK18: omp.inner.for.end:
24183 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
24184 // CHECK18: omp.dispatch.inc:
24185 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24186 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24187 // CHECK18-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
24188 // CHECK18-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
24189 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24190 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24191 // CHECK18-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
24192 // CHECK18-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
24193 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]]
24194 // CHECK18: omp.dispatch.end:
24195 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
24196 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
24197 // CHECK18-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
24198 // CHECK18-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
24199 // CHECK18: .omp.final.then:
24200 // CHECK18-NEXT: store i32 10, i32* [[I]], align 4
24201 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
24202 // CHECK18: .omp.final.done:
24203 // CHECK18-NEXT: ret void
24204 //
24205 //
24206 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137
24207 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24208 // CHECK18-NEXT: entry:
24209 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24210 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24211 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24212 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
24213 // CHECK18-NEXT: ret void
24214 //
24215 //
24216 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..25
24217 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24218 // CHECK18-NEXT: entry:
24219 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24220 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24221 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24222 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24223 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
24224 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24225 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24226 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24227 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24228 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
24229 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24230 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24231 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24232 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24233 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
24234 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
24235 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24236 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24237 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24238 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
24239 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24240 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24241 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
24242 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24243 // CHECK18: cond.true:
24244 // CHECK18-NEXT: br label [[COND_END:%.*]]
24245 // CHECK18: cond.false:
24246 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24247 // CHECK18-NEXT: br label [[COND_END]]
24248 // CHECK18: cond.end:
24249 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
24250 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24251 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24252 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
24253 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24254 // CHECK18: omp.inner.for.cond:
24255 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
24256 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !65
24257 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
24258 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24259 // CHECK18: omp.inner.for.body:
24260 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !65
24261 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !65
24262 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !65
24263 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24264 // CHECK18: omp.inner.for.inc:
24265 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
24266 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !65
24267 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
24268 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
24269 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP66:![0-9]+]]
24270 // CHECK18: omp.inner.for.end:
24271 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
24272 // CHECK18: omp.loop.exit:
24273 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
24274 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
24275 // CHECK18-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
24276 // CHECK18-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
24277 // CHECK18: .omp.final.then:
24278 // CHECK18-NEXT: store i32 10, i32* [[I]], align 4
24279 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
24280 // CHECK18: .omp.final.done:
24281 // CHECK18-NEXT: ret void
24282 //
24283 //
24284 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..26
24285 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24286 // CHECK18-NEXT: entry:
24287 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24288 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24289 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24290 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24291 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24292 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24293 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
24294 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
24295 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
24296 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24297 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24298 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
24299 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24300 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24301 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24302 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24303 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24304 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24305 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
24306 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
24307 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24308 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24309 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
24310 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
24311 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24312 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24313 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24314 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24315 // CHECK18-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24316 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
24317 // CHECK18-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
24318 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
24319 // CHECK18: omp.dispatch.cond:
24320 // CHECK18-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
24321 // CHECK18-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
24322 // CHECK18-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24323 // CHECK18: omp.dispatch.body:
24324 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24325 // CHECK18-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
24326 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24327 // CHECK18: omp.inner.for.cond:
24328 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
24329 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !68
24330 // CHECK18-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
24331 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24332 // CHECK18: omp.inner.for.body:
24333 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
24334 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
24335 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24336 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !68
24337 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !68
24338 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
24339 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !68
24340 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
24341 // CHECK18: omp.body.continue:
24342 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24343 // CHECK18: omp.inner.for.inc:
24344 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
24345 // CHECK18-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
24346 // CHECK18-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
24347 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP69:![0-9]+]]
24348 // CHECK18: omp.inner.for.end:
24349 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
24350 // CHECK18: omp.dispatch.inc:
24351 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]]
24352 // CHECK18: omp.dispatch.end:
24353 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
24354 // CHECK18-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
24355 // CHECK18-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
24356 // CHECK18: .omp.final.then:
24357 // CHECK18-NEXT: store i32 10, i32* [[I]], align 4
24358 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
24359 // CHECK18: .omp.final.done:
24360 // CHECK18-NEXT: ret void
24361 //
24362 //
24363 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142
24364 // CHECK18-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24365 // CHECK18-NEXT: entry:
24366 // CHECK18-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
24367 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24368 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
24369 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
24370 // CHECK18-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
24371 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24372 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24373 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
24374 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
24375 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
24376 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24377 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24378 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
24379 // CHECK18-NEXT: ret void
24380 //
24381 //
24382 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..29
24383 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24384 // CHECK18-NEXT: entry:
24385 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24386 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24387 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24388 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24389 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24390 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
24391 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24392 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24393 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24394 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24395 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
24396 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
24397 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24398 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24399 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24400 // CHECK18-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24401 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24402 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
24403 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
24404 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24405 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24406 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24407 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
24408 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24409 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24410 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
24411 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24412 // CHECK18: cond.true:
24413 // CHECK18-NEXT: br label [[COND_END:%.*]]
24414 // CHECK18: cond.false:
24415 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24416 // CHECK18-NEXT: br label [[COND_END]]
24417 // CHECK18: cond.end:
24418 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
24419 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24420 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24421 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
24422 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24423 // CHECK18: omp.inner.for.cond:
24424 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
24425 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !71
24426 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
24427 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24428 // CHECK18: omp.inner.for.body:
24429 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !71
24430 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !71
24431 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !71
24432 // CHECK18-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !71
24433 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !71
24434 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]), !llvm.access.group !71
24435 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24436 // CHECK18: omp.inner.for.inc:
24437 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
24438 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !71
24439 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
24440 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
24441 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP72:![0-9]+]]
24442 // CHECK18: omp.inner.for.end:
24443 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
24444 // CHECK18: omp.loop.exit:
24445 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
24446 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
24447 // CHECK18-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
24448 // CHECK18-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
24449 // CHECK18: .omp.final.then:
24450 // CHECK18-NEXT: store i32 10, i32* [[I]], align 4
24451 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
24452 // CHECK18: .omp.final.done:
24453 // CHECK18-NEXT: ret void
24454 //
24455 //
24456 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..30
24457 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24458 // CHECK18-NEXT: entry:
24459 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24460 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24461 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24462 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24463 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24464 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24465 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24466 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4
24467 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
24468 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
24469 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24470 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24471 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4
24472 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24473 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24474 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24475 // CHECK18-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24476 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24477 // CHECK18-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24478 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24479 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
24480 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
24481 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24482 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24483 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
24484 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
24485 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24486 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24487 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24488 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24489 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24490 // CHECK18-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24491 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
24492 // CHECK18-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
24493 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
24494 // CHECK18: omp.dispatch.cond:
24495 // CHECK18-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
24496 // CHECK18-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
24497 // CHECK18-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24498 // CHECK18: omp.dispatch.body:
24499 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24500 // CHECK18-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
24501 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24502 // CHECK18: omp.inner.for.cond:
24503 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
24504 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !74
24505 // CHECK18-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
24506 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24507 // CHECK18: omp.inner.for.body:
24508 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
24509 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
24510 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24511 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !74
24512 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !74
24513 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
24514 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !74
24515 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
24516 // CHECK18: omp.body.continue:
24517 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
24518 // CHECK18: omp.inner.for.inc:
24519 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
24520 // CHECK18-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
24521 // CHECK18-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
24522 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP75:![0-9]+]]
24523 // CHECK18: omp.inner.for.end:
24524 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
24525 // CHECK18: omp.dispatch.inc:
24526 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]]
24527 // CHECK18: omp.dispatch.end:
24528 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
24529 // CHECK18-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
24530 // CHECK18-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
24531 // CHECK18: .omp.final.then:
24532 // CHECK18-NEXT: store i32 10, i32* [[I]], align 4
24533 // CHECK18-NEXT: br label [[DOTOMP_FINAL_DONE]]
24534 // CHECK18: .omp.final.done:
24535 // CHECK18-NEXT: ret void
24536 //
24537 //
24538 // CHECK18-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
24539 // CHECK18-SAME: () #[[ATTR5:[0-9]+]] {
24540 // CHECK18-NEXT: entry:
24541 // CHECK18-NEXT: call void @__tgt_register_requires(i64 1)
24542 // CHECK18-NEXT: ret void
24543 //
24544 //
24545 // CHECK19-LABEL: define {{[^@]+}}@main
24546 // CHECK19-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
24547 // CHECK19-NEXT: entry:
24548 // CHECK19-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
24549 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
24550 // CHECK19-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
24551 // CHECK19-NEXT: [[N:%.*]] = alloca i32, align 4
24552 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
24553 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
24554 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4
24555 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
24556 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
24557 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
24558 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
24559 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
24560 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
24561 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
24562 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
24563 // CHECK19-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
24564 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
24565 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
24566 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
24567 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
24568 // CHECK19-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
24569 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
24570 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
24571 // CHECK19-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
24572 // CHECK19-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4
24573 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4
24574 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4
24575 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4
24576 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4
24577 // CHECK19-NEXT: [[_TMP22:%.*]] = alloca i32, align 4
24578 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4
24579 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
24580 // CHECK19-NEXT: [[N_CASTED31:%.*]] = alloca i32, align 4
24581 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4
24582 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4
24583 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4
24584 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4
24585 // CHECK19-NEXT: [[_TMP36:%.*]] = alloca i32, align 4
24586 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4
24587 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
24588 // CHECK19-NEXT: [[M_CASTED45:%.*]] = alloca i32, align 4
24589 // CHECK19-NEXT: [[N_CASTED46:%.*]] = alloca i32, align 4
24590 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4
24591 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4
24592 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4
24593 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4
24594 // CHECK19-NEXT: [[_TMP51:%.*]] = alloca i32, align 4
24595 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4
24596 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4
24597 // CHECK19-NEXT: store i32 0, i32* [[RETVAL]], align 4
24598 // CHECK19-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
24599 // CHECK19-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
24600 // CHECK19-NEXT: store i32 100, i32* [[N]], align 4
24601 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
24602 // CHECK19-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
24603 // CHECK19-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
24604 // CHECK19-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
24605 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
24606 // CHECK19-NEXT: store i32 10, i32* [[M]], align 4
24607 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
24608 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
24609 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
24610 // CHECK19-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
24611 // CHECK19-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
24612 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
24613 // CHECK19-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
24614 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4
24615 // CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
24616 // CHECK19-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
24617 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4
24618 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
24619 // CHECK19-NEXT: store i64 4, i64* [[TMP10]], align 4
24620 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
24621 // CHECK19-NEXT: store i8* null, i8** [[TMP11]], align 4
24622 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
24623 // CHECK19-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
24624 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
24625 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
24626 // CHECK19-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
24627 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
24628 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
24629 // CHECK19-NEXT: store i64 4, i64* [[TMP16]], align 4
24630 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
24631 // CHECK19-NEXT: store i8* null, i8** [[TMP17]], align 4
24632 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
24633 // CHECK19-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
24634 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4
24635 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
24636 // CHECK19-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
24637 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4
24638 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
24639 // CHECK19-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4
24640 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
24641 // CHECK19-NEXT: store i8* null, i8** [[TMP23]], align 4
24642 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
24643 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
24644 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
24645 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
24646 // CHECK19-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
24647 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
24648 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
24649 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
24650 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
24651 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
24652 // CHECK19-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
24653 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
24654 // CHECK19-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
24655 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
24656 // CHECK19-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24657 // CHECK19-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
24658 // CHECK19-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
24659 // CHECK19: omp_offload.failed:
24660 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
24661 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]
24662 // CHECK19: omp_offload.cont:
24663 // CHECK19-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4
24664 // CHECK19-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
24665 // CHECK19-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
24666 // CHECK19-NEXT: [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
24667 // CHECK19-NEXT: [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
24668 // CHECK19-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
24669 // CHECK19-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
24670 // CHECK19-NEXT: store i32 [[TMP34]], i32* [[TMP38]], align 4
24671 // CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
24672 // CHECK19-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
24673 // CHECK19-NEXT: store i32 [[TMP34]], i32* [[TMP40]], align 4
24674 // CHECK19-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
24675 // CHECK19-NEXT: store i64 4, i64* [[TMP41]], align 4
24676 // CHECK19-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
24677 // CHECK19-NEXT: store i8* null, i8** [[TMP42]], align 4
24678 // CHECK19-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
24679 // CHECK19-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
24680 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP44]], align 4
24681 // CHECK19-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
24682 // CHECK19-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
24683 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP46]], align 4
24684 // CHECK19-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
24685 // CHECK19-NEXT: store i64 4, i64* [[TMP47]], align 4
24686 // CHECK19-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
24687 // CHECK19-NEXT: store i8* null, i8** [[TMP48]], align 4
24688 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
24689 // CHECK19-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
24690 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4
24691 // CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
24692 // CHECK19-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
24693 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP52]], align 4
24694 // CHECK19-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
24695 // CHECK19-NEXT: store i64 [[TMP36]], i64* [[TMP53]], align 4
24696 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
24697 // CHECK19-NEXT: store i8* null, i8** [[TMP54]], align 4
24698 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
24699 // CHECK19-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
24700 // CHECK19-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
24701 // CHECK19-NEXT: [[TMP58:%.*]] = load i32, i32* [[N]], align 4
24702 // CHECK19-NEXT: store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
24703 // CHECK19-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
24704 // CHECK19-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
24705 // CHECK19-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
24706 // CHECK19-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
24707 // CHECK19-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
24708 // CHECK19-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
24709 // CHECK19-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
24710 // CHECK19-NEXT: [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
24711 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]])
24712 // CHECK19-NEXT: [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24713 // CHECK19-NEXT: [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
24714 // CHECK19-NEXT: br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
24715 // CHECK19: omp_offload.failed15:
24716 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
24717 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT16]]
24718 // CHECK19: omp_offload.cont16:
24719 // CHECK19-NEXT: [[TMP64:%.*]] = load i32, i32* [[M]], align 4
24720 // CHECK19-NEXT: store i32 [[TMP64]], i32* [[M_CASTED]], align 4
24721 // CHECK19-NEXT: [[TMP65:%.*]] = load i32, i32* [[M_CASTED]], align 4
24722 // CHECK19-NEXT: [[TMP66:%.*]] = load i32, i32* [[N]], align 4
24723 // CHECK19-NEXT: store i32 [[TMP66]], i32* [[N_CASTED17]], align 4
24724 // CHECK19-NEXT: [[TMP67:%.*]] = load i32, i32* [[N_CASTED17]], align 4
24725 // CHECK19-NEXT: [[TMP68:%.*]] = mul nuw i32 [[TMP0]], 4
24726 // CHECK19-NEXT: [[TMP69:%.*]] = sext i32 [[TMP68]] to i64
24727 // CHECK19-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
24728 // CHECK19-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32*
24729 // CHECK19-NEXT: store i32 [[TMP65]], i32* [[TMP71]], align 4
24730 // CHECK19-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
24731 // CHECK19-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32*
24732 // CHECK19-NEXT: store i32 [[TMP65]], i32* [[TMP73]], align 4
24733 // CHECK19-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
24734 // CHECK19-NEXT: store i64 4, i64* [[TMP74]], align 4
24735 // CHECK19-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0
24736 // CHECK19-NEXT: store i8* null, i8** [[TMP75]], align 4
24737 // CHECK19-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1
24738 // CHECK19-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32*
24739 // CHECK19-NEXT: store i32 [[TMP67]], i32* [[TMP77]], align 4
24740 // CHECK19-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1
24741 // CHECK19-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32*
24742 // CHECK19-NEXT: store i32 [[TMP67]], i32* [[TMP79]], align 4
24743 // CHECK19-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1
24744 // CHECK19-NEXT: store i64 4, i64* [[TMP80]], align 4
24745 // CHECK19-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1
24746 // CHECK19-NEXT: store i8* null, i8** [[TMP81]], align 4
24747 // CHECK19-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2
24748 // CHECK19-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32*
24749 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP83]], align 4
24750 // CHECK19-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2
24751 // CHECK19-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32*
24752 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP85]], align 4
24753 // CHECK19-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2
24754 // CHECK19-NEXT: store i64 4, i64* [[TMP86]], align 4
24755 // CHECK19-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2
24756 // CHECK19-NEXT: store i8* null, i8** [[TMP87]], align 4
24757 // CHECK19-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3
24758 // CHECK19-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
24759 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 4
24760 // CHECK19-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3
24761 // CHECK19-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32**
24762 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP91]], align 4
24763 // CHECK19-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3
24764 // CHECK19-NEXT: store i64 [[TMP69]], i64* [[TMP92]], align 4
24765 // CHECK19-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3
24766 // CHECK19-NEXT: store i8* null, i8** [[TMP93]], align 4
24767 // CHECK19-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
24768 // CHECK19-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
24769 // CHECK19-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
24770 // CHECK19-NEXT: [[TMP97:%.*]] = load i32, i32* [[N]], align 4
24771 // CHECK19-NEXT: store i32 [[TMP97]], i32* [[DOTCAPTURE_EXPR_23]], align 4
24772 // CHECK19-NEXT: [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4
24773 // CHECK19-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP98]], 0
24774 // CHECK19-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
24775 // CHECK19-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1
24776 // CHECK19-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4
24777 // CHECK19-NEXT: [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
24778 // CHECK19-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP99]], 1
24779 // CHECK19-NEXT: [[TMP100:%.*]] = zext i32 [[ADD28]] to i64
24780 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP100]])
24781 // CHECK19-NEXT: [[TMP101:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164.region_id, i32 4, i8** [[TMP94]], i8** [[TMP95]], i64* [[TMP96]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24782 // CHECK19-NEXT: [[TMP102:%.*]] = icmp ne i32 [[TMP101]], 0
24783 // CHECK19-NEXT: br i1 [[TMP102]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
24784 // CHECK19: omp_offload.failed29:
24785 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164(i32 [[TMP65]], i32 [[TMP67]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
24786 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT30]]
24787 // CHECK19: omp_offload.cont30:
24788 // CHECK19-NEXT: [[TMP103:%.*]] = load i32, i32* [[N]], align 4
24789 // CHECK19-NEXT: store i32 [[TMP103]], i32* [[N_CASTED31]], align 4
24790 // CHECK19-NEXT: [[TMP104:%.*]] = load i32, i32* [[N_CASTED31]], align 4
24791 // CHECK19-NEXT: [[TMP105:%.*]] = mul nuw i32 [[TMP0]], 4
24792 // CHECK19-NEXT: [[TMP106:%.*]] = sext i32 [[TMP105]] to i64
24793 // CHECK19-NEXT: [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
24794 // CHECK19-NEXT: [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i32*
24795 // CHECK19-NEXT: store i32 [[TMP104]], i32* [[TMP108]], align 4
24796 // CHECK19-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
24797 // CHECK19-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32*
24798 // CHECK19-NEXT: store i32 [[TMP104]], i32* [[TMP110]], align 4
24799 // CHECK19-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
24800 // CHECK19-NEXT: store i64 4, i64* [[TMP111]], align 4
24801 // CHECK19-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0
24802 // CHECK19-NEXT: store i8* null, i8** [[TMP112]], align 4
24803 // CHECK19-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1
24804 // CHECK19-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32*
24805 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP114]], align 4
24806 // CHECK19-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1
24807 // CHECK19-NEXT: [[TMP116:%.*]] = bitcast i8** [[TMP115]] to i32*
24808 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP116]], align 4
24809 // CHECK19-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 1
24810 // CHECK19-NEXT: store i64 4, i64* [[TMP117]], align 4
24811 // CHECK19-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1
24812 // CHECK19-NEXT: store i8* null, i8** [[TMP118]], align 4
24813 // CHECK19-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2
24814 // CHECK19-NEXT: [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32**
24815 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP120]], align 4
24816 // CHECK19-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2
24817 // CHECK19-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32**
24818 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP122]], align 4
24819 // CHECK19-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2
24820 // CHECK19-NEXT: store i64 [[TMP106]], i64* [[TMP123]], align 4
24821 // CHECK19-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2
24822 // CHECK19-NEXT: store i8* null, i8** [[TMP124]], align 4
24823 // CHECK19-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
24824 // CHECK19-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
24825 // CHECK19-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
24826 // CHECK19-NEXT: [[TMP128:%.*]] = load i32, i32* [[N]], align 4
24827 // CHECK19-NEXT: store i32 [[TMP128]], i32* [[DOTCAPTURE_EXPR_37]], align 4
24828 // CHECK19-NEXT: [[TMP129:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4
24829 // CHECK19-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP129]], 0
24830 // CHECK19-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
24831 // CHECK19-NEXT: [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1
24832 // CHECK19-NEXT: store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4
24833 // CHECK19-NEXT: [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4
24834 // CHECK19-NEXT: [[ADD42:%.*]] = add nsw i32 [[TMP130]], 1
24835 // CHECK19-NEXT: [[TMP131:%.*]] = zext i32 [[ADD42]] to i64
24836 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP131]])
24837 // CHECK19-NEXT: [[TMP132:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169.region_id, i32 3, i8** [[TMP125]], i8** [[TMP126]], i64* [[TMP127]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24838 // CHECK19-NEXT: [[TMP133:%.*]] = icmp ne i32 [[TMP132]], 0
24839 // CHECK19-NEXT: br i1 [[TMP133]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]]
24840 // CHECK19: omp_offload.failed43:
24841 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169(i32 [[TMP104]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
24842 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT44]]
24843 // CHECK19: omp_offload.cont44:
24844 // CHECK19-NEXT: [[TMP134:%.*]] = load i32, i32* [[M]], align 4
24845 // CHECK19-NEXT: store i32 [[TMP134]], i32* [[M_CASTED45]], align 4
24846 // CHECK19-NEXT: [[TMP135:%.*]] = load i32, i32* [[M_CASTED45]], align 4
24847 // CHECK19-NEXT: [[TMP136:%.*]] = load i32, i32* [[N]], align 4
24848 // CHECK19-NEXT: store i32 [[TMP136]], i32* [[N_CASTED46]], align 4
24849 // CHECK19-NEXT: [[TMP137:%.*]] = load i32, i32* [[N_CASTED46]], align 4
24850 // CHECK19-NEXT: [[TMP138:%.*]] = mul nuw i32 [[TMP0]], 4
24851 // CHECK19-NEXT: [[TMP139:%.*]] = sext i32 [[TMP138]] to i64
24852 // CHECK19-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
24853 // CHECK19-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32*
24854 // CHECK19-NEXT: store i32 [[TMP135]], i32* [[TMP141]], align 4
24855 // CHECK19-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
24856 // CHECK19-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32*
24857 // CHECK19-NEXT: store i32 [[TMP135]], i32* [[TMP143]], align 4
24858 // CHECK19-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
24859 // CHECK19-NEXT: store i64 4, i64* [[TMP144]], align 4
24860 // CHECK19-NEXT: [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0
24861 // CHECK19-NEXT: store i8* null, i8** [[TMP145]], align 4
24862 // CHECK19-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1
24863 // CHECK19-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32*
24864 // CHECK19-NEXT: store i32 [[TMP137]], i32* [[TMP147]], align 4
24865 // CHECK19-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1
24866 // CHECK19-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32*
24867 // CHECK19-NEXT: store i32 [[TMP137]], i32* [[TMP149]], align 4
24868 // CHECK19-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 1
24869 // CHECK19-NEXT: store i64 4, i64* [[TMP150]], align 4
24870 // CHECK19-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1
24871 // CHECK19-NEXT: store i8* null, i8** [[TMP151]], align 4
24872 // CHECK19-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2
24873 // CHECK19-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
24874 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP153]], align 4
24875 // CHECK19-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2
24876 // CHECK19-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
24877 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP155]], align 4
24878 // CHECK19-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 2
24879 // CHECK19-NEXT: store i64 4, i64* [[TMP156]], align 4
24880 // CHECK19-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2
24881 // CHECK19-NEXT: store i8* null, i8** [[TMP157]], align 4
24882 // CHECK19-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3
24883 // CHECK19-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32**
24884 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP159]], align 4
24885 // CHECK19-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3
24886 // CHECK19-NEXT: [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32**
24887 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP161]], align 4
24888 // CHECK19-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3
24889 // CHECK19-NEXT: store i64 [[TMP139]], i64* [[TMP162]], align 4
24890 // CHECK19-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3
24891 // CHECK19-NEXT: store i8* null, i8** [[TMP163]], align 4
24892 // CHECK19-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
24893 // CHECK19-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
24894 // CHECK19-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
24895 // CHECK19-NEXT: [[TMP167:%.*]] = load i32, i32* [[N]], align 4
24896 // CHECK19-NEXT: store i32 [[TMP167]], i32* [[DOTCAPTURE_EXPR_52]], align 4
24897 // CHECK19-NEXT: [[TMP168:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4
24898 // CHECK19-NEXT: [[SUB54:%.*]] = sub nsw i32 [[TMP168]], 0
24899 // CHECK19-NEXT: [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1
24900 // CHECK19-NEXT: [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1
24901 // CHECK19-NEXT: store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4
24902 // CHECK19-NEXT: [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4
24903 // CHECK19-NEXT: [[ADD57:%.*]] = add nsw i32 [[TMP169]], 1
24904 // CHECK19-NEXT: [[TMP170:%.*]] = zext i32 [[ADD57]] to i64
24905 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP170]])
24906 // CHECK19-NEXT: [[TMP171:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174.region_id, i32 4, i8** [[TMP164]], i8** [[TMP165]], i64* [[TMP166]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24907 // CHECK19-NEXT: [[TMP172:%.*]] = icmp ne i32 [[TMP171]], 0
24908 // CHECK19-NEXT: br i1 [[TMP172]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]]
24909 // CHECK19: omp_offload.failed58:
24910 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174(i32 [[TMP135]], i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
24911 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT59]]
24912 // CHECK19: omp_offload.cont59:
24913 // CHECK19-NEXT: [[TMP173:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
24914 // CHECK19-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP173]])
24915 // CHECK19-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
24916 // CHECK19-NEXT: [[TMP174:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
24917 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP174]])
24918 // CHECK19-NEXT: [[TMP175:%.*]] = load i32, i32* [[RETVAL]], align 4
24919 // CHECK19-NEXT: ret i32 [[TMP175]]
24920 //
24921 //
24922 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154
24923 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
24924 // CHECK19-NEXT: entry:
24925 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
24926 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
24927 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
24928 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
24929 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
24930 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
24931 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
24932 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
24933 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
24934 // CHECK19-NEXT: ret void
24935 //
24936 //
24937 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined.
24938 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
24939 // CHECK19-NEXT: entry:
24940 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24941 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24942 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
24943 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
24944 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
24945 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
24946 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
24947 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
24948 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
24949 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
24950 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24951 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24952 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24953 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24954 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
24955 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24956 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24957 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
24958 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
24959 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
24960 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
24961 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
24962 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
24963 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
24964 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
24965 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
24966 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
24967 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
24968 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
24969 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
24970 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
24971 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
24972 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
24973 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
24974 // CHECK19: omp.precond.then:
24975 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
24976 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
24977 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
24978 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24979 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24980 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24981 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
24982 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24983 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24984 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
24985 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
24986 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24987 // CHECK19: cond.true:
24988 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
24989 // CHECK19-NEXT: br label [[COND_END:%.*]]
24990 // CHECK19: cond.false:
24991 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24992 // CHECK19-NEXT: br label [[COND_END]]
24993 // CHECK19: cond.end:
24994 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
24995 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24996 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24997 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
24998 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
24999 // CHECK19: omp.inner.for.cond:
25000 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
25001 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
25002 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
25003 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25004 // CHECK19: omp.inner.for.body:
25005 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !14
25006 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
25007 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !14
25008 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25009 // CHECK19: omp.inner.for.inc:
25010 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
25011 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !14
25012 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
25013 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
25014 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
25015 // CHECK19: omp.inner.for.end:
25016 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
25017 // CHECK19: omp.loop.exit:
25018 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25019 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
25020 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
25021 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
25022 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
25023 // CHECK19-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25024 // CHECK19: .omp.final.then:
25025 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25026 // CHECK19-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0
25027 // CHECK19-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
25028 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
25029 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
25030 // CHECK19-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
25031 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
25032 // CHECK19: .omp.final.done:
25033 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
25034 // CHECK19: omp.precond.end:
25035 // CHECK19-NEXT: ret void
25036 //
25037 //
25038 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1
25039 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25040 // CHECK19-NEXT: entry:
25041 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25042 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25043 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
25044 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
25045 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
25046 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
25047 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
25048 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25049 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
25050 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25051 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25052 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
25053 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
25054 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
25055 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25056 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25057 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
25058 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25059 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25060 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25061 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25062 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
25063 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25064 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
25065 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25066 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25067 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25068 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25069 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
25070 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25071 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25072 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25073 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25074 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25075 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
25076 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25077 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25078 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25079 // CHECK19: omp.precond.then:
25080 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
25081 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25082 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
25083 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25084 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25085 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
25086 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
25087 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25088 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25089 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25090 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
25091 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25092 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25093 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25094 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
25095 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25096 // CHECK19: cond.true:
25097 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25098 // CHECK19-NEXT: br label [[COND_END:%.*]]
25099 // CHECK19: cond.false:
25100 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25101 // CHECK19-NEXT: br label [[COND_END]]
25102 // CHECK19: cond.end:
25103 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
25104 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
25105 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25106 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
25107 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25108 // CHECK19: omp.inner.for.cond:
25109 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
25110 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
25111 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
25112 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25113 // CHECK19: omp.inner.for.body:
25114 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
25115 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
25116 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25117 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !18
25118 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !18
25119 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
25120 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
25121 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
25122 // CHECK19: omp.body.continue:
25123 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25124 // CHECK19: omp.inner.for.inc:
25125 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
25126 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
25127 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
25128 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
25129 // CHECK19: omp.inner.for.end:
25130 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
25131 // CHECK19: omp.loop.exit:
25132 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25133 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
25134 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
25135 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
25136 // CHECK19-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
25137 // CHECK19-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25138 // CHECK19: .omp.final.then:
25139 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25140 // CHECK19-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0
25141 // CHECK19-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
25142 // CHECK19-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
25143 // CHECK19-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
25144 // CHECK19-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
25145 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
25146 // CHECK19: .omp.final.done:
25147 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
25148 // CHECK19: omp.precond.end:
25149 // CHECK19-NEXT: ret void
25150 //
25151 //
25152 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159
25153 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25154 // CHECK19-NEXT: entry:
25155 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
25156 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
25157 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
25158 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
25159 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25160 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
25161 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25162 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25163 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
25164 // CHECK19-NEXT: ret void
25165 //
25166 //
25167 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..2
25168 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25169 // CHECK19-NEXT: entry:
25170 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25171 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25172 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
25173 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
25174 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
25175 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25176 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
25177 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25178 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25179 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
25180 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
25181 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
25182 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25183 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25184 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
25185 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25186 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25187 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
25188 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25189 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
25190 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25191 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25192 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25193 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25194 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
25195 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25196 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25197 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25198 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25199 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25200 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
25201 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25202 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25203 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25204 // CHECK19: omp.precond.then:
25205 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
25206 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25207 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
25208 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25209 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25210 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25211 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
25212 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25213 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25214 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25215 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
25216 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25217 // CHECK19: cond.true:
25218 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25219 // CHECK19-NEXT: br label [[COND_END:%.*]]
25220 // CHECK19: cond.false:
25221 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25222 // CHECK19-NEXT: br label [[COND_END]]
25223 // CHECK19: cond.end:
25224 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
25225 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
25226 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25227 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
25228 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25229 // CHECK19: omp.inner.for.cond:
25230 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
25231 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
25232 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
25233 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25234 // CHECK19: omp.inner.for.body:
25235 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23
25236 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
25237 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !23
25238 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25239 // CHECK19: omp.inner.for.inc:
25240 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
25241 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23
25242 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
25243 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
25244 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
25245 // CHECK19: omp.inner.for.end:
25246 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
25247 // CHECK19: omp.loop.exit:
25248 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25249 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
25250 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
25251 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
25252 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
25253 // CHECK19-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25254 // CHECK19: .omp.final.then:
25255 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25256 // CHECK19-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0
25257 // CHECK19-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
25258 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
25259 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
25260 // CHECK19-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
25261 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
25262 // CHECK19: .omp.final.done:
25263 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
25264 // CHECK19: omp.precond.end:
25265 // CHECK19-NEXT: ret void
25266 //
25267 //
25268 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..3
25269 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25270 // CHECK19-NEXT: entry:
25271 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25272 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25273 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
25274 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
25275 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
25276 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
25277 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
25278 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25279 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
25280 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25281 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25282 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
25283 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
25284 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
25285 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25286 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25287 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
25288 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25289 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25290 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25291 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25292 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
25293 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25294 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
25295 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25296 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25297 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25298 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25299 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
25300 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25301 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25302 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25303 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25304 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25305 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
25306 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25307 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25308 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25309 // CHECK19: omp.precond.then:
25310 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
25311 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25312 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
25313 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25314 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25315 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
25316 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
25317 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25318 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25319 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25320 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
25321 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25322 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25323 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25324 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
25325 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25326 // CHECK19: cond.true:
25327 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25328 // CHECK19-NEXT: br label [[COND_END:%.*]]
25329 // CHECK19: cond.false:
25330 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25331 // CHECK19-NEXT: br label [[COND_END]]
25332 // CHECK19: cond.end:
25333 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
25334 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
25335 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25336 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
25337 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25338 // CHECK19: omp.inner.for.cond:
25339 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
25340 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26
25341 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
25342 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25343 // CHECK19: omp.inner.for.body:
25344 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
25345 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
25346 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25347 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !26
25348 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !26
25349 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
25350 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26
25351 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
25352 // CHECK19: omp.body.continue:
25353 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25354 // CHECK19: omp.inner.for.inc:
25355 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
25356 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
25357 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
25358 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
25359 // CHECK19: omp.inner.for.end:
25360 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
25361 // CHECK19: omp.loop.exit:
25362 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25363 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
25364 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
25365 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
25366 // CHECK19-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
25367 // CHECK19-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25368 // CHECK19: .omp.final.then:
25369 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25370 // CHECK19-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0
25371 // CHECK19-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
25372 // CHECK19-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
25373 // CHECK19-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
25374 // CHECK19-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
25375 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
25376 // CHECK19: .omp.final.done:
25377 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
25378 // CHECK19: omp.precond.end:
25379 // CHECK19-NEXT: ret void
25380 //
25381 //
25382 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164
25383 // CHECK19-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25384 // CHECK19-NEXT: entry:
25385 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
25386 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
25387 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
25388 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
25389 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25390 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
25391 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
25392 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
25393 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25394 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
25395 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25396 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25397 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
25398 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
25399 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25400 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25401 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25402 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
25403 // CHECK19-NEXT: ret void
25404 //
25405 //
25406 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..5
25407 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
25408 // CHECK19-NEXT: entry:
25409 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25410 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25411 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
25412 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
25413 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
25414 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
25415 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25416 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
25417 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25418 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
25419 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
25420 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
25421 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
25422 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25423 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25424 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4
25425 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
25426 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25427 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25428 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
25429 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25430 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
25431 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25432 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25433 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25434 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25435 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25436 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25437 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25438 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25439 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25440 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
25441 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
25442 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
25443 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25444 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25445 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25446 // CHECK19: omp.precond.then:
25447 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
25448 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25449 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
25450 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25451 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25452 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25453 // CHECK19-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25454 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
25455 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
25456 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25457 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25458 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
25459 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25460 // CHECK19: cond.true:
25461 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25462 // CHECK19-NEXT: br label [[COND_END:%.*]]
25463 // CHECK19: cond.false:
25464 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25465 // CHECK19-NEXT: br label [[COND_END]]
25466 // CHECK19: cond.end:
25467 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
25468 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
25469 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25470 // CHECK19-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
25471 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25472 // CHECK19: omp.inner.for.cond:
25473 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
25474 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
25475 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
25476 // CHECK19-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
25477 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25478 // CHECK19: omp.inner.for.body:
25479 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
25480 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
25481 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !29
25482 // CHECK19-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !29
25483 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !29
25484 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]]), !llvm.access.group !29
25485 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25486 // CHECK19: omp.inner.for.inc:
25487 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
25488 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
25489 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
25490 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
25491 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
25492 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
25493 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
25494 // CHECK19-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
25495 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
25496 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
25497 // CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
25498 // CHECK19-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
25499 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
25500 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
25501 // CHECK19-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]
25502 // CHECK19-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
25503 // CHECK19: cond.true11:
25504 // CHECK19-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
25505 // CHECK19-NEXT: br label [[COND_END13:%.*]]
25506 // CHECK19: cond.false12:
25507 // CHECK19-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
25508 // CHECK19-NEXT: br label [[COND_END13]]
25509 // CHECK19: cond.end13:
25510 // CHECK19-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]
25511 // CHECK19-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
25512 // CHECK19-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
25513 // CHECK19-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
25514 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
25515 // CHECK19: omp.inner.for.end:
25516 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
25517 // CHECK19: omp.loop.exit:
25518 // CHECK19-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25519 // CHECK19-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
25520 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
25521 // CHECK19-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
25522 // CHECK19-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
25523 // CHECK19-NEXT: br i1 [[TMP35]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25524 // CHECK19: .omp.final.then:
25525 // CHECK19-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25526 // CHECK19-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP36]], 0
25527 // CHECK19-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
25528 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
25529 // CHECK19-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
25530 // CHECK19-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
25531 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
25532 // CHECK19: .omp.final.done:
25533 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
25534 // CHECK19: omp.precond.end:
25535 // CHECK19-NEXT: ret void
25536 //
25537 //
25538 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..6
25539 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
25540 // CHECK19-NEXT: entry:
25541 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25542 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25543 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
25544 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
25545 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
25546 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
25547 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
25548 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
25549 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25550 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
25551 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25552 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
25553 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
25554 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
25555 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
25556 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25557 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25558 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4
25559 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25560 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25561 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25562 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25563 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
25564 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25565 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
25566 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25567 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25568 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25569 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25570 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25571 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25572 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25573 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25574 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25575 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
25576 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
25577 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
25578 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25579 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25580 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25581 // CHECK19: omp.precond.then:
25582 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
25583 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25584 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
25585 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25586 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25587 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
25588 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
25589 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25590 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25591 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25592 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
25593 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25594 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25595 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25596 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
25597 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25598 // CHECK19: cond.true:
25599 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25600 // CHECK19-NEXT: br label [[COND_END:%.*]]
25601 // CHECK19: cond.false:
25602 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25603 // CHECK19-NEXT: br label [[COND_END]]
25604 // CHECK19: cond.end:
25605 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
25606 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
25607 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25608 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
25609 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25610 // CHECK19: omp.inner.for.cond:
25611 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
25612 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32
25613 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
25614 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25615 // CHECK19: omp.inner.for.body:
25616 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
25617 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
25618 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25619 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !32
25620 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !32
25621 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
25622 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !32
25623 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
25624 // CHECK19: omp.body.continue:
25625 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25626 // CHECK19: omp.inner.for.inc:
25627 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
25628 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
25629 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
25630 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
25631 // CHECK19: omp.inner.for.end:
25632 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
25633 // CHECK19: omp.loop.exit:
25634 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25635 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
25636 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
25637 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
25638 // CHECK19-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
25639 // CHECK19-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25640 // CHECK19: .omp.final.then:
25641 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25642 // CHECK19-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
25643 // CHECK19-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
25644 // CHECK19-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
25645 // CHECK19-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
25646 // CHECK19-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4
25647 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
25648 // CHECK19: .omp.final.done:
25649 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
25650 // CHECK19: omp.precond.end:
25651 // CHECK19-NEXT: ret void
25652 //
25653 //
25654 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169
25655 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25656 // CHECK19-NEXT: entry:
25657 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
25658 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
25659 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
25660 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
25661 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25662 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
25663 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25664 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25665 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
25666 // CHECK19-NEXT: ret void
25667 //
25668 //
25669 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..8
25670 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25671 // CHECK19-NEXT: entry:
25672 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25673 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25674 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
25675 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
25676 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
25677 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25678 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
25679 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25680 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25681 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
25682 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
25683 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
25684 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25685 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25686 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
25687 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25688 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25689 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
25690 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25691 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
25692 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25693 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25694 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25695 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25696 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
25697 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25698 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25699 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25700 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25701 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25702 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
25703 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25704 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25705 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25706 // CHECK19: omp.precond.then:
25707 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
25708 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25709 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
25710 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25711 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25712 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25713 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
25714 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25715 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25716 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25717 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
25718 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25719 // CHECK19: cond.true:
25720 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25721 // CHECK19-NEXT: br label [[COND_END:%.*]]
25722 // CHECK19: cond.false:
25723 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25724 // CHECK19-NEXT: br label [[COND_END]]
25725 // CHECK19: cond.end:
25726 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
25727 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
25728 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25729 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
25730 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25731 // CHECK19: omp.inner.for.cond:
25732 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
25733 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
25734 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
25735 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25736 // CHECK19: omp.inner.for.body:
25737 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !35
25738 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
25739 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !35
25740 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25741 // CHECK19: omp.inner.for.inc:
25742 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
25743 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !35
25744 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
25745 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
25746 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
25747 // CHECK19: omp.inner.for.end:
25748 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
25749 // CHECK19: omp.loop.exit:
25750 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25751 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
25752 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
25753 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
25754 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
25755 // CHECK19-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25756 // CHECK19: .omp.final.then:
25757 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25758 // CHECK19-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0
25759 // CHECK19-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
25760 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
25761 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
25762 // CHECK19-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
25763 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
25764 // CHECK19: .omp.final.done:
25765 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
25766 // CHECK19: omp.precond.end:
25767 // CHECK19-NEXT: ret void
25768 //
25769 //
25770 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..9
25771 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25772 // CHECK19-NEXT: entry:
25773 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25774 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25775 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
25776 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
25777 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
25778 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
25779 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
25780 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25781 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
25782 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25783 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25784 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
25785 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
25786 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
25787 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25788 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25789 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
25790 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25791 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25792 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25793 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25794 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
25795 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25796 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
25797 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25798 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25799 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25800 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25801 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
25802 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25803 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25804 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25805 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25806 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25807 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
25808 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25809 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25810 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25811 // CHECK19: omp.precond.then:
25812 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
25813 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25814 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
25815 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25816 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25817 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
25818 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
25819 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25820 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25821 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25822 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25823 // CHECK19-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25824 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
25825 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
25826 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
25827 // CHECK19: omp.dispatch.cond:
25828 // CHECK19-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25829 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
25830 // CHECK19-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
25831 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
25832 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
25833 // CHECK19: omp.dispatch.body:
25834 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25835 // CHECK19-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
25836 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25837 // CHECK19: omp.inner.for.cond:
25838 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
25839 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38
25840 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
25841 // CHECK19-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25842 // CHECK19: omp.inner.for.body:
25843 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
25844 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
25845 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25846 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !38
25847 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !38
25848 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]]
25849 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !38
25850 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
25851 // CHECK19: omp.body.continue:
25852 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25853 // CHECK19: omp.inner.for.inc:
25854 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
25855 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1
25856 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
25857 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
25858 // CHECK19: omp.inner.for.end:
25859 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
25860 // CHECK19: omp.dispatch.inc:
25861 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
25862 // CHECK19: omp.dispatch.end:
25863 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
25864 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
25865 // CHECK19-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25866 // CHECK19: .omp.final.then:
25867 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25868 // CHECK19-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0
25869 // CHECK19-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
25870 // CHECK19-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
25871 // CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
25872 // CHECK19-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
25873 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
25874 // CHECK19: .omp.final.done:
25875 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
25876 // CHECK19: omp.precond.end:
25877 // CHECK19-NEXT: ret void
25878 //
25879 //
25880 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174
25881 // CHECK19-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25882 // CHECK19-NEXT: entry:
25883 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
25884 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
25885 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
25886 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
25887 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25888 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
25889 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
25890 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
25891 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25892 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
25893 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25894 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25895 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
25896 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
25897 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25898 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25899 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25900 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
25901 // CHECK19-NEXT: ret void
25902 //
25903 //
25904 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..11
25905 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
25906 // CHECK19-NEXT: entry:
25907 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25908 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25909 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
25910 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
25911 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
25912 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
25913 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
25914 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
25915 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25916 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
25917 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
25918 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
25919 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
25920 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25921 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25922 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4
25923 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
25924 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25925 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25926 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
25927 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25928 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
25929 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25930 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25931 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25932 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25933 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25934 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25935 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25936 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25937 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25938 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
25939 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
25940 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
25941 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25942 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25943 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25944 // CHECK19: omp.precond.then:
25945 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
25946 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25947 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
25948 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25949 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25950 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25951 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
25952 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25953 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25954 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25955 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
25956 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25957 // CHECK19: cond.true:
25958 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25959 // CHECK19-NEXT: br label [[COND_END:%.*]]
25960 // CHECK19: cond.false:
25961 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25962 // CHECK19-NEXT: br label [[COND_END]]
25963 // CHECK19: cond.end:
25964 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
25965 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
25966 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25967 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
25968 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
25969 // CHECK19: omp.inner.for.cond:
25970 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
25971 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !41
25972 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
25973 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25974 // CHECK19: omp.inner.for.body:
25975 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !41
25976 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !41
25977 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !41
25978 // CHECK19-NEXT: store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !41
25979 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !41
25980 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]]), !llvm.access.group !41
25981 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
25982 // CHECK19: omp.inner.for.inc:
25983 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
25984 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !41
25985 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
25986 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
25987 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
25988 // CHECK19: omp.inner.for.end:
25989 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
25990 // CHECK19: omp.loop.exit:
25991 // CHECK19-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25992 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
25993 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
25994 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
25995 // CHECK19-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
25996 // CHECK19-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
25997 // CHECK19: .omp.final.then:
25998 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25999 // CHECK19-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0
26000 // CHECK19-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
26001 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
26002 // CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
26003 // CHECK19-NEXT: store i32 [[ADD9]], i32* [[I4]], align 4
26004 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
26005 // CHECK19: .omp.final.done:
26006 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
26007 // CHECK19: omp.precond.end:
26008 // CHECK19-NEXT: ret void
26009 //
26010 //
26011 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..12
26012 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26013 // CHECK19-NEXT: entry:
26014 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26015 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26016 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26017 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26018 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
26019 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
26020 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
26021 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26022 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26023 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
26024 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
26025 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
26026 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
26027 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26028 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26029 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26030 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26031 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4
26032 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26033 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26034 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26035 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26036 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
26037 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
26038 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
26039 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26040 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
26041 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
26042 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
26043 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
26044 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
26045 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
26046 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
26047 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
26048 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
26049 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
26050 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
26051 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
26052 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
26053 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
26054 // CHECK19: omp.precond.then:
26055 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
26056 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
26057 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
26058 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26059 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26060 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
26061 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
26062 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26063 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26064 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26065 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26066 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26067 // CHECK19-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26068 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
26069 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
26070 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
26071 // CHECK19: omp.dispatch.cond:
26072 // CHECK19-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26073 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
26074 // CHECK19-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
26075 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
26076 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26077 // CHECK19: omp.dispatch.body:
26078 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26079 // CHECK19-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
26080 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26081 // CHECK19: omp.inner.for.cond:
26082 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
26083 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !44
26084 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
26085 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26086 // CHECK19: omp.inner.for.body:
26087 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
26088 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
26089 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26090 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !44
26091 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !44
26092 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]]
26093 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !44
26094 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26095 // CHECK19: omp.body.continue:
26096 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26097 // CHECK19: omp.inner.for.inc:
26098 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
26099 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1
26100 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
26101 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
26102 // CHECK19: omp.inner.for.end:
26103 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
26104 // CHECK19: omp.dispatch.inc:
26105 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
26106 // CHECK19: omp.dispatch.end:
26107 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
26108 // CHECK19-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
26109 // CHECK19-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
26110 // CHECK19: .omp.final.then:
26111 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
26112 // CHECK19-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0
26113 // CHECK19-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
26114 // CHECK19-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
26115 // CHECK19-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
26116 // CHECK19-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
26117 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
26118 // CHECK19: .omp.final.done:
26119 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
26120 // CHECK19: omp.precond.end:
26121 // CHECK19-NEXT: ret void
26122 //
26123 //
26124 // CHECK19-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
26125 // CHECK19-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
26126 // CHECK19-NEXT: entry:
26127 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
26128 // CHECK19-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
26129 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4
26130 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
26131 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
26132 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
26133 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
26134 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
26135 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
26136 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
26137 // CHECK19-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
26138 // CHECK19-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
26139 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4
26140 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4
26141 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4
26142 // CHECK19-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
26143 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4
26144 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4
26145 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4
26146 // CHECK19-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
26147 // CHECK19-NEXT: [[M_CASTED19:%.*]] = alloca i32, align 4
26148 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4
26149 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4
26150 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4
26151 // CHECK19-NEXT: [[_TMP23:%.*]] = alloca i32, align 4
26152 // CHECK19-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
26153 // CHECK19-NEXT: store i32 10, i32* [[M]], align 4
26154 // CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
26155 // CHECK19-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
26156 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
26157 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
26158 // CHECK19-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
26159 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
26160 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
26161 // CHECK19-NEXT: store i8* null, i8** [[TMP4]], align 4
26162 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
26163 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
26164 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26165 // CHECK19-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26166 // CHECK19-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
26167 // CHECK19-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
26168 // CHECK19: omp_offload.failed:
26169 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122([10 x i32]* [[A]]) #[[ATTR3]]
26170 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]
26171 // CHECK19: omp_offload.cont:
26172 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
26173 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
26174 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
26175 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
26176 // CHECK19-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
26177 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
26178 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
26179 // CHECK19-NEXT: store i8* null, i8** [[TMP13]], align 4
26180 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
26181 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
26182 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26183 // CHECK19-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26184 // CHECK19-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
26185 // CHECK19-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
26186 // CHECK19: omp_offload.failed5:
26187 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127([10 x i32]* [[A]]) #[[ATTR3]]
26188 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT6]]
26189 // CHECK19: omp_offload.cont6:
26190 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4
26191 // CHECK19-NEXT: store i32 [[TMP18]], i32* [[M_CASTED]], align 4
26192 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4
26193 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
26194 // CHECK19-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
26195 // CHECK19-NEXT: store i32 [[TMP19]], i32* [[TMP21]], align 4
26196 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
26197 // CHECK19-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
26198 // CHECK19-NEXT: store i32 [[TMP19]], i32* [[TMP23]], align 4
26199 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
26200 // CHECK19-NEXT: store i8* null, i8** [[TMP24]], align 4
26201 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
26202 // CHECK19-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
26203 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4
26204 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
26205 // CHECK19-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
26206 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4
26207 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1
26208 // CHECK19-NEXT: store i8* null, i8** [[TMP29]], align 4
26209 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
26210 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
26211 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26212 // CHECK19-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26213 // CHECK19-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
26214 // CHECK19-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
26215 // CHECK19: omp_offload.failed11:
26216 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
26217 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT12]]
26218 // CHECK19: omp_offload.cont12:
26219 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
26220 // CHECK19-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
26221 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4
26222 // CHECK19-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
26223 // CHECK19-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
26224 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4
26225 // CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
26226 // CHECK19-NEXT: store i8* null, i8** [[TMP38]], align 4
26227 // CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
26228 // CHECK19-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
26229 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26230 // CHECK19-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26231 // CHECK19-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
26232 // CHECK19-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
26233 // CHECK19: omp_offload.failed17:
26234 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137([10 x i32]* [[A]]) #[[ATTR3]]
26235 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT18]]
26236 // CHECK19: omp_offload.cont18:
26237 // CHECK19-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4
26238 // CHECK19-NEXT: store i32 [[TMP43]], i32* [[M_CASTED19]], align 4
26239 // CHECK19-NEXT: [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4
26240 // CHECK19-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
26241 // CHECK19-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
26242 // CHECK19-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4
26243 // CHECK19-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
26244 // CHECK19-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
26245 // CHECK19-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4
26246 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
26247 // CHECK19-NEXT: store i8* null, i8** [[TMP49]], align 4
26248 // CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
26249 // CHECK19-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
26250 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4
26251 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
26252 // CHECK19-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
26253 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4
26254 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
26255 // CHECK19-NEXT: store i8* null, i8** [[TMP54]], align 4
26256 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
26257 // CHECK19-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
26258 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26259 // CHECK19-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26260 // CHECK19-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
26261 // CHECK19-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
26262 // CHECK19: omp_offload.failed24:
26263 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
26264 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT25]]
26265 // CHECK19: omp_offload.cont25:
26266 // CHECK19-NEXT: ret i32 0
26267 //
26268 //
26269 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122
26270 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26271 // CHECK19-NEXT: entry:
26272 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26273 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26274 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26275 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
26276 // CHECK19-NEXT: ret void
26277 //
26278 //
26279 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..14
26280 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26281 // CHECK19-NEXT: entry:
26282 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26283 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26284 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26285 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26286 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
26287 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26288 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26289 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26290 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26291 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
26292 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26293 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26294 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26295 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26296 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26297 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26298 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26299 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26300 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26301 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26302 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26303 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26304 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26305 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26306 // CHECK19: cond.true:
26307 // CHECK19-NEXT: br label [[COND_END:%.*]]
26308 // CHECK19: cond.false:
26309 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26310 // CHECK19-NEXT: br label [[COND_END]]
26311 // CHECK19: cond.end:
26312 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26313 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26314 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26315 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26316 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26317 // CHECK19: omp.inner.for.cond:
26318 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
26319 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !47
26320 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
26321 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26322 // CHECK19: omp.inner.for.body:
26323 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !47
26324 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !47
26325 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !47
26326 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26327 // CHECK19: omp.inner.for.inc:
26328 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
26329 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !47
26330 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
26331 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
26332 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
26333 // CHECK19: omp.inner.for.end:
26334 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
26335 // CHECK19: omp.loop.exit:
26336 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
26337 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
26338 // CHECK19-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
26339 // CHECK19-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
26340 // CHECK19: .omp.final.then:
26341 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
26342 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
26343 // CHECK19: .omp.final.done:
26344 // CHECK19-NEXT: ret void
26345 //
26346 //
26347 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..15
26348 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26349 // CHECK19-NEXT: entry:
26350 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26351 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26352 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26353 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26354 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26355 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26356 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
26357 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26358 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26359 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26360 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26361 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
26362 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26363 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26364 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26365 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26366 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26367 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26368 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
26369 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
26370 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26371 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26372 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
26373 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
26374 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26375 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26376 // CHECK19-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26377 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
26378 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26379 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26380 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
26381 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26382 // CHECK19: cond.true:
26383 // CHECK19-NEXT: br label [[COND_END:%.*]]
26384 // CHECK19: cond.false:
26385 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26386 // CHECK19-NEXT: br label [[COND_END]]
26387 // CHECK19: cond.end:
26388 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
26389 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
26390 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26391 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
26392 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26393 // CHECK19: omp.inner.for.cond:
26394 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
26395 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !50
26396 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
26397 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26398 // CHECK19: omp.inner.for.body:
26399 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
26400 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
26401 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26402 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !50
26403 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !50
26404 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
26405 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !50
26406 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26407 // CHECK19: omp.body.continue:
26408 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26409 // CHECK19: omp.inner.for.inc:
26410 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
26411 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
26412 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
26413 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
26414 // CHECK19: omp.inner.for.end:
26415 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
26416 // CHECK19: omp.loop.exit:
26417 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
26418 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
26419 // CHECK19-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
26420 // CHECK19-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
26421 // CHECK19: .omp.final.then:
26422 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
26423 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
26424 // CHECK19: .omp.final.done:
26425 // CHECK19-NEXT: ret void
26426 //
26427 //
26428 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127
26429 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26430 // CHECK19-NEXT: entry:
26431 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26432 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26433 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26434 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
26435 // CHECK19-NEXT: ret void
26436 //
26437 //
26438 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..17
26439 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26440 // CHECK19-NEXT: entry:
26441 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26442 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26443 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26444 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26445 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
26446 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26447 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26448 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26449 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26450 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
26451 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26452 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26453 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26454 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26455 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26456 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26457 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26458 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26459 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26460 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26461 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26462 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26463 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26464 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26465 // CHECK19: cond.true:
26466 // CHECK19-NEXT: br label [[COND_END:%.*]]
26467 // CHECK19: cond.false:
26468 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26469 // CHECK19-NEXT: br label [[COND_END]]
26470 // CHECK19: cond.end:
26471 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26472 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26473 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26474 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26475 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26476 // CHECK19: omp.inner.for.cond:
26477 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
26478 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !53
26479 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
26480 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26481 // CHECK19: omp.inner.for.body:
26482 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !53
26483 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !53
26484 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !53
26485 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26486 // CHECK19: omp.inner.for.inc:
26487 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
26488 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !53
26489 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
26490 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
26491 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
26492 // CHECK19: omp.inner.for.end:
26493 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
26494 // CHECK19: omp.loop.exit:
26495 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
26496 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
26497 // CHECK19-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
26498 // CHECK19-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
26499 // CHECK19: .omp.final.then:
26500 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
26501 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
26502 // CHECK19: .omp.final.done:
26503 // CHECK19-NEXT: ret void
26504 //
26505 //
26506 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..18
26507 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26508 // CHECK19-NEXT: entry:
26509 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26510 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26511 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26512 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26513 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26514 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26515 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
26516 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26517 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26518 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26519 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26520 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
26521 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26522 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26523 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26524 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26525 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26526 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26527 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
26528 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
26529 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26530 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26531 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
26532 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
26533 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26534 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26535 // CHECK19-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26536 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
26537 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26538 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26539 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
26540 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26541 // CHECK19: cond.true:
26542 // CHECK19-NEXT: br label [[COND_END:%.*]]
26543 // CHECK19: cond.false:
26544 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26545 // CHECK19-NEXT: br label [[COND_END]]
26546 // CHECK19: cond.end:
26547 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
26548 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
26549 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26550 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
26551 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26552 // CHECK19: omp.inner.for.cond:
26553 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
26554 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !56
26555 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
26556 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26557 // CHECK19: omp.inner.for.body:
26558 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
26559 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
26560 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26561 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !56
26562 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !56
26563 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
26564 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !56
26565 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26566 // CHECK19: omp.body.continue:
26567 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26568 // CHECK19: omp.inner.for.inc:
26569 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
26570 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
26571 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
26572 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
26573 // CHECK19: omp.inner.for.end:
26574 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
26575 // CHECK19: omp.loop.exit:
26576 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
26577 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
26578 // CHECK19-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
26579 // CHECK19-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
26580 // CHECK19: .omp.final.then:
26581 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
26582 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
26583 // CHECK19: .omp.final.done:
26584 // CHECK19-NEXT: ret void
26585 //
26586 //
26587 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132
26588 // CHECK19-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26589 // CHECK19-NEXT: entry:
26590 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
26591 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26592 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
26593 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26594 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
26595 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26596 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26597 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
26598 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
26599 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
26600 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26601 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26602 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
26603 // CHECK19-NEXT: ret void
26604 //
26605 //
26606 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..21
26607 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26608 // CHECK19-NEXT: entry:
26609 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26610 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26611 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26612 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26613 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26614 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
26615 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26616 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26617 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26618 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26619 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
26620 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26621 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26622 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26623 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26624 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26625 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26626 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26627 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26628 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26629 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26630 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26631 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26632 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26633 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26634 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26635 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26636 // CHECK19: cond.true:
26637 // CHECK19-NEXT: br label [[COND_END:%.*]]
26638 // CHECK19: cond.false:
26639 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26640 // CHECK19-NEXT: br label [[COND_END]]
26641 // CHECK19: cond.end:
26642 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26643 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26644 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26645 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26646 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26647 // CHECK19: omp.inner.for.cond:
26648 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
26649 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !59
26650 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
26651 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26652 // CHECK19: omp.inner.for.body:
26653 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !59
26654 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !59
26655 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !59
26656 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !59
26657 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !59
26658 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]), !llvm.access.group !59
26659 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26660 // CHECK19: omp.inner.for.inc:
26661 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
26662 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !59
26663 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
26664 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
26665 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
26666 // CHECK19: omp.inner.for.end:
26667 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
26668 // CHECK19: omp.loop.exit:
26669 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
26670 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
26671 // CHECK19-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
26672 // CHECK19-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
26673 // CHECK19: .omp.final.then:
26674 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
26675 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
26676 // CHECK19: .omp.final.done:
26677 // CHECK19-NEXT: ret void
26678 //
26679 //
26680 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..22
26681 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26682 // CHECK19-NEXT: entry:
26683 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26684 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26685 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26686 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26687 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26688 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26689 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26690 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
26691 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26692 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26693 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26694 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26695 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
26696 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26697 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26698 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26699 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26700 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26701 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26702 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26703 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
26704 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
26705 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26706 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26707 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
26708 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
26709 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26710 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26711 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26712 // CHECK19-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26713 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
26714 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
26715 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
26716 // CHECK19: omp.dispatch.cond:
26717 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26718 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26719 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
26720 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26721 // CHECK19: cond.true:
26722 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26723 // CHECK19-NEXT: br label [[COND_END:%.*]]
26724 // CHECK19: cond.false:
26725 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26726 // CHECK19-NEXT: br label [[COND_END]]
26727 // CHECK19: cond.end:
26728 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
26729 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
26730 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26731 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
26732 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26733 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26734 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
26735 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26736 // CHECK19: omp.dispatch.body:
26737 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26738 // CHECK19: omp.inner.for.cond:
26739 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
26740 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !62
26741 // CHECK19-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
26742 // CHECK19-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26743 // CHECK19: omp.inner.for.body:
26744 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
26745 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
26746 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26747 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !62
26748 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !62
26749 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
26750 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !62
26751 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26752 // CHECK19: omp.body.continue:
26753 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26754 // CHECK19: omp.inner.for.inc:
26755 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
26756 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
26757 // CHECK19-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
26758 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP63:![0-9]+]]
26759 // CHECK19: omp.inner.for.end:
26760 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
26761 // CHECK19: omp.dispatch.inc:
26762 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26763 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26764 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
26765 // CHECK19-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
26766 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26767 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26768 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
26769 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
26770 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
26771 // CHECK19: omp.dispatch.end:
26772 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
26773 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
26774 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
26775 // CHECK19-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
26776 // CHECK19: .omp.final.then:
26777 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
26778 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
26779 // CHECK19: .omp.final.done:
26780 // CHECK19-NEXT: ret void
26781 //
26782 //
26783 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137
26784 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26785 // CHECK19-NEXT: entry:
26786 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26787 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26788 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26789 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
26790 // CHECK19-NEXT: ret void
26791 //
26792 //
26793 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..25
26794 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26795 // CHECK19-NEXT: entry:
26796 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26797 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26798 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26799 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26800 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
26801 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26802 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26803 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26804 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26805 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
26806 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26807 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26808 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26809 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26810 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26811 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26812 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26813 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26814 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26815 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26816 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26817 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26818 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26819 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26820 // CHECK19: cond.true:
26821 // CHECK19-NEXT: br label [[COND_END:%.*]]
26822 // CHECK19: cond.false:
26823 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26824 // CHECK19-NEXT: br label [[COND_END]]
26825 // CHECK19: cond.end:
26826 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26827 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26828 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26829 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26830 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26831 // CHECK19: omp.inner.for.cond:
26832 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
26833 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !65
26834 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
26835 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26836 // CHECK19: omp.inner.for.body:
26837 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !65
26838 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !65
26839 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !65
26840 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26841 // CHECK19: omp.inner.for.inc:
26842 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
26843 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !65
26844 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
26845 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
26846 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP66:![0-9]+]]
26847 // CHECK19: omp.inner.for.end:
26848 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
26849 // CHECK19: omp.loop.exit:
26850 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
26851 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
26852 // CHECK19-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
26853 // CHECK19-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
26854 // CHECK19: .omp.final.then:
26855 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
26856 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
26857 // CHECK19: .omp.final.done:
26858 // CHECK19-NEXT: ret void
26859 //
26860 //
26861 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..26
26862 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26863 // CHECK19-NEXT: entry:
26864 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26865 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26866 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26867 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26868 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26869 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26870 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
26871 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
26872 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
26873 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26874 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26875 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
26876 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26877 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26878 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26879 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26880 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26881 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26882 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
26883 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
26884 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26885 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26886 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
26887 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
26888 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26889 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26890 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26891 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26892 // CHECK19-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26893 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
26894 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
26895 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
26896 // CHECK19: omp.dispatch.cond:
26897 // CHECK19-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
26898 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
26899 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26900 // CHECK19: omp.dispatch.body:
26901 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26902 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
26903 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
26904 // CHECK19: omp.inner.for.cond:
26905 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
26906 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !68
26907 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
26908 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26909 // CHECK19: omp.inner.for.body:
26910 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
26911 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
26912 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26913 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !68
26914 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !68
26915 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
26916 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !68
26917 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
26918 // CHECK19: omp.body.continue:
26919 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
26920 // CHECK19: omp.inner.for.inc:
26921 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
26922 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
26923 // CHECK19-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
26924 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP69:![0-9]+]]
26925 // CHECK19: omp.inner.for.end:
26926 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
26927 // CHECK19: omp.dispatch.inc:
26928 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
26929 // CHECK19: omp.dispatch.end:
26930 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
26931 // CHECK19-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
26932 // CHECK19-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
26933 // CHECK19: .omp.final.then:
26934 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
26935 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
26936 // CHECK19: .omp.final.done:
26937 // CHECK19-NEXT: ret void
26938 //
26939 //
26940 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142
26941 // CHECK19-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26942 // CHECK19-NEXT: entry:
26943 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
26944 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26945 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
26946 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26947 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
26948 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26949 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26950 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
26951 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
26952 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
26953 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26954 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26955 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
26956 // CHECK19-NEXT: ret void
26957 //
26958 //
26959 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..29
26960 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26961 // CHECK19-NEXT: entry:
26962 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26963 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26964 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26965 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26966 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
26967 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
26968 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26969 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26970 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26971 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26972 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
26973 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26974 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26975 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26976 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26977 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26978 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26979 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26980 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26981 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26982 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26983 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26984 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26985 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26986 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26987 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26988 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26989 // CHECK19: cond.true:
26990 // CHECK19-NEXT: br label [[COND_END:%.*]]
26991 // CHECK19: cond.false:
26992 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26993 // CHECK19-NEXT: br label [[COND_END]]
26994 // CHECK19: cond.end:
26995 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26996 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26997 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26998 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26999 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
27000 // CHECK19: omp.inner.for.cond:
27001 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
27002 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !71
27003 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
27004 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
27005 // CHECK19: omp.inner.for.body:
27006 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !71
27007 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !71
27008 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !71
27009 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !71
27010 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !71
27011 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]), !llvm.access.group !71
27012 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
27013 // CHECK19: omp.inner.for.inc:
27014 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
27015 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !71
27016 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
27017 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
27018 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP72:![0-9]+]]
27019 // CHECK19: omp.inner.for.end:
27020 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
27021 // CHECK19: omp.loop.exit:
27022 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
27023 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
27024 // CHECK19-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
27025 // CHECK19-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
27026 // CHECK19: .omp.final.then:
27027 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
27028 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
27029 // CHECK19: .omp.final.done:
27030 // CHECK19-NEXT: ret void
27031 //
27032 //
27033 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..30
27034 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
27035 // CHECK19-NEXT: entry:
27036 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
27037 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
27038 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
27039 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
27040 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
27041 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
27042 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
27043 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
27044 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
27045 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
27046 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
27047 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
27048 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
27049 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
27050 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
27051 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
27052 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
27053 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
27054 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
27055 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
27056 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
27057 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
27058 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
27059 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
27060 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
27061 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
27062 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
27063 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
27064 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
27065 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
27066 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
27067 // CHECK19-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
27068 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
27069 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
27070 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
27071 // CHECK19: omp.dispatch.cond:
27072 // CHECK19-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
27073 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
27074 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
27075 // CHECK19: omp.dispatch.body:
27076 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
27077 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
27078 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
27079 // CHECK19: omp.inner.for.cond:
27080 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
27081 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !74
27082 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
27083 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
27084 // CHECK19: omp.inner.for.body:
27085 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
27086 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
27087 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
27088 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !74
27089 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !74
27090 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
27091 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !74
27092 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
27093 // CHECK19: omp.body.continue:
27094 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
27095 // CHECK19: omp.inner.for.inc:
27096 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
27097 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
27098 // CHECK19-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
27099 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP75:![0-9]+]]
27100 // CHECK19: omp.inner.for.end:
27101 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
27102 // CHECK19: omp.dispatch.inc:
27103 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
27104 // CHECK19: omp.dispatch.end:
27105 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
27106 // CHECK19-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
27107 // CHECK19-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
27108 // CHECK19: .omp.final.then:
27109 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
27110 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
27111 // CHECK19: .omp.final.done:
27112 // CHECK19-NEXT: ret void
27113 //
27114 //
27115 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
27116 // CHECK19-SAME: () #[[ATTR5:[0-9]+]] {
27117 // CHECK19-NEXT: entry:
27118 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1)
27119 // CHECK19-NEXT: ret void
27120 //
27121 //
27122 // CHECK20-LABEL: define {{[^@]+}}@main
27123 // CHECK20-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
27124 // CHECK20-NEXT: entry:
27125 // CHECK20-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
27126 // CHECK20-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
27127 // CHECK20-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
27128 // CHECK20-NEXT: [[N:%.*]] = alloca i32, align 4
27129 // CHECK20-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
27130 // CHECK20-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
27131 // CHECK20-NEXT: [[M:%.*]] = alloca i32, align 4
27132 // CHECK20-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
27133 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
27134 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
27135 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
27136 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
27137 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
27138 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
27139 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
27140 // CHECK20-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
27141 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
27142 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
27143 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
27144 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
27145 // CHECK20-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
27146 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
27147 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
27148 // CHECK20-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
27149 // CHECK20-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4
27150 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4
27151 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4
27152 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4
27153 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4
27154 // CHECK20-NEXT: [[_TMP22:%.*]] = alloca i32, align 4
27155 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4
27156 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
27157 // CHECK20-NEXT: [[N_CASTED31:%.*]] = alloca i32, align 4
27158 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4
27159 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4
27160 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4
27161 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4
27162 // CHECK20-NEXT: [[_TMP36:%.*]] = alloca i32, align 4
27163 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4
27164 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
27165 // CHECK20-NEXT: [[M_CASTED45:%.*]] = alloca i32, align 4
27166 // CHECK20-NEXT: [[N_CASTED46:%.*]] = alloca i32, align 4
27167 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4
27168 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4
27169 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4
27170 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4
27171 // CHECK20-NEXT: [[_TMP51:%.*]] = alloca i32, align 4
27172 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4
27173 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4
27174 // CHECK20-NEXT: store i32 0, i32* [[RETVAL]], align 4
27175 // CHECK20-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
27176 // CHECK20-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
27177 // CHECK20-NEXT: store i32 100, i32* [[N]], align 4
27178 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
27179 // CHECK20-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
27180 // CHECK20-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
27181 // CHECK20-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
27182 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
27183 // CHECK20-NEXT: store i32 10, i32* [[M]], align 4
27184 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
27185 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
27186 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
27187 // CHECK20-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
27188 // CHECK20-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
27189 // CHECK20-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
27190 // CHECK20-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
27191 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4
27192 // CHECK20-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
27193 // CHECK20-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
27194 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4
27195 // CHECK20-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
27196 // CHECK20-NEXT: store i64 4, i64* [[TMP10]], align 4
27197 // CHECK20-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
27198 // CHECK20-NEXT: store i8* null, i8** [[TMP11]], align 4
27199 // CHECK20-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
27200 // CHECK20-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
27201 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
27202 // CHECK20-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
27203 // CHECK20-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
27204 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
27205 // CHECK20-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
27206 // CHECK20-NEXT: store i64 4, i64* [[TMP16]], align 4
27207 // CHECK20-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
27208 // CHECK20-NEXT: store i8* null, i8** [[TMP17]], align 4
27209 // CHECK20-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
27210 // CHECK20-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
27211 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4
27212 // CHECK20-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
27213 // CHECK20-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
27214 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4
27215 // CHECK20-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
27216 // CHECK20-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4
27217 // CHECK20-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
27218 // CHECK20-NEXT: store i8* null, i8** [[TMP23]], align 4
27219 // CHECK20-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
27220 // CHECK20-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
27221 // CHECK20-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
27222 // CHECK20-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4
27223 // CHECK20-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
27224 // CHECK20-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
27225 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
27226 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
27227 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
27228 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
27229 // CHECK20-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
27230 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
27231 // CHECK20-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64
27232 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
27233 // CHECK20-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
27234 // CHECK20-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
27235 // CHECK20-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
27236 // CHECK20: omp_offload.failed:
27237 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
27238 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]]
27239 // CHECK20: omp_offload.cont:
27240 // CHECK20-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4
27241 // CHECK20-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
27242 // CHECK20-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
27243 // CHECK20-NEXT: [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
27244 // CHECK20-NEXT: [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
27245 // CHECK20-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
27246 // CHECK20-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
27247 // CHECK20-NEXT: store i32 [[TMP34]], i32* [[TMP38]], align 4
27248 // CHECK20-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
27249 // CHECK20-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
27250 // CHECK20-NEXT: store i32 [[TMP34]], i32* [[TMP40]], align 4
27251 // CHECK20-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
27252 // CHECK20-NEXT: store i64 4, i64* [[TMP41]], align 4
27253 // CHECK20-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
27254 // CHECK20-NEXT: store i8* null, i8** [[TMP42]], align 4
27255 // CHECK20-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
27256 // CHECK20-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
27257 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP44]], align 4
27258 // CHECK20-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
27259 // CHECK20-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
27260 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP46]], align 4
27261 // CHECK20-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
27262 // CHECK20-NEXT: store i64 4, i64* [[TMP47]], align 4
27263 // CHECK20-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
27264 // CHECK20-NEXT: store i8* null, i8** [[TMP48]], align 4
27265 // CHECK20-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
27266 // CHECK20-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
27267 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4
27268 // CHECK20-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
27269 // CHECK20-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
27270 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP52]], align 4
27271 // CHECK20-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
27272 // CHECK20-NEXT: store i64 [[TMP36]], i64* [[TMP53]], align 4
27273 // CHECK20-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
27274 // CHECK20-NEXT: store i8* null, i8** [[TMP54]], align 4
27275 // CHECK20-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
27276 // CHECK20-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
27277 // CHECK20-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
27278 // CHECK20-NEXT: [[TMP58:%.*]] = load i32, i32* [[N]], align 4
27279 // CHECK20-NEXT: store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
27280 // CHECK20-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
27281 // CHECK20-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
27282 // CHECK20-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
27283 // CHECK20-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
27284 // CHECK20-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
27285 // CHECK20-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
27286 // CHECK20-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
27287 // CHECK20-NEXT: [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
27288 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]])
27289 // CHECK20-NEXT: [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
27290 // CHECK20-NEXT: [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
27291 // CHECK20-NEXT: br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
27292 // CHECK20: omp_offload.failed15:
27293 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
27294 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT16]]
27295 // CHECK20: omp_offload.cont16:
27296 // CHECK20-NEXT: [[TMP64:%.*]] = load i32, i32* [[M]], align 4
27297 // CHECK20-NEXT: store i32 [[TMP64]], i32* [[M_CASTED]], align 4
27298 // CHECK20-NEXT: [[TMP65:%.*]] = load i32, i32* [[M_CASTED]], align 4
27299 // CHECK20-NEXT: [[TMP66:%.*]] = load i32, i32* [[N]], align 4
27300 // CHECK20-NEXT: store i32 [[TMP66]], i32* [[N_CASTED17]], align 4
27301 // CHECK20-NEXT: [[TMP67:%.*]] = load i32, i32* [[N_CASTED17]], align 4
27302 // CHECK20-NEXT: [[TMP68:%.*]] = mul nuw i32 [[TMP0]], 4
27303 // CHECK20-NEXT: [[TMP69:%.*]] = sext i32 [[TMP68]] to i64
27304 // CHECK20-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
27305 // CHECK20-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32*
27306 // CHECK20-NEXT: store i32 [[TMP65]], i32* [[TMP71]], align 4
27307 // CHECK20-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
27308 // CHECK20-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32*
27309 // CHECK20-NEXT: store i32 [[TMP65]], i32* [[TMP73]], align 4
27310 // CHECK20-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
27311 // CHECK20-NEXT: store i64 4, i64* [[TMP74]], align 4
27312 // CHECK20-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0
27313 // CHECK20-NEXT: store i8* null, i8** [[TMP75]], align 4
27314 // CHECK20-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1
27315 // CHECK20-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32*
27316 // CHECK20-NEXT: store i32 [[TMP67]], i32* [[TMP77]], align 4
27317 // CHECK20-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1
27318 // CHECK20-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32*
27319 // CHECK20-NEXT: store i32 [[TMP67]], i32* [[TMP79]], align 4
27320 // CHECK20-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1
27321 // CHECK20-NEXT: store i64 4, i64* [[TMP80]], align 4
27322 // CHECK20-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1
27323 // CHECK20-NEXT: store i8* null, i8** [[TMP81]], align 4
27324 // CHECK20-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2
27325 // CHECK20-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32*
27326 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP83]], align 4
27327 // CHECK20-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2
27328 // CHECK20-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32*
27329 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP85]], align 4
27330 // CHECK20-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2
27331 // CHECK20-NEXT: store i64 4, i64* [[TMP86]], align 4
27332 // CHECK20-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2
27333 // CHECK20-NEXT: store i8* null, i8** [[TMP87]], align 4
27334 // CHECK20-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3
27335 // CHECK20-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
27336 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 4
27337 // CHECK20-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3
27338 // CHECK20-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32**
27339 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP91]], align 4
27340 // CHECK20-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3
27341 // CHECK20-NEXT: store i64 [[TMP69]], i64* [[TMP92]], align 4
27342 // CHECK20-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3
27343 // CHECK20-NEXT: store i8* null, i8** [[TMP93]], align 4
27344 // CHECK20-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
27345 // CHECK20-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
27346 // CHECK20-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
27347 // CHECK20-NEXT: [[TMP97:%.*]] = load i32, i32* [[N]], align 4
27348 // CHECK20-NEXT: store i32 [[TMP97]], i32* [[DOTCAPTURE_EXPR_23]], align 4
27349 // CHECK20-NEXT: [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4
27350 // CHECK20-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP98]], 0
27351 // CHECK20-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
27352 // CHECK20-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1
27353 // CHECK20-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4
27354 // CHECK20-NEXT: [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
27355 // CHECK20-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP99]], 1
27356 // CHECK20-NEXT: [[TMP100:%.*]] = zext i32 [[ADD28]] to i64
27357 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP100]])
27358 // CHECK20-NEXT: [[TMP101:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164.region_id, i32 4, i8** [[TMP94]], i8** [[TMP95]], i64* [[TMP96]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
27359 // CHECK20-NEXT: [[TMP102:%.*]] = icmp ne i32 [[TMP101]], 0
27360 // CHECK20-NEXT: br i1 [[TMP102]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
27361 // CHECK20: omp_offload.failed29:
27362 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164(i32 [[TMP65]], i32 [[TMP67]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
27363 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT30]]
27364 // CHECK20: omp_offload.cont30:
27365 // CHECK20-NEXT: [[TMP103:%.*]] = load i32, i32* [[N]], align 4
27366 // CHECK20-NEXT: store i32 [[TMP103]], i32* [[N_CASTED31]], align 4
27367 // CHECK20-NEXT: [[TMP104:%.*]] = load i32, i32* [[N_CASTED31]], align 4
27368 // CHECK20-NEXT: [[TMP105:%.*]] = mul nuw i32 [[TMP0]], 4
27369 // CHECK20-NEXT: [[TMP106:%.*]] = sext i32 [[TMP105]] to i64
27370 // CHECK20-NEXT: [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
27371 // CHECK20-NEXT: [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i32*
27372 // CHECK20-NEXT: store i32 [[TMP104]], i32* [[TMP108]], align 4
27373 // CHECK20-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
27374 // CHECK20-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32*
27375 // CHECK20-NEXT: store i32 [[TMP104]], i32* [[TMP110]], align 4
27376 // CHECK20-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
27377 // CHECK20-NEXT: store i64 4, i64* [[TMP111]], align 4
27378 // CHECK20-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0
27379 // CHECK20-NEXT: store i8* null, i8** [[TMP112]], align 4
27380 // CHECK20-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1
27381 // CHECK20-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32*
27382 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP114]], align 4
27383 // CHECK20-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1
27384 // CHECK20-NEXT: [[TMP116:%.*]] = bitcast i8** [[TMP115]] to i32*
27385 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP116]], align 4
27386 // CHECK20-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 1
27387 // CHECK20-NEXT: store i64 4, i64* [[TMP117]], align 4
27388 // CHECK20-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1
27389 // CHECK20-NEXT: store i8* null, i8** [[TMP118]], align 4
27390 // CHECK20-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2
27391 // CHECK20-NEXT: [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32**
27392 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP120]], align 4
27393 // CHECK20-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2
27394 // CHECK20-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32**
27395 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP122]], align 4
27396 // CHECK20-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2
27397 // CHECK20-NEXT: store i64 [[TMP106]], i64* [[TMP123]], align 4
27398 // CHECK20-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2
27399 // CHECK20-NEXT: store i8* null, i8** [[TMP124]], align 4
27400 // CHECK20-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
27401 // CHECK20-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
27402 // CHECK20-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
27403 // CHECK20-NEXT: [[TMP128:%.*]] = load i32, i32* [[N]], align 4
27404 // CHECK20-NEXT: store i32 [[TMP128]], i32* [[DOTCAPTURE_EXPR_37]], align 4
27405 // CHECK20-NEXT: [[TMP129:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4
27406 // CHECK20-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP129]], 0
27407 // CHECK20-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
27408 // CHECK20-NEXT: [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1
27409 // CHECK20-NEXT: store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4
27410 // CHECK20-NEXT: [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4
27411 // CHECK20-NEXT: [[ADD42:%.*]] = add nsw i32 [[TMP130]], 1
27412 // CHECK20-NEXT: [[TMP131:%.*]] = zext i32 [[ADD42]] to i64
27413 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP131]])
27414 // CHECK20-NEXT: [[TMP132:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169.region_id, i32 3, i8** [[TMP125]], i8** [[TMP126]], i64* [[TMP127]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
27415 // CHECK20-NEXT: [[TMP133:%.*]] = icmp ne i32 [[TMP132]], 0
27416 // CHECK20-NEXT: br i1 [[TMP133]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]]
27417 // CHECK20: omp_offload.failed43:
27418 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169(i32 [[TMP104]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
27419 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT44]]
27420 // CHECK20: omp_offload.cont44:
27421 // CHECK20-NEXT: [[TMP134:%.*]] = load i32, i32* [[M]], align 4
27422 // CHECK20-NEXT: store i32 [[TMP134]], i32* [[M_CASTED45]], align 4
27423 // CHECK20-NEXT: [[TMP135:%.*]] = load i32, i32* [[M_CASTED45]], align 4
27424 // CHECK20-NEXT: [[TMP136:%.*]] = load i32, i32* [[N]], align 4
27425 // CHECK20-NEXT: store i32 [[TMP136]], i32* [[N_CASTED46]], align 4
27426 // CHECK20-NEXT: [[TMP137:%.*]] = load i32, i32* [[N_CASTED46]], align 4
27427 // CHECK20-NEXT: [[TMP138:%.*]] = mul nuw i32 [[TMP0]], 4
27428 // CHECK20-NEXT: [[TMP139:%.*]] = sext i32 [[TMP138]] to i64
27429 // CHECK20-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
27430 // CHECK20-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32*
27431 // CHECK20-NEXT: store i32 [[TMP135]], i32* [[TMP141]], align 4
27432 // CHECK20-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
27433 // CHECK20-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32*
27434 // CHECK20-NEXT: store i32 [[TMP135]], i32* [[TMP143]], align 4
27435 // CHECK20-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
27436 // CHECK20-NEXT: store i64 4, i64* [[TMP144]], align 4
27437 // CHECK20-NEXT: [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0
27438 // CHECK20-NEXT: store i8* null, i8** [[TMP145]], align 4
27439 // CHECK20-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1
27440 // CHECK20-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32*
27441 // CHECK20-NEXT: store i32 [[TMP137]], i32* [[TMP147]], align 4
27442 // CHECK20-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1
27443 // CHECK20-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32*
27444 // CHECK20-NEXT: store i32 [[TMP137]], i32* [[TMP149]], align 4
27445 // CHECK20-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 1
27446 // CHECK20-NEXT: store i64 4, i64* [[TMP150]], align 4
27447 // CHECK20-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1
27448 // CHECK20-NEXT: store i8* null, i8** [[TMP151]], align 4
27449 // CHECK20-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2
27450 // CHECK20-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
27451 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP153]], align 4
27452 // CHECK20-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2
27453 // CHECK20-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
27454 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP155]], align 4
27455 // CHECK20-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 2
27456 // CHECK20-NEXT: store i64 4, i64* [[TMP156]], align 4
27457 // CHECK20-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2
27458 // CHECK20-NEXT: store i8* null, i8** [[TMP157]], align 4
27459 // CHECK20-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3
27460 // CHECK20-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32**
27461 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP159]], align 4
27462 // CHECK20-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3
27463 // CHECK20-NEXT: [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32**
27464 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP161]], align 4
27465 // CHECK20-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3
27466 // CHECK20-NEXT: store i64 [[TMP139]], i64* [[TMP162]], align 4
27467 // CHECK20-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3
27468 // CHECK20-NEXT: store i8* null, i8** [[TMP163]], align 4
27469 // CHECK20-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
27470 // CHECK20-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
27471 // CHECK20-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
27472 // CHECK20-NEXT: [[TMP167:%.*]] = load i32, i32* [[N]], align 4
27473 // CHECK20-NEXT: store i32 [[TMP167]], i32* [[DOTCAPTURE_EXPR_52]], align 4
27474 // CHECK20-NEXT: [[TMP168:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4
27475 // CHECK20-NEXT: [[SUB54:%.*]] = sub nsw i32 [[TMP168]], 0
27476 // CHECK20-NEXT: [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1
27477 // CHECK20-NEXT: [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1
27478 // CHECK20-NEXT: store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4
27479 // CHECK20-NEXT: [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4
27480 // CHECK20-NEXT: [[ADD57:%.*]] = add nsw i32 [[TMP169]], 1
27481 // CHECK20-NEXT: [[TMP170:%.*]] = zext i32 [[ADD57]] to i64
27482 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP170]])
27483 // CHECK20-NEXT: [[TMP171:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174.region_id, i32 4, i8** [[TMP164]], i8** [[TMP165]], i64* [[TMP166]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
27484 // CHECK20-NEXT: [[TMP172:%.*]] = icmp ne i32 [[TMP171]], 0
27485 // CHECK20-NEXT: br i1 [[TMP172]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]]
27486 // CHECK20: omp_offload.failed58:
27487 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174(i32 [[TMP135]], i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
27488 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT59]]
27489 // CHECK20: omp_offload.cont59:
27490 // CHECK20-NEXT: [[TMP173:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
27491 // CHECK20-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP173]])
27492 // CHECK20-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
27493 // CHECK20-NEXT: [[TMP174:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
27494 // CHECK20-NEXT: call void @llvm.stackrestore(i8* [[TMP174]])
27495 // CHECK20-NEXT: [[TMP175:%.*]] = load i32, i32* [[RETVAL]], align 4
27496 // CHECK20-NEXT: ret i32 [[TMP175]]
27497 //
27498 //
27499 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l154
27500 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
27501 // CHECK20-NEXT: entry:
27502 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
27503 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
27504 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
27505 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
27506 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
27507 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
27508 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
27509 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
27510 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
27511 // CHECK20-NEXT: ret void
27512 //
27513 //
27514 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined.
27515 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
27516 // CHECK20-NEXT: entry:
27517 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
27518 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
27519 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
27520 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
27521 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
27522 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
27523 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
27524 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
27525 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
27526 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
27527 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
27528 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
27529 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
27530 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
27531 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4
27532 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
27533 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
27534 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
27535 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
27536 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
27537 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
27538 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
27539 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
27540 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
27541 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
27542 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
27543 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
27544 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
27545 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
27546 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
27547 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4
27548 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
27549 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
27550 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
27551 // CHECK20: omp.precond.then:
27552 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
27553 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
27554 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
27555 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
27556 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
27557 // CHECK20-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
27558 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
27559 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
27560 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
27561 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
27562 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
27563 // CHECK20-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
27564 // CHECK20: cond.true:
27565 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
27566 // CHECK20-NEXT: br label [[COND_END:%.*]]
27567 // CHECK20: cond.false:
27568 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
27569 // CHECK20-NEXT: br label [[COND_END]]
27570 // CHECK20: cond.end:
27571 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
27572 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
27573 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
27574 // CHECK20-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
27575 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
27576 // CHECK20: omp.inner.for.cond:
27577 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
27578 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
27579 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
27580 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
27581 // CHECK20: omp.inner.for.body:
27582 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !14
27583 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
27584 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !14
27585 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
27586 // CHECK20: omp.inner.for.inc:
27587 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
27588 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !14
27589 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
27590 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
27591 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
27592 // CHECK20: omp.inner.for.end:
27593 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
27594 // CHECK20: omp.loop.exit:
27595 // CHECK20-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
27596 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
27597 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
27598 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
27599 // CHECK20-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
27600 // CHECK20-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
27601 // CHECK20: .omp.final.then:
27602 // CHECK20-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
27603 // CHECK20-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0
27604 // CHECK20-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
27605 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
27606 // CHECK20-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
27607 // CHECK20-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
27608 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
27609 // CHECK20: .omp.final.done:
27610 // CHECK20-NEXT: br label [[OMP_PRECOND_END]]
27611 // CHECK20: omp.precond.end:
27612 // CHECK20-NEXT: ret void
27613 //
27614 //
27615 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..1
27616 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
27617 // CHECK20-NEXT: entry:
27618 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
27619 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
27620 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
27621 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
27622 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
27623 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
27624 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
27625 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
27626 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
27627 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
27628 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
27629 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
27630 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
27631 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
27632 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
27633 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
27634 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4
27635 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
27636 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
27637 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
27638 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
27639 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
27640 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
27641 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
27642 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
27643 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
27644 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
27645 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
27646 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
27647 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
27648 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
27649 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
27650 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
27651 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
27652 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4
27653 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
27654 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
27655 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
27656 // CHECK20: omp.precond.then:
27657 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
27658 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
27659 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
27660 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
27661 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
27662 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
27663 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
27664 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
27665 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
27666 // CHECK20-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
27667 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
27668 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
27669 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
27670 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
27671 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
27672 // CHECK20-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
27673 // CHECK20: cond.true:
27674 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
27675 // CHECK20-NEXT: br label [[COND_END:%.*]]
27676 // CHECK20: cond.false:
27677 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
27678 // CHECK20-NEXT: br label [[COND_END]]
27679 // CHECK20: cond.end:
27680 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
27681 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
27682 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
27683 // CHECK20-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
27684 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
27685 // CHECK20: omp.inner.for.cond:
27686 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
27687 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
27688 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
27689 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
27690 // CHECK20: omp.inner.for.body:
27691 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
27692 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
27693 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
27694 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !18
27695 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !18
27696 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
27697 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
27698 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
27699 // CHECK20: omp.body.continue:
27700 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
27701 // CHECK20: omp.inner.for.inc:
27702 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
27703 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
27704 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
27705 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
27706 // CHECK20: omp.inner.for.end:
27707 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
27708 // CHECK20: omp.loop.exit:
27709 // CHECK20-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
27710 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
27711 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
27712 // CHECK20-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
27713 // CHECK20-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
27714 // CHECK20-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
27715 // CHECK20: .omp.final.then:
27716 // CHECK20-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
27717 // CHECK20-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0
27718 // CHECK20-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
27719 // CHECK20-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
27720 // CHECK20-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
27721 // CHECK20-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
27722 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
27723 // CHECK20: .omp.final.done:
27724 // CHECK20-NEXT: br label [[OMP_PRECOND_END]]
27725 // CHECK20: omp.precond.end:
27726 // CHECK20-NEXT: ret void
27727 //
27728 //
27729 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l159
27730 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
27731 // CHECK20-NEXT: entry:
27732 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
27733 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
27734 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
27735 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
27736 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
27737 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
27738 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
27739 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
27740 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
27741 // CHECK20-NEXT: ret void
27742 //
27743 //
27744 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..2
27745 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
27746 // CHECK20-NEXT: entry:
27747 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
27748 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
27749 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
27750 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
27751 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
27752 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
27753 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
27754 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
27755 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
27756 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
27757 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
27758 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
27759 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
27760 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
27761 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4
27762 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
27763 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
27764 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
27765 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
27766 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
27767 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
27768 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
27769 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
27770 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
27771 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
27772 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
27773 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
27774 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
27775 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
27776 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
27777 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4
27778 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
27779 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
27780 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
27781 // CHECK20: omp.precond.then:
27782 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
27783 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
27784 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
27785 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
27786 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
27787 // CHECK20-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
27788 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
27789 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
27790 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
27791 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
27792 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
27793 // CHECK20-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
27794 // CHECK20: cond.true:
27795 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
27796 // CHECK20-NEXT: br label [[COND_END:%.*]]
27797 // CHECK20: cond.false:
27798 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
27799 // CHECK20-NEXT: br label [[COND_END]]
27800 // CHECK20: cond.end:
27801 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
27802 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
27803 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
27804 // CHECK20-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
27805 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
27806 // CHECK20: omp.inner.for.cond:
27807 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
27808 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
27809 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
27810 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
27811 // CHECK20: omp.inner.for.body:
27812 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23
27813 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
27814 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !23
27815 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
27816 // CHECK20: omp.inner.for.inc:
27817 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
27818 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23
27819 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
27820 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
27821 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
27822 // CHECK20: omp.inner.for.end:
27823 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
27824 // CHECK20: omp.loop.exit:
27825 // CHECK20-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
27826 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
27827 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
27828 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
27829 // CHECK20-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
27830 // CHECK20-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
27831 // CHECK20: .omp.final.then:
27832 // CHECK20-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
27833 // CHECK20-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0
27834 // CHECK20-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
27835 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
27836 // CHECK20-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
27837 // CHECK20-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
27838 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
27839 // CHECK20: .omp.final.done:
27840 // CHECK20-NEXT: br label [[OMP_PRECOND_END]]
27841 // CHECK20: omp.precond.end:
27842 // CHECK20-NEXT: ret void
27843 //
27844 //
27845 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..3
27846 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
27847 // CHECK20-NEXT: entry:
27848 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
27849 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
27850 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
27851 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
27852 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
27853 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
27854 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
27855 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
27856 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
27857 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
27858 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
27859 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
27860 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
27861 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
27862 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
27863 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
27864 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4
27865 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
27866 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
27867 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
27868 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
27869 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
27870 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
27871 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
27872 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
27873 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
27874 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
27875 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
27876 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
27877 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
27878 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
27879 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
27880 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
27881 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
27882 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4
27883 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
27884 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
27885 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
27886 // CHECK20: omp.precond.then:
27887 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
27888 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
27889 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
27890 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
27891 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
27892 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
27893 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
27894 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
27895 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
27896 // CHECK20-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
27897 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
27898 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
27899 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
27900 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
27901 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
27902 // CHECK20-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
27903 // CHECK20: cond.true:
27904 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
27905 // CHECK20-NEXT: br label [[COND_END:%.*]]
27906 // CHECK20: cond.false:
27907 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
27908 // CHECK20-NEXT: br label [[COND_END]]
27909 // CHECK20: cond.end:
27910 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
27911 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
27912 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
27913 // CHECK20-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
27914 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
27915 // CHECK20: omp.inner.for.cond:
27916 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
27917 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26
27918 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
27919 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
27920 // CHECK20: omp.inner.for.body:
27921 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
27922 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
27923 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
27924 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !26
27925 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !26
27926 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
27927 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26
27928 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
27929 // CHECK20: omp.body.continue:
27930 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
27931 // CHECK20: omp.inner.for.inc:
27932 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
27933 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
27934 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
27935 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
27936 // CHECK20: omp.inner.for.end:
27937 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
27938 // CHECK20: omp.loop.exit:
27939 // CHECK20-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
27940 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
27941 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
27942 // CHECK20-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
27943 // CHECK20-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
27944 // CHECK20-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
27945 // CHECK20: .omp.final.then:
27946 // CHECK20-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
27947 // CHECK20-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0
27948 // CHECK20-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
27949 // CHECK20-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
27950 // CHECK20-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
27951 // CHECK20-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
27952 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
27953 // CHECK20: .omp.final.done:
27954 // CHECK20-NEXT: br label [[OMP_PRECOND_END]]
27955 // CHECK20: omp.precond.end:
27956 // CHECK20-NEXT: ret void
27957 //
27958 //
27959 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l164
27960 // CHECK20-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
27961 // CHECK20-NEXT: entry:
27962 // CHECK20-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
27963 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
27964 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
27965 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
27966 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
27967 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
27968 // CHECK20-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
27969 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
27970 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
27971 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
27972 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
27973 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
27974 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
27975 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
27976 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
27977 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
27978 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
27979 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
27980 // CHECK20-NEXT: ret void
27981 //
27982 //
27983 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..5
27984 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
27985 // CHECK20-NEXT: entry:
27986 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
27987 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
27988 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
27989 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
27990 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
27991 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
27992 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
27993 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
27994 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
27995 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
27996 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
27997 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
27998 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
27999 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
28000 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
28001 // CHECK20-NEXT: [[I4:%.*]] = alloca i32, align 4
28002 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
28003 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
28004 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
28005 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
28006 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
28007 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
28008 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
28009 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
28010 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
28011 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
28012 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
28013 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
28014 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
28015 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
28016 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
28017 // CHECK20-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
28018 // CHECK20-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
28019 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4
28020 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
28021 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
28022 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
28023 // CHECK20: omp.precond.then:
28024 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
28025 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
28026 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
28027 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
28028 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
28029 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
28030 // CHECK20-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
28031 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
28032 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
28033 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
28034 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
28035 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
28036 // CHECK20-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
28037 // CHECK20: cond.true:
28038 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
28039 // CHECK20-NEXT: br label [[COND_END:%.*]]
28040 // CHECK20: cond.false:
28041 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
28042 // CHECK20-NEXT: br label [[COND_END]]
28043 // CHECK20: cond.end:
28044 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
28045 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
28046 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
28047 // CHECK20-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
28048 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
28049 // CHECK20: omp.inner.for.cond:
28050 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
28051 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
28052 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
28053 // CHECK20-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
28054 // CHECK20-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
28055 // CHECK20: omp.inner.for.body:
28056 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
28057 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
28058 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !29
28059 // CHECK20-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !29
28060 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !29
28061 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]]), !llvm.access.group !29
28062 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
28063 // CHECK20: omp.inner.for.inc:
28064 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
28065 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
28066 // CHECK20-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
28067 // CHECK20-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
28068 // CHECK20-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
28069 // CHECK20-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
28070 // CHECK20-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
28071 // CHECK20-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
28072 // CHECK20-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
28073 // CHECK20-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
28074 // CHECK20-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
28075 // CHECK20-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
28076 // CHECK20-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
28077 // CHECK20-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
28078 // CHECK20-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]
28079 // CHECK20-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
28080 // CHECK20: cond.true11:
28081 // CHECK20-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
28082 // CHECK20-NEXT: br label [[COND_END13:%.*]]
28083 // CHECK20: cond.false12:
28084 // CHECK20-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
28085 // CHECK20-NEXT: br label [[COND_END13]]
28086 // CHECK20: cond.end13:
28087 // CHECK20-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]
28088 // CHECK20-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
28089 // CHECK20-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
28090 // CHECK20-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
28091 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
28092 // CHECK20: omp.inner.for.end:
28093 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
28094 // CHECK20: omp.loop.exit:
28095 // CHECK20-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
28096 // CHECK20-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
28097 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
28098 // CHECK20-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
28099 // CHECK20-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
28100 // CHECK20-NEXT: br i1 [[TMP35]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
28101 // CHECK20: .omp.final.then:
28102 // CHECK20-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
28103 // CHECK20-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP36]], 0
28104 // CHECK20-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
28105 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
28106 // CHECK20-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
28107 // CHECK20-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
28108 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
28109 // CHECK20: .omp.final.done:
28110 // CHECK20-NEXT: br label [[OMP_PRECOND_END]]
28111 // CHECK20: omp.precond.end:
28112 // CHECK20-NEXT: ret void
28113 //
28114 //
28115 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..6
28116 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
28117 // CHECK20-NEXT: entry:
28118 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
28119 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
28120 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
28121 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
28122 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
28123 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
28124 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
28125 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
28126 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
28127 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
28128 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
28129 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
28130 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
28131 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
28132 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
28133 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
28134 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
28135 // CHECK20-NEXT: [[I4:%.*]] = alloca i32, align 4
28136 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
28137 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
28138 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
28139 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
28140 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
28141 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
28142 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
28143 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
28144 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
28145 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
28146 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
28147 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
28148 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
28149 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
28150 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
28151 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
28152 // CHECK20-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
28153 // CHECK20-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
28154 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4
28155 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
28156 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
28157 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
28158 // CHECK20: omp.precond.then:
28159 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
28160 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
28161 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
28162 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
28163 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
28164 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
28165 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
28166 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
28167 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
28168 // CHECK20-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
28169 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
28170 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
28171 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
28172 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
28173 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
28174 // CHECK20-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
28175 // CHECK20: cond.true:
28176 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
28177 // CHECK20-NEXT: br label [[COND_END:%.*]]
28178 // CHECK20: cond.false:
28179 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
28180 // CHECK20-NEXT: br label [[COND_END]]
28181 // CHECK20: cond.end:
28182 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
28183 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
28184 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
28185 // CHECK20-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
28186 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
28187 // CHECK20: omp.inner.for.cond:
28188 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
28189 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32
28190 // CHECK20-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
28191 // CHECK20-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
28192 // CHECK20: omp.inner.for.body:
28193 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
28194 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
28195 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
28196 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !32
28197 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !32
28198 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
28199 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !32
28200 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
28201 // CHECK20: omp.body.continue:
28202 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
28203 // CHECK20: omp.inner.for.inc:
28204 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
28205 // CHECK20-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
28206 // CHECK20-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
28207 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
28208 // CHECK20: omp.inner.for.end:
28209 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
28210 // CHECK20: omp.loop.exit:
28211 // CHECK20-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
28212 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
28213 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
28214 // CHECK20-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
28215 // CHECK20-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
28216 // CHECK20-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
28217 // CHECK20: .omp.final.then:
28218 // CHECK20-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
28219 // CHECK20-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
28220 // CHECK20-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
28221 // CHECK20-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
28222 // CHECK20-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
28223 // CHECK20-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4
28224 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
28225 // CHECK20: .omp.final.done:
28226 // CHECK20-NEXT: br label [[OMP_PRECOND_END]]
28227 // CHECK20: omp.precond.end:
28228 // CHECK20-NEXT: ret void
28229 //
28230 //
28231 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l169
28232 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
28233 // CHECK20-NEXT: entry:
28234 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
28235 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
28236 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
28237 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
28238 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
28239 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
28240 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
28241 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
28242 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
28243 // CHECK20-NEXT: ret void
28244 //
28245 //
28246 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..8
28247 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
28248 // CHECK20-NEXT: entry:
28249 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
28250 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
28251 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
28252 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
28253 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
28254 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
28255 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
28256 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
28257 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
28258 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
28259 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
28260 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
28261 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
28262 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
28263 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4
28264 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
28265 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
28266 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
28267 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
28268 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
28269 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
28270 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
28271 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
28272 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
28273 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
28274 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
28275 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
28276 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
28277 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
28278 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
28279 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4
28280 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
28281 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
28282 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
28283 // CHECK20: omp.precond.then:
28284 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
28285 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
28286 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
28287 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
28288 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
28289 // CHECK20-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
28290 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
28291 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
28292 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
28293 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
28294 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
28295 // CHECK20-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
28296 // CHECK20: cond.true:
28297 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
28298 // CHECK20-NEXT: br label [[COND_END:%.*]]
28299 // CHECK20: cond.false:
28300 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
28301 // CHECK20-NEXT: br label [[COND_END]]
28302 // CHECK20: cond.end:
28303 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
28304 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
28305 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
28306 // CHECK20-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
28307 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
28308 // CHECK20: omp.inner.for.cond:
28309 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
28310 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
28311 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
28312 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
28313 // CHECK20: omp.inner.for.body:
28314 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !35
28315 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
28316 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !35
28317 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
28318 // CHECK20: omp.inner.for.inc:
28319 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
28320 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !35
28321 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
28322 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
28323 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
28324 // CHECK20: omp.inner.for.end:
28325 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
28326 // CHECK20: omp.loop.exit:
28327 // CHECK20-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
28328 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
28329 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
28330 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
28331 // CHECK20-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
28332 // CHECK20-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
28333 // CHECK20: .omp.final.then:
28334 // CHECK20-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
28335 // CHECK20-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0
28336 // CHECK20-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
28337 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
28338 // CHECK20-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
28339 // CHECK20-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
28340 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
28341 // CHECK20: .omp.final.done:
28342 // CHECK20-NEXT: br label [[OMP_PRECOND_END]]
28343 // CHECK20: omp.precond.end:
28344 // CHECK20-NEXT: ret void
28345 //
28346 //
28347 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..9
28348 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
28349 // CHECK20-NEXT: entry:
28350 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
28351 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
28352 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
28353 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
28354 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
28355 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
28356 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
28357 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
28358 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
28359 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
28360 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
28361 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
28362 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
28363 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
28364 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
28365 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
28366 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4
28367 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
28368 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
28369 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
28370 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
28371 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
28372 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
28373 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
28374 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
28375 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
28376 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
28377 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
28378 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
28379 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
28380 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
28381 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
28382 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
28383 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
28384 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4
28385 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
28386 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
28387 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
28388 // CHECK20: omp.precond.then:
28389 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
28390 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
28391 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
28392 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
28393 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
28394 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
28395 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
28396 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
28397 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
28398 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
28399 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
28400 // CHECK20-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
28401 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
28402 // CHECK20-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
28403 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
28404 // CHECK20: omp.dispatch.cond:
28405 // CHECK20-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
28406 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
28407 // CHECK20-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
28408 // CHECK20-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
28409 // CHECK20-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
28410 // CHECK20: omp.dispatch.body:
28411 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
28412 // CHECK20-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
28413 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
28414 // CHECK20: omp.inner.for.cond:
28415 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
28416 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38
28417 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
28418 // CHECK20-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
28419 // CHECK20: omp.inner.for.body:
28420 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
28421 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
28422 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
28423 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !38
28424 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !38
28425 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]]
28426 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !38
28427 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
28428 // CHECK20: omp.body.continue:
28429 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
28430 // CHECK20: omp.inner.for.inc:
28431 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
28432 // CHECK20-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1
28433 // CHECK20-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
28434 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
28435 // CHECK20: omp.inner.for.end:
28436 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
28437 // CHECK20: omp.dispatch.inc:
28438 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]]
28439 // CHECK20: omp.dispatch.end:
28440 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
28441 // CHECK20-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
28442 // CHECK20-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
28443 // CHECK20: .omp.final.then:
28444 // CHECK20-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
28445 // CHECK20-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP24]], 0
28446 // CHECK20-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
28447 // CHECK20-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
28448 // CHECK20-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
28449 // CHECK20-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
28450 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
28451 // CHECK20: .omp.final.done:
28452 // CHECK20-NEXT: br label [[OMP_PRECOND_END]]
28453 // CHECK20: omp.precond.end:
28454 // CHECK20-NEXT: ret void
28455 //
28456 //
28457 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l174
28458 // CHECK20-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
28459 // CHECK20-NEXT: entry:
28460 // CHECK20-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
28461 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
28462 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
28463 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
28464 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
28465 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
28466 // CHECK20-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
28467 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
28468 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
28469 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
28470 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
28471 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
28472 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
28473 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
28474 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
28475 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
28476 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
28477 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
28478 // CHECK20-NEXT: ret void
28479 //
28480 //
28481 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..11
28482 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
28483 // CHECK20-NEXT: entry:
28484 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
28485 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
28486 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
28487 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
28488 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
28489 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
28490 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
28491 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
28492 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
28493 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
28494 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
28495 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
28496 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
28497 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
28498 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
28499 // CHECK20-NEXT: [[I4:%.*]] = alloca i32, align 4
28500 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
28501 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
28502 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
28503 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
28504 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
28505 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
28506 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
28507 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
28508 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
28509 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
28510 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
28511 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
28512 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
28513 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
28514 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
28515 // CHECK20-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
28516 // CHECK20-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
28517 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4
28518 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
28519 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
28520 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
28521 // CHECK20: omp.precond.then:
28522 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
28523 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
28524 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
28525 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
28526 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
28527 // CHECK20-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
28528 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
28529 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
28530 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
28531 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
28532 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
28533 // CHECK20-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
28534 // CHECK20: cond.true:
28535 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
28536 // CHECK20-NEXT: br label [[COND_END:%.*]]
28537 // CHECK20: cond.false:
28538 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
28539 // CHECK20-NEXT: br label [[COND_END]]
28540 // CHECK20: cond.end:
28541 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
28542 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
28543 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
28544 // CHECK20-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
28545 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
28546 // CHECK20: omp.inner.for.cond:
28547 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
28548 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !41
28549 // CHECK20-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
28550 // CHECK20-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
28551 // CHECK20: omp.inner.for.body:
28552 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !41
28553 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !41
28554 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !41
28555 // CHECK20-NEXT: store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !41
28556 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !41
28557 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]]), !llvm.access.group !41
28558 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
28559 // CHECK20: omp.inner.for.inc:
28560 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
28561 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !41
28562 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
28563 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
28564 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
28565 // CHECK20: omp.inner.for.end:
28566 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
28567 // CHECK20: omp.loop.exit:
28568 // CHECK20-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
28569 // CHECK20-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
28570 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
28571 // CHECK20-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
28572 // CHECK20-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
28573 // CHECK20-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
28574 // CHECK20: .omp.final.then:
28575 // CHECK20-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
28576 // CHECK20-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0
28577 // CHECK20-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
28578 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
28579 // CHECK20-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
28580 // CHECK20-NEXT: store i32 [[ADD9]], i32* [[I4]], align 4
28581 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
28582 // CHECK20: .omp.final.done:
28583 // CHECK20-NEXT: br label [[OMP_PRECOND_END]]
28584 // CHECK20: omp.precond.end:
28585 // CHECK20-NEXT: ret void
28586 //
28587 //
28588 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..12
28589 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
28590 // CHECK20-NEXT: entry:
28591 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
28592 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
28593 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
28594 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
28595 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
28596 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
28597 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
28598 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
28599 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
28600 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
28601 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
28602 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
28603 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
28604 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
28605 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
28606 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
28607 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
28608 // CHECK20-NEXT: [[I4:%.*]] = alloca i32, align 4
28609 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
28610 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
28611 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
28612 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
28613 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
28614 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
28615 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
28616 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
28617 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
28618 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
28619 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
28620 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
28621 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
28622 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
28623 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
28624 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
28625 // CHECK20-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
28626 // CHECK20-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
28627 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4
28628 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
28629 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
28630 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
28631 // CHECK20: omp.precond.then:
28632 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
28633 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
28634 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
28635 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
28636 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
28637 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
28638 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
28639 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
28640 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
28641 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
28642 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
28643 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
28644 // CHECK20-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
28645 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
28646 // CHECK20-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
28647 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
28648 // CHECK20: omp.dispatch.cond:
28649 // CHECK20-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
28650 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
28651 // CHECK20-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
28652 // CHECK20-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
28653 // CHECK20-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
28654 // CHECK20: omp.dispatch.body:
28655 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
28656 // CHECK20-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
28657 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
28658 // CHECK20: omp.inner.for.cond:
28659 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
28660 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !44
28661 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
28662 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
28663 // CHECK20: omp.inner.for.body:
28664 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
28665 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
28666 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
28667 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !44
28668 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !44
28669 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]]
28670 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !44
28671 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
28672 // CHECK20: omp.body.continue:
28673 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
28674 // CHECK20: omp.inner.for.inc:
28675 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
28676 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1
28677 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
28678 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
28679 // CHECK20: omp.inner.for.end:
28680 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
28681 // CHECK20: omp.dispatch.inc:
28682 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]]
28683 // CHECK20: omp.dispatch.end:
28684 // CHECK20-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
28685 // CHECK20-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
28686 // CHECK20-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
28687 // CHECK20: .omp.final.then:
28688 // CHECK20-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
28689 // CHECK20-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP25]], 0
28690 // CHECK20-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
28691 // CHECK20-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
28692 // CHECK20-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
28693 // CHECK20-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
28694 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
28695 // CHECK20: .omp.final.done:
28696 // CHECK20-NEXT: br label [[OMP_PRECOND_END]]
28697 // CHECK20: omp.precond.end:
28698 // CHECK20-NEXT: ret void
28699 //
28700 //
28701 // CHECK20-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
28702 // CHECK20-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
28703 // CHECK20-NEXT: entry:
28704 // CHECK20-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
28705 // CHECK20-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
28706 // CHECK20-NEXT: [[M:%.*]] = alloca i32, align 4
28707 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
28708 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
28709 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
28710 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
28711 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
28712 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
28713 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
28714 // CHECK20-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
28715 // CHECK20-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
28716 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4
28717 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4
28718 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4
28719 // CHECK20-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
28720 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4
28721 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4
28722 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4
28723 // CHECK20-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
28724 // CHECK20-NEXT: [[M_CASTED19:%.*]] = alloca i32, align 4
28725 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4
28726 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4
28727 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4
28728 // CHECK20-NEXT: [[_TMP23:%.*]] = alloca i32, align 4
28729 // CHECK20-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
28730 // CHECK20-NEXT: store i32 10, i32* [[M]], align 4
28731 // CHECK20-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
28732 // CHECK20-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
28733 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
28734 // CHECK20-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
28735 // CHECK20-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
28736 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
28737 // CHECK20-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
28738 // CHECK20-NEXT: store i8* null, i8** [[TMP4]], align 4
28739 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
28740 // CHECK20-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
28741 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
28742 // CHECK20-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
28743 // CHECK20-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
28744 // CHECK20-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
28745 // CHECK20: omp_offload.failed:
28746 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122([10 x i32]* [[A]]) #[[ATTR3]]
28747 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]]
28748 // CHECK20: omp_offload.cont:
28749 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
28750 // CHECK20-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
28751 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
28752 // CHECK20-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
28753 // CHECK20-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
28754 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
28755 // CHECK20-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
28756 // CHECK20-NEXT: store i8* null, i8** [[TMP13]], align 4
28757 // CHECK20-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
28758 // CHECK20-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
28759 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
28760 // CHECK20-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
28761 // CHECK20-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
28762 // CHECK20-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
28763 // CHECK20: omp_offload.failed5:
28764 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127([10 x i32]* [[A]]) #[[ATTR3]]
28765 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT6]]
28766 // CHECK20: omp_offload.cont6:
28767 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4
28768 // CHECK20-NEXT: store i32 [[TMP18]], i32* [[M_CASTED]], align 4
28769 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4
28770 // CHECK20-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
28771 // CHECK20-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
28772 // CHECK20-NEXT: store i32 [[TMP19]], i32* [[TMP21]], align 4
28773 // CHECK20-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
28774 // CHECK20-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
28775 // CHECK20-NEXT: store i32 [[TMP19]], i32* [[TMP23]], align 4
28776 // CHECK20-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
28777 // CHECK20-NEXT: store i8* null, i8** [[TMP24]], align 4
28778 // CHECK20-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
28779 // CHECK20-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
28780 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4
28781 // CHECK20-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
28782 // CHECK20-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
28783 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4
28784 // CHECK20-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1
28785 // CHECK20-NEXT: store i8* null, i8** [[TMP29]], align 4
28786 // CHECK20-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
28787 // CHECK20-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
28788 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
28789 // CHECK20-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
28790 // CHECK20-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
28791 // CHECK20-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
28792 // CHECK20: omp_offload.failed11:
28793 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
28794 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT12]]
28795 // CHECK20: omp_offload.cont12:
28796 // CHECK20-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
28797 // CHECK20-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
28798 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4
28799 // CHECK20-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
28800 // CHECK20-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
28801 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4
28802 // CHECK20-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
28803 // CHECK20-NEXT: store i8* null, i8** [[TMP38]], align 4
28804 // CHECK20-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
28805 // CHECK20-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
28806 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
28807 // CHECK20-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
28808 // CHECK20-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
28809 // CHECK20-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
28810 // CHECK20: omp_offload.failed17:
28811 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137([10 x i32]* [[A]]) #[[ATTR3]]
28812 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT18]]
28813 // CHECK20: omp_offload.cont18:
28814 // CHECK20-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4
28815 // CHECK20-NEXT: store i32 [[TMP43]], i32* [[M_CASTED19]], align 4
28816 // CHECK20-NEXT: [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4
28817 // CHECK20-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
28818 // CHECK20-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
28819 // CHECK20-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4
28820 // CHECK20-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
28821 // CHECK20-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
28822 // CHECK20-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4
28823 // CHECK20-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
28824 // CHECK20-NEXT: store i8* null, i8** [[TMP49]], align 4
28825 // CHECK20-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
28826 // CHECK20-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
28827 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4
28828 // CHECK20-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
28829 // CHECK20-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
28830 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4
28831 // CHECK20-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
28832 // CHECK20-NEXT: store i8* null, i8** [[TMP54]], align 4
28833 // CHECK20-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
28834 // CHECK20-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
28835 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
28836 // CHECK20-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
28837 // CHECK20-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
28838 // CHECK20-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
28839 // CHECK20: omp_offload.failed24:
28840 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
28841 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT25]]
28842 // CHECK20: omp_offload.cont25:
28843 // CHECK20-NEXT: ret i32 0
28844 //
28845 //
28846 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l122
28847 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
28848 // CHECK20-NEXT: entry:
28849 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
28850 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
28851 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
28852 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
28853 // CHECK20-NEXT: ret void
28854 //
28855 //
28856 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..14
28857 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
28858 // CHECK20-NEXT: entry:
28859 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
28860 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
28861 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
28862 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
28863 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
28864 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
28865 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
28866 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
28867 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
28868 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
28869 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
28870 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
28871 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
28872 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
28873 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
28874 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
28875 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
28876 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
28877 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
28878 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
28879 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
28880 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
28881 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
28882 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
28883 // CHECK20: cond.true:
28884 // CHECK20-NEXT: br label [[COND_END:%.*]]
28885 // CHECK20: cond.false:
28886 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
28887 // CHECK20-NEXT: br label [[COND_END]]
28888 // CHECK20: cond.end:
28889 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
28890 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
28891 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
28892 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
28893 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
28894 // CHECK20: omp.inner.for.cond:
28895 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
28896 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !47
28897 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
28898 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
28899 // CHECK20: omp.inner.for.body:
28900 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !47
28901 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !47
28902 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !47
28903 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
28904 // CHECK20: omp.inner.for.inc:
28905 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
28906 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !47
28907 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
28908 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
28909 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
28910 // CHECK20: omp.inner.for.end:
28911 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
28912 // CHECK20: omp.loop.exit:
28913 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
28914 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
28915 // CHECK20-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
28916 // CHECK20-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
28917 // CHECK20: .omp.final.then:
28918 // CHECK20-NEXT: store i32 10, i32* [[I]], align 4
28919 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
28920 // CHECK20: .omp.final.done:
28921 // CHECK20-NEXT: ret void
28922 //
28923 //
28924 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..15
28925 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
28926 // CHECK20-NEXT: entry:
28927 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
28928 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
28929 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
28930 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
28931 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
28932 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
28933 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
28934 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
28935 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
28936 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
28937 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
28938 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
28939 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
28940 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
28941 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
28942 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
28943 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
28944 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
28945 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
28946 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
28947 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
28948 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
28949 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
28950 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
28951 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
28952 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
28953 // CHECK20-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
28954 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
28955 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
28956 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
28957 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
28958 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
28959 // CHECK20: cond.true:
28960 // CHECK20-NEXT: br label [[COND_END:%.*]]
28961 // CHECK20: cond.false:
28962 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
28963 // CHECK20-NEXT: br label [[COND_END]]
28964 // CHECK20: cond.end:
28965 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
28966 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
28967 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
28968 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
28969 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
28970 // CHECK20: omp.inner.for.cond:
28971 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
28972 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !50
28973 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
28974 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
28975 // CHECK20: omp.inner.for.body:
28976 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
28977 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
28978 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
28979 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !50
28980 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !50
28981 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
28982 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !50
28983 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
28984 // CHECK20: omp.body.continue:
28985 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
28986 // CHECK20: omp.inner.for.inc:
28987 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
28988 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
28989 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
28990 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
28991 // CHECK20: omp.inner.for.end:
28992 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
28993 // CHECK20: omp.loop.exit:
28994 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
28995 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
28996 // CHECK20-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
28997 // CHECK20-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
28998 // CHECK20: .omp.final.then:
28999 // CHECK20-NEXT: store i32 10, i32* [[I]], align 4
29000 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
29001 // CHECK20: .omp.final.done:
29002 // CHECK20-NEXT: ret void
29003 //
29004 //
29005 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l127
29006 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
29007 // CHECK20-NEXT: entry:
29008 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
29009 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
29010 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
29011 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
29012 // CHECK20-NEXT: ret void
29013 //
29014 //
29015 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..17
29016 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
29017 // CHECK20-NEXT: entry:
29018 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
29019 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
29020 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
29021 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
29022 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
29023 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
29024 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
29025 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
29026 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
29027 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
29028 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
29029 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
29030 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
29031 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
29032 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
29033 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
29034 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
29035 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
29036 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
29037 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
29038 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
29039 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
29040 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
29041 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
29042 // CHECK20: cond.true:
29043 // CHECK20-NEXT: br label [[COND_END:%.*]]
29044 // CHECK20: cond.false:
29045 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
29046 // CHECK20-NEXT: br label [[COND_END]]
29047 // CHECK20: cond.end:
29048 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
29049 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
29050 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
29051 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
29052 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
29053 // CHECK20: omp.inner.for.cond:
29054 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
29055 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !53
29056 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
29057 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
29058 // CHECK20: omp.inner.for.body:
29059 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !53
29060 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !53
29061 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !53
29062 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
29063 // CHECK20: omp.inner.for.inc:
29064 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
29065 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !53
29066 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
29067 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
29068 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
29069 // CHECK20: omp.inner.for.end:
29070 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
29071 // CHECK20: omp.loop.exit:
29072 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
29073 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
29074 // CHECK20-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
29075 // CHECK20-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
29076 // CHECK20: .omp.final.then:
29077 // CHECK20-NEXT: store i32 10, i32* [[I]], align 4
29078 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
29079 // CHECK20: .omp.final.done:
29080 // CHECK20-NEXT: ret void
29081 //
29082 //
29083 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..18
29084 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
29085 // CHECK20-NEXT: entry:
29086 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
29087 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
29088 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
29089 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
29090 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
29091 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
29092 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
29093 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
29094 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
29095 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
29096 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
29097 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
29098 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
29099 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
29100 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
29101 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
29102 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
29103 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
29104 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
29105 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
29106 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
29107 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
29108 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
29109 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
29110 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
29111 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
29112 // CHECK20-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
29113 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
29114 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
29115 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
29116 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
29117 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
29118 // CHECK20: cond.true:
29119 // CHECK20-NEXT: br label [[COND_END:%.*]]
29120 // CHECK20: cond.false:
29121 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
29122 // CHECK20-NEXT: br label [[COND_END]]
29123 // CHECK20: cond.end:
29124 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
29125 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
29126 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
29127 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
29128 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
29129 // CHECK20: omp.inner.for.cond:
29130 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
29131 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !56
29132 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
29133 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
29134 // CHECK20: omp.inner.for.body:
29135 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
29136 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
29137 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
29138 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !56
29139 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !56
29140 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
29141 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !56
29142 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
29143 // CHECK20: omp.body.continue:
29144 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
29145 // CHECK20: omp.inner.for.inc:
29146 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
29147 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
29148 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
29149 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
29150 // CHECK20: omp.inner.for.end:
29151 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
29152 // CHECK20: omp.loop.exit:
29153 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
29154 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
29155 // CHECK20-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
29156 // CHECK20-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
29157 // CHECK20: .omp.final.then:
29158 // CHECK20-NEXT: store i32 10, i32* [[I]], align 4
29159 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
29160 // CHECK20: .omp.final.done:
29161 // CHECK20-NEXT: ret void
29162 //
29163 //
29164 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l132
29165 // CHECK20-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
29166 // CHECK20-NEXT: entry:
29167 // CHECK20-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
29168 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
29169 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
29170 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
29171 // CHECK20-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
29172 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
29173 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
29174 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
29175 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
29176 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
29177 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
29178 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
29179 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
29180 // CHECK20-NEXT: ret void
29181 //
29182 //
29183 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..21
29184 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
29185 // CHECK20-NEXT: entry:
29186 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
29187 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
29188 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
29189 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
29190 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
29191 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
29192 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
29193 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
29194 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
29195 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
29196 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
29197 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
29198 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
29199 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
29200 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
29201 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
29202 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
29203 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
29204 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
29205 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
29206 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
29207 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
29208 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
29209 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
29210 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
29211 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
29212 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
29213 // CHECK20: cond.true:
29214 // CHECK20-NEXT: br label [[COND_END:%.*]]
29215 // CHECK20: cond.false:
29216 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
29217 // CHECK20-NEXT: br label [[COND_END]]
29218 // CHECK20: cond.end:
29219 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
29220 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
29221 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
29222 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
29223 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
29224 // CHECK20: omp.inner.for.cond:
29225 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
29226 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !59
29227 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
29228 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
29229 // CHECK20: omp.inner.for.body:
29230 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !59
29231 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !59
29232 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !59
29233 // CHECK20-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !59
29234 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !59
29235 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]), !llvm.access.group !59
29236 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
29237 // CHECK20: omp.inner.for.inc:
29238 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
29239 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !59
29240 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
29241 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
29242 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
29243 // CHECK20: omp.inner.for.end:
29244 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
29245 // CHECK20: omp.loop.exit:
29246 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
29247 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
29248 // CHECK20-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
29249 // CHECK20-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
29250 // CHECK20: .omp.final.then:
29251 // CHECK20-NEXT: store i32 10, i32* [[I]], align 4
29252 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
29253 // CHECK20: .omp.final.done:
29254 // CHECK20-NEXT: ret void
29255 //
29256 //
29257 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..22
29258 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
29259 // CHECK20-NEXT: entry:
29260 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
29261 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
29262 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
29263 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
29264 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
29265 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
29266 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
29267 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
29268 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
29269 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
29270 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
29271 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
29272 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
29273 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
29274 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
29275 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
29276 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
29277 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
29278 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
29279 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
29280 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
29281 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
29282 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
29283 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
29284 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
29285 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
29286 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
29287 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
29288 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
29289 // CHECK20-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
29290 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
29291 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
29292 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
29293 // CHECK20: omp.dispatch.cond:
29294 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
29295 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
29296 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
29297 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
29298 // CHECK20: cond.true:
29299 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
29300 // CHECK20-NEXT: br label [[COND_END:%.*]]
29301 // CHECK20: cond.false:
29302 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
29303 // CHECK20-NEXT: br label [[COND_END]]
29304 // CHECK20: cond.end:
29305 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
29306 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
29307 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
29308 // CHECK20-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
29309 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
29310 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
29311 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
29312 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
29313 // CHECK20: omp.dispatch.body:
29314 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
29315 // CHECK20: omp.inner.for.cond:
29316 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
29317 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !62
29318 // CHECK20-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
29319 // CHECK20-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
29320 // CHECK20: omp.inner.for.body:
29321 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
29322 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
29323 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
29324 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !62
29325 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !62
29326 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
29327 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !62
29328 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
29329 // CHECK20: omp.body.continue:
29330 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
29331 // CHECK20: omp.inner.for.inc:
29332 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
29333 // CHECK20-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
29334 // CHECK20-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
29335 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP63:![0-9]+]]
29336 // CHECK20: omp.inner.for.end:
29337 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
29338 // CHECK20: omp.dispatch.inc:
29339 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
29340 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
29341 // CHECK20-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
29342 // CHECK20-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
29343 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
29344 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
29345 // CHECK20-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
29346 // CHECK20-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
29347 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]]
29348 // CHECK20: omp.dispatch.end:
29349 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
29350 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
29351 // CHECK20-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
29352 // CHECK20-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
29353 // CHECK20: .omp.final.then:
29354 // CHECK20-NEXT: store i32 10, i32* [[I]], align 4
29355 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
29356 // CHECK20: .omp.final.done:
29357 // CHECK20-NEXT: ret void
29358 //
29359 //
29360 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l137
29361 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
29362 // CHECK20-NEXT: entry:
29363 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
29364 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
29365 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
29366 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
29367 // CHECK20-NEXT: ret void
29368 //
29369 //
29370 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..25
29371 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
29372 // CHECK20-NEXT: entry:
29373 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
29374 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
29375 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
29376 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
29377 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
29378 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
29379 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
29380 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
29381 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
29382 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
29383 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
29384 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
29385 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
29386 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
29387 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
29388 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
29389 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
29390 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
29391 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
29392 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
29393 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
29394 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
29395 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
29396 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
29397 // CHECK20: cond.true:
29398 // CHECK20-NEXT: br label [[COND_END:%.*]]
29399 // CHECK20: cond.false:
29400 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
29401 // CHECK20-NEXT: br label [[COND_END]]
29402 // CHECK20: cond.end:
29403 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
29404 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
29405 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
29406 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
29407 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
29408 // CHECK20: omp.inner.for.cond:
29409 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
29410 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !65
29411 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
29412 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
29413 // CHECK20: omp.inner.for.body:
29414 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !65
29415 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !65
29416 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !65
29417 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
29418 // CHECK20: omp.inner.for.inc:
29419 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
29420 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !65
29421 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
29422 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
29423 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP66:![0-9]+]]
29424 // CHECK20: omp.inner.for.end:
29425 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
29426 // CHECK20: omp.loop.exit:
29427 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
29428 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
29429 // CHECK20-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
29430 // CHECK20-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
29431 // CHECK20: .omp.final.then:
29432 // CHECK20-NEXT: store i32 10, i32* [[I]], align 4
29433 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
29434 // CHECK20: .omp.final.done:
29435 // CHECK20-NEXT: ret void
29436 //
29437 //
29438 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..26
29439 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
29440 // CHECK20-NEXT: entry:
29441 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
29442 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
29443 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
29444 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
29445 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
29446 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
29447 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
29448 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
29449 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
29450 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
29451 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
29452 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
29453 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
29454 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
29455 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
29456 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
29457 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
29458 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
29459 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
29460 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
29461 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
29462 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
29463 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
29464 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
29465 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
29466 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
29467 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
29468 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
29469 // CHECK20-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
29470 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
29471 // CHECK20-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
29472 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
29473 // CHECK20: omp.dispatch.cond:
29474 // CHECK20-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
29475 // CHECK20-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
29476 // CHECK20-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
29477 // CHECK20: omp.dispatch.body:
29478 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
29479 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
29480 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
29481 // CHECK20: omp.inner.for.cond:
29482 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
29483 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !68
29484 // CHECK20-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
29485 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
29486 // CHECK20: omp.inner.for.body:
29487 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
29488 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
29489 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
29490 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !68
29491 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !68
29492 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
29493 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !68
29494 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
29495 // CHECK20: omp.body.continue:
29496 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
29497 // CHECK20: omp.inner.for.inc:
29498 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
29499 // CHECK20-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
29500 // CHECK20-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
29501 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP69:![0-9]+]]
29502 // CHECK20: omp.inner.for.end:
29503 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
29504 // CHECK20: omp.dispatch.inc:
29505 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]]
29506 // CHECK20: omp.dispatch.end:
29507 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
29508 // CHECK20-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
29509 // CHECK20-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
29510 // CHECK20: .omp.final.then:
29511 // CHECK20-NEXT: store i32 10, i32* [[I]], align 4
29512 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
29513 // CHECK20: .omp.final.done:
29514 // CHECK20-NEXT: ret void
29515 //
29516 //
29517 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l142
29518 // CHECK20-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
29519 // CHECK20-NEXT: entry:
29520 // CHECK20-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
29521 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
29522 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
29523 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
29524 // CHECK20-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
29525 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
29526 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
29527 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
29528 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
29529 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
29530 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
29531 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
29532 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
29533 // CHECK20-NEXT: ret void
29534 //
29535 //
29536 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..29
29537 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
29538 // CHECK20-NEXT: entry:
29539 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
29540 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
29541 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
29542 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
29543 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
29544 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
29545 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
29546 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
29547 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
29548 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
29549 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
29550 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
29551 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
29552 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
29553 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
29554 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
29555 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
29556 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
29557 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
29558 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
29559 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
29560 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
29561 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
29562 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
29563 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
29564 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
29565 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
29566 // CHECK20: cond.true:
29567 // CHECK20-NEXT: br label [[COND_END:%.*]]
29568 // CHECK20: cond.false:
29569 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
29570 // CHECK20-NEXT: br label [[COND_END]]
29571 // CHECK20: cond.end:
29572 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
29573 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
29574 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
29575 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
29576 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
29577 // CHECK20: omp.inner.for.cond:
29578 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
29579 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !71
29580 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
29581 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
29582 // CHECK20: omp.inner.for.body:
29583 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !71
29584 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !71
29585 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !71
29586 // CHECK20-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !71
29587 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !71
29588 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]), !llvm.access.group !71
29589 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
29590 // CHECK20: omp.inner.for.inc:
29591 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
29592 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !71
29593 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
29594 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
29595 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP72:![0-9]+]]
29596 // CHECK20: omp.inner.for.end:
29597 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
29598 // CHECK20: omp.loop.exit:
29599 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
29600 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
29601 // CHECK20-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
29602 // CHECK20-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
29603 // CHECK20: .omp.final.then:
29604 // CHECK20-NEXT: store i32 10, i32* [[I]], align 4
29605 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
29606 // CHECK20: .omp.final.done:
29607 // CHECK20-NEXT: ret void
29608 //
29609 //
29610 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..30
29611 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
29612 // CHECK20-NEXT: entry:
29613 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
29614 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
29615 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
29616 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
29617 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
29618 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
29619 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
29620 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4
29621 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
29622 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
29623 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
29624 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
29625 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4
29626 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
29627 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
29628 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
29629 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
29630 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
29631 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
29632 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
29633 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
29634 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
29635 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
29636 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
29637 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
29638 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
29639 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
29640 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
29641 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
29642 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
29643 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
29644 // CHECK20-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
29645 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
29646 // CHECK20-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
29647 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
29648 // CHECK20: omp.dispatch.cond:
29649 // CHECK20-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
29650 // CHECK20-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
29651 // CHECK20-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
29652 // CHECK20: omp.dispatch.body:
29653 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
29654 // CHECK20-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
29655 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
29656 // CHECK20: omp.inner.for.cond:
29657 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
29658 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !74
29659 // CHECK20-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
29660 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
29661 // CHECK20: omp.inner.for.body:
29662 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
29663 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
29664 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
29665 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !74
29666 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !74
29667 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
29668 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !74
29669 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
29670 // CHECK20: omp.body.continue:
29671 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
29672 // CHECK20: omp.inner.for.inc:
29673 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
29674 // CHECK20-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
29675 // CHECK20-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
29676 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP75:![0-9]+]]
29677 // CHECK20: omp.inner.for.end:
29678 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
29679 // CHECK20: omp.dispatch.inc:
29680 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]]
29681 // CHECK20: omp.dispatch.end:
29682 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
29683 // CHECK20-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
29684 // CHECK20-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
29685 // CHECK20: .omp.final.then:
29686 // CHECK20-NEXT: store i32 10, i32* [[I]], align 4
29687 // CHECK20-NEXT: br label [[DOTOMP_FINAL_DONE]]
29688 // CHECK20: .omp.final.done:
29689 // CHECK20-NEXT: ret void
29690 //
29691 //
29692 // CHECK20-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
29693 // CHECK20-SAME: () #[[ATTR5:[0-9]+]] {
29694 // CHECK20-NEXT: entry:
29695 // CHECK20-NEXT: call void @__tgt_register_requires(i64 1)
29696 // CHECK20-NEXT: ret void
29697 //
29698 //
29699 // CHECK21-LABEL: define {{[^@]+}}@main
29700 // CHECK21-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
29701 // CHECK21-NEXT: entry:
29702 // CHECK21-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
29703 // CHECK21-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
29704 // CHECK21-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
29705 // CHECK21-NEXT: [[N:%.*]] = alloca i32, align 4
29706 // CHECK21-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
29707 // CHECK21-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
29708 // CHECK21-NEXT: [[M:%.*]] = alloca i32, align 4
29709 // CHECK21-NEXT: [[TMP:%.*]] = alloca i32, align 4
29710 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
29711 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
29712 // CHECK21-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
29713 // CHECK21-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
29714 // CHECK21-NEXT: [[I:%.*]] = alloca i32, align 4
29715 // CHECK21-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
29716 // CHECK21-NEXT: [[I3:%.*]] = alloca i32, align 4
29717 // CHECK21-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
29718 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
29719 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
29720 // CHECK21-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4
29721 // CHECK21-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4
29722 // CHECK21-NEXT: [[I18:%.*]] = alloca i32, align 4
29723 // CHECK21-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
29724 // CHECK21-NEXT: [[I22:%.*]] = alloca i32, align 4
29725 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
29726 // CHECK21-NEXT: [[_TMP40:%.*]] = alloca i32, align 4
29727 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
29728 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
29729 // CHECK21-NEXT: [[DOTOMP_LB46:%.*]] = alloca i32, align 4
29730 // CHECK21-NEXT: [[DOTOMP_UB47:%.*]] = alloca i32, align 4
29731 // CHECK21-NEXT: [[I48:%.*]] = alloca i32, align 4
29732 // CHECK21-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4
29733 // CHECK21-NEXT: [[I52:%.*]] = alloca i32, align 4
29734 // CHECK21-NEXT: [[_TMP69:%.*]] = alloca i32, align 4
29735 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_70:%.*]] = alloca i32, align 4
29736 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_71:%.*]] = alloca i32, align 4
29737 // CHECK21-NEXT: [[DOTOMP_LB75:%.*]] = alloca i32, align 4
29738 // CHECK21-NEXT: [[DOTOMP_UB76:%.*]] = alloca i32, align 4
29739 // CHECK21-NEXT: [[I77:%.*]] = alloca i32, align 4
29740 // CHECK21-NEXT: [[DOTOMP_IV80:%.*]] = alloca i32, align 4
29741 // CHECK21-NEXT: [[I81:%.*]] = alloca i32, align 4
29742 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_98:%.*]] = alloca i32, align 4
29743 // CHECK21-NEXT: [[_TMP99:%.*]] = alloca i32, align 4
29744 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_100:%.*]] = alloca i32, align 4
29745 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_101:%.*]] = alloca i32, align 4
29746 // CHECK21-NEXT: [[DOTOMP_LB105:%.*]] = alloca i32, align 4
29747 // CHECK21-NEXT: [[DOTOMP_UB106:%.*]] = alloca i32, align 4
29748 // CHECK21-NEXT: [[I107:%.*]] = alloca i32, align 4
29749 // CHECK21-NEXT: [[DOTOMP_IV110:%.*]] = alloca i32, align 4
29750 // CHECK21-NEXT: [[I111:%.*]] = alloca i32, align 4
29751 // CHECK21-NEXT: store i32 0, i32* [[RETVAL]], align 4
29752 // CHECK21-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
29753 // CHECK21-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
29754 // CHECK21-NEXT: store i32 100, i32* [[N]], align 4
29755 // CHECK21-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
29756 // CHECK21-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
29757 // CHECK21-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
29758 // CHECK21-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
29759 // CHECK21-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
29760 // CHECK21-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
29761 // CHECK21-NEXT: store i32 10, i32* [[M]], align 4
29762 // CHECK21-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
29763 // CHECK21-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
29764 // CHECK21-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
29765 // CHECK21-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
29766 // CHECK21-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
29767 // CHECK21-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
29768 // CHECK21-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
29769 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
29770 // CHECK21-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
29771 // CHECK21-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
29772 // CHECK21-NEXT: store i32 0, i32* [[I]], align 4
29773 // CHECK21-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
29774 // CHECK21-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
29775 // CHECK21-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
29776 // CHECK21: simd.if.then:
29777 // CHECK21-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
29778 // CHECK21-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
29779 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
29780 // CHECK21: omp.inner.for.cond:
29781 // CHECK21-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
29782 // CHECK21-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
29783 // CHECK21-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
29784 // CHECK21-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
29785 // CHECK21: omp.inner.for.body:
29786 // CHECK21-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
29787 // CHECK21-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
29788 // CHECK21-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
29789 // CHECK21-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !2
29790 // CHECK21-NEXT: [[TMP11:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !2
29791 // CHECK21-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
29792 // CHECK21-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
29793 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
29794 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
29795 // CHECK21: omp.body.continue:
29796 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
29797 // CHECK21: omp.inner.for.inc:
29798 // CHECK21-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
29799 // CHECK21-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1
29800 // CHECK21-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
29801 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
29802 // CHECK21: omp.inner.for.end:
29803 // CHECK21-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
29804 // CHECK21-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0
29805 // CHECK21-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
29806 // CHECK21-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
29807 // CHECK21-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
29808 // CHECK21-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
29809 // CHECK21-NEXT: br label [[SIMD_IF_END]]
29810 // CHECK21: simd.if.end:
29811 // CHECK21-NEXT: [[TMP14:%.*]] = load i32, i32* [[N]], align 4
29812 // CHECK21-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
29813 // CHECK21-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
29814 // CHECK21-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 0
29815 // CHECK21-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
29816 // CHECK21-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1
29817 // CHECK21-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4
29818 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4
29819 // CHECK21-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4
29820 // CHECK21-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_UB17]], align 4
29821 // CHECK21-NEXT: store i32 0, i32* [[I18]], align 4
29822 // CHECK21-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
29823 // CHECK21-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]]
29824 // CHECK21-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]]
29825 // CHECK21: simd.if.then20:
29826 // CHECK21-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4
29827 // CHECK21-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV21]], align 4
29828 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
29829 // CHECK21: omp.inner.for.cond23:
29830 // CHECK21-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
29831 // CHECK21-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !6
29832 // CHECK21-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
29833 // CHECK21-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]
29834 // CHECK21: omp.inner.for.body25:
29835 // CHECK21-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
29836 // CHECK21-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 1
29837 // CHECK21-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
29838 // CHECK21-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !6
29839 // CHECK21-NEXT: [[TMP22:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !6
29840 // CHECK21-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i64
29841 // CHECK21-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM28]]
29842 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !6
29843 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]]
29844 // CHECK21: omp.body.continue30:
29845 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]]
29846 // CHECK21: omp.inner.for.inc31:
29847 // CHECK21-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
29848 // CHECK21-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP23]], 1
29849 // CHECK21-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
29850 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]]
29851 // CHECK21: omp.inner.for.end33:
29852 // CHECK21-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
29853 // CHECK21-NEXT: [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 0
29854 // CHECK21-NEXT: [[DIV35:%.*]] = sdiv i32 [[SUB34]], 1
29855 // CHECK21-NEXT: [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 1
29856 // CHECK21-NEXT: [[ADD37:%.*]] = add nsw i32 0, [[MUL36]]
29857 // CHECK21-NEXT: store i32 [[ADD37]], i32* [[I22]], align 4
29858 // CHECK21-NEXT: br label [[SIMD_IF_END38]]
29859 // CHECK21: simd.if.end38:
29860 // CHECK21-NEXT: [[TMP25:%.*]] = load i32, i32* [[M]], align 4
29861 // CHECK21-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_39]], align 4
29862 // CHECK21-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
29863 // CHECK21-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_41]], align 4
29864 // CHECK21-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
29865 // CHECK21-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 0
29866 // CHECK21-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
29867 // CHECK21-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
29868 // CHECK21-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
29869 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB46]], align 4
29870 // CHECK21-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
29871 // CHECK21-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_UB47]], align 4
29872 // CHECK21-NEXT: store i32 0, i32* [[I48]], align 4
29873 // CHECK21-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
29874 // CHECK21-NEXT: [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]]
29875 // CHECK21-NEXT: br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]]
29876 // CHECK21: simd.if.then50:
29877 // CHECK21-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_LB46]], align 4
29878 // CHECK21-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV51]], align 4
29879 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]]
29880 // CHECK21: omp.inner.for.cond53:
29881 // CHECK21-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
29882 // CHECK21-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB47]], align 4, !llvm.access.group !9
29883 // CHECK21-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]]
29884 // CHECK21-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]]
29885 // CHECK21: omp.inner.for.body55:
29886 // CHECK21-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
29887 // CHECK21-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 1
29888 // CHECK21-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]]
29889 // CHECK21-NEXT: store i32 [[ADD57]], i32* [[I52]], align 4, !llvm.access.group !9
29890 // CHECK21-NEXT: [[TMP34:%.*]] = load i32, i32* [[I52]], align 4, !llvm.access.group !9
29891 // CHECK21-NEXT: [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i64
29892 // CHECK21-NEXT: [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM58]]
29893 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX59]], align 4, !llvm.access.group !9
29894 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE60:%.*]]
29895 // CHECK21: omp.body.continue60:
29896 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC61:%.*]]
29897 // CHECK21: omp.inner.for.inc61:
29898 // CHECK21-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
29899 // CHECK21-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP35]], 1
29900 // CHECK21-NEXT: store i32 [[ADD62]], i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
29901 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]]
29902 // CHECK21: omp.inner.for.end63:
29903 // CHECK21-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
29904 // CHECK21-NEXT: [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 0
29905 // CHECK21-NEXT: [[DIV65:%.*]] = sdiv i32 [[SUB64]], 1
29906 // CHECK21-NEXT: [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 1
29907 // CHECK21-NEXT: [[ADD67:%.*]] = add nsw i32 0, [[MUL66]]
29908 // CHECK21-NEXT: store i32 [[ADD67]], i32* [[I52]], align 4
29909 // CHECK21-NEXT: br label [[SIMD_IF_END68]]
29910 // CHECK21: simd.if.end68:
29911 // CHECK21-NEXT: [[TMP37:%.*]] = load i32, i32* [[N]], align 4
29912 // CHECK21-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_70]], align 4
29913 // CHECK21-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_70]], align 4
29914 // CHECK21-NEXT: [[SUB72:%.*]] = sub nsw i32 [[TMP38]], 0
29915 // CHECK21-NEXT: [[DIV73:%.*]] = sdiv i32 [[SUB72]], 1
29916 // CHECK21-NEXT: [[SUB74:%.*]] = sub nsw i32 [[DIV73]], 1
29917 // CHECK21-NEXT: store i32 [[SUB74]], i32* [[DOTCAPTURE_EXPR_71]], align 4
29918 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB75]], align 4
29919 // CHECK21-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_71]], align 4
29920 // CHECK21-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_UB76]], align 4
29921 // CHECK21-NEXT: store i32 0, i32* [[I77]], align 4
29922 // CHECK21-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_70]], align 4
29923 // CHECK21-NEXT: [[CMP78:%.*]] = icmp slt i32 0, [[TMP40]]
29924 // CHECK21-NEXT: br i1 [[CMP78]], label [[SIMD_IF_THEN79:%.*]], label [[SIMD_IF_END97:%.*]]
29925 // CHECK21: simd.if.then79:
29926 // CHECK21-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_LB75]], align 4
29927 // CHECK21-NEXT: store i32 [[TMP41]], i32* [[DOTOMP_IV80]], align 4
29928 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND82:%.*]]
29929 // CHECK21: omp.inner.for.cond82:
29930 // CHECK21-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IV80]], align 4, !llvm.access.group !12
29931 // CHECK21-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_UB76]], align 4, !llvm.access.group !12
29932 // CHECK21-NEXT: [[CMP83:%.*]] = icmp sle i32 [[TMP42]], [[TMP43]]
29933 // CHECK21-NEXT: br i1 [[CMP83]], label [[OMP_INNER_FOR_BODY84:%.*]], label [[OMP_INNER_FOR_END92:%.*]]
29934 // CHECK21: omp.inner.for.body84:
29935 // CHECK21-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_IV80]], align 4, !llvm.access.group !12
29936 // CHECK21-NEXT: [[MUL85:%.*]] = mul nsw i32 [[TMP44]], 1
29937 // CHECK21-NEXT: [[ADD86:%.*]] = add nsw i32 0, [[MUL85]]
29938 // CHECK21-NEXT: store i32 [[ADD86]], i32* [[I81]], align 4, !llvm.access.group !12
29939 // CHECK21-NEXT: [[TMP45:%.*]] = load i32, i32* [[I81]], align 4, !llvm.access.group !12
29940 // CHECK21-NEXT: [[IDXPROM87:%.*]] = sext i32 [[TMP45]] to i64
29941 // CHECK21-NEXT: [[ARRAYIDX88:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM87]]
29942 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX88]], align 4, !llvm.access.group !12
29943 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE89:%.*]]
29944 // CHECK21: omp.body.continue89:
29945 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC90:%.*]]
29946 // CHECK21: omp.inner.for.inc90:
29947 // CHECK21-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_IV80]], align 4, !llvm.access.group !12
29948 // CHECK21-NEXT: [[ADD91:%.*]] = add nsw i32 [[TMP46]], 1
29949 // CHECK21-NEXT: store i32 [[ADD91]], i32* [[DOTOMP_IV80]], align 4, !llvm.access.group !12
29950 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND82]], !llvm.loop [[LOOP13:![0-9]+]]
29951 // CHECK21: omp.inner.for.end92:
29952 // CHECK21-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_70]], align 4
29953 // CHECK21-NEXT: [[SUB93:%.*]] = sub nsw i32 [[TMP47]], 0
29954 // CHECK21-NEXT: [[DIV94:%.*]] = sdiv i32 [[SUB93]], 1
29955 // CHECK21-NEXT: [[MUL95:%.*]] = mul nsw i32 [[DIV94]], 1
29956 // CHECK21-NEXT: [[ADD96:%.*]] = add nsw i32 0, [[MUL95]]
29957 // CHECK21-NEXT: store i32 [[ADD96]], i32* [[I81]], align 4
29958 // CHECK21-NEXT: br label [[SIMD_IF_END97]]
29959 // CHECK21: simd.if.end97:
29960 // CHECK21-NEXT: [[TMP48:%.*]] = load i32, i32* [[M]], align 4
29961 // CHECK21-NEXT: store i32 [[TMP48]], i32* [[DOTCAPTURE_EXPR_98]], align 4
29962 // CHECK21-NEXT: [[TMP49:%.*]] = load i32, i32* [[N]], align 4
29963 // CHECK21-NEXT: store i32 [[TMP49]], i32* [[DOTCAPTURE_EXPR_100]], align 4
29964 // CHECK21-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_100]], align 4
29965 // CHECK21-NEXT: [[SUB102:%.*]] = sub nsw i32 [[TMP50]], 0
29966 // CHECK21-NEXT: [[DIV103:%.*]] = sdiv i32 [[SUB102]], 1
29967 // CHECK21-NEXT: [[SUB104:%.*]] = sub nsw i32 [[DIV103]], 1
29968 // CHECK21-NEXT: store i32 [[SUB104]], i32* [[DOTCAPTURE_EXPR_101]], align 4
29969 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB105]], align 4
29970 // CHECK21-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_101]], align 4
29971 // CHECK21-NEXT: store i32 [[TMP51]], i32* [[DOTOMP_UB106]], align 4
29972 // CHECK21-NEXT: store i32 0, i32* [[I107]], align 4
29973 // CHECK21-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_100]], align 4
29974 // CHECK21-NEXT: [[CMP108:%.*]] = icmp slt i32 0, [[TMP52]]
29975 // CHECK21-NEXT: br i1 [[CMP108]], label [[SIMD_IF_THEN109:%.*]], label [[SIMD_IF_END127:%.*]]
29976 // CHECK21: simd.if.then109:
29977 // CHECK21-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_LB105]], align 4
29978 // CHECK21-NEXT: store i32 [[TMP53]], i32* [[DOTOMP_IV110]], align 4
29979 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND112:%.*]]
29980 // CHECK21: omp.inner.for.cond112:
29981 // CHECK21-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_IV110]], align 4, !llvm.access.group !15
29982 // CHECK21-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_UB106]], align 4, !llvm.access.group !15
29983 // CHECK21-NEXT: [[CMP113:%.*]] = icmp sle i32 [[TMP54]], [[TMP55]]
29984 // CHECK21-NEXT: br i1 [[CMP113]], label [[OMP_INNER_FOR_BODY114:%.*]], label [[OMP_INNER_FOR_END122:%.*]]
29985 // CHECK21: omp.inner.for.body114:
29986 // CHECK21-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTOMP_IV110]], align 4, !llvm.access.group !15
29987 // CHECK21-NEXT: [[MUL115:%.*]] = mul nsw i32 [[TMP56]], 1
29988 // CHECK21-NEXT: [[ADD116:%.*]] = add nsw i32 0, [[MUL115]]
29989 // CHECK21-NEXT: store i32 [[ADD116]], i32* [[I111]], align 4, !llvm.access.group !15
29990 // CHECK21-NEXT: [[TMP57:%.*]] = load i32, i32* [[I111]], align 4, !llvm.access.group !15
29991 // CHECK21-NEXT: [[IDXPROM117:%.*]] = sext i32 [[TMP57]] to i64
29992 // CHECK21-NEXT: [[ARRAYIDX118:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM117]]
29993 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX118]], align 4, !llvm.access.group !15
29994 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE119:%.*]]
29995 // CHECK21: omp.body.continue119:
29996 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC120:%.*]]
29997 // CHECK21: omp.inner.for.inc120:
29998 // CHECK21-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTOMP_IV110]], align 4, !llvm.access.group !15
29999 // CHECK21-NEXT: [[ADD121:%.*]] = add nsw i32 [[TMP58]], 1
30000 // CHECK21-NEXT: store i32 [[ADD121]], i32* [[DOTOMP_IV110]], align 4, !llvm.access.group !15
30001 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND112]], !llvm.loop [[LOOP16:![0-9]+]]
30002 // CHECK21: omp.inner.for.end122:
30003 // CHECK21-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_100]], align 4
30004 // CHECK21-NEXT: [[SUB123:%.*]] = sub nsw i32 [[TMP59]], 0
30005 // CHECK21-NEXT: [[DIV124:%.*]] = sdiv i32 [[SUB123]], 1
30006 // CHECK21-NEXT: [[MUL125:%.*]] = mul nsw i32 [[DIV124]], 1
30007 // CHECK21-NEXT: [[ADD126:%.*]] = add nsw i32 0, [[MUL125]]
30008 // CHECK21-NEXT: store i32 [[ADD126]], i32* [[I111]], align 4
30009 // CHECK21-NEXT: br label [[SIMD_IF_END127]]
30010 // CHECK21: simd.if.end127:
30011 // CHECK21-NEXT: [[TMP60:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
30012 // CHECK21-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP60]])
30013 // CHECK21-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
30014 // CHECK21-NEXT: [[TMP61:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
30015 // CHECK21-NEXT: call void @llvm.stackrestore(i8* [[TMP61]])
30016 // CHECK21-NEXT: [[TMP62:%.*]] = load i32, i32* [[RETVAL]], align 4
30017 // CHECK21-NEXT: ret i32 [[TMP62]]
30018 //
30019 //
30020 // CHECK21-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
30021 // CHECK21-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
30022 // CHECK21-NEXT: entry:
30023 // CHECK21-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
30024 // CHECK21-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
30025 // CHECK21-NEXT: [[M:%.*]] = alloca i32, align 4
30026 // CHECK21-NEXT: [[TMP:%.*]] = alloca i32, align 4
30027 // CHECK21-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
30028 // CHECK21-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
30029 // CHECK21-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
30030 // CHECK21-NEXT: [[I:%.*]] = alloca i32, align 4
30031 // CHECK21-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
30032 // CHECK21-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
30033 // CHECK21-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
30034 // CHECK21-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
30035 // CHECK21-NEXT: [[I6:%.*]] = alloca i32, align 4
30036 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
30037 // CHECK21-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
30038 // CHECK21-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4
30039 // CHECK21-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4
30040 // CHECK21-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
30041 // CHECK21-NEXT: [[I22:%.*]] = alloca i32, align 4
30042 // CHECK21-NEXT: [[_TMP34:%.*]] = alloca i32, align 4
30043 // CHECK21-NEXT: [[DOTOMP_LB35:%.*]] = alloca i32, align 4
30044 // CHECK21-NEXT: [[DOTOMP_UB36:%.*]] = alloca i32, align 4
30045 // CHECK21-NEXT: [[DOTOMP_IV37:%.*]] = alloca i32, align 4
30046 // CHECK21-NEXT: [[I38:%.*]] = alloca i32, align 4
30047 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_50:%.*]] = alloca i32, align 4
30048 // CHECK21-NEXT: [[_TMP51:%.*]] = alloca i32, align 4
30049 // CHECK21-NEXT: [[DOTOMP_LB52:%.*]] = alloca i32, align 4
30050 // CHECK21-NEXT: [[DOTOMP_UB53:%.*]] = alloca i32, align 4
30051 // CHECK21-NEXT: [[DOTOMP_IV54:%.*]] = alloca i32, align 4
30052 // CHECK21-NEXT: [[I55:%.*]] = alloca i32, align 4
30053 // CHECK21-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
30054 // CHECK21-NEXT: store i32 10, i32* [[M]], align 4
30055 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
30056 // CHECK21-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
30057 // CHECK21-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
30058 // CHECK21-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
30059 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
30060 // CHECK21: omp.inner.for.cond:
30061 // CHECK21-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
30062 // CHECK21-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
30063 // CHECK21-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
30064 // CHECK21-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
30065 // CHECK21: omp.inner.for.body:
30066 // CHECK21-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
30067 // CHECK21-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
30068 // CHECK21-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
30069 // CHECK21-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18
30070 // CHECK21-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !18
30071 // CHECK21-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
30072 // CHECK21-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
30073 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
30074 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
30075 // CHECK21: omp.body.continue:
30076 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
30077 // CHECK21: omp.inner.for.inc:
30078 // CHECK21-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
30079 // CHECK21-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
30080 // CHECK21-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
30081 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
30082 // CHECK21: omp.inner.for.end:
30083 // CHECK21-NEXT: store i32 10, i32* [[I]], align 4
30084 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
30085 // CHECK21-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4
30086 // CHECK21-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
30087 // CHECK21-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4
30088 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
30089 // CHECK21: omp.inner.for.cond7:
30090 // CHECK21-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
30091 // CHECK21-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !21
30092 // CHECK21-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
30093 // CHECK21-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
30094 // CHECK21: omp.inner.for.body9:
30095 // CHECK21-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
30096 // CHECK21-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1
30097 // CHECK21-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
30098 // CHECK21-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !21
30099 // CHECK21-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !21
30100 // CHECK21-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i64
30101 // CHECK21-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM12]]
30102 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX13]], align 4, !llvm.access.group !21
30103 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]
30104 // CHECK21: omp.body.continue14:
30105 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]
30106 // CHECK21: omp.inner.for.inc15:
30107 // CHECK21-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
30108 // CHECK21-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP11]], 1
30109 // CHECK21-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
30110 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
30111 // CHECK21: omp.inner.for.end17:
30112 // CHECK21-NEXT: store i32 10, i32* [[I6]], align 4
30113 // CHECK21-NEXT: [[TMP12:%.*]] = load i32, i32* [[M]], align 4
30114 // CHECK21-NEXT: store i32 [[TMP12]], i32* [[DOTCAPTURE_EXPR_]], align 4
30115 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB19]], align 4
30116 // CHECK21-NEXT: store i32 9, i32* [[DOTOMP_UB20]], align 4
30117 // CHECK21-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB19]], align 4
30118 // CHECK21-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV21]], align 4
30119 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
30120 // CHECK21: omp.inner.for.cond23:
30121 // CHECK21-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !24
30122 // CHECK21-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB20]], align 4, !llvm.access.group !24
30123 // CHECK21-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
30124 // CHECK21-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]
30125 // CHECK21: omp.inner.for.body25:
30126 // CHECK21-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !24
30127 // CHECK21-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP16]], 1
30128 // CHECK21-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
30129 // CHECK21-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !24
30130 // CHECK21-NEXT: [[TMP17:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !24
30131 // CHECK21-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP17]] to i64
30132 // CHECK21-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM28]]
30133 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !24
30134 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]]
30135 // CHECK21: omp.body.continue30:
30136 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]]
30137 // CHECK21: omp.inner.for.inc31:
30138 // CHECK21-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !24
30139 // CHECK21-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP18]], 1
30140 // CHECK21-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !24
30141 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP25:![0-9]+]]
30142 // CHECK21: omp.inner.for.end33:
30143 // CHECK21-NEXT: store i32 10, i32* [[I22]], align 4
30144 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB35]], align 4
30145 // CHECK21-NEXT: store i32 9, i32* [[DOTOMP_UB36]], align 4
30146 // CHECK21-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB35]], align 4
30147 // CHECK21-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV37]], align 4
30148 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND39:%.*]]
30149 // CHECK21: omp.inner.for.cond39:
30150 // CHECK21-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV37]], align 4, !llvm.access.group !27
30151 // CHECK21-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB36]], align 4, !llvm.access.group !27
30152 // CHECK21-NEXT: [[CMP40:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
30153 // CHECK21-NEXT: br i1 [[CMP40]], label [[OMP_INNER_FOR_BODY41:%.*]], label [[OMP_INNER_FOR_END49:%.*]]
30154 // CHECK21: omp.inner.for.body41:
30155 // CHECK21-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV37]], align 4, !llvm.access.group !27
30156 // CHECK21-NEXT: [[MUL42:%.*]] = mul nsw i32 [[TMP22]], 1
30157 // CHECK21-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
30158 // CHECK21-NEXT: store i32 [[ADD43]], i32* [[I38]], align 4, !llvm.access.group !27
30159 // CHECK21-NEXT: [[TMP23:%.*]] = load i32, i32* [[I38]], align 4, !llvm.access.group !27
30160 // CHECK21-NEXT: [[IDXPROM44:%.*]] = sext i32 [[TMP23]] to i64
30161 // CHECK21-NEXT: [[ARRAYIDX45:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM44]]
30162 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX45]], align 4, !llvm.access.group !27
30163 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE46:%.*]]
30164 // CHECK21: omp.body.continue46:
30165 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC47:%.*]]
30166 // CHECK21: omp.inner.for.inc47:
30167 // CHECK21-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV37]], align 4, !llvm.access.group !27
30168 // CHECK21-NEXT: [[ADD48:%.*]] = add nsw i32 [[TMP24]], 1
30169 // CHECK21-NEXT: store i32 [[ADD48]], i32* [[DOTOMP_IV37]], align 4, !llvm.access.group !27
30170 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND39]], !llvm.loop [[LOOP28:![0-9]+]]
30171 // CHECK21: omp.inner.for.end49:
30172 // CHECK21-NEXT: store i32 10, i32* [[I38]], align 4
30173 // CHECK21-NEXT: [[TMP25:%.*]] = load i32, i32* [[M]], align 4
30174 // CHECK21-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_50]], align 4
30175 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB52]], align 4
30176 // CHECK21-NEXT: store i32 9, i32* [[DOTOMP_UB53]], align 4
30177 // CHECK21-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_LB52]], align 4
30178 // CHECK21-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV54]], align 4
30179 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND56:%.*]]
30180 // CHECK21: omp.inner.for.cond56:
30181 // CHECK21-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !30
30182 // CHECK21-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_UB53]], align 4, !llvm.access.group !30
30183 // CHECK21-NEXT: [[CMP57:%.*]] = icmp sle i32 [[TMP27]], [[TMP28]]
30184 // CHECK21-NEXT: br i1 [[CMP57]], label [[OMP_INNER_FOR_BODY58:%.*]], label [[OMP_INNER_FOR_END66:%.*]]
30185 // CHECK21: omp.inner.for.body58:
30186 // CHECK21-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !30
30187 // CHECK21-NEXT: [[MUL59:%.*]] = mul nsw i32 [[TMP29]], 1
30188 // CHECK21-NEXT: [[ADD60:%.*]] = add nsw i32 0, [[MUL59]]
30189 // CHECK21-NEXT: store i32 [[ADD60]], i32* [[I55]], align 4, !llvm.access.group !30
30190 // CHECK21-NEXT: [[TMP30:%.*]] = load i32, i32* [[I55]], align 4, !llvm.access.group !30
30191 // CHECK21-NEXT: [[IDXPROM61:%.*]] = sext i32 [[TMP30]] to i64
30192 // CHECK21-NEXT: [[ARRAYIDX62:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM61]]
30193 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX62]], align 4, !llvm.access.group !30
30194 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE63:%.*]]
30195 // CHECK21: omp.body.continue63:
30196 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC64:%.*]]
30197 // CHECK21: omp.inner.for.inc64:
30198 // CHECK21-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !30
30199 // CHECK21-NEXT: [[ADD65:%.*]] = add nsw i32 [[TMP31]], 1
30200 // CHECK21-NEXT: store i32 [[ADD65]], i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !30
30201 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND56]], !llvm.loop [[LOOP31:![0-9]+]]
30202 // CHECK21: omp.inner.for.end66:
30203 // CHECK21-NEXT: store i32 10, i32* [[I55]], align 4
30204 // CHECK21-NEXT: ret i32 0
30205 //
30206 //
30207 // CHECK22-LABEL: define {{[^@]+}}@main
30208 // CHECK22-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
30209 // CHECK22-NEXT: entry:
30210 // CHECK22-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
30211 // CHECK22-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
30212 // CHECK22-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
30213 // CHECK22-NEXT: [[N:%.*]] = alloca i32, align 4
30214 // CHECK22-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
30215 // CHECK22-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
30216 // CHECK22-NEXT: [[M:%.*]] = alloca i32, align 4
30217 // CHECK22-NEXT: [[TMP:%.*]] = alloca i32, align 4
30218 // CHECK22-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
30219 // CHECK22-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
30220 // CHECK22-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
30221 // CHECK22-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
30222 // CHECK22-NEXT: [[I:%.*]] = alloca i32, align 4
30223 // CHECK22-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
30224 // CHECK22-NEXT: [[I3:%.*]] = alloca i32, align 4
30225 // CHECK22-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
30226 // CHECK22-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
30227 // CHECK22-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
30228 // CHECK22-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4
30229 // CHECK22-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4
30230 // CHECK22-NEXT: [[I18:%.*]] = alloca i32, align 4
30231 // CHECK22-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
30232 // CHECK22-NEXT: [[I22:%.*]] = alloca i32, align 4
30233 // CHECK22-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
30234 // CHECK22-NEXT: [[_TMP40:%.*]] = alloca i32, align 4
30235 // CHECK22-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
30236 // CHECK22-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
30237 // CHECK22-NEXT: [[DOTOMP_LB46:%.*]] = alloca i32, align 4
30238 // CHECK22-NEXT: [[DOTOMP_UB47:%.*]] = alloca i32, align 4
30239 // CHECK22-NEXT: [[I48:%.*]] = alloca i32, align 4
30240 // CHECK22-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4
30241 // CHECK22-NEXT: [[I52:%.*]] = alloca i32, align 4
30242 // CHECK22-NEXT: [[_TMP69:%.*]] = alloca i32, align 4
30243 // CHECK22-NEXT: [[DOTCAPTURE_EXPR_70:%.*]] = alloca i32, align 4
30244 // CHECK22-NEXT: [[DOTCAPTURE_EXPR_71:%.*]] = alloca i32, align 4
30245 // CHECK22-NEXT: [[DOTOMP_LB75:%.*]] = alloca i32, align 4
30246 // CHECK22-NEXT: [[DOTOMP_UB76:%.*]] = alloca i32, align 4
30247 // CHECK22-NEXT: [[I77:%.*]] = alloca i32, align 4
30248 // CHECK22-NEXT: [[DOTOMP_IV80:%.*]] = alloca i32, align 4
30249 // CHECK22-NEXT: [[I81:%.*]] = alloca i32, align 4
30250 // CHECK22-NEXT: [[DOTCAPTURE_EXPR_98:%.*]] = alloca i32, align 4
30251 // CHECK22-NEXT: [[_TMP99:%.*]] = alloca i32, align 4
30252 // CHECK22-NEXT: [[DOTCAPTURE_EXPR_100:%.*]] = alloca i32, align 4
30253 // CHECK22-NEXT: [[DOTCAPTURE_EXPR_101:%.*]] = alloca i32, align 4
30254 // CHECK22-NEXT: [[DOTOMP_LB105:%.*]] = alloca i32, align 4
30255 // CHECK22-NEXT: [[DOTOMP_UB106:%.*]] = alloca i32, align 4
30256 // CHECK22-NEXT: [[I107:%.*]] = alloca i32, align 4
30257 // CHECK22-NEXT: [[DOTOMP_IV110:%.*]] = alloca i32, align 4
30258 // CHECK22-NEXT: [[I111:%.*]] = alloca i32, align 4
30259 // CHECK22-NEXT: store i32 0, i32* [[RETVAL]], align 4
30260 // CHECK22-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
30261 // CHECK22-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
30262 // CHECK22-NEXT: store i32 100, i32* [[N]], align 4
30263 // CHECK22-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
30264 // CHECK22-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
30265 // CHECK22-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
30266 // CHECK22-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
30267 // CHECK22-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
30268 // CHECK22-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
30269 // CHECK22-NEXT: store i32 10, i32* [[M]], align 4
30270 // CHECK22-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
30271 // CHECK22-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
30272 // CHECK22-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
30273 // CHECK22-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
30274 // CHECK22-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
30275 // CHECK22-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
30276 // CHECK22-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
30277 // CHECK22-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
30278 // CHECK22-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
30279 // CHECK22-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
30280 // CHECK22-NEXT: store i32 0, i32* [[I]], align 4
30281 // CHECK22-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
30282 // CHECK22-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
30283 // CHECK22-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
30284 // CHECK22: simd.if.then:
30285 // CHECK22-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
30286 // CHECK22-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
30287 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
30288 // CHECK22: omp.inner.for.cond:
30289 // CHECK22-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
30290 // CHECK22-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
30291 // CHECK22-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
30292 // CHECK22-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
30293 // CHECK22: omp.inner.for.body:
30294 // CHECK22-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
30295 // CHECK22-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
30296 // CHECK22-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
30297 // CHECK22-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !2
30298 // CHECK22-NEXT: [[TMP11:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !2
30299 // CHECK22-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
30300 // CHECK22-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
30301 // CHECK22-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
30302 // CHECK22-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
30303 // CHECK22: omp.body.continue:
30304 // CHECK22-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
30305 // CHECK22: omp.inner.for.inc:
30306 // CHECK22-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
30307 // CHECK22-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1
30308 // CHECK22-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
30309 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
30310 // CHECK22: omp.inner.for.end:
30311 // CHECK22-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
30312 // CHECK22-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0
30313 // CHECK22-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
30314 // CHECK22-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
30315 // CHECK22-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
30316 // CHECK22-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
30317 // CHECK22-NEXT: br label [[SIMD_IF_END]]
30318 // CHECK22: simd.if.end:
30319 // CHECK22-NEXT: [[TMP14:%.*]] = load i32, i32* [[N]], align 4
30320 // CHECK22-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
30321 // CHECK22-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
30322 // CHECK22-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 0
30323 // CHECK22-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
30324 // CHECK22-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1
30325 // CHECK22-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4
30326 // CHECK22-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4
30327 // CHECK22-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4
30328 // CHECK22-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_UB17]], align 4
30329 // CHECK22-NEXT: store i32 0, i32* [[I18]], align 4
30330 // CHECK22-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
30331 // CHECK22-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]]
30332 // CHECK22-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]]
30333 // CHECK22: simd.if.then20:
30334 // CHECK22-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4
30335 // CHECK22-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV21]], align 4
30336 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
30337 // CHECK22: omp.inner.for.cond23:
30338 // CHECK22-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
30339 // CHECK22-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !6
30340 // CHECK22-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
30341 // CHECK22-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]
30342 // CHECK22: omp.inner.for.body25:
30343 // CHECK22-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
30344 // CHECK22-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 1
30345 // CHECK22-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
30346 // CHECK22-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !6
30347 // CHECK22-NEXT: [[TMP22:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !6
30348 // CHECK22-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i64
30349 // CHECK22-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM28]]
30350 // CHECK22-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !6
30351 // CHECK22-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]]
30352 // CHECK22: omp.body.continue30:
30353 // CHECK22-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]]
30354 // CHECK22: omp.inner.for.inc31:
30355 // CHECK22-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
30356 // CHECK22-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP23]], 1
30357 // CHECK22-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
30358 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]]
30359 // CHECK22: omp.inner.for.end33:
30360 // CHECK22-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
30361 // CHECK22-NEXT: [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 0
30362 // CHECK22-NEXT: [[DIV35:%.*]] = sdiv i32 [[SUB34]], 1
30363 // CHECK22-NEXT: [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 1
30364 // CHECK22-NEXT: [[ADD37:%.*]] = add nsw i32 0, [[MUL36]]
30365 // CHECK22-NEXT: store i32 [[ADD37]], i32* [[I22]], align 4
30366 // CHECK22-NEXT: br label [[SIMD_IF_END38]]
30367 // CHECK22: simd.if.end38:
30368 // CHECK22-NEXT: [[TMP25:%.*]] = load i32, i32* [[M]], align 4
30369 // CHECK22-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_39]], align 4
30370 // CHECK22-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
30371 // CHECK22-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_41]], align 4
30372 // CHECK22-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
30373 // CHECK22-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 0
30374 // CHECK22-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
30375 // CHECK22-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
30376 // CHECK22-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
30377 // CHECK22-NEXT: store i32 0, i32* [[DOTOMP_LB46]], align 4
30378 // CHECK22-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
30379 // CHECK22-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_UB47]], align 4
30380 // CHECK22-NEXT: store i32 0, i32* [[I48]], align 4
30381 // CHECK22-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
30382 // CHECK22-NEXT: [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]]
30383 // CHECK22-NEXT: br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]]
30384 // CHECK22: simd.if.then50:
30385 // CHECK22-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_LB46]], align 4
30386 // CHECK22-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV51]], align 4
30387 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]]
30388 // CHECK22: omp.inner.for.cond53:
30389 // CHECK22-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
30390 // CHECK22-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB47]], align 4, !llvm.access.group !9
30391 // CHECK22-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]]
30392 // CHECK22-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]]
30393 // CHECK22: omp.inner.for.body55:
30394 // CHECK22-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
30395 // CHECK22-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 1
30396 // CHECK22-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]]
30397 // CHECK22-NEXT: store i32 [[ADD57]], i32* [[I52]], align 4, !llvm.access.group !9
30398 // CHECK22-NEXT: [[TMP34:%.*]] = load i32, i32* [[I52]], align 4, !llvm.access.group !9
30399 // CHECK22-NEXT: [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i64
30400 // CHECK22-NEXT: [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM58]]
30401 // CHECK22-NEXT: store i32 0, i32* [[ARRAYIDX59]], align 4, !llvm.access.group !9
30402 // CHECK22-NEXT: br label [[OMP_BODY_CONTINUE60:%.*]]
30403 // CHECK22: omp.body.continue60:
30404 // CHECK22-NEXT: br label [[OMP_INNER_FOR_INC61:%.*]]
30405 // CHECK22: omp.inner.for.inc61:
30406 // CHECK22-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
30407 // CHECK22-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP35]], 1
30408 // CHECK22-NEXT: store i32 [[ADD62]], i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
30409 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]]
30410 // CHECK22: omp.inner.for.end63:
30411 // CHECK22-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
30412 // CHECK22-NEXT: [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 0
30413 // CHECK22-NEXT: [[DIV65:%.*]] = sdiv i32 [[SUB64]], 1
30414 // CHECK22-NEXT: [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 1
30415 // CHECK22-NEXT: [[ADD67:%.*]] = add nsw i32 0, [[MUL66]]
30416 // CHECK22-NEXT: store i32 [[ADD67]], i32* [[I52]], align 4
30417 // CHECK22-NEXT: br label [[SIMD_IF_END68]]
30418 // CHECK22: simd.if.end68:
30419 // CHECK22-NEXT: [[TMP37:%.*]] = load i32, i32* [[N]], align 4
30420 // CHECK22-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_70]], align 4
30421 // CHECK22-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_70]], align 4
30422 // CHECK22-NEXT: [[SUB72:%.*]] = sub nsw i32 [[TMP38]], 0
30423 // CHECK22-NEXT: [[DIV73:%.*]] = sdiv i32 [[SUB72]], 1
30424 // CHECK22-NEXT: [[SUB74:%.*]] = sub nsw i32 [[DIV73]], 1
30425 // CHECK22-NEXT: store i32 [[SUB74]], i32* [[DOTCAPTURE_EXPR_71]], align 4
30426 // CHECK22-NEXT: store i32 0, i32* [[DOTOMP_LB75]], align 4
30427 // CHECK22-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_71]], align 4
30428 // CHECK22-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_UB76]], align 4
30429 // CHECK22-NEXT: store i32 0, i32* [[I77]], align 4
30430 // CHECK22-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_70]], align 4
30431 // CHECK22-NEXT: [[CMP78:%.*]] = icmp slt i32 0, [[TMP40]]
30432 // CHECK22-NEXT: br i1 [[CMP78]], label [[SIMD_IF_THEN79:%.*]], label [[SIMD_IF_END97:%.*]]
30433 // CHECK22: simd.if.then79:
30434 // CHECK22-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_LB75]], align 4
30435 // CHECK22-NEXT: store i32 [[TMP41]], i32* [[DOTOMP_IV80]], align 4
30436 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND82:%.*]]
30437 // CHECK22: omp.inner.for.cond82:
30438 // CHECK22-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IV80]], align 4, !llvm.access.group !12
30439 // CHECK22-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_UB76]], align 4, !llvm.access.group !12
30440 // CHECK22-NEXT: [[CMP83:%.*]] = icmp sle i32 [[TMP42]], [[TMP43]]
30441 // CHECK22-NEXT: br i1 [[CMP83]], label [[OMP_INNER_FOR_BODY84:%.*]], label [[OMP_INNER_FOR_END92:%.*]]
30442 // CHECK22: omp.inner.for.body84:
30443 // CHECK22-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_IV80]], align 4, !llvm.access.group !12
30444 // CHECK22-NEXT: [[MUL85:%.*]] = mul nsw i32 [[TMP44]], 1
30445 // CHECK22-NEXT: [[ADD86:%.*]] = add nsw i32 0, [[MUL85]]
30446 // CHECK22-NEXT: store i32 [[ADD86]], i32* [[I81]], align 4, !llvm.access.group !12
30447 // CHECK22-NEXT: [[TMP45:%.*]] = load i32, i32* [[I81]], align 4, !llvm.access.group !12
30448 // CHECK22-NEXT: [[IDXPROM87:%.*]] = sext i32 [[TMP45]] to i64
30449 // CHECK22-NEXT: [[ARRAYIDX88:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM87]]
30450 // CHECK22-NEXT: store i32 0, i32* [[ARRAYIDX88]], align 4, !llvm.access.group !12
30451 // CHECK22-NEXT: br label [[OMP_BODY_CONTINUE89:%.*]]
30452 // CHECK22: omp.body.continue89:
30453 // CHECK22-NEXT: br label [[OMP_INNER_FOR_INC90:%.*]]
30454 // CHECK22: omp.inner.for.inc90:
30455 // CHECK22-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_IV80]], align 4, !llvm.access.group !12
30456 // CHECK22-NEXT: [[ADD91:%.*]] = add nsw i32 [[TMP46]], 1
30457 // CHECK22-NEXT: store i32 [[ADD91]], i32* [[DOTOMP_IV80]], align 4, !llvm.access.group !12
30458 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND82]], !llvm.loop [[LOOP13:![0-9]+]]
30459 // CHECK22: omp.inner.for.end92:
30460 // CHECK22-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_70]], align 4
30461 // CHECK22-NEXT: [[SUB93:%.*]] = sub nsw i32 [[TMP47]], 0
30462 // CHECK22-NEXT: [[DIV94:%.*]] = sdiv i32 [[SUB93]], 1
30463 // CHECK22-NEXT: [[MUL95:%.*]] = mul nsw i32 [[DIV94]], 1
30464 // CHECK22-NEXT: [[ADD96:%.*]] = add nsw i32 0, [[MUL95]]
30465 // CHECK22-NEXT: store i32 [[ADD96]], i32* [[I81]], align 4
30466 // CHECK22-NEXT: br label [[SIMD_IF_END97]]
30467 // CHECK22: simd.if.end97:
30468 // CHECK22-NEXT: [[TMP48:%.*]] = load i32, i32* [[M]], align 4
30469 // CHECK22-NEXT: store i32 [[TMP48]], i32* [[DOTCAPTURE_EXPR_98]], align 4
30470 // CHECK22-NEXT: [[TMP49:%.*]] = load i32, i32* [[N]], align 4
30471 // CHECK22-NEXT: store i32 [[TMP49]], i32* [[DOTCAPTURE_EXPR_100]], align 4
30472 // CHECK22-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_100]], align 4
30473 // CHECK22-NEXT: [[SUB102:%.*]] = sub nsw i32 [[TMP50]], 0
30474 // CHECK22-NEXT: [[DIV103:%.*]] = sdiv i32 [[SUB102]], 1
30475 // CHECK22-NEXT: [[SUB104:%.*]] = sub nsw i32 [[DIV103]], 1
30476 // CHECK22-NEXT: store i32 [[SUB104]], i32* [[DOTCAPTURE_EXPR_101]], align 4
30477 // CHECK22-NEXT: store i32 0, i32* [[DOTOMP_LB105]], align 4
30478 // CHECK22-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_101]], align 4
30479 // CHECK22-NEXT: store i32 [[TMP51]], i32* [[DOTOMP_UB106]], align 4
30480 // CHECK22-NEXT: store i32 0, i32* [[I107]], align 4
30481 // CHECK22-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_100]], align 4
30482 // CHECK22-NEXT: [[CMP108:%.*]] = icmp slt i32 0, [[TMP52]]
30483 // CHECK22-NEXT: br i1 [[CMP108]], label [[SIMD_IF_THEN109:%.*]], label [[SIMD_IF_END127:%.*]]
30484 // CHECK22: simd.if.then109:
30485 // CHECK22-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_LB105]], align 4
30486 // CHECK22-NEXT: store i32 [[TMP53]], i32* [[DOTOMP_IV110]], align 4
30487 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND112:%.*]]
30488 // CHECK22: omp.inner.for.cond112:
30489 // CHECK22-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_IV110]], align 4, !llvm.access.group !15
30490 // CHECK22-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_UB106]], align 4, !llvm.access.group !15
30491 // CHECK22-NEXT: [[CMP113:%.*]] = icmp sle i32 [[TMP54]], [[TMP55]]
30492 // CHECK22-NEXT: br i1 [[CMP113]], label [[OMP_INNER_FOR_BODY114:%.*]], label [[OMP_INNER_FOR_END122:%.*]]
30493 // CHECK22: omp.inner.for.body114:
30494 // CHECK22-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTOMP_IV110]], align 4, !llvm.access.group !15
30495 // CHECK22-NEXT: [[MUL115:%.*]] = mul nsw i32 [[TMP56]], 1
30496 // CHECK22-NEXT: [[ADD116:%.*]] = add nsw i32 0, [[MUL115]]
30497 // CHECK22-NEXT: store i32 [[ADD116]], i32* [[I111]], align 4, !llvm.access.group !15
30498 // CHECK22-NEXT: [[TMP57:%.*]] = load i32, i32* [[I111]], align 4, !llvm.access.group !15
30499 // CHECK22-NEXT: [[IDXPROM117:%.*]] = sext i32 [[TMP57]] to i64
30500 // CHECK22-NEXT: [[ARRAYIDX118:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM117]]
30501 // CHECK22-NEXT: store i32 0, i32* [[ARRAYIDX118]], align 4, !llvm.access.group !15
30502 // CHECK22-NEXT: br label [[OMP_BODY_CONTINUE119:%.*]]
30503 // CHECK22: omp.body.continue119:
30504 // CHECK22-NEXT: br label [[OMP_INNER_FOR_INC120:%.*]]
30505 // CHECK22: omp.inner.for.inc120:
30506 // CHECK22-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTOMP_IV110]], align 4, !llvm.access.group !15
30507 // CHECK22-NEXT: [[ADD121:%.*]] = add nsw i32 [[TMP58]], 1
30508 // CHECK22-NEXT: store i32 [[ADD121]], i32* [[DOTOMP_IV110]], align 4, !llvm.access.group !15
30509 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND112]], !llvm.loop [[LOOP16:![0-9]+]]
30510 // CHECK22: omp.inner.for.end122:
30511 // CHECK22-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_100]], align 4
30512 // CHECK22-NEXT: [[SUB123:%.*]] = sub nsw i32 [[TMP59]], 0
30513 // CHECK22-NEXT: [[DIV124:%.*]] = sdiv i32 [[SUB123]], 1
30514 // CHECK22-NEXT: [[MUL125:%.*]] = mul nsw i32 [[DIV124]], 1
30515 // CHECK22-NEXT: [[ADD126:%.*]] = add nsw i32 0, [[MUL125]]
30516 // CHECK22-NEXT: store i32 [[ADD126]], i32* [[I111]], align 4
30517 // CHECK22-NEXT: br label [[SIMD_IF_END127]]
30518 // CHECK22: simd.if.end127:
30519 // CHECK22-NEXT: [[TMP60:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
30520 // CHECK22-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP60]])
30521 // CHECK22-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
30522 // CHECK22-NEXT: [[TMP61:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
30523 // CHECK22-NEXT: call void @llvm.stackrestore(i8* [[TMP61]])
30524 // CHECK22-NEXT: [[TMP62:%.*]] = load i32, i32* [[RETVAL]], align 4
30525 // CHECK22-NEXT: ret i32 [[TMP62]]
30526 //
30527 //
30528 // CHECK22-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
30529 // CHECK22-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
30530 // CHECK22-NEXT: entry:
30531 // CHECK22-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
30532 // CHECK22-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
30533 // CHECK22-NEXT: [[M:%.*]] = alloca i32, align 4
30534 // CHECK22-NEXT: [[TMP:%.*]] = alloca i32, align 4
30535 // CHECK22-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
30536 // CHECK22-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
30537 // CHECK22-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
30538 // CHECK22-NEXT: [[I:%.*]] = alloca i32, align 4
30539 // CHECK22-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
30540 // CHECK22-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
30541 // CHECK22-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
30542 // CHECK22-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
30543 // CHECK22-NEXT: [[I6:%.*]] = alloca i32, align 4
30544 // CHECK22-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
30545 // CHECK22-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
30546 // CHECK22-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4
30547 // CHECK22-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4
30548 // CHECK22-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
30549 // CHECK22-NEXT: [[I22:%.*]] = alloca i32, align 4
30550 // CHECK22-NEXT: [[_TMP34:%.*]] = alloca i32, align 4
30551 // CHECK22-NEXT: [[DOTOMP_LB35:%.*]] = alloca i32, align 4
30552 // CHECK22-NEXT: [[DOTOMP_UB36:%.*]] = alloca i32, align 4
30553 // CHECK22-NEXT: [[DOTOMP_IV37:%.*]] = alloca i32, align 4
30554 // CHECK22-NEXT: [[I38:%.*]] = alloca i32, align 4
30555 // CHECK22-NEXT: [[DOTCAPTURE_EXPR_50:%.*]] = alloca i32, align 4
30556 // CHECK22-NEXT: [[_TMP51:%.*]] = alloca i32, align 4
30557 // CHECK22-NEXT: [[DOTOMP_LB52:%.*]] = alloca i32, align 4
30558 // CHECK22-NEXT: [[DOTOMP_UB53:%.*]] = alloca i32, align 4
30559 // CHECK22-NEXT: [[DOTOMP_IV54:%.*]] = alloca i32, align 4
30560 // CHECK22-NEXT: [[I55:%.*]] = alloca i32, align 4
30561 // CHECK22-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
30562 // CHECK22-NEXT: store i32 10, i32* [[M]], align 4
30563 // CHECK22-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
30564 // CHECK22-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
30565 // CHECK22-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
30566 // CHECK22-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
30567 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
30568 // CHECK22: omp.inner.for.cond:
30569 // CHECK22-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
30570 // CHECK22-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
30571 // CHECK22-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
30572 // CHECK22-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
30573 // CHECK22: omp.inner.for.body:
30574 // CHECK22-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
30575 // CHECK22-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
30576 // CHECK22-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
30577 // CHECK22-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18
30578 // CHECK22-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !18
30579 // CHECK22-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
30580 // CHECK22-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
30581 // CHECK22-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
30582 // CHECK22-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
30583 // CHECK22: omp.body.continue:
30584 // CHECK22-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
30585 // CHECK22: omp.inner.for.inc:
30586 // CHECK22-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
30587 // CHECK22-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
30588 // CHECK22-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
30589 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
30590 // CHECK22: omp.inner.for.end:
30591 // CHECK22-NEXT: store i32 10, i32* [[I]], align 4
30592 // CHECK22-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
30593 // CHECK22-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4
30594 // CHECK22-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
30595 // CHECK22-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4
30596 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
30597 // CHECK22: omp.inner.for.cond7:
30598 // CHECK22-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
30599 // CHECK22-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !21
30600 // CHECK22-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
30601 // CHECK22-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
30602 // CHECK22: omp.inner.for.body9:
30603 // CHECK22-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
30604 // CHECK22-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1
30605 // CHECK22-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
30606 // CHECK22-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !21
30607 // CHECK22-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !21
30608 // CHECK22-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i64
30609 // CHECK22-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM12]]
30610 // CHECK22-NEXT: store i32 0, i32* [[ARRAYIDX13]], align 4, !llvm.access.group !21
30611 // CHECK22-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]
30612 // CHECK22: omp.body.continue14:
30613 // CHECK22-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]
30614 // CHECK22: omp.inner.for.inc15:
30615 // CHECK22-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
30616 // CHECK22-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP11]], 1
30617 // CHECK22-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
30618 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
30619 // CHECK22: omp.inner.for.end17:
30620 // CHECK22-NEXT: store i32 10, i32* [[I6]], align 4
30621 // CHECK22-NEXT: [[TMP12:%.*]] = load i32, i32* [[M]], align 4
30622 // CHECK22-NEXT: store i32 [[TMP12]], i32* [[DOTCAPTURE_EXPR_]], align 4
30623 // CHECK22-NEXT: store i32 0, i32* [[DOTOMP_LB19]], align 4
30624 // CHECK22-NEXT: store i32 9, i32* [[DOTOMP_UB20]], align 4
30625 // CHECK22-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB19]], align 4
30626 // CHECK22-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV21]], align 4
30627 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
30628 // CHECK22: omp.inner.for.cond23:
30629 // CHECK22-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !24
30630 // CHECK22-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB20]], align 4, !llvm.access.group !24
30631 // CHECK22-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
30632 // CHECK22-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]
30633 // CHECK22: omp.inner.for.body25:
30634 // CHECK22-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !24
30635 // CHECK22-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP16]], 1
30636 // CHECK22-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
30637 // CHECK22-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !24
30638 // CHECK22-NEXT: [[TMP17:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !24
30639 // CHECK22-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP17]] to i64
30640 // CHECK22-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM28]]
30641 // CHECK22-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !24
30642 // CHECK22-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]]
30643 // CHECK22: omp.body.continue30:
30644 // CHECK22-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]]
30645 // CHECK22: omp.inner.for.inc31:
30646 // CHECK22-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !24
30647 // CHECK22-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP18]], 1
30648 // CHECK22-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !24
30649 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP25:![0-9]+]]
30650 // CHECK22: omp.inner.for.end33:
30651 // CHECK22-NEXT: store i32 10, i32* [[I22]], align 4
30652 // CHECK22-NEXT: store i32 0, i32* [[DOTOMP_LB35]], align 4
30653 // CHECK22-NEXT: store i32 9, i32* [[DOTOMP_UB36]], align 4
30654 // CHECK22-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB35]], align 4
30655 // CHECK22-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV37]], align 4
30656 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND39:%.*]]
30657 // CHECK22: omp.inner.for.cond39:
30658 // CHECK22-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV37]], align 4, !llvm.access.group !27
30659 // CHECK22-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB36]], align 4, !llvm.access.group !27
30660 // CHECK22-NEXT: [[CMP40:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
30661 // CHECK22-NEXT: br i1 [[CMP40]], label [[OMP_INNER_FOR_BODY41:%.*]], label [[OMP_INNER_FOR_END49:%.*]]
30662 // CHECK22: omp.inner.for.body41:
30663 // CHECK22-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV37]], align 4, !llvm.access.group !27
30664 // CHECK22-NEXT: [[MUL42:%.*]] = mul nsw i32 [[TMP22]], 1
30665 // CHECK22-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
30666 // CHECK22-NEXT: store i32 [[ADD43]], i32* [[I38]], align 4, !llvm.access.group !27
30667 // CHECK22-NEXT: [[TMP23:%.*]] = load i32, i32* [[I38]], align 4, !llvm.access.group !27
30668 // CHECK22-NEXT: [[IDXPROM44:%.*]] = sext i32 [[TMP23]] to i64
30669 // CHECK22-NEXT: [[ARRAYIDX45:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM44]]
30670 // CHECK22-NEXT: store i32 0, i32* [[ARRAYIDX45]], align 4, !llvm.access.group !27
30671 // CHECK22-NEXT: br label [[OMP_BODY_CONTINUE46:%.*]]
30672 // CHECK22: omp.body.continue46:
30673 // CHECK22-NEXT: br label [[OMP_INNER_FOR_INC47:%.*]]
30674 // CHECK22: omp.inner.for.inc47:
30675 // CHECK22-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV37]], align 4, !llvm.access.group !27
30676 // CHECK22-NEXT: [[ADD48:%.*]] = add nsw i32 [[TMP24]], 1
30677 // CHECK22-NEXT: store i32 [[ADD48]], i32* [[DOTOMP_IV37]], align 4, !llvm.access.group !27
30678 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND39]], !llvm.loop [[LOOP28:![0-9]+]]
30679 // CHECK22: omp.inner.for.end49:
30680 // CHECK22-NEXT: store i32 10, i32* [[I38]], align 4
30681 // CHECK22-NEXT: [[TMP25:%.*]] = load i32, i32* [[M]], align 4
30682 // CHECK22-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_50]], align 4
30683 // CHECK22-NEXT: store i32 0, i32* [[DOTOMP_LB52]], align 4
30684 // CHECK22-NEXT: store i32 9, i32* [[DOTOMP_UB53]], align 4
30685 // CHECK22-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_LB52]], align 4
30686 // CHECK22-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV54]], align 4
30687 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND56:%.*]]
30688 // CHECK22: omp.inner.for.cond56:
30689 // CHECK22-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !30
30690 // CHECK22-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_UB53]], align 4, !llvm.access.group !30
30691 // CHECK22-NEXT: [[CMP57:%.*]] = icmp sle i32 [[TMP27]], [[TMP28]]
30692 // CHECK22-NEXT: br i1 [[CMP57]], label [[OMP_INNER_FOR_BODY58:%.*]], label [[OMP_INNER_FOR_END66:%.*]]
30693 // CHECK22: omp.inner.for.body58:
30694 // CHECK22-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !30
30695 // CHECK22-NEXT: [[MUL59:%.*]] = mul nsw i32 [[TMP29]], 1
30696 // CHECK22-NEXT: [[ADD60:%.*]] = add nsw i32 0, [[MUL59]]
30697 // CHECK22-NEXT: store i32 [[ADD60]], i32* [[I55]], align 4, !llvm.access.group !30
30698 // CHECK22-NEXT: [[TMP30:%.*]] = load i32, i32* [[I55]], align 4, !llvm.access.group !30
30699 // CHECK22-NEXT: [[IDXPROM61:%.*]] = sext i32 [[TMP30]] to i64
30700 // CHECK22-NEXT: [[ARRAYIDX62:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM61]]
30701 // CHECK22-NEXT: store i32 0, i32* [[ARRAYIDX62]], align 4, !llvm.access.group !30
30702 // CHECK22-NEXT: br label [[OMP_BODY_CONTINUE63:%.*]]
30703 // CHECK22: omp.body.continue63:
30704 // CHECK22-NEXT: br label [[OMP_INNER_FOR_INC64:%.*]]
30705 // CHECK22: omp.inner.for.inc64:
30706 // CHECK22-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !30
30707 // CHECK22-NEXT: [[ADD65:%.*]] = add nsw i32 [[TMP31]], 1
30708 // CHECK22-NEXT: store i32 [[ADD65]], i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !30
30709 // CHECK22-NEXT: br label [[OMP_INNER_FOR_COND56]], !llvm.loop [[LOOP31:![0-9]+]]
30710 // CHECK22: omp.inner.for.end66:
30711 // CHECK22-NEXT: store i32 10, i32* [[I55]], align 4
30712 // CHECK22-NEXT: ret i32 0
30713 //
30714 //
30715 // CHECK23-LABEL: define {{[^@]+}}@main
30716 // CHECK23-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
30717 // CHECK23-NEXT: entry:
30718 // CHECK23-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
30719 // CHECK23-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
30720 // CHECK23-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
30721 // CHECK23-NEXT: [[N:%.*]] = alloca i32, align 4
30722 // CHECK23-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
30723 // CHECK23-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
30724 // CHECK23-NEXT: [[M:%.*]] = alloca i32, align 4
30725 // CHECK23-NEXT: [[TMP:%.*]] = alloca i32, align 4
30726 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
30727 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
30728 // CHECK23-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
30729 // CHECK23-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
30730 // CHECK23-NEXT: [[I:%.*]] = alloca i32, align 4
30731 // CHECK23-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
30732 // CHECK23-NEXT: [[I3:%.*]] = alloca i32, align 4
30733 // CHECK23-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
30734 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
30735 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
30736 // CHECK23-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4
30737 // CHECK23-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4
30738 // CHECK23-NEXT: [[I18:%.*]] = alloca i32, align 4
30739 // CHECK23-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
30740 // CHECK23-NEXT: [[I22:%.*]] = alloca i32, align 4
30741 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
30742 // CHECK23-NEXT: [[_TMP39:%.*]] = alloca i32, align 4
30743 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
30744 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
30745 // CHECK23-NEXT: [[DOTOMP_LB45:%.*]] = alloca i32, align 4
30746 // CHECK23-NEXT: [[DOTOMP_UB46:%.*]] = alloca i32, align 4
30747 // CHECK23-NEXT: [[I47:%.*]] = alloca i32, align 4
30748 // CHECK23-NEXT: [[DOTOMP_IV50:%.*]] = alloca i32, align 4
30749 // CHECK23-NEXT: [[I51:%.*]] = alloca i32, align 4
30750 // CHECK23-NEXT: [[_TMP67:%.*]] = alloca i32, align 4
30751 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_68:%.*]] = alloca i32, align 4
30752 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_69:%.*]] = alloca i32, align 4
30753 // CHECK23-NEXT: [[DOTOMP_LB73:%.*]] = alloca i32, align 4
30754 // CHECK23-NEXT: [[DOTOMP_UB74:%.*]] = alloca i32, align 4
30755 // CHECK23-NEXT: [[I75:%.*]] = alloca i32, align 4
30756 // CHECK23-NEXT: [[DOTOMP_IV78:%.*]] = alloca i32, align 4
30757 // CHECK23-NEXT: [[I79:%.*]] = alloca i32, align 4
30758 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_95:%.*]] = alloca i32, align 4
30759 // CHECK23-NEXT: [[_TMP96:%.*]] = alloca i32, align 4
30760 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_97:%.*]] = alloca i32, align 4
30761 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_98:%.*]] = alloca i32, align 4
30762 // CHECK23-NEXT: [[DOTOMP_LB102:%.*]] = alloca i32, align 4
30763 // CHECK23-NEXT: [[DOTOMP_UB103:%.*]] = alloca i32, align 4
30764 // CHECK23-NEXT: [[I104:%.*]] = alloca i32, align 4
30765 // CHECK23-NEXT: [[DOTOMP_IV107:%.*]] = alloca i32, align 4
30766 // CHECK23-NEXT: [[I108:%.*]] = alloca i32, align 4
30767 // CHECK23-NEXT: store i32 0, i32* [[RETVAL]], align 4
30768 // CHECK23-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
30769 // CHECK23-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
30770 // CHECK23-NEXT: store i32 100, i32* [[N]], align 4
30771 // CHECK23-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
30772 // CHECK23-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
30773 // CHECK23-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
30774 // CHECK23-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
30775 // CHECK23-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
30776 // CHECK23-NEXT: store i32 10, i32* [[M]], align 4
30777 // CHECK23-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
30778 // CHECK23-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
30779 // CHECK23-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
30780 // CHECK23-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
30781 // CHECK23-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
30782 // CHECK23-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
30783 // CHECK23-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
30784 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
30785 // CHECK23-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
30786 // CHECK23-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
30787 // CHECK23-NEXT: store i32 0, i32* [[I]], align 4
30788 // CHECK23-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
30789 // CHECK23-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
30790 // CHECK23-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
30791 // CHECK23: simd.if.then:
30792 // CHECK23-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
30793 // CHECK23-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
30794 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
30795 // CHECK23: omp.inner.for.cond:
30796 // CHECK23-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
30797 // CHECK23-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
30798 // CHECK23-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
30799 // CHECK23-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
30800 // CHECK23: omp.inner.for.body:
30801 // CHECK23-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
30802 // CHECK23-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
30803 // CHECK23-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
30804 // CHECK23-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !3
30805 // CHECK23-NEXT: [[TMP10:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !3
30806 // CHECK23-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP10]]
30807 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
30808 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
30809 // CHECK23: omp.body.continue:
30810 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
30811 // CHECK23: omp.inner.for.inc:
30812 // CHECK23-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
30813 // CHECK23-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1
30814 // CHECK23-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
30815 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
30816 // CHECK23: omp.inner.for.end:
30817 // CHECK23-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
30818 // CHECK23-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0
30819 // CHECK23-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
30820 // CHECK23-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
30821 // CHECK23-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
30822 // CHECK23-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
30823 // CHECK23-NEXT: br label [[SIMD_IF_END]]
30824 // CHECK23: simd.if.end:
30825 // CHECK23-NEXT: [[TMP13:%.*]] = load i32, i32* [[N]], align 4
30826 // CHECK23-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_11]], align 4
30827 // CHECK23-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
30828 // CHECK23-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 0
30829 // CHECK23-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
30830 // CHECK23-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1
30831 // CHECK23-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4
30832 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4
30833 // CHECK23-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4
30834 // CHECK23-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_UB17]], align 4
30835 // CHECK23-NEXT: store i32 0, i32* [[I18]], align 4
30836 // CHECK23-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
30837 // CHECK23-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]]
30838 // CHECK23-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]]
30839 // CHECK23: simd.if.then20:
30840 // CHECK23-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4
30841 // CHECK23-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV21]], align 4
30842 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
30843 // CHECK23: omp.inner.for.cond23:
30844 // CHECK23-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
30845 // CHECK23-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !7
30846 // CHECK23-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
30847 // CHECK23-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]]
30848 // CHECK23: omp.inner.for.body25:
30849 // CHECK23-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
30850 // CHECK23-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 1
30851 // CHECK23-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
30852 // CHECK23-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !7
30853 // CHECK23-NEXT: [[TMP21:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !7
30854 // CHECK23-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP21]]
30855 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX28]], align 4, !llvm.access.group !7
30856 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE29:%.*]]
30857 // CHECK23: omp.body.continue29:
30858 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC30:%.*]]
30859 // CHECK23: omp.inner.for.inc30:
30860 // CHECK23-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
30861 // CHECK23-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 1
30862 // CHECK23-NEXT: store i32 [[ADD31]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
30863 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]]
30864 // CHECK23: omp.inner.for.end32:
30865 // CHECK23-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
30866 // CHECK23-NEXT: [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 0
30867 // CHECK23-NEXT: [[DIV34:%.*]] = sdiv i32 [[SUB33]], 1
30868 // CHECK23-NEXT: [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 1
30869 // CHECK23-NEXT: [[ADD36:%.*]] = add nsw i32 0, [[MUL35]]
30870 // CHECK23-NEXT: store i32 [[ADD36]], i32* [[I22]], align 4
30871 // CHECK23-NEXT: br label [[SIMD_IF_END37]]
30872 // CHECK23: simd.if.end37:
30873 // CHECK23-NEXT: [[TMP24:%.*]] = load i32, i32* [[M]], align 4
30874 // CHECK23-NEXT: store i32 [[TMP24]], i32* [[DOTCAPTURE_EXPR_38]], align 4
30875 // CHECK23-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4
30876 // CHECK23-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_40]], align 4
30877 // CHECK23-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
30878 // CHECK23-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 0
30879 // CHECK23-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1
30880 // CHECK23-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1
30881 // CHECK23-NEXT: store i32 [[SUB44]], i32* [[DOTCAPTURE_EXPR_41]], align 4
30882 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB45]], align 4
30883 // CHECK23-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
30884 // CHECK23-NEXT: store i32 [[TMP27]], i32* [[DOTOMP_UB46]], align 4
30885 // CHECK23-NEXT: store i32 0, i32* [[I47]], align 4
30886 // CHECK23-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
30887 // CHECK23-NEXT: [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]]
30888 // CHECK23-NEXT: br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]]
30889 // CHECK23: simd.if.then49:
30890 // CHECK23-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_LB45]], align 4
30891 // CHECK23-NEXT: store i32 [[TMP29]], i32* [[DOTOMP_IV50]], align 4
30892 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND52:%.*]]
30893 // CHECK23: omp.inner.for.cond52:
30894 // CHECK23-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
30895 // CHECK23-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_UB46]], align 4, !llvm.access.group !10
30896 // CHECK23-NEXT: [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]]
30897 // CHECK23-NEXT: br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]]
30898 // CHECK23: omp.inner.for.body54:
30899 // CHECK23-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
30900 // CHECK23-NEXT: [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 1
30901 // CHECK23-NEXT: [[ADD56:%.*]] = add nsw i32 0, [[MUL55]]
30902 // CHECK23-NEXT: store i32 [[ADD56]], i32* [[I51]], align 4, !llvm.access.group !10
30903 // CHECK23-NEXT: [[TMP33:%.*]] = load i32, i32* [[I51]], align 4, !llvm.access.group !10
30904 // CHECK23-NEXT: [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP33]]
30905 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX57]], align 4, !llvm.access.group !10
30906 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE58:%.*]]
30907 // CHECK23: omp.body.continue58:
30908 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC59:%.*]]
30909 // CHECK23: omp.inner.for.inc59:
30910 // CHECK23-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
30911 // CHECK23-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP34]], 1
30912 // CHECK23-NEXT: store i32 [[ADD60]], i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
30913 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]]
30914 // CHECK23: omp.inner.for.end61:
30915 // CHECK23-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
30916 // CHECK23-NEXT: [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 0
30917 // CHECK23-NEXT: [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1
30918 // CHECK23-NEXT: [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 1
30919 // CHECK23-NEXT: [[ADD65:%.*]] = add nsw i32 0, [[MUL64]]
30920 // CHECK23-NEXT: store i32 [[ADD65]], i32* [[I51]], align 4
30921 // CHECK23-NEXT: br label [[SIMD_IF_END66]]
30922 // CHECK23: simd.if.end66:
30923 // CHECK23-NEXT: [[TMP36:%.*]] = load i32, i32* [[N]], align 4
30924 // CHECK23-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_68]], align 4
30925 // CHECK23-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_68]], align 4
30926 // CHECK23-NEXT: [[SUB70:%.*]] = sub nsw i32 [[TMP37]], 0
30927 // CHECK23-NEXT: [[DIV71:%.*]] = sdiv i32 [[SUB70]], 1
30928 // CHECK23-NEXT: [[SUB72:%.*]] = sub nsw i32 [[DIV71]], 1
30929 // CHECK23-NEXT: store i32 [[SUB72]], i32* [[DOTCAPTURE_EXPR_69]], align 4
30930 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB73]], align 4
30931 // CHECK23-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_69]], align 4
30932 // CHECK23-NEXT: store i32 [[TMP38]], i32* [[DOTOMP_UB74]], align 4
30933 // CHECK23-NEXT: store i32 0, i32* [[I75]], align 4
30934 // CHECK23-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_68]], align 4
30935 // CHECK23-NEXT: [[CMP76:%.*]] = icmp slt i32 0, [[TMP39]]
30936 // CHECK23-NEXT: br i1 [[CMP76]], label [[SIMD_IF_THEN77:%.*]], label [[SIMD_IF_END94:%.*]]
30937 // CHECK23: simd.if.then77:
30938 // CHECK23-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_LB73]], align 4
30939 // CHECK23-NEXT: store i32 [[TMP40]], i32* [[DOTOMP_IV78]], align 4
30940 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND80:%.*]]
30941 // CHECK23: omp.inner.for.cond80:
30942 // CHECK23-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_IV78]], align 4, !llvm.access.group !13
30943 // CHECK23-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_UB74]], align 4, !llvm.access.group !13
30944 // CHECK23-NEXT: [[CMP81:%.*]] = icmp sle i32 [[TMP41]], [[TMP42]]
30945 // CHECK23-NEXT: br i1 [[CMP81]], label [[OMP_INNER_FOR_BODY82:%.*]], label [[OMP_INNER_FOR_END89:%.*]]
30946 // CHECK23: omp.inner.for.body82:
30947 // CHECK23-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_IV78]], align 4, !llvm.access.group !13
30948 // CHECK23-NEXT: [[MUL83:%.*]] = mul nsw i32 [[TMP43]], 1
30949 // CHECK23-NEXT: [[ADD84:%.*]] = add nsw i32 0, [[MUL83]]
30950 // CHECK23-NEXT: store i32 [[ADD84]], i32* [[I79]], align 4, !llvm.access.group !13
30951 // CHECK23-NEXT: [[TMP44:%.*]] = load i32, i32* [[I79]], align 4, !llvm.access.group !13
30952 // CHECK23-NEXT: [[ARRAYIDX85:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP44]]
30953 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX85]], align 4, !llvm.access.group !13
30954 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE86:%.*]]
30955 // CHECK23: omp.body.continue86:
30956 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC87:%.*]]
30957 // CHECK23: omp.inner.for.inc87:
30958 // CHECK23-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_IV78]], align 4, !llvm.access.group !13
30959 // CHECK23-NEXT: [[ADD88:%.*]] = add nsw i32 [[TMP45]], 1
30960 // CHECK23-NEXT: store i32 [[ADD88]], i32* [[DOTOMP_IV78]], align 4, !llvm.access.group !13
30961 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND80]], !llvm.loop [[LOOP14:![0-9]+]]
30962 // CHECK23: omp.inner.for.end89:
30963 // CHECK23-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_68]], align 4
30964 // CHECK23-NEXT: [[SUB90:%.*]] = sub nsw i32 [[TMP46]], 0
30965 // CHECK23-NEXT: [[DIV91:%.*]] = sdiv i32 [[SUB90]], 1
30966 // CHECK23-NEXT: [[MUL92:%.*]] = mul nsw i32 [[DIV91]], 1
30967 // CHECK23-NEXT: [[ADD93:%.*]] = add nsw i32 0, [[MUL92]]
30968 // CHECK23-NEXT: store i32 [[ADD93]], i32* [[I79]], align 4
30969 // CHECK23-NEXT: br label [[SIMD_IF_END94]]
30970 // CHECK23: simd.if.end94:
30971 // CHECK23-NEXT: [[TMP47:%.*]] = load i32, i32* [[M]], align 4
30972 // CHECK23-NEXT: store i32 [[TMP47]], i32* [[DOTCAPTURE_EXPR_95]], align 4
30973 // CHECK23-NEXT: [[TMP48:%.*]] = load i32, i32* [[N]], align 4
30974 // CHECK23-NEXT: store i32 [[TMP48]], i32* [[DOTCAPTURE_EXPR_97]], align 4
30975 // CHECK23-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_97]], align 4
30976 // CHECK23-NEXT: [[SUB99:%.*]] = sub nsw i32 [[TMP49]], 0
30977 // CHECK23-NEXT: [[DIV100:%.*]] = sdiv i32 [[SUB99]], 1
30978 // CHECK23-NEXT: [[SUB101:%.*]] = sub nsw i32 [[DIV100]], 1
30979 // CHECK23-NEXT: store i32 [[SUB101]], i32* [[DOTCAPTURE_EXPR_98]], align 4
30980 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB102]], align 4
30981 // CHECK23-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_98]], align 4
30982 // CHECK23-NEXT: store i32 [[TMP50]], i32* [[DOTOMP_UB103]], align 4
30983 // CHECK23-NEXT: store i32 0, i32* [[I104]], align 4
30984 // CHECK23-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_97]], align 4
30985 // CHECK23-NEXT: [[CMP105:%.*]] = icmp slt i32 0, [[TMP51]]
30986 // CHECK23-NEXT: br i1 [[CMP105]], label [[SIMD_IF_THEN106:%.*]], label [[SIMD_IF_END123:%.*]]
30987 // CHECK23: simd.if.then106:
30988 // CHECK23-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_LB102]], align 4
30989 // CHECK23-NEXT: store i32 [[TMP52]], i32* [[DOTOMP_IV107]], align 4
30990 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND109:%.*]]
30991 // CHECK23: omp.inner.for.cond109:
30992 // CHECK23-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_IV107]], align 4, !llvm.access.group !16
30993 // CHECK23-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_UB103]], align 4, !llvm.access.group !16
30994 // CHECK23-NEXT: [[CMP110:%.*]] = icmp sle i32 [[TMP53]], [[TMP54]]
30995 // CHECK23-NEXT: br i1 [[CMP110]], label [[OMP_INNER_FOR_BODY111:%.*]], label [[OMP_INNER_FOR_END118:%.*]]
30996 // CHECK23: omp.inner.for.body111:
30997 // CHECK23-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_IV107]], align 4, !llvm.access.group !16
30998 // CHECK23-NEXT: [[MUL112:%.*]] = mul nsw i32 [[TMP55]], 1
30999 // CHECK23-NEXT: [[ADD113:%.*]] = add nsw i32 0, [[MUL112]]
31000 // CHECK23-NEXT: store i32 [[ADD113]], i32* [[I108]], align 4, !llvm.access.group !16
31001 // CHECK23-NEXT: [[TMP56:%.*]] = load i32, i32* [[I108]], align 4, !llvm.access.group !16
31002 // CHECK23-NEXT: [[ARRAYIDX114:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP56]]
31003 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX114]], align 4, !llvm.access.group !16
31004 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE115:%.*]]
31005 // CHECK23: omp.body.continue115:
31006 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC116:%.*]]
31007 // CHECK23: omp.inner.for.inc116:
31008 // CHECK23-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTOMP_IV107]], align 4, !llvm.access.group !16
31009 // CHECK23-NEXT: [[ADD117:%.*]] = add nsw i32 [[TMP57]], 1
31010 // CHECK23-NEXT: store i32 [[ADD117]], i32* [[DOTOMP_IV107]], align 4, !llvm.access.group !16
31011 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND109]], !llvm.loop [[LOOP17:![0-9]+]]
31012 // CHECK23: omp.inner.for.end118:
31013 // CHECK23-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_97]], align 4
31014 // CHECK23-NEXT: [[SUB119:%.*]] = sub nsw i32 [[TMP58]], 0
31015 // CHECK23-NEXT: [[DIV120:%.*]] = sdiv i32 [[SUB119]], 1
31016 // CHECK23-NEXT: [[MUL121:%.*]] = mul nsw i32 [[DIV120]], 1
31017 // CHECK23-NEXT: [[ADD122:%.*]] = add nsw i32 0, [[MUL121]]
31018 // CHECK23-NEXT: store i32 [[ADD122]], i32* [[I108]], align 4
31019 // CHECK23-NEXT: br label [[SIMD_IF_END123]]
31020 // CHECK23: simd.if.end123:
31021 // CHECK23-NEXT: [[TMP59:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
31022 // CHECK23-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP59]])
31023 // CHECK23-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
31024 // CHECK23-NEXT: [[TMP60:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
31025 // CHECK23-NEXT: call void @llvm.stackrestore(i8* [[TMP60]])
31026 // CHECK23-NEXT: [[TMP61:%.*]] = load i32, i32* [[RETVAL]], align 4
31027 // CHECK23-NEXT: ret i32 [[TMP61]]
31028 //
31029 //
31030 // CHECK23-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
31031 // CHECK23-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
31032 // CHECK23-NEXT: entry:
31033 // CHECK23-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
31034 // CHECK23-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
31035 // CHECK23-NEXT: [[M:%.*]] = alloca i32, align 4
31036 // CHECK23-NEXT: [[TMP:%.*]] = alloca i32, align 4
31037 // CHECK23-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
31038 // CHECK23-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
31039 // CHECK23-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
31040 // CHECK23-NEXT: [[I:%.*]] = alloca i32, align 4
31041 // CHECK23-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
31042 // CHECK23-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
31043 // CHECK23-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
31044 // CHECK23-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
31045 // CHECK23-NEXT: [[I6:%.*]] = alloca i32, align 4
31046 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
31047 // CHECK23-NEXT: [[_TMP17:%.*]] = alloca i32, align 4
31048 // CHECK23-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4
31049 // CHECK23-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4
31050 // CHECK23-NEXT: [[DOTOMP_IV20:%.*]] = alloca i32, align 4
31051 // CHECK23-NEXT: [[I21:%.*]] = alloca i32, align 4
31052 // CHECK23-NEXT: [[_TMP32:%.*]] = alloca i32, align 4
31053 // CHECK23-NEXT: [[DOTOMP_LB33:%.*]] = alloca i32, align 4
31054 // CHECK23-NEXT: [[DOTOMP_UB34:%.*]] = alloca i32, align 4
31055 // CHECK23-NEXT: [[DOTOMP_IV35:%.*]] = alloca i32, align 4
31056 // CHECK23-NEXT: [[I36:%.*]] = alloca i32, align 4
31057 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_47:%.*]] = alloca i32, align 4
31058 // CHECK23-NEXT: [[_TMP48:%.*]] = alloca i32, align 4
31059 // CHECK23-NEXT: [[DOTOMP_LB49:%.*]] = alloca i32, align 4
31060 // CHECK23-NEXT: [[DOTOMP_UB50:%.*]] = alloca i32, align 4
31061 // CHECK23-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4
31062 // CHECK23-NEXT: [[I52:%.*]] = alloca i32, align 4
31063 // CHECK23-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
31064 // CHECK23-NEXT: store i32 10, i32* [[M]], align 4
31065 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
31066 // CHECK23-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
31067 // CHECK23-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
31068 // CHECK23-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
31069 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
31070 // CHECK23: omp.inner.for.cond:
31071 // CHECK23-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
31072 // CHECK23-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
31073 // CHECK23-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
31074 // CHECK23-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
31075 // CHECK23: omp.inner.for.body:
31076 // CHECK23-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
31077 // CHECK23-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
31078 // CHECK23-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
31079 // CHECK23-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !19
31080 // CHECK23-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !19
31081 // CHECK23-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]]
31082 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
31083 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
31084 // CHECK23: omp.body.continue:
31085 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
31086 // CHECK23: omp.inner.for.inc:
31087 // CHECK23-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
31088 // CHECK23-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
31089 // CHECK23-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
31090 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
31091 // CHECK23: omp.inner.for.end:
31092 // CHECK23-NEXT: store i32 10, i32* [[I]], align 4
31093 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
31094 // CHECK23-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4
31095 // CHECK23-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
31096 // CHECK23-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4
31097 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
31098 // CHECK23: omp.inner.for.cond7:
31099 // CHECK23-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
31100 // CHECK23-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !22
31101 // CHECK23-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
31102 // CHECK23-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
31103 // CHECK23: omp.inner.for.body9:
31104 // CHECK23-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
31105 // CHECK23-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1
31106 // CHECK23-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
31107 // CHECK23-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !22
31108 // CHECK23-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !22
31109 // CHECK23-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP10]]
31110 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX12]], align 4, !llvm.access.group !22
31111 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]]
31112 // CHECK23: omp.body.continue13:
31113 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]]
31114 // CHECK23: omp.inner.for.inc14:
31115 // CHECK23-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
31116 // CHECK23-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP11]], 1
31117 // CHECK23-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
31118 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP23:![0-9]+]]
31119 // CHECK23: omp.inner.for.end16:
31120 // CHECK23-NEXT: store i32 10, i32* [[I6]], align 4
31121 // CHECK23-NEXT: [[TMP12:%.*]] = load i32, i32* [[M]], align 4
31122 // CHECK23-NEXT: store i32 [[TMP12]], i32* [[DOTCAPTURE_EXPR_]], align 4
31123 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4
31124 // CHECK23-NEXT: store i32 9, i32* [[DOTOMP_UB19]], align 4
31125 // CHECK23-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4
31126 // CHECK23-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV20]], align 4
31127 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
31128 // CHECK23: omp.inner.for.cond22:
31129 // CHECK23-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !25
31130 // CHECK23-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4, !llvm.access.group !25
31131 // CHECK23-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
31132 // CHECK23-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]]
31133 // CHECK23: omp.inner.for.body24:
31134 // CHECK23-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !25
31135 // CHECK23-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP16]], 1
31136 // CHECK23-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
31137 // CHECK23-NEXT: store i32 [[ADD26]], i32* [[I21]], align 4, !llvm.access.group !25
31138 // CHECK23-NEXT: [[TMP17:%.*]] = load i32, i32* [[I21]], align 4, !llvm.access.group !25
31139 // CHECK23-NEXT: [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP17]]
31140 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX27]], align 4, !llvm.access.group !25
31141 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE28:%.*]]
31142 // CHECK23: omp.body.continue28:
31143 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC29:%.*]]
31144 // CHECK23: omp.inner.for.inc29:
31145 // CHECK23-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !25
31146 // CHECK23-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP18]], 1
31147 // CHECK23-NEXT: store i32 [[ADD30]], i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !25
31148 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP26:![0-9]+]]
31149 // CHECK23: omp.inner.for.end31:
31150 // CHECK23-NEXT: store i32 10, i32* [[I21]], align 4
31151 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB33]], align 4
31152 // CHECK23-NEXT: store i32 9, i32* [[DOTOMP_UB34]], align 4
31153 // CHECK23-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB33]], align 4
31154 // CHECK23-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV35]], align 4
31155 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND37:%.*]]
31156 // CHECK23: omp.inner.for.cond37:
31157 // CHECK23-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV35]], align 4, !llvm.access.group !28
31158 // CHECK23-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB34]], align 4, !llvm.access.group !28
31159 // CHECK23-NEXT: [[CMP38:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
31160 // CHECK23-NEXT: br i1 [[CMP38]], label [[OMP_INNER_FOR_BODY39:%.*]], label [[OMP_INNER_FOR_END46:%.*]]
31161 // CHECK23: omp.inner.for.body39:
31162 // CHECK23-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV35]], align 4, !llvm.access.group !28
31163 // CHECK23-NEXT: [[MUL40:%.*]] = mul nsw i32 [[TMP22]], 1
31164 // CHECK23-NEXT: [[ADD41:%.*]] = add nsw i32 0, [[MUL40]]
31165 // CHECK23-NEXT: store i32 [[ADD41]], i32* [[I36]], align 4, !llvm.access.group !28
31166 // CHECK23-NEXT: [[TMP23:%.*]] = load i32, i32* [[I36]], align 4, !llvm.access.group !28
31167 // CHECK23-NEXT: [[ARRAYIDX42:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP23]]
31168 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX42]], align 4, !llvm.access.group !28
31169 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE43:%.*]]
31170 // CHECK23: omp.body.continue43:
31171 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC44:%.*]]
31172 // CHECK23: omp.inner.for.inc44:
31173 // CHECK23-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV35]], align 4, !llvm.access.group !28
31174 // CHECK23-NEXT: [[ADD45:%.*]] = add nsw i32 [[TMP24]], 1
31175 // CHECK23-NEXT: store i32 [[ADD45]], i32* [[DOTOMP_IV35]], align 4, !llvm.access.group !28
31176 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND37]], !llvm.loop [[LOOP29:![0-9]+]]
31177 // CHECK23: omp.inner.for.end46:
31178 // CHECK23-NEXT: store i32 10, i32* [[I36]], align 4
31179 // CHECK23-NEXT: [[TMP25:%.*]] = load i32, i32* [[M]], align 4
31180 // CHECK23-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_47]], align 4
31181 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB49]], align 4
31182 // CHECK23-NEXT: store i32 9, i32* [[DOTOMP_UB50]], align 4
31183 // CHECK23-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_LB49]], align 4
31184 // CHECK23-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV51]], align 4
31185 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]]
31186 // CHECK23: omp.inner.for.cond53:
31187 // CHECK23-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !31
31188 // CHECK23-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_UB50]], align 4, !llvm.access.group !31
31189 // CHECK23-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP27]], [[TMP28]]
31190 // CHECK23-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END62:%.*]]
31191 // CHECK23: omp.inner.for.body55:
31192 // CHECK23-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !31
31193 // CHECK23-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP29]], 1
31194 // CHECK23-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]]
31195 // CHECK23-NEXT: store i32 [[ADD57]], i32* [[I52]], align 4, !llvm.access.group !31
31196 // CHECK23-NEXT: [[TMP30:%.*]] = load i32, i32* [[I52]], align 4, !llvm.access.group !31
31197 // CHECK23-NEXT: [[ARRAYIDX58:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP30]]
31198 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX58]], align 4, !llvm.access.group !31
31199 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE59:%.*]]
31200 // CHECK23: omp.body.continue59:
31201 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC60:%.*]]
31202 // CHECK23: omp.inner.for.inc60:
31203 // CHECK23-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !31
31204 // CHECK23-NEXT: [[ADD61:%.*]] = add nsw i32 [[TMP31]], 1
31205 // CHECK23-NEXT: store i32 [[ADD61]], i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !31
31206 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP32:![0-9]+]]
31207 // CHECK23: omp.inner.for.end62:
31208 // CHECK23-NEXT: store i32 10, i32* [[I52]], align 4
31209 // CHECK23-NEXT: ret i32 0
31210 //
31211 //
31212 // CHECK24-LABEL: define {{[^@]+}}@main
31213 // CHECK24-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
31214 // CHECK24-NEXT: entry:
31215 // CHECK24-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
31216 // CHECK24-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
31217 // CHECK24-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
31218 // CHECK24-NEXT: [[N:%.*]] = alloca i32, align 4
31219 // CHECK24-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
31220 // CHECK24-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
31221 // CHECK24-NEXT: [[M:%.*]] = alloca i32, align 4
31222 // CHECK24-NEXT: [[TMP:%.*]] = alloca i32, align 4
31223 // CHECK24-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
31224 // CHECK24-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
31225 // CHECK24-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
31226 // CHECK24-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
31227 // CHECK24-NEXT: [[I:%.*]] = alloca i32, align 4
31228 // CHECK24-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
31229 // CHECK24-NEXT: [[I3:%.*]] = alloca i32, align 4
31230 // CHECK24-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
31231 // CHECK24-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
31232 // CHECK24-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
31233 // CHECK24-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4
31234 // CHECK24-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4
31235 // CHECK24-NEXT: [[I18:%.*]] = alloca i32, align 4
31236 // CHECK24-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
31237 // CHECK24-NEXT: [[I22:%.*]] = alloca i32, align 4
31238 // CHECK24-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
31239 // CHECK24-NEXT: [[_TMP39:%.*]] = alloca i32, align 4
31240 // CHECK24-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
31241 // CHECK24-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
31242 // CHECK24-NEXT: [[DOTOMP_LB45:%.*]] = alloca i32, align 4
31243 // CHECK24-NEXT: [[DOTOMP_UB46:%.*]] = alloca i32, align 4
31244 // CHECK24-NEXT: [[I47:%.*]] = alloca i32, align 4
31245 // CHECK24-NEXT: [[DOTOMP_IV50:%.*]] = alloca i32, align 4
31246 // CHECK24-NEXT: [[I51:%.*]] = alloca i32, align 4
31247 // CHECK24-NEXT: [[_TMP67:%.*]] = alloca i32, align 4
31248 // CHECK24-NEXT: [[DOTCAPTURE_EXPR_68:%.*]] = alloca i32, align 4
31249 // CHECK24-NEXT: [[DOTCAPTURE_EXPR_69:%.*]] = alloca i32, align 4
31250 // CHECK24-NEXT: [[DOTOMP_LB73:%.*]] = alloca i32, align 4
31251 // CHECK24-NEXT: [[DOTOMP_UB74:%.*]] = alloca i32, align 4
31252 // CHECK24-NEXT: [[I75:%.*]] = alloca i32, align 4
31253 // CHECK24-NEXT: [[DOTOMP_IV78:%.*]] = alloca i32, align 4
31254 // CHECK24-NEXT: [[I79:%.*]] = alloca i32, align 4
31255 // CHECK24-NEXT: [[DOTCAPTURE_EXPR_95:%.*]] = alloca i32, align 4
31256 // CHECK24-NEXT: [[_TMP96:%.*]] = alloca i32, align 4
31257 // CHECK24-NEXT: [[DOTCAPTURE_EXPR_97:%.*]] = alloca i32, align 4
31258 // CHECK24-NEXT: [[DOTCAPTURE_EXPR_98:%.*]] = alloca i32, align 4
31259 // CHECK24-NEXT: [[DOTOMP_LB102:%.*]] = alloca i32, align 4
31260 // CHECK24-NEXT: [[DOTOMP_UB103:%.*]] = alloca i32, align 4
31261 // CHECK24-NEXT: [[I104:%.*]] = alloca i32, align 4
31262 // CHECK24-NEXT: [[DOTOMP_IV107:%.*]] = alloca i32, align 4
31263 // CHECK24-NEXT: [[I108:%.*]] = alloca i32, align 4
31264 // CHECK24-NEXT: store i32 0, i32* [[RETVAL]], align 4
31265 // CHECK24-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
31266 // CHECK24-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
31267 // CHECK24-NEXT: store i32 100, i32* [[N]], align 4
31268 // CHECK24-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
31269 // CHECK24-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
31270 // CHECK24-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
31271 // CHECK24-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
31272 // CHECK24-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
31273 // CHECK24-NEXT: store i32 10, i32* [[M]], align 4
31274 // CHECK24-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
31275 // CHECK24-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
31276 // CHECK24-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
31277 // CHECK24-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
31278 // CHECK24-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
31279 // CHECK24-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
31280 // CHECK24-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
31281 // CHECK24-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
31282 // CHECK24-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
31283 // CHECK24-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
31284 // CHECK24-NEXT: store i32 0, i32* [[I]], align 4
31285 // CHECK24-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
31286 // CHECK24-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
31287 // CHECK24-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
31288 // CHECK24: simd.if.then:
31289 // CHECK24-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
31290 // CHECK24-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
31291 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
31292 // CHECK24: omp.inner.for.cond:
31293 // CHECK24-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
31294 // CHECK24-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
31295 // CHECK24-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
31296 // CHECK24-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
31297 // CHECK24: omp.inner.for.body:
31298 // CHECK24-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
31299 // CHECK24-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
31300 // CHECK24-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
31301 // CHECK24-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !3
31302 // CHECK24-NEXT: [[TMP10:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !3
31303 // CHECK24-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP10]]
31304 // CHECK24-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
31305 // CHECK24-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
31306 // CHECK24: omp.body.continue:
31307 // CHECK24-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
31308 // CHECK24: omp.inner.for.inc:
31309 // CHECK24-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
31310 // CHECK24-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1
31311 // CHECK24-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
31312 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
31313 // CHECK24: omp.inner.for.end:
31314 // CHECK24-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
31315 // CHECK24-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0
31316 // CHECK24-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
31317 // CHECK24-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
31318 // CHECK24-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
31319 // CHECK24-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
31320 // CHECK24-NEXT: br label [[SIMD_IF_END]]
31321 // CHECK24: simd.if.end:
31322 // CHECK24-NEXT: [[TMP13:%.*]] = load i32, i32* [[N]], align 4
31323 // CHECK24-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_11]], align 4
31324 // CHECK24-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
31325 // CHECK24-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 0
31326 // CHECK24-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
31327 // CHECK24-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1
31328 // CHECK24-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4
31329 // CHECK24-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4
31330 // CHECK24-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4
31331 // CHECK24-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_UB17]], align 4
31332 // CHECK24-NEXT: store i32 0, i32* [[I18]], align 4
31333 // CHECK24-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
31334 // CHECK24-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]]
31335 // CHECK24-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]]
31336 // CHECK24: simd.if.then20:
31337 // CHECK24-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4
31338 // CHECK24-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV21]], align 4
31339 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
31340 // CHECK24: omp.inner.for.cond23:
31341 // CHECK24-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
31342 // CHECK24-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !7
31343 // CHECK24-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
31344 // CHECK24-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]]
31345 // CHECK24: omp.inner.for.body25:
31346 // CHECK24-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
31347 // CHECK24-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 1
31348 // CHECK24-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
31349 // CHECK24-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !7
31350 // CHECK24-NEXT: [[TMP21:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !7
31351 // CHECK24-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP21]]
31352 // CHECK24-NEXT: store i32 0, i32* [[ARRAYIDX28]], align 4, !llvm.access.group !7
31353 // CHECK24-NEXT: br label [[OMP_BODY_CONTINUE29:%.*]]
31354 // CHECK24: omp.body.continue29:
31355 // CHECK24-NEXT: br label [[OMP_INNER_FOR_INC30:%.*]]
31356 // CHECK24: omp.inner.for.inc30:
31357 // CHECK24-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
31358 // CHECK24-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 1
31359 // CHECK24-NEXT: store i32 [[ADD31]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
31360 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]]
31361 // CHECK24: omp.inner.for.end32:
31362 // CHECK24-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
31363 // CHECK24-NEXT: [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 0
31364 // CHECK24-NEXT: [[DIV34:%.*]] = sdiv i32 [[SUB33]], 1
31365 // CHECK24-NEXT: [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 1
31366 // CHECK24-NEXT: [[ADD36:%.*]] = add nsw i32 0, [[MUL35]]
31367 // CHECK24-NEXT: store i32 [[ADD36]], i32* [[I22]], align 4
31368 // CHECK24-NEXT: br label [[SIMD_IF_END37]]
31369 // CHECK24: simd.if.end37:
31370 // CHECK24-NEXT: [[TMP24:%.*]] = load i32, i32* [[M]], align 4
31371 // CHECK24-NEXT: store i32 [[TMP24]], i32* [[DOTCAPTURE_EXPR_38]], align 4
31372 // CHECK24-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4
31373 // CHECK24-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_40]], align 4
31374 // CHECK24-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
31375 // CHECK24-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 0
31376 // CHECK24-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1
31377 // CHECK24-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1
31378 // CHECK24-NEXT: store i32 [[SUB44]], i32* [[DOTCAPTURE_EXPR_41]], align 4
31379 // CHECK24-NEXT: store i32 0, i32* [[DOTOMP_LB45]], align 4
31380 // CHECK24-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
31381 // CHECK24-NEXT: store i32 [[TMP27]], i32* [[DOTOMP_UB46]], align 4
31382 // CHECK24-NEXT: store i32 0, i32* [[I47]], align 4
31383 // CHECK24-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
31384 // CHECK24-NEXT: [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]]
31385 // CHECK24-NEXT: br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]]
31386 // CHECK24: simd.if.then49:
31387 // CHECK24-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_LB45]], align 4
31388 // CHECK24-NEXT: store i32 [[TMP29]], i32* [[DOTOMP_IV50]], align 4
31389 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND52:%.*]]
31390 // CHECK24: omp.inner.for.cond52:
31391 // CHECK24-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
31392 // CHECK24-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_UB46]], align 4, !llvm.access.group !10
31393 // CHECK24-NEXT: [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]]
31394 // CHECK24-NEXT: br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]]
31395 // CHECK24: omp.inner.for.body54:
31396 // CHECK24-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
31397 // CHECK24-NEXT: [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 1
31398 // CHECK24-NEXT: [[ADD56:%.*]] = add nsw i32 0, [[MUL55]]
31399 // CHECK24-NEXT: store i32 [[ADD56]], i32* [[I51]], align 4, !llvm.access.group !10
31400 // CHECK24-NEXT: [[TMP33:%.*]] = load i32, i32* [[I51]], align 4, !llvm.access.group !10
31401 // CHECK24-NEXT: [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP33]]
31402 // CHECK24-NEXT: store i32 0, i32* [[ARRAYIDX57]], align 4, !llvm.access.group !10
31403 // CHECK24-NEXT: br label [[OMP_BODY_CONTINUE58:%.*]]
31404 // CHECK24: omp.body.continue58:
31405 // CHECK24-NEXT: br label [[OMP_INNER_FOR_INC59:%.*]]
31406 // CHECK24: omp.inner.for.inc59:
31407 // CHECK24-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
31408 // CHECK24-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP34]], 1
31409 // CHECK24-NEXT: store i32 [[ADD60]], i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
31410 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]]
31411 // CHECK24: omp.inner.for.end61:
31412 // CHECK24-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
31413 // CHECK24-NEXT: [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 0
31414 // CHECK24-NEXT: [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1
31415 // CHECK24-NEXT: [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 1
31416 // CHECK24-NEXT: [[ADD65:%.*]] = add nsw i32 0, [[MUL64]]
31417 // CHECK24-NEXT: store i32 [[ADD65]], i32* [[I51]], align 4
31418 // CHECK24-NEXT: br label [[SIMD_IF_END66]]
31419 // CHECK24: simd.if.end66:
31420 // CHECK24-NEXT: [[TMP36:%.*]] = load i32, i32* [[N]], align 4
31421 // CHECK24-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_68]], align 4
31422 // CHECK24-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_68]], align 4
31423 // CHECK24-NEXT: [[SUB70:%.*]] = sub nsw i32 [[TMP37]], 0
31424 // CHECK24-NEXT: [[DIV71:%.*]] = sdiv i32 [[SUB70]], 1
31425 // CHECK24-NEXT: [[SUB72:%.*]] = sub nsw i32 [[DIV71]], 1
31426 // CHECK24-NEXT: store i32 [[SUB72]], i32* [[DOTCAPTURE_EXPR_69]], align 4
31427 // CHECK24-NEXT: store i32 0, i32* [[DOTOMP_LB73]], align 4
31428 // CHECK24-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_69]], align 4
31429 // CHECK24-NEXT: store i32 [[TMP38]], i32* [[DOTOMP_UB74]], align 4
31430 // CHECK24-NEXT: store i32 0, i32* [[I75]], align 4
31431 // CHECK24-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_68]], align 4
31432 // CHECK24-NEXT: [[CMP76:%.*]] = icmp slt i32 0, [[TMP39]]
31433 // CHECK24-NEXT: br i1 [[CMP76]], label [[SIMD_IF_THEN77:%.*]], label [[SIMD_IF_END94:%.*]]
31434 // CHECK24: simd.if.then77:
31435 // CHECK24-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_LB73]], align 4
31436 // CHECK24-NEXT: store i32 [[TMP40]], i32* [[DOTOMP_IV78]], align 4
31437 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND80:%.*]]
31438 // CHECK24: omp.inner.for.cond80:
31439 // CHECK24-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_IV78]], align 4, !llvm.access.group !13
31440 // CHECK24-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_UB74]], align 4, !llvm.access.group !13
31441 // CHECK24-NEXT: [[CMP81:%.*]] = icmp sle i32 [[TMP41]], [[TMP42]]
31442 // CHECK24-NEXT: br i1 [[CMP81]], label [[OMP_INNER_FOR_BODY82:%.*]], label [[OMP_INNER_FOR_END89:%.*]]
31443 // CHECK24: omp.inner.for.body82:
31444 // CHECK24-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_IV78]], align 4, !llvm.access.group !13
31445 // CHECK24-NEXT: [[MUL83:%.*]] = mul nsw i32 [[TMP43]], 1
31446 // CHECK24-NEXT: [[ADD84:%.*]] = add nsw i32 0, [[MUL83]]
31447 // CHECK24-NEXT: store i32 [[ADD84]], i32* [[I79]], align 4, !llvm.access.group !13
31448 // CHECK24-NEXT: [[TMP44:%.*]] = load i32, i32* [[I79]], align 4, !llvm.access.group !13
31449 // CHECK24-NEXT: [[ARRAYIDX85:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP44]]
31450 // CHECK24-NEXT: store i32 0, i32* [[ARRAYIDX85]], align 4, !llvm.access.group !13
31451 // CHECK24-NEXT: br label [[OMP_BODY_CONTINUE86:%.*]]
31452 // CHECK24: omp.body.continue86:
31453 // CHECK24-NEXT: br label [[OMP_INNER_FOR_INC87:%.*]]
31454 // CHECK24: omp.inner.for.inc87:
31455 // CHECK24-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_IV78]], align 4, !llvm.access.group !13
31456 // CHECK24-NEXT: [[ADD88:%.*]] = add nsw i32 [[TMP45]], 1
31457 // CHECK24-NEXT: store i32 [[ADD88]], i32* [[DOTOMP_IV78]], align 4, !llvm.access.group !13
31458 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND80]], !llvm.loop [[LOOP14:![0-9]+]]
31459 // CHECK24: omp.inner.for.end89:
31460 // CHECK24-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_68]], align 4
31461 // CHECK24-NEXT: [[SUB90:%.*]] = sub nsw i32 [[TMP46]], 0
31462 // CHECK24-NEXT: [[DIV91:%.*]] = sdiv i32 [[SUB90]], 1
31463 // CHECK24-NEXT: [[MUL92:%.*]] = mul nsw i32 [[DIV91]], 1
31464 // CHECK24-NEXT: [[ADD93:%.*]] = add nsw i32 0, [[MUL92]]
31465 // CHECK24-NEXT: store i32 [[ADD93]], i32* [[I79]], align 4
31466 // CHECK24-NEXT: br label [[SIMD_IF_END94]]
31467 // CHECK24: simd.if.end94:
31468 // CHECK24-NEXT: [[TMP47:%.*]] = load i32, i32* [[M]], align 4
31469 // CHECK24-NEXT: store i32 [[TMP47]], i32* [[DOTCAPTURE_EXPR_95]], align 4
31470 // CHECK24-NEXT: [[TMP48:%.*]] = load i32, i32* [[N]], align 4
31471 // CHECK24-NEXT: store i32 [[TMP48]], i32* [[DOTCAPTURE_EXPR_97]], align 4
31472 // CHECK24-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_97]], align 4
31473 // CHECK24-NEXT: [[SUB99:%.*]] = sub nsw i32 [[TMP49]], 0
31474 // CHECK24-NEXT: [[DIV100:%.*]] = sdiv i32 [[SUB99]], 1
31475 // CHECK24-NEXT: [[SUB101:%.*]] = sub nsw i32 [[DIV100]], 1
31476 // CHECK24-NEXT: store i32 [[SUB101]], i32* [[DOTCAPTURE_EXPR_98]], align 4
31477 // CHECK24-NEXT: store i32 0, i32* [[DOTOMP_LB102]], align 4
31478 // CHECK24-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_98]], align 4
31479 // CHECK24-NEXT: store i32 [[TMP50]], i32* [[DOTOMP_UB103]], align 4
31480 // CHECK24-NEXT: store i32 0, i32* [[I104]], align 4
31481 // CHECK24-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_97]], align 4
31482 // CHECK24-NEXT: [[CMP105:%.*]] = icmp slt i32 0, [[TMP51]]
31483 // CHECK24-NEXT: br i1 [[CMP105]], label [[SIMD_IF_THEN106:%.*]], label [[SIMD_IF_END123:%.*]]
31484 // CHECK24: simd.if.then106:
31485 // CHECK24-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_LB102]], align 4
31486 // CHECK24-NEXT: store i32 [[TMP52]], i32* [[DOTOMP_IV107]], align 4
31487 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND109:%.*]]
31488 // CHECK24: omp.inner.for.cond109:
31489 // CHECK24-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_IV107]], align 4, !llvm.access.group !16
31490 // CHECK24-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_UB103]], align 4, !llvm.access.group !16
31491 // CHECK24-NEXT: [[CMP110:%.*]] = icmp sle i32 [[TMP53]], [[TMP54]]
31492 // CHECK24-NEXT: br i1 [[CMP110]], label [[OMP_INNER_FOR_BODY111:%.*]], label [[OMP_INNER_FOR_END118:%.*]]
31493 // CHECK24: omp.inner.for.body111:
31494 // CHECK24-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_IV107]], align 4, !llvm.access.group !16
31495 // CHECK24-NEXT: [[MUL112:%.*]] = mul nsw i32 [[TMP55]], 1
31496 // CHECK24-NEXT: [[ADD113:%.*]] = add nsw i32 0, [[MUL112]]
31497 // CHECK24-NEXT: store i32 [[ADD113]], i32* [[I108]], align 4, !llvm.access.group !16
31498 // CHECK24-NEXT: [[TMP56:%.*]] = load i32, i32* [[I108]], align 4, !llvm.access.group !16
31499 // CHECK24-NEXT: [[ARRAYIDX114:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP56]]
31500 // CHECK24-NEXT: store i32 0, i32* [[ARRAYIDX114]], align 4, !llvm.access.group !16
31501 // CHECK24-NEXT: br label [[OMP_BODY_CONTINUE115:%.*]]
31502 // CHECK24: omp.body.continue115:
31503 // CHECK24-NEXT: br label [[OMP_INNER_FOR_INC116:%.*]]
31504 // CHECK24: omp.inner.for.inc116:
31505 // CHECK24-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTOMP_IV107]], align 4, !llvm.access.group !16
31506 // CHECK24-NEXT: [[ADD117:%.*]] = add nsw i32 [[TMP57]], 1
31507 // CHECK24-NEXT: store i32 [[ADD117]], i32* [[DOTOMP_IV107]], align 4, !llvm.access.group !16
31508 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND109]], !llvm.loop [[LOOP17:![0-9]+]]
31509 // CHECK24: omp.inner.for.end118:
31510 // CHECK24-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_97]], align 4
31511 // CHECK24-NEXT: [[SUB119:%.*]] = sub nsw i32 [[TMP58]], 0
31512 // CHECK24-NEXT: [[DIV120:%.*]] = sdiv i32 [[SUB119]], 1
31513 // CHECK24-NEXT: [[MUL121:%.*]] = mul nsw i32 [[DIV120]], 1
31514 // CHECK24-NEXT: [[ADD122:%.*]] = add nsw i32 0, [[MUL121]]
31515 // CHECK24-NEXT: store i32 [[ADD122]], i32* [[I108]], align 4
31516 // CHECK24-NEXT: br label [[SIMD_IF_END123]]
31517 // CHECK24: simd.if.end123:
31518 // CHECK24-NEXT: [[TMP59:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
31519 // CHECK24-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP59]])
31520 // CHECK24-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
31521 // CHECK24-NEXT: [[TMP60:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
31522 // CHECK24-NEXT: call void @llvm.stackrestore(i8* [[TMP60]])
31523 // CHECK24-NEXT: [[TMP61:%.*]] = load i32, i32* [[RETVAL]], align 4
31524 // CHECK24-NEXT: ret i32 [[TMP61]]
31525 //
31526 //
31527 // CHECK24-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
31528 // CHECK24-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
31529 // CHECK24-NEXT: entry:
31530 // CHECK24-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
31531 // CHECK24-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
31532 // CHECK24-NEXT: [[M:%.*]] = alloca i32, align 4
31533 // CHECK24-NEXT: [[TMP:%.*]] = alloca i32, align 4
31534 // CHECK24-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
31535 // CHECK24-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
31536 // CHECK24-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
31537 // CHECK24-NEXT: [[I:%.*]] = alloca i32, align 4
31538 // CHECK24-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
31539 // CHECK24-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
31540 // CHECK24-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
31541 // CHECK24-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
31542 // CHECK24-NEXT: [[I6:%.*]] = alloca i32, align 4
31543 // CHECK24-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
31544 // CHECK24-NEXT: [[_TMP17:%.*]] = alloca i32, align 4
31545 // CHECK24-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4
31546 // CHECK24-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4
31547 // CHECK24-NEXT: [[DOTOMP_IV20:%.*]] = alloca i32, align 4
31548 // CHECK24-NEXT: [[I21:%.*]] = alloca i32, align 4
31549 // CHECK24-NEXT: [[_TMP32:%.*]] = alloca i32, align 4
31550 // CHECK24-NEXT: [[DOTOMP_LB33:%.*]] = alloca i32, align 4
31551 // CHECK24-NEXT: [[DOTOMP_UB34:%.*]] = alloca i32, align 4
31552 // CHECK24-NEXT: [[DOTOMP_IV35:%.*]] = alloca i32, align 4
31553 // CHECK24-NEXT: [[I36:%.*]] = alloca i32, align 4
31554 // CHECK24-NEXT: [[DOTCAPTURE_EXPR_47:%.*]] = alloca i32, align 4
31555 // CHECK24-NEXT: [[_TMP48:%.*]] = alloca i32, align 4
31556 // CHECK24-NEXT: [[DOTOMP_LB49:%.*]] = alloca i32, align 4
31557 // CHECK24-NEXT: [[DOTOMP_UB50:%.*]] = alloca i32, align 4
31558 // CHECK24-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4
31559 // CHECK24-NEXT: [[I52:%.*]] = alloca i32, align 4
31560 // CHECK24-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
31561 // CHECK24-NEXT: store i32 10, i32* [[M]], align 4
31562 // CHECK24-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
31563 // CHECK24-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
31564 // CHECK24-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
31565 // CHECK24-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
31566 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
31567 // CHECK24: omp.inner.for.cond:
31568 // CHECK24-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
31569 // CHECK24-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
31570 // CHECK24-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
31571 // CHECK24-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
31572 // CHECK24: omp.inner.for.body:
31573 // CHECK24-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
31574 // CHECK24-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
31575 // CHECK24-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
31576 // CHECK24-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !19
31577 // CHECK24-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !19
31578 // CHECK24-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]]
31579 // CHECK24-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
31580 // CHECK24-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
31581 // CHECK24: omp.body.continue:
31582 // CHECK24-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
31583 // CHECK24: omp.inner.for.inc:
31584 // CHECK24-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
31585 // CHECK24-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
31586 // CHECK24-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
31587 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
31588 // CHECK24: omp.inner.for.end:
31589 // CHECK24-NEXT: store i32 10, i32* [[I]], align 4
31590 // CHECK24-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
31591 // CHECK24-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4
31592 // CHECK24-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
31593 // CHECK24-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4
31594 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
31595 // CHECK24: omp.inner.for.cond7:
31596 // CHECK24-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
31597 // CHECK24-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !22
31598 // CHECK24-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
31599 // CHECK24-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
31600 // CHECK24: omp.inner.for.body9:
31601 // CHECK24-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
31602 // CHECK24-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1
31603 // CHECK24-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
31604 // CHECK24-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !22
31605 // CHECK24-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !22
31606 // CHECK24-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP10]]
31607 // CHECK24-NEXT: store i32 0, i32* [[ARRAYIDX12]], align 4, !llvm.access.group !22
31608 // CHECK24-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]]
31609 // CHECK24: omp.body.continue13:
31610 // CHECK24-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]]
31611 // CHECK24: omp.inner.for.inc14:
31612 // CHECK24-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
31613 // CHECK24-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP11]], 1
31614 // CHECK24-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
31615 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP23:![0-9]+]]
31616 // CHECK24: omp.inner.for.end16:
31617 // CHECK24-NEXT: store i32 10, i32* [[I6]], align 4
31618 // CHECK24-NEXT: [[TMP12:%.*]] = load i32, i32* [[M]], align 4
31619 // CHECK24-NEXT: store i32 [[TMP12]], i32* [[DOTCAPTURE_EXPR_]], align 4
31620 // CHECK24-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4
31621 // CHECK24-NEXT: store i32 9, i32* [[DOTOMP_UB19]], align 4
31622 // CHECK24-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4
31623 // CHECK24-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV20]], align 4
31624 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
31625 // CHECK24: omp.inner.for.cond22:
31626 // CHECK24-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !25
31627 // CHECK24-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4, !llvm.access.group !25
31628 // CHECK24-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
31629 // CHECK24-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]]
31630 // CHECK24: omp.inner.for.body24:
31631 // CHECK24-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !25
31632 // CHECK24-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP16]], 1
31633 // CHECK24-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
31634 // CHECK24-NEXT: store i32 [[ADD26]], i32* [[I21]], align 4, !llvm.access.group !25
31635 // CHECK24-NEXT: [[TMP17:%.*]] = load i32, i32* [[I21]], align 4, !llvm.access.group !25
31636 // CHECK24-NEXT: [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP17]]
31637 // CHECK24-NEXT: store i32 0, i32* [[ARRAYIDX27]], align 4, !llvm.access.group !25
31638 // CHECK24-NEXT: br label [[OMP_BODY_CONTINUE28:%.*]]
31639 // CHECK24: omp.body.continue28:
31640 // CHECK24-NEXT: br label [[OMP_INNER_FOR_INC29:%.*]]
31641 // CHECK24: omp.inner.for.inc29:
31642 // CHECK24-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !25
31643 // CHECK24-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP18]], 1
31644 // CHECK24-NEXT: store i32 [[ADD30]], i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !25
31645 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP26:![0-9]+]]
31646 // CHECK24: omp.inner.for.end31:
31647 // CHECK24-NEXT: store i32 10, i32* [[I21]], align 4
31648 // CHECK24-NEXT: store i32 0, i32* [[DOTOMP_LB33]], align 4
31649 // CHECK24-NEXT: store i32 9, i32* [[DOTOMP_UB34]], align 4
31650 // CHECK24-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB33]], align 4
31651 // CHECK24-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV35]], align 4
31652 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND37:%.*]]
31653 // CHECK24: omp.inner.for.cond37:
31654 // CHECK24-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV35]], align 4, !llvm.access.group !28
31655 // CHECK24-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB34]], align 4, !llvm.access.group !28
31656 // CHECK24-NEXT: [[CMP38:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
31657 // CHECK24-NEXT: br i1 [[CMP38]], label [[OMP_INNER_FOR_BODY39:%.*]], label [[OMP_INNER_FOR_END46:%.*]]
31658 // CHECK24: omp.inner.for.body39:
31659 // CHECK24-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV35]], align 4, !llvm.access.group !28
31660 // CHECK24-NEXT: [[MUL40:%.*]] = mul nsw i32 [[TMP22]], 1
31661 // CHECK24-NEXT: [[ADD41:%.*]] = add nsw i32 0, [[MUL40]]
31662 // CHECK24-NEXT: store i32 [[ADD41]], i32* [[I36]], align 4, !llvm.access.group !28
31663 // CHECK24-NEXT: [[TMP23:%.*]] = load i32, i32* [[I36]], align 4, !llvm.access.group !28
31664 // CHECK24-NEXT: [[ARRAYIDX42:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP23]]
31665 // CHECK24-NEXT: store i32 0, i32* [[ARRAYIDX42]], align 4, !llvm.access.group !28
31666 // CHECK24-NEXT: br label [[OMP_BODY_CONTINUE43:%.*]]
31667 // CHECK24: omp.body.continue43:
31668 // CHECK24-NEXT: br label [[OMP_INNER_FOR_INC44:%.*]]
31669 // CHECK24: omp.inner.for.inc44:
31670 // CHECK24-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV35]], align 4, !llvm.access.group !28
31671 // CHECK24-NEXT: [[ADD45:%.*]] = add nsw i32 [[TMP24]], 1
31672 // CHECK24-NEXT: store i32 [[ADD45]], i32* [[DOTOMP_IV35]], align 4, !llvm.access.group !28
31673 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND37]], !llvm.loop [[LOOP29:![0-9]+]]
31674 // CHECK24: omp.inner.for.end46:
31675 // CHECK24-NEXT: store i32 10, i32* [[I36]], align 4
31676 // CHECK24-NEXT: [[TMP25:%.*]] = load i32, i32* [[M]], align 4
31677 // CHECK24-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_47]], align 4
31678 // CHECK24-NEXT: store i32 0, i32* [[DOTOMP_LB49]], align 4
31679 // CHECK24-NEXT: store i32 9, i32* [[DOTOMP_UB50]], align 4
31680 // CHECK24-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_LB49]], align 4
31681 // CHECK24-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV51]], align 4
31682 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]]
31683 // CHECK24: omp.inner.for.cond53:
31684 // CHECK24-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !31
31685 // CHECK24-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_UB50]], align 4, !llvm.access.group !31
31686 // CHECK24-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP27]], [[TMP28]]
31687 // CHECK24-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END62:%.*]]
31688 // CHECK24: omp.inner.for.body55:
31689 // CHECK24-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !31
31690 // CHECK24-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP29]], 1
31691 // CHECK24-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]]
31692 // CHECK24-NEXT: store i32 [[ADD57]], i32* [[I52]], align 4, !llvm.access.group !31
31693 // CHECK24-NEXT: [[TMP30:%.*]] = load i32, i32* [[I52]], align 4, !llvm.access.group !31
31694 // CHECK24-NEXT: [[ARRAYIDX58:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP30]]
31695 // CHECK24-NEXT: store i32 0, i32* [[ARRAYIDX58]], align 4, !llvm.access.group !31
31696 // CHECK24-NEXT: br label [[OMP_BODY_CONTINUE59:%.*]]
31697 // CHECK24: omp.body.continue59:
31698 // CHECK24-NEXT: br label [[OMP_INNER_FOR_INC60:%.*]]
31699 // CHECK24: omp.inner.for.inc60:
31700 // CHECK24-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !31
31701 // CHECK24-NEXT: [[ADD61:%.*]] = add nsw i32 [[TMP31]], 1
31702 // CHECK24-NEXT: store i32 [[ADD61]], i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !31
31703 // CHECK24-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP32:![0-9]+]]
31704 // CHECK24: omp.inner.for.end62:
31705 // CHECK24-NEXT: store i32 10, i32* [[I52]], align 4
31706 // CHECK24-NEXT: ret i32 0
31707 //
31708