1 //===-- ARMInstrInfo.h - ARM Instruction Information ------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the ARM implementation of the TargetInstrInfo class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_ARM_ARMINSTRINFO_H
14 #define LLVM_LIB_TARGET_ARM_ARMINSTRINFO_H
15 
16 #include "ARMBaseInstrInfo.h"
17 #include "ARMRegisterInfo.h"
18 
19 namespace llvm {
20   class ARMSubtarget;
21 
22 class ARMInstrInfo : public ARMBaseInstrInfo {
23   ARMRegisterInfo RI;
24 public:
25   explicit ARMInstrInfo(const ARMSubtarget &STI);
26 
27   /// Return the noop instruction to use for a noop.
28   MCInst getNop() const override;
29 
30   // Return the non-pre/post incrementing version of 'Opc'. Return 0
31   // if there is not such an opcode.
32   unsigned getUnindexedOpcode(unsigned Opc) const override;
33 
34   /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
35   /// such, whenever a client has an instance of instruction info, it should
36   /// always be able to get register info as well (through this method).
37   ///
getRegisterInfo()38   const ARMRegisterInfo &getRegisterInfo() const override { return RI; }
39 
40 private:
41   void expandLoadStackGuard(MachineBasicBlock::iterator MI) const override;
42 };
43 
44 }
45 
46 #endif
47