1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-v < %s | FileCheck %s
3; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-v < %s | FileCheck %s
4
5; fold (and (or x, C), D) -> D if (C & D) == D
6
7define <vscale x 4 x i32> @and_or_nxv4i32(<vscale x 4 x i32> %A) {
8; CHECK-LABEL: and_or_nxv4i32:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
11; CHECK-NEXT:    vmv.v.i v8, 8
12; CHECK-NEXT:    ret
13  %ins1 = insertelement <vscale x 4 x i32> poison, i32 255, i32 0
14  %splat1 = shufflevector <vscale x 4 x i32> %ins1, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
15  %ins2 = insertelement <vscale x 4 x i32> poison, i32 8, i32 0
16  %splat2 = shufflevector <vscale x 4 x i32> %ins2, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
17  %v1 = or <vscale x 4 x i32> %A, %splat1
18  %v2 = and <vscale x 4 x i32> %v1, %splat2
19  ret <vscale x 4 x i32> %v2
20}
21
22; (or (and X, c1), c2) -> (and (or X, c2), c1|c2) iff (c1 & c2) != 0
23
24define <vscale x 2 x i64> @or_and_nxv2i64(<vscale x 2 x i64> %a0) {
25; CHECK-LABEL: or_and_nxv2i64:
26; CHECK:       # %bb.0:
27; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
28; CHECK-NEXT:    vor.vi v26, v8, 3
29; CHECK-NEXT:    vand.vi v8, v26, 7
30; CHECK-NEXT:    ret
31  %ins1 = insertelement <vscale x 2 x i64> poison, i64 7, i32 0
32  %splat1 = shufflevector <vscale x 2 x i64> %ins1, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
33  %ins2 = insertelement <vscale x 2 x i64> poison, i64 3, i32 0
34  %splat2 = shufflevector <vscale x 2 x i64> %ins2, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
35  %v1 = and <vscale x 2 x i64> %a0, %splat1
36  %v2 = or <vscale x 2 x i64> %v1, %splat2
37  ret <vscale x 2 x i64> %v2
38}
39
40; If all masked bits are going to be set, that's a constant fold.
41
42define <vscale x 2 x i64> @or_and_nxv2i64_fold(<vscale x 2 x i64> %a0) {
43; CHECK-LABEL: or_and_nxv2i64_fold:
44; CHECK:       # %bb.0:
45; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
46; CHECK-NEXT:    vmv.v.i v8, 3
47; CHECK-NEXT:    ret
48  %ins1 = insertelement <vscale x 2 x i64> poison, i64 1, i32 0
49  %splat1 = shufflevector <vscale x 2 x i64> %ins1, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
50  %ins2 = insertelement <vscale x 2 x i64> poison, i64 3, i32 0
51  %splat2 = shufflevector <vscale x 2 x i64> %ins2, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
52  %v1 = and <vscale x 2 x i64> %a0, %splat1
53  %v2 = or <vscale x 2 x i64> %v1, %splat2
54  ret <vscale x 2 x i64> %v2
55}
56
57; fold (shl (shl x, c1), c2) -> (shl x, (add c1, c2))
58
59define <vscale x 4 x i32> @combine_vec_shl_shl(<vscale x 4 x i32> %x) {
60; CHECK-LABEL: combine_vec_shl_shl:
61; CHECK:       # %bb.0:
62; CHECK-NEXT:    addi a0, zero, 2
63; CHECK-NEXT:    vsetvli a1, zero, e32, m2, ta, mu
64; CHECK-NEXT:    vmv.s.x v26, a0
65; CHECK-NEXT:    addi a0, zero, 4
66; CHECK-NEXT:    vmv.s.x v28, a0
67; CHECK-NEXT:    vsll.vv v26, v8, v26
68; CHECK-NEXT:    vsll.vv v8, v26, v28
69; CHECK-NEXT:    ret
70  %ins1 = insertelement <vscale x 4 x i32> poison, i32 2, i32 0
71  %splat1 = shufflevector <vscale x 4 x i32> %ins1, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
72  %ins2 = insertelement <vscale x 4 x i32> poison, i32 4, i32 0
73  %splat2 = shufflevector <vscale x 4 x i32> %ins2, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
74  %v1 = shl <vscale x 4 x i32> %x, %ins1
75  %v2 = shl <vscale x 4 x i32> %v1, %ins2
76  ret <vscale x 4 x i32> %v2
77}
78
79; fold (sra (sra x, c1), c2) -> (sra x, (add c1, c2))
80
81define <vscale x 2 x i32> @combine_vec_ashr_ashr(<vscale x 2 x i32> %x) {
82; CHECK-LABEL: combine_vec_ashr_ashr:
83; CHECK:       # %bb.0:
84; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
85; CHECK-NEXT:    vsra.vi v8, v8, 6
86; CHECK-NEXT:    ret
87  %ins1 = insertelement <vscale x 2 x i32> poison, i32 2, i32 0
88  %splat1 = shufflevector <vscale x 2 x i32> %ins1, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
89  %ins2 = insertelement <vscale x 2 x i32> poison, i32 4, i32 0
90  %splat2 = shufflevector <vscale x 2 x i32> %ins2, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
91  %v1 = ashr <vscale x 2 x i32> %x, %splat1
92  %v2 = ashr <vscale x 2 x i32> %v1, %splat2
93  ret <vscale x 2 x i32> %v2
94}
95
96; fold (srl (srl x, c1), c2) -> (srl x, (add c1, c2))
97
98define <vscale x 8 x i16> @combine_vec_lshr_lshr(<vscale x 8 x i16> %x) {
99; CHECK-LABEL: combine_vec_lshr_lshr:
100; CHECK:       # %bb.0:
101; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
102; CHECK-NEXT:    vsrl.vi v8, v8, 8
103; CHECK-NEXT:    ret
104  %ins1 = insertelement <vscale x 8 x i16> poison, i16 2, i32 0
105  %splat1 = shufflevector <vscale x 8 x i16> %ins1, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
106  %ins2 = insertelement <vscale x 8 x i16> poison, i16 4, i32 0
107  %splat2 = shufflevector <vscale x 8 x i16> %ins2, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
108  %v1 = lshr <vscale x 8 x i16> %x, %splat2
109  %v2 = lshr <vscale x 8 x i16> %v1, %splat2
110  ret <vscale x 8 x i16> %v2
111}
112