1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+d,+experimental-zfh,+experimental-v -target-abi=ilp32d \ 3; RUN: -verify-machineinstrs < %s | FileCheck %s 4 5define half @extractelt_nxv1f16_0(<vscale x 1 x half> %v) { 6; CHECK-LABEL: extractelt_nxv1f16_0: 7; CHECK: # %bb.0: 8; CHECK-NEXT: vsetivli zero, 0, e16, mf4, ta, mu 9; CHECK-NEXT: vfmv.f.s fa0, v8 10; CHECK-NEXT: ret 11 %r = extractelement <vscale x 1 x half> %v, i32 0 12 ret half %r 13} 14 15define half @extractelt_nxv1f16_imm(<vscale x 1 x half> %v) { 16; CHECK-LABEL: extractelt_nxv1f16_imm: 17; CHECK: # %bb.0: 18; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, mu 19; CHECK-NEXT: vslidedown.vi v25, v8, 2 20; CHECK-NEXT: vfmv.f.s fa0, v25 21; CHECK-NEXT: ret 22 %r = extractelement <vscale x 1 x half> %v, i32 2 23 ret half %r 24} 25 26define half @extractelt_nxv1f16_idx(<vscale x 1 x half> %v, i32 %idx) { 27; CHECK-LABEL: extractelt_nxv1f16_idx: 28; CHECK: # %bb.0: 29; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, mu 30; CHECK-NEXT: vslidedown.vx v25, v8, a0 31; CHECK-NEXT: vfmv.f.s fa0, v25 32; CHECK-NEXT: ret 33 %r = extractelement <vscale x 1 x half> %v, i32 %idx 34 ret half %r 35} 36 37define half @extractelt_nxv2f16_0(<vscale x 2 x half> %v) { 38; CHECK-LABEL: extractelt_nxv2f16_0: 39; CHECK: # %bb.0: 40; CHECK-NEXT: vsetivli zero, 0, e16, mf2, ta, mu 41; CHECK-NEXT: vfmv.f.s fa0, v8 42; CHECK-NEXT: ret 43 %r = extractelement <vscale x 2 x half> %v, i32 0 44 ret half %r 45} 46 47define half @extractelt_nxv2f16_imm(<vscale x 2 x half> %v) { 48; CHECK-LABEL: extractelt_nxv2f16_imm: 49; CHECK: # %bb.0: 50; CHECK-NEXT: vsetivli zero, 1, e16, mf2, ta, mu 51; CHECK-NEXT: vslidedown.vi v25, v8, 2 52; CHECK-NEXT: vfmv.f.s fa0, v25 53; CHECK-NEXT: ret 54 %r = extractelement <vscale x 2 x half> %v, i32 2 55 ret half %r 56} 57 58define half @extractelt_nxv2f16_idx(<vscale x 2 x half> %v, i32 %idx) { 59; CHECK-LABEL: extractelt_nxv2f16_idx: 60; CHECK: # %bb.0: 61; CHECK-NEXT: vsetivli zero, 1, e16, mf2, ta, mu 62; CHECK-NEXT: vslidedown.vx v25, v8, a0 63; CHECK-NEXT: vfmv.f.s fa0, v25 64; CHECK-NEXT: ret 65 %r = extractelement <vscale x 2 x half> %v, i32 %idx 66 ret half %r 67} 68 69define half @extractelt_nxv4f16_0(<vscale x 4 x half> %v) { 70; CHECK-LABEL: extractelt_nxv4f16_0: 71; CHECK: # %bb.0: 72; CHECK-NEXT: vsetivli zero, 0, e16, m1, ta, mu 73; CHECK-NEXT: vfmv.f.s fa0, v8 74; CHECK-NEXT: ret 75 %r = extractelement <vscale x 4 x half> %v, i32 0 76 ret half %r 77} 78 79define half @extractelt_nxv4f16_imm(<vscale x 4 x half> %v) { 80; CHECK-LABEL: extractelt_nxv4f16_imm: 81; CHECK: # %bb.0: 82; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, mu 83; CHECK-NEXT: vslidedown.vi v25, v8, 2 84; CHECK-NEXT: vfmv.f.s fa0, v25 85; CHECK-NEXT: ret 86 %r = extractelement <vscale x 4 x half> %v, i32 2 87 ret half %r 88} 89 90define half @extractelt_nxv4f16_idx(<vscale x 4 x half> %v, i32 %idx) { 91; CHECK-LABEL: extractelt_nxv4f16_idx: 92; CHECK: # %bb.0: 93; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, mu 94; CHECK-NEXT: vslidedown.vx v25, v8, a0 95; CHECK-NEXT: vfmv.f.s fa0, v25 96; CHECK-NEXT: ret 97 %r = extractelement <vscale x 4 x half> %v, i32 %idx 98 ret half %r 99} 100 101define half @extractelt_nxv8f16_0(<vscale x 8 x half> %v) { 102; CHECK-LABEL: extractelt_nxv8f16_0: 103; CHECK: # %bb.0: 104; CHECK-NEXT: vsetivli zero, 0, e16, m2, ta, mu 105; CHECK-NEXT: vfmv.f.s fa0, v8 106; CHECK-NEXT: ret 107 %r = extractelement <vscale x 8 x half> %v, i32 0 108 ret half %r 109} 110 111define half @extractelt_nxv8f16_imm(<vscale x 8 x half> %v) { 112; CHECK-LABEL: extractelt_nxv8f16_imm: 113; CHECK: # %bb.0: 114; CHECK-NEXT: vsetivli zero, 1, e16, m2, ta, mu 115; CHECK-NEXT: vslidedown.vi v26, v8, 2 116; CHECK-NEXT: vfmv.f.s fa0, v26 117; CHECK-NEXT: ret 118 %r = extractelement <vscale x 8 x half> %v, i32 2 119 ret half %r 120} 121 122define half @extractelt_nxv8f16_idx(<vscale x 8 x half> %v, i32 %idx) { 123; CHECK-LABEL: extractelt_nxv8f16_idx: 124; CHECK: # %bb.0: 125; CHECK-NEXT: vsetivli zero, 1, e16, m2, ta, mu 126; CHECK-NEXT: vslidedown.vx v26, v8, a0 127; CHECK-NEXT: vfmv.f.s fa0, v26 128; CHECK-NEXT: ret 129 %r = extractelement <vscale x 8 x half> %v, i32 %idx 130 ret half %r 131} 132 133define half @extractelt_nxv16f16_0(<vscale x 16 x half> %v) { 134; CHECK-LABEL: extractelt_nxv16f16_0: 135; CHECK: # %bb.0: 136; CHECK-NEXT: vsetivli zero, 0, e16, m4, ta, mu 137; CHECK-NEXT: vfmv.f.s fa0, v8 138; CHECK-NEXT: ret 139 %r = extractelement <vscale x 16 x half> %v, i32 0 140 ret half %r 141} 142 143define half @extractelt_nxv16f16_imm(<vscale x 16 x half> %v) { 144; CHECK-LABEL: extractelt_nxv16f16_imm: 145; CHECK: # %bb.0: 146; CHECK-NEXT: vsetivli zero, 1, e16, m4, ta, mu 147; CHECK-NEXT: vslidedown.vi v28, v8, 2 148; CHECK-NEXT: vfmv.f.s fa0, v28 149; CHECK-NEXT: ret 150 %r = extractelement <vscale x 16 x half> %v, i32 2 151 ret half %r 152} 153 154define half @extractelt_nxv16f16_idx(<vscale x 16 x half> %v, i32 %idx) { 155; CHECK-LABEL: extractelt_nxv16f16_idx: 156; CHECK: # %bb.0: 157; CHECK-NEXT: vsetivli zero, 1, e16, m4, ta, mu 158; CHECK-NEXT: vslidedown.vx v28, v8, a0 159; CHECK-NEXT: vfmv.f.s fa0, v28 160; CHECK-NEXT: ret 161 %r = extractelement <vscale x 16 x half> %v, i32 %idx 162 ret half %r 163} 164 165define half @extractelt_nxv32f16_0(<vscale x 32 x half> %v) { 166; CHECK-LABEL: extractelt_nxv32f16_0: 167; CHECK: # %bb.0: 168; CHECK-NEXT: vsetivli zero, 0, e16, m8, ta, mu 169; CHECK-NEXT: vfmv.f.s fa0, v8 170; CHECK-NEXT: ret 171 %r = extractelement <vscale x 32 x half> %v, i32 0 172 ret half %r 173} 174 175define half @extractelt_nxv32f16_imm(<vscale x 32 x half> %v) { 176; CHECK-LABEL: extractelt_nxv32f16_imm: 177; CHECK: # %bb.0: 178; CHECK-NEXT: vsetivli zero, 1, e16, m8, ta, mu 179; CHECK-NEXT: vslidedown.vi v8, v8, 2 180; CHECK-NEXT: vfmv.f.s fa0, v8 181; CHECK-NEXT: ret 182 %r = extractelement <vscale x 32 x half> %v, i32 2 183 ret half %r 184} 185 186define half @extractelt_nxv32f16_idx(<vscale x 32 x half> %v, i32 %idx) { 187; CHECK-LABEL: extractelt_nxv32f16_idx: 188; CHECK: # %bb.0: 189; CHECK-NEXT: vsetivli zero, 1, e16, m8, ta, mu 190; CHECK-NEXT: vslidedown.vx v8, v8, a0 191; CHECK-NEXT: vfmv.f.s fa0, v8 192; CHECK-NEXT: ret 193 %r = extractelement <vscale x 32 x half> %v, i32 %idx 194 ret half %r 195} 196 197define float @extractelt_nxv1f32_0(<vscale x 1 x float> %v) { 198; CHECK-LABEL: extractelt_nxv1f32_0: 199; CHECK: # %bb.0: 200; CHECK-NEXT: vsetivli zero, 0, e32, mf2, ta, mu 201; CHECK-NEXT: vfmv.f.s fa0, v8 202; CHECK-NEXT: ret 203 %r = extractelement <vscale x 1 x float> %v, i32 0 204 ret float %r 205} 206 207define float @extractelt_nxv1f32_imm(<vscale x 1 x float> %v) { 208; CHECK-LABEL: extractelt_nxv1f32_imm: 209; CHECK: # %bb.0: 210; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, mu 211; CHECK-NEXT: vslidedown.vi v25, v8, 2 212; CHECK-NEXT: vfmv.f.s fa0, v25 213; CHECK-NEXT: ret 214 %r = extractelement <vscale x 1 x float> %v, i32 2 215 ret float %r 216} 217 218define float @extractelt_nxv1f32_idx(<vscale x 1 x float> %v, i32 %idx) { 219; CHECK-LABEL: extractelt_nxv1f32_idx: 220; CHECK: # %bb.0: 221; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, mu 222; CHECK-NEXT: vslidedown.vx v25, v8, a0 223; CHECK-NEXT: vfmv.f.s fa0, v25 224; CHECK-NEXT: ret 225 %r = extractelement <vscale x 1 x float> %v, i32 %idx 226 ret float %r 227} 228 229define float @extractelt_nxv2f32_0(<vscale x 2 x float> %v) { 230; CHECK-LABEL: extractelt_nxv2f32_0: 231; CHECK: # %bb.0: 232; CHECK-NEXT: vsetivli zero, 0, e32, m1, ta, mu 233; CHECK-NEXT: vfmv.f.s fa0, v8 234; CHECK-NEXT: ret 235 %r = extractelement <vscale x 2 x float> %v, i32 0 236 ret float %r 237} 238 239define float @extractelt_nxv2f32_imm(<vscale x 2 x float> %v) { 240; CHECK-LABEL: extractelt_nxv2f32_imm: 241; CHECK: # %bb.0: 242; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, mu 243; CHECK-NEXT: vslidedown.vi v25, v8, 2 244; CHECK-NEXT: vfmv.f.s fa0, v25 245; CHECK-NEXT: ret 246 %r = extractelement <vscale x 2 x float> %v, i32 2 247 ret float %r 248} 249 250define float @extractelt_nxv2f32_idx(<vscale x 2 x float> %v, i32 %idx) { 251; CHECK-LABEL: extractelt_nxv2f32_idx: 252; CHECK: # %bb.0: 253; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, mu 254; CHECK-NEXT: vslidedown.vx v25, v8, a0 255; CHECK-NEXT: vfmv.f.s fa0, v25 256; CHECK-NEXT: ret 257 %r = extractelement <vscale x 2 x float> %v, i32 %idx 258 ret float %r 259} 260 261define float @extractelt_nxv4f32_0(<vscale x 4 x float> %v) { 262; CHECK-LABEL: extractelt_nxv4f32_0: 263; CHECK: # %bb.0: 264; CHECK-NEXT: vsetivli zero, 0, e32, m2, ta, mu 265; CHECK-NEXT: vfmv.f.s fa0, v8 266; CHECK-NEXT: ret 267 %r = extractelement <vscale x 4 x float> %v, i32 0 268 ret float %r 269} 270 271define float @extractelt_nxv4f32_imm(<vscale x 4 x float> %v) { 272; CHECK-LABEL: extractelt_nxv4f32_imm: 273; CHECK: # %bb.0: 274; CHECK-NEXT: vsetivli zero, 1, e32, m2, ta, mu 275; CHECK-NEXT: vslidedown.vi v26, v8, 2 276; CHECK-NEXT: vfmv.f.s fa0, v26 277; CHECK-NEXT: ret 278 %r = extractelement <vscale x 4 x float> %v, i32 2 279 ret float %r 280} 281 282define float @extractelt_nxv4f32_idx(<vscale x 4 x float> %v, i32 %idx) { 283; CHECK-LABEL: extractelt_nxv4f32_idx: 284; CHECK: # %bb.0: 285; CHECK-NEXT: vsetivli zero, 1, e32, m2, ta, mu 286; CHECK-NEXT: vslidedown.vx v26, v8, a0 287; CHECK-NEXT: vfmv.f.s fa0, v26 288; CHECK-NEXT: ret 289 %r = extractelement <vscale x 4 x float> %v, i32 %idx 290 ret float %r 291} 292 293define float @extractelt_nxv8f32_0(<vscale x 8 x float> %v) { 294; CHECK-LABEL: extractelt_nxv8f32_0: 295; CHECK: # %bb.0: 296; CHECK-NEXT: vsetivli zero, 0, e32, m4, ta, mu 297; CHECK-NEXT: vfmv.f.s fa0, v8 298; CHECK-NEXT: ret 299 %r = extractelement <vscale x 8 x float> %v, i32 0 300 ret float %r 301} 302 303define float @extractelt_nxv8f32_imm(<vscale x 8 x float> %v) { 304; CHECK-LABEL: extractelt_nxv8f32_imm: 305; CHECK: # %bb.0: 306; CHECK-NEXT: vsetivli zero, 1, e32, m4, ta, mu 307; CHECK-NEXT: vslidedown.vi v28, v8, 2 308; CHECK-NEXT: vfmv.f.s fa0, v28 309; CHECK-NEXT: ret 310 %r = extractelement <vscale x 8 x float> %v, i32 2 311 ret float %r 312} 313 314define float @extractelt_nxv8f32_idx(<vscale x 8 x float> %v, i32 %idx) { 315; CHECK-LABEL: extractelt_nxv8f32_idx: 316; CHECK: # %bb.0: 317; CHECK-NEXT: vsetivli zero, 1, e32, m4, ta, mu 318; CHECK-NEXT: vslidedown.vx v28, v8, a0 319; CHECK-NEXT: vfmv.f.s fa0, v28 320; CHECK-NEXT: ret 321 %r = extractelement <vscale x 8 x float> %v, i32 %idx 322 ret float %r 323} 324 325define float @extractelt_nxv16f32_0(<vscale x 16 x float> %v) { 326; CHECK-LABEL: extractelt_nxv16f32_0: 327; CHECK: # %bb.0: 328; CHECK-NEXT: vsetivli zero, 0, e32, m8, ta, mu 329; CHECK-NEXT: vfmv.f.s fa0, v8 330; CHECK-NEXT: ret 331 %r = extractelement <vscale x 16 x float> %v, i32 0 332 ret float %r 333} 334 335define float @extractelt_nxv16f32_imm(<vscale x 16 x float> %v) { 336; CHECK-LABEL: extractelt_nxv16f32_imm: 337; CHECK: # %bb.0: 338; CHECK-NEXT: vsetivli zero, 1, e32, m8, ta, mu 339; CHECK-NEXT: vslidedown.vi v8, v8, 2 340; CHECK-NEXT: vfmv.f.s fa0, v8 341; CHECK-NEXT: ret 342 %r = extractelement <vscale x 16 x float> %v, i32 2 343 ret float %r 344} 345 346define float @extractelt_nxv16f32_idx(<vscale x 16 x float> %v, i32 %idx) { 347; CHECK-LABEL: extractelt_nxv16f32_idx: 348; CHECK: # %bb.0: 349; CHECK-NEXT: vsetivli zero, 1, e32, m8, ta, mu 350; CHECK-NEXT: vslidedown.vx v8, v8, a0 351; CHECK-NEXT: vfmv.f.s fa0, v8 352; CHECK-NEXT: ret 353 %r = extractelement <vscale x 16 x float> %v, i32 %idx 354 ret float %r 355} 356 357define double @extractelt_nxv1f64_0(<vscale x 1 x double> %v) { 358; CHECK-LABEL: extractelt_nxv1f64_0: 359; CHECK: # %bb.0: 360; CHECK-NEXT: vsetivli zero, 0, e64, m1, ta, mu 361; CHECK-NEXT: vfmv.f.s fa0, v8 362; CHECK-NEXT: ret 363 %r = extractelement <vscale x 1 x double> %v, i32 0 364 ret double %r 365} 366 367define double @extractelt_nxv1f64_imm(<vscale x 1 x double> %v) { 368; CHECK-LABEL: extractelt_nxv1f64_imm: 369; CHECK: # %bb.0: 370; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, mu 371; CHECK-NEXT: vslidedown.vi v25, v8, 2 372; CHECK-NEXT: vfmv.f.s fa0, v25 373; CHECK-NEXT: ret 374 %r = extractelement <vscale x 1 x double> %v, i32 2 375 ret double %r 376} 377 378define double @extractelt_nxv1f64_idx(<vscale x 1 x double> %v, i32 %idx) { 379; CHECK-LABEL: extractelt_nxv1f64_idx: 380; CHECK: # %bb.0: 381; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, mu 382; CHECK-NEXT: vslidedown.vx v25, v8, a0 383; CHECK-NEXT: vfmv.f.s fa0, v25 384; CHECK-NEXT: ret 385 %r = extractelement <vscale x 1 x double> %v, i32 %idx 386 ret double %r 387} 388 389define double @extractelt_nxv2f64_0(<vscale x 2 x double> %v) { 390; CHECK-LABEL: extractelt_nxv2f64_0: 391; CHECK: # %bb.0: 392; CHECK-NEXT: vsetivli zero, 0, e64, m2, ta, mu 393; CHECK-NEXT: vfmv.f.s fa0, v8 394; CHECK-NEXT: ret 395 %r = extractelement <vscale x 2 x double> %v, i32 0 396 ret double %r 397} 398 399define double @extractelt_nxv2f64_imm(<vscale x 2 x double> %v) { 400; CHECK-LABEL: extractelt_nxv2f64_imm: 401; CHECK: # %bb.0: 402; CHECK-NEXT: vsetivli zero, 1, e64, m2, ta, mu 403; CHECK-NEXT: vslidedown.vi v26, v8, 2 404; CHECK-NEXT: vfmv.f.s fa0, v26 405; CHECK-NEXT: ret 406 %r = extractelement <vscale x 2 x double> %v, i32 2 407 ret double %r 408} 409 410define double @extractelt_nxv2f64_idx(<vscale x 2 x double> %v, i32 %idx) { 411; CHECK-LABEL: extractelt_nxv2f64_idx: 412; CHECK: # %bb.0: 413; CHECK-NEXT: vsetivli zero, 1, e64, m2, ta, mu 414; CHECK-NEXT: vslidedown.vx v26, v8, a0 415; CHECK-NEXT: vfmv.f.s fa0, v26 416; CHECK-NEXT: ret 417 %r = extractelement <vscale x 2 x double> %v, i32 %idx 418 ret double %r 419} 420 421define double @extractelt_nxv4f64_0(<vscale x 4 x double> %v) { 422; CHECK-LABEL: extractelt_nxv4f64_0: 423; CHECK: # %bb.0: 424; CHECK-NEXT: vsetivli zero, 0, e64, m4, ta, mu 425; CHECK-NEXT: vfmv.f.s fa0, v8 426; CHECK-NEXT: ret 427 %r = extractelement <vscale x 4 x double> %v, i32 0 428 ret double %r 429} 430 431define double @extractelt_nxv4f64_imm(<vscale x 4 x double> %v) { 432; CHECK-LABEL: extractelt_nxv4f64_imm: 433; CHECK: # %bb.0: 434; CHECK-NEXT: vsetivli zero, 1, e64, m4, ta, mu 435; CHECK-NEXT: vslidedown.vi v28, v8, 2 436; CHECK-NEXT: vfmv.f.s fa0, v28 437; CHECK-NEXT: ret 438 %r = extractelement <vscale x 4 x double> %v, i32 2 439 ret double %r 440} 441 442define double @extractelt_nxv4f64_idx(<vscale x 4 x double> %v, i32 %idx) { 443; CHECK-LABEL: extractelt_nxv4f64_idx: 444; CHECK: # %bb.0: 445; CHECK-NEXT: vsetivli zero, 1, e64, m4, ta, mu 446; CHECK-NEXT: vslidedown.vx v28, v8, a0 447; CHECK-NEXT: vfmv.f.s fa0, v28 448; CHECK-NEXT: ret 449 %r = extractelement <vscale x 4 x double> %v, i32 %idx 450 ret double %r 451} 452 453define double @extractelt_nxv8f64_0(<vscale x 8 x double> %v) { 454; CHECK-LABEL: extractelt_nxv8f64_0: 455; CHECK: # %bb.0: 456; CHECK-NEXT: vsetivli zero, 0, e64, m8, ta, mu 457; CHECK-NEXT: vfmv.f.s fa0, v8 458; CHECK-NEXT: ret 459 %r = extractelement <vscale x 8 x double> %v, i32 0 460 ret double %r 461} 462 463define double @extractelt_nxv8f64_imm(<vscale x 8 x double> %v) { 464; CHECK-LABEL: extractelt_nxv8f64_imm: 465; CHECK: # %bb.0: 466; CHECK-NEXT: vsetivli zero, 1, e64, m8, ta, mu 467; CHECK-NEXT: vslidedown.vi v8, v8, 2 468; CHECK-NEXT: vfmv.f.s fa0, v8 469; CHECK-NEXT: ret 470 %r = extractelement <vscale x 8 x double> %v, i32 2 471 ret double %r 472} 473 474define double @extractelt_nxv8f64_idx(<vscale x 8 x double> %v, i32 %idx) { 475; CHECK-LABEL: extractelt_nxv8f64_idx: 476; CHECK: # %bb.0: 477; CHECK-NEXT: vsetivli zero, 1, e64, m8, ta, mu 478; CHECK-NEXT: vslidedown.vx v8, v8, a0 479; CHECK-NEXT: vfmv.f.s fa0, v8 480; CHECK-NEXT: ret 481 %r = extractelement <vscale x 8 x double> %v, i32 %idx 482 ret double %r 483} 484 485