1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv64 -mattr=+experimental-v -verify-machineinstrs < %s | FileCheck %s
3
4define <vscale x 1 x i8> @vmerge_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %cond) {
5; CHECK-LABEL: vmerge_vv_nxv1i8:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, mu
8; CHECK-NEXT:    vmerge.vvm v8, v9, v8, v0
9; CHECK-NEXT:    ret
10  %vc = select <vscale x 1 x i1> %cond, <vscale x 1 x i8> %va, <vscale x 1 x i8> %vb
11  ret <vscale x 1 x i8> %vc
12}
13
14define <vscale x 1 x i8> @vmerge_xv_nxv1i8(<vscale x 1 x i8> %va, i8 signext %b, <vscale x 1 x i1> %cond) {
15; CHECK-LABEL: vmerge_xv_nxv1i8:
16; CHECK:       # %bb.0:
17; CHECK-NEXT:    vsetvli a1, zero, e8, mf8, ta, mu
18; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
19; CHECK-NEXT:    ret
20  %head = insertelement <vscale x 1 x i8> undef, i8 %b, i32 0
21  %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> undef, <vscale x 1 x i32> zeroinitializer
22  %vc = select <vscale x 1 x i1> %cond, <vscale x 1 x i8> %splat, <vscale x 1 x i8> %va
23  ret <vscale x 1 x i8> %vc
24}
25
26define <vscale x 1 x i8> @vmerge_iv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %cond) {
27; CHECK-LABEL: vmerge_iv_nxv1i8:
28; CHECK:       # %bb.0:
29; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, mu
30; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
31; CHECK-NEXT:    ret
32  %head = insertelement <vscale x 1 x i8> undef, i8 3, i32 0
33  %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> undef, <vscale x 1 x i32> zeroinitializer
34  %vc = select <vscale x 1 x i1> %cond, <vscale x 1 x i8> %splat, <vscale x 1 x i8> %va
35  ret <vscale x 1 x i8> %vc
36}
37
38define <vscale x 2 x i8> @vmerge_vv_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> %cond) {
39; CHECK-LABEL: vmerge_vv_nxv2i8:
40; CHECK:       # %bb.0:
41; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
42; CHECK-NEXT:    vmerge.vvm v8, v9, v8, v0
43; CHECK-NEXT:    ret
44  %vc = select <vscale x 2 x i1> %cond, <vscale x 2 x i8> %va, <vscale x 2 x i8> %vb
45  ret <vscale x 2 x i8> %vc
46}
47
48define <vscale x 2 x i8> @vmerge_xv_nxv2i8(<vscale x 2 x i8> %va, i8 signext %b, <vscale x 2 x i1> %cond) {
49; CHECK-LABEL: vmerge_xv_nxv2i8:
50; CHECK:       # %bb.0:
51; CHECK-NEXT:    vsetvli a1, zero, e8, mf4, ta, mu
52; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
53; CHECK-NEXT:    ret
54  %head = insertelement <vscale x 2 x i8> undef, i8 %b, i32 0
55  %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> undef, <vscale x 2 x i32> zeroinitializer
56  %vc = select <vscale x 2 x i1> %cond, <vscale x 2 x i8> %splat, <vscale x 2 x i8> %va
57  ret <vscale x 2 x i8> %vc
58}
59
60define <vscale x 2 x i8> @vmerge_iv_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %cond) {
61; CHECK-LABEL: vmerge_iv_nxv2i8:
62; CHECK:       # %bb.0:
63; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
64; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
65; CHECK-NEXT:    ret
66  %head = insertelement <vscale x 2 x i8> undef, i8 3, i32 0
67  %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> undef, <vscale x 2 x i32> zeroinitializer
68  %vc = select <vscale x 2 x i1> %cond, <vscale x 2 x i8> %splat, <vscale x 2 x i8> %va
69  ret <vscale x 2 x i8> %vc
70}
71
72define <vscale x 4 x i8> @vmerge_vv_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> %cond) {
73; CHECK-LABEL: vmerge_vv_nxv4i8:
74; CHECK:       # %bb.0:
75; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu
76; CHECK-NEXT:    vmerge.vvm v8, v9, v8, v0
77; CHECK-NEXT:    ret
78  %vc = select <vscale x 4 x i1> %cond, <vscale x 4 x i8> %va, <vscale x 4 x i8> %vb
79  ret <vscale x 4 x i8> %vc
80}
81
82define <vscale x 4 x i8> @vmerge_xv_nxv4i8(<vscale x 4 x i8> %va, i8 signext %b, <vscale x 4 x i1> %cond) {
83; CHECK-LABEL: vmerge_xv_nxv4i8:
84; CHECK:       # %bb.0:
85; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, mu
86; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
87; CHECK-NEXT:    ret
88  %head = insertelement <vscale x 4 x i8> undef, i8 %b, i32 0
89  %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> undef, <vscale x 4 x i32> zeroinitializer
90  %vc = select <vscale x 4 x i1> %cond, <vscale x 4 x i8> %splat, <vscale x 4 x i8> %va
91  ret <vscale x 4 x i8> %vc
92}
93
94define <vscale x 4 x i8> @vmerge_iv_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i1> %cond) {
95; CHECK-LABEL: vmerge_iv_nxv4i8:
96; CHECK:       # %bb.0:
97; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu
98; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
99; CHECK-NEXT:    ret
100  %head = insertelement <vscale x 4 x i8> undef, i8 3, i32 0
101  %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> undef, <vscale x 4 x i32> zeroinitializer
102  %vc = select <vscale x 4 x i1> %cond, <vscale x 4 x i8> %splat, <vscale x 4 x i8> %va
103  ret <vscale x 4 x i8> %vc
104}
105
106define <vscale x 8 x i8> @vmerge_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %cond) {
107; CHECK-LABEL: vmerge_vv_nxv8i8:
108; CHECK:       # %bb.0:
109; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, mu
110; CHECK-NEXT:    vmerge.vvm v8, v9, v8, v0
111; CHECK-NEXT:    ret
112  %vc = select <vscale x 8 x i1> %cond, <vscale x 8 x i8> %va, <vscale x 8 x i8> %vb
113  ret <vscale x 8 x i8> %vc
114}
115
116define <vscale x 8 x i8> @vmerge_xv_nxv8i8(<vscale x 8 x i8> %va, i8 signext %b, <vscale x 8 x i1> %cond) {
117; CHECK-LABEL: vmerge_xv_nxv8i8:
118; CHECK:       # %bb.0:
119; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, mu
120; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
121; CHECK-NEXT:    ret
122  %head = insertelement <vscale x 8 x i8> undef, i8 %b, i32 0
123  %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> undef, <vscale x 8 x i32> zeroinitializer
124  %vc = select <vscale x 8 x i1> %cond, <vscale x 8 x i8> %splat, <vscale x 8 x i8> %va
125  ret <vscale x 8 x i8> %vc
126}
127
128define <vscale x 8 x i8> @vmerge_iv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %cond) {
129; CHECK-LABEL: vmerge_iv_nxv8i8:
130; CHECK:       # %bb.0:
131; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, mu
132; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
133; CHECK-NEXT:    ret
134  %head = insertelement <vscale x 8 x i8> undef, i8 3, i32 0
135  %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> undef, <vscale x 8 x i32> zeroinitializer
136  %vc = select <vscale x 8 x i1> %cond, <vscale x 8 x i8> %splat, <vscale x 8 x i8> %va
137  ret <vscale x 8 x i8> %vc
138}
139
140define <vscale x 16 x i8> @vmerge_vv_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> %cond) {
141; CHECK-LABEL: vmerge_vv_nxv16i8:
142; CHECK:       # %bb.0:
143; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, mu
144; CHECK-NEXT:    vmerge.vvm v8, v10, v8, v0
145; CHECK-NEXT:    ret
146  %vc = select <vscale x 16 x i1> %cond, <vscale x 16 x i8> %va, <vscale x 16 x i8> %vb
147  ret <vscale x 16 x i8> %vc
148}
149
150define <vscale x 16 x i8> @vmerge_xv_nxv16i8(<vscale x 16 x i8> %va, i8 signext %b, <vscale x 16 x i1> %cond) {
151; CHECK-LABEL: vmerge_xv_nxv16i8:
152; CHECK:       # %bb.0:
153; CHECK-NEXT:    vsetvli a1, zero, e8, m2, ta, mu
154; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
155; CHECK-NEXT:    ret
156  %head = insertelement <vscale x 16 x i8> undef, i8 %b, i32 0
157  %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
158  %vc = select <vscale x 16 x i1> %cond, <vscale x 16 x i8> %splat, <vscale x 16 x i8> %va
159  ret <vscale x 16 x i8> %vc
160}
161
162define <vscale x 16 x i8> @vmerge_iv_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i1> %cond) {
163; CHECK-LABEL: vmerge_iv_nxv16i8:
164; CHECK:       # %bb.0:
165; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, mu
166; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
167; CHECK-NEXT:    ret
168  %head = insertelement <vscale x 16 x i8> undef, i8 3, i32 0
169  %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
170  %vc = select <vscale x 16 x i1> %cond, <vscale x 16 x i8> %splat, <vscale x 16 x i8> %va
171  ret <vscale x 16 x i8> %vc
172}
173
174define <vscale x 32 x i8> @vmerge_vv_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> %cond) {
175; CHECK-LABEL: vmerge_vv_nxv32i8:
176; CHECK:       # %bb.0:
177; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, mu
178; CHECK-NEXT:    vmerge.vvm v8, v12, v8, v0
179; CHECK-NEXT:    ret
180  %vc = select <vscale x 32 x i1> %cond, <vscale x 32 x i8> %va, <vscale x 32 x i8> %vb
181  ret <vscale x 32 x i8> %vc
182}
183
184define <vscale x 32 x i8> @vmerge_xv_nxv32i8(<vscale x 32 x i8> %va, i8 signext %b, <vscale x 32 x i1> %cond) {
185; CHECK-LABEL: vmerge_xv_nxv32i8:
186; CHECK:       # %bb.0:
187; CHECK-NEXT:    vsetvli a1, zero, e8, m4, ta, mu
188; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
189; CHECK-NEXT:    ret
190  %head = insertelement <vscale x 32 x i8> undef, i8 %b, i32 0
191  %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> undef, <vscale x 32 x i32> zeroinitializer
192  %vc = select <vscale x 32 x i1> %cond, <vscale x 32 x i8> %splat, <vscale x 32 x i8> %va
193  ret <vscale x 32 x i8> %vc
194}
195
196define <vscale x 32 x i8> @vmerge_iv_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i1> %cond) {
197; CHECK-LABEL: vmerge_iv_nxv32i8:
198; CHECK:       # %bb.0:
199; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, mu
200; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
201; CHECK-NEXT:    ret
202  %head = insertelement <vscale x 32 x i8> undef, i8 3, i32 0
203  %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> undef, <vscale x 32 x i32> zeroinitializer
204  %vc = select <vscale x 32 x i1> %cond, <vscale x 32 x i8> %splat, <vscale x 32 x i8> %va
205  ret <vscale x 32 x i8> %vc
206}
207
208define <vscale x 64 x i8> @vmerge_vv_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> %cond) {
209; CHECK-LABEL: vmerge_vv_nxv64i8:
210; CHECK:       # %bb.0:
211; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, mu
212; CHECK-NEXT:    vmerge.vvm v8, v16, v8, v0
213; CHECK-NEXT:    ret
214  %vc = select <vscale x 64 x i1> %cond, <vscale x 64 x i8> %va, <vscale x 64 x i8> %vb
215  ret <vscale x 64 x i8> %vc
216}
217
218define <vscale x 64 x i8> @vmerge_xv_nxv64i8(<vscale x 64 x i8> %va, i8 signext %b, <vscale x 64 x i1> %cond) {
219; CHECK-LABEL: vmerge_xv_nxv64i8:
220; CHECK:       # %bb.0:
221; CHECK-NEXT:    vsetvli a1, zero, e8, m8, ta, mu
222; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
223; CHECK-NEXT:    ret
224  %head = insertelement <vscale x 64 x i8> undef, i8 %b, i32 0
225  %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> undef, <vscale x 64 x i32> zeroinitializer
226  %vc = select <vscale x 64 x i1> %cond, <vscale x 64 x i8> %splat, <vscale x 64 x i8> %va
227  ret <vscale x 64 x i8> %vc
228}
229
230define <vscale x 64 x i8> @vmerge_iv_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i1> %cond) {
231; CHECK-LABEL: vmerge_iv_nxv64i8:
232; CHECK:       # %bb.0:
233; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, mu
234; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
235; CHECK-NEXT:    ret
236  %head = insertelement <vscale x 64 x i8> undef, i8 3, i32 0
237  %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> undef, <vscale x 64 x i32> zeroinitializer
238  %vc = select <vscale x 64 x i1> %cond, <vscale x 64 x i8> %splat, <vscale x 64 x i8> %va
239  ret <vscale x 64 x i8> %vc
240}
241
242define <vscale x 1 x i16> @vmerge_vv_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> %cond) {
243; CHECK-LABEL: vmerge_vv_nxv1i16:
244; CHECK:       # %bb.0:
245; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
246; CHECK-NEXT:    vmerge.vvm v8, v9, v8, v0
247; CHECK-NEXT:    ret
248  %vc = select <vscale x 1 x i1> %cond, <vscale x 1 x i16> %va, <vscale x 1 x i16> %vb
249  ret <vscale x 1 x i16> %vc
250}
251
252define <vscale x 1 x i16> @vmerge_xv_nxv1i16(<vscale x 1 x i16> %va, i16 signext %b, <vscale x 1 x i1> %cond) {
253; CHECK-LABEL: vmerge_xv_nxv1i16:
254; CHECK:       # %bb.0:
255; CHECK-NEXT:    vsetvli a1, zero, e16, mf4, ta, mu
256; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
257; CHECK-NEXT:    ret
258  %head = insertelement <vscale x 1 x i16> undef, i16 %b, i32 0
259  %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> undef, <vscale x 1 x i32> zeroinitializer
260  %vc = select <vscale x 1 x i1> %cond, <vscale x 1 x i16> %splat, <vscale x 1 x i16> %va
261  ret <vscale x 1 x i16> %vc
262}
263
264define <vscale x 1 x i16> @vmerge_iv_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i1> %cond) {
265; CHECK-LABEL: vmerge_iv_nxv1i16:
266; CHECK:       # %bb.0:
267; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
268; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
269; CHECK-NEXT:    ret
270  %head = insertelement <vscale x 1 x i16> undef, i16 3, i32 0
271  %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> undef, <vscale x 1 x i32> zeroinitializer
272  %vc = select <vscale x 1 x i1> %cond, <vscale x 1 x i16> %splat, <vscale x 1 x i16> %va
273  ret <vscale x 1 x i16> %vc
274}
275
276define <vscale x 2 x i16> @vmerge_vv_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> %cond) {
277; CHECK-LABEL: vmerge_vv_nxv2i16:
278; CHECK:       # %bb.0:
279; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
280; CHECK-NEXT:    vmerge.vvm v8, v9, v8, v0
281; CHECK-NEXT:    ret
282  %vc = select <vscale x 2 x i1> %cond, <vscale x 2 x i16> %va, <vscale x 2 x i16> %vb
283  ret <vscale x 2 x i16> %vc
284}
285
286define <vscale x 2 x i16> @vmerge_xv_nxv2i16(<vscale x 2 x i16> %va, i16 signext %b, <vscale x 2 x i1> %cond) {
287; CHECK-LABEL: vmerge_xv_nxv2i16:
288; CHECK:       # %bb.0:
289; CHECK-NEXT:    vsetvli a1, zero, e16, mf2, ta, mu
290; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
291; CHECK-NEXT:    ret
292  %head = insertelement <vscale x 2 x i16> undef, i16 %b, i32 0
293  %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> undef, <vscale x 2 x i32> zeroinitializer
294  %vc = select <vscale x 2 x i1> %cond, <vscale x 2 x i16> %splat, <vscale x 2 x i16> %va
295  ret <vscale x 2 x i16> %vc
296}
297
298define <vscale x 2 x i16> @vmerge_iv_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %cond) {
299; CHECK-LABEL: vmerge_iv_nxv2i16:
300; CHECK:       # %bb.0:
301; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
302; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
303; CHECK-NEXT:    ret
304  %head = insertelement <vscale x 2 x i16> undef, i16 3, i32 0
305  %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> undef, <vscale x 2 x i32> zeroinitializer
306  %vc = select <vscale x 2 x i1> %cond, <vscale x 2 x i16> %splat, <vscale x 2 x i16> %va
307  ret <vscale x 2 x i16> %vc
308}
309
310define <vscale x 4 x i16> @vmerge_vv_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> %cond) {
311; CHECK-LABEL: vmerge_vv_nxv4i16:
312; CHECK:       # %bb.0:
313; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
314; CHECK-NEXT:    vmerge.vvm v8, v9, v8, v0
315; CHECK-NEXT:    ret
316  %vc = select <vscale x 4 x i1> %cond, <vscale x 4 x i16> %va, <vscale x 4 x i16> %vb
317  ret <vscale x 4 x i16> %vc
318}
319
320define <vscale x 4 x i16> @vmerge_xv_nxv4i16(<vscale x 4 x i16> %va, i16 signext %b, <vscale x 4 x i1> %cond) {
321; CHECK-LABEL: vmerge_xv_nxv4i16:
322; CHECK:       # %bb.0:
323; CHECK-NEXT:    vsetvli a1, zero, e16, m1, ta, mu
324; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
325; CHECK-NEXT:    ret
326  %head = insertelement <vscale x 4 x i16> undef, i16 %b, i32 0
327  %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> undef, <vscale x 4 x i32> zeroinitializer
328  %vc = select <vscale x 4 x i1> %cond, <vscale x 4 x i16> %splat, <vscale x 4 x i16> %va
329  ret <vscale x 4 x i16> %vc
330}
331
332define <vscale x 4 x i16> @vmerge_iv_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i1> %cond) {
333; CHECK-LABEL: vmerge_iv_nxv4i16:
334; CHECK:       # %bb.0:
335; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
336; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
337; CHECK-NEXT:    ret
338  %head = insertelement <vscale x 4 x i16> undef, i16 3, i32 0
339  %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> undef, <vscale x 4 x i32> zeroinitializer
340  %vc = select <vscale x 4 x i1> %cond, <vscale x 4 x i16> %splat, <vscale x 4 x i16> %va
341  ret <vscale x 4 x i16> %vc
342}
343
344define <vscale x 8 x i16> @vmerge_vv_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> %cond) {
345; CHECK-LABEL: vmerge_vv_nxv8i16:
346; CHECK:       # %bb.0:
347; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
348; CHECK-NEXT:    vmerge.vvm v8, v10, v8, v0
349; CHECK-NEXT:    ret
350  %vc = select <vscale x 8 x i1> %cond, <vscale x 8 x i16> %va, <vscale x 8 x i16> %vb
351  ret <vscale x 8 x i16> %vc
352}
353
354define <vscale x 8 x i16> @vmerge_xv_nxv8i16(<vscale x 8 x i16> %va, i16 signext %b, <vscale x 8 x i1> %cond) {
355; CHECK-LABEL: vmerge_xv_nxv8i16:
356; CHECK:       # %bb.0:
357; CHECK-NEXT:    vsetvli a1, zero, e16, m2, ta, mu
358; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
359; CHECK-NEXT:    ret
360  %head = insertelement <vscale x 8 x i16> undef, i16 %b, i32 0
361  %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
362  %vc = select <vscale x 8 x i1> %cond, <vscale x 8 x i16> %splat, <vscale x 8 x i16> %va
363  ret <vscale x 8 x i16> %vc
364}
365
366define <vscale x 8 x i16> @vmerge_iv_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i1> %cond) {
367; CHECK-LABEL: vmerge_iv_nxv8i16:
368; CHECK:       # %bb.0:
369; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
370; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
371; CHECK-NEXT:    ret
372  %head = insertelement <vscale x 8 x i16> undef, i16 3, i32 0
373  %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
374  %vc = select <vscale x 8 x i1> %cond, <vscale x 8 x i16> %splat, <vscale x 8 x i16> %va
375  ret <vscale x 8 x i16> %vc
376}
377
378define <vscale x 16 x i16> @vmerge_vv_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> %cond) {
379; CHECK-LABEL: vmerge_vv_nxv16i16:
380; CHECK:       # %bb.0:
381; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, mu
382; CHECK-NEXT:    vmerge.vvm v8, v12, v8, v0
383; CHECK-NEXT:    ret
384  %vc = select <vscale x 16 x i1> %cond, <vscale x 16 x i16> %va, <vscale x 16 x i16> %vb
385  ret <vscale x 16 x i16> %vc
386}
387
388define <vscale x 16 x i16> @vmerge_xv_nxv16i16(<vscale x 16 x i16> %va, i16 signext %b, <vscale x 16 x i1> %cond) {
389; CHECK-LABEL: vmerge_xv_nxv16i16:
390; CHECK:       # %bb.0:
391; CHECK-NEXT:    vsetvli a1, zero, e16, m4, ta, mu
392; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
393; CHECK-NEXT:    ret
394  %head = insertelement <vscale x 16 x i16> undef, i16 %b, i32 0
395  %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> undef, <vscale x 16 x i32> zeroinitializer
396  %vc = select <vscale x 16 x i1> %cond, <vscale x 16 x i16> %splat, <vscale x 16 x i16> %va
397  ret <vscale x 16 x i16> %vc
398}
399
400define <vscale x 16 x i16> @vmerge_iv_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i1> %cond) {
401; CHECK-LABEL: vmerge_iv_nxv16i16:
402; CHECK:       # %bb.0:
403; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, mu
404; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
405; CHECK-NEXT:    ret
406  %head = insertelement <vscale x 16 x i16> undef, i16 3, i32 0
407  %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> undef, <vscale x 16 x i32> zeroinitializer
408  %vc = select <vscale x 16 x i1> %cond, <vscale x 16 x i16> %splat, <vscale x 16 x i16> %va
409  ret <vscale x 16 x i16> %vc
410}
411
412define <vscale x 32 x i16> @vmerge_vv_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> %cond) {
413; CHECK-LABEL: vmerge_vv_nxv32i16:
414; CHECK:       # %bb.0:
415; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, mu
416; CHECK-NEXT:    vmerge.vvm v8, v16, v8, v0
417; CHECK-NEXT:    ret
418  %vc = select <vscale x 32 x i1> %cond, <vscale x 32 x i16> %va, <vscale x 32 x i16> %vb
419  ret <vscale x 32 x i16> %vc
420}
421
422define <vscale x 32 x i16> @vmerge_xv_nxv32i16(<vscale x 32 x i16> %va, i16 signext %b, <vscale x 32 x i1> %cond) {
423; CHECK-LABEL: vmerge_xv_nxv32i16:
424; CHECK:       # %bb.0:
425; CHECK-NEXT:    vsetvli a1, zero, e16, m8, ta, mu
426; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
427; CHECK-NEXT:    ret
428  %head = insertelement <vscale x 32 x i16> undef, i16 %b, i32 0
429  %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> undef, <vscale x 32 x i32> zeroinitializer
430  %vc = select <vscale x 32 x i1> %cond, <vscale x 32 x i16> %splat, <vscale x 32 x i16> %va
431  ret <vscale x 32 x i16> %vc
432}
433
434define <vscale x 32 x i16> @vmerge_iv_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i1> %cond) {
435; CHECK-LABEL: vmerge_iv_nxv32i16:
436; CHECK:       # %bb.0:
437; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, mu
438; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
439; CHECK-NEXT:    ret
440  %head = insertelement <vscale x 32 x i16> undef, i16 3, i32 0
441  %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> undef, <vscale x 32 x i32> zeroinitializer
442  %vc = select <vscale x 32 x i1> %cond, <vscale x 32 x i16> %splat, <vscale x 32 x i16> %va
443  ret <vscale x 32 x i16> %vc
444}
445
446define <vscale x 1 x i32> @vmerge_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %cond) {
447; CHECK-LABEL: vmerge_vv_nxv1i32:
448; CHECK:       # %bb.0:
449; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
450; CHECK-NEXT:    vmerge.vvm v8, v9, v8, v0
451; CHECK-NEXT:    ret
452  %vc = select <vscale x 1 x i1> %cond, <vscale x 1 x i32> %va, <vscale x 1 x i32> %vb
453  ret <vscale x 1 x i32> %vc
454}
455
456define <vscale x 1 x i32> @vmerge_xv_nxv1i32(<vscale x 1 x i32> %va, i32 signext %b, <vscale x 1 x i1> %cond) {
457; CHECK-LABEL: vmerge_xv_nxv1i32:
458; CHECK:       # %bb.0:
459; CHECK-NEXT:    vsetvli a1, zero, e32, mf2, ta, mu
460; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
461; CHECK-NEXT:    ret
462  %head = insertelement <vscale x 1 x i32> undef, i32 %b, i32 0
463  %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> undef, <vscale x 1 x i32> zeroinitializer
464  %vc = select <vscale x 1 x i1> %cond, <vscale x 1 x i32> %splat, <vscale x 1 x i32> %va
465  ret <vscale x 1 x i32> %vc
466}
467
468define <vscale x 1 x i32> @vmerge_iv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %cond) {
469; CHECK-LABEL: vmerge_iv_nxv1i32:
470; CHECK:       # %bb.0:
471; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
472; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
473; CHECK-NEXT:    ret
474  %head = insertelement <vscale x 1 x i32> undef, i32 3, i32 0
475  %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> undef, <vscale x 1 x i32> zeroinitializer
476  %vc = select <vscale x 1 x i1> %cond, <vscale x 1 x i32> %splat, <vscale x 1 x i32> %va
477  ret <vscale x 1 x i32> %vc
478}
479
480define <vscale x 2 x i32> @vmerge_vv_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %cond) {
481; CHECK-LABEL: vmerge_vv_nxv2i32:
482; CHECK:       # %bb.0:
483; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
484; CHECK-NEXT:    vmerge.vvm v8, v9, v8, v0
485; CHECK-NEXT:    ret
486  %vc = select <vscale x 2 x i1> %cond, <vscale x 2 x i32> %va, <vscale x 2 x i32> %vb
487  ret <vscale x 2 x i32> %vc
488}
489
490define <vscale x 2 x i32> @vmerge_xv_nxv2i32(<vscale x 2 x i32> %va, i32 signext %b, <vscale x 2 x i1> %cond) {
491; CHECK-LABEL: vmerge_xv_nxv2i32:
492; CHECK:       # %bb.0:
493; CHECK-NEXT:    vsetvli a1, zero, e32, m1, ta, mu
494; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
495; CHECK-NEXT:    ret
496  %head = insertelement <vscale x 2 x i32> undef, i32 %b, i32 0
497  %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> undef, <vscale x 2 x i32> zeroinitializer
498  %vc = select <vscale x 2 x i1> %cond, <vscale x 2 x i32> %splat, <vscale x 2 x i32> %va
499  ret <vscale x 2 x i32> %vc
500}
501
502define <vscale x 2 x i32> @vmerge_iv_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %cond) {
503; CHECK-LABEL: vmerge_iv_nxv2i32:
504; CHECK:       # %bb.0:
505; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
506; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
507; CHECK-NEXT:    ret
508  %head = insertelement <vscale x 2 x i32> undef, i32 3, i32 0
509  %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> undef, <vscale x 2 x i32> zeroinitializer
510  %vc = select <vscale x 2 x i1> %cond, <vscale x 2 x i32> %splat, <vscale x 2 x i32> %va
511  ret <vscale x 2 x i32> %vc
512}
513
514define <vscale x 4 x i32> @vmerge_vv_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> %cond) {
515; CHECK-LABEL: vmerge_vv_nxv4i32:
516; CHECK:       # %bb.0:
517; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
518; CHECK-NEXT:    vmerge.vvm v8, v10, v8, v0
519; CHECK-NEXT:    ret
520  %vc = select <vscale x 4 x i1> %cond, <vscale x 4 x i32> %va, <vscale x 4 x i32> %vb
521  ret <vscale x 4 x i32> %vc
522}
523
524define <vscale x 4 x i32> @vmerge_xv_nxv4i32(<vscale x 4 x i32> %va, i32 signext %b, <vscale x 4 x i1> %cond) {
525; CHECK-LABEL: vmerge_xv_nxv4i32:
526; CHECK:       # %bb.0:
527; CHECK-NEXT:    vsetvli a1, zero, e32, m2, ta, mu
528; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
529; CHECK-NEXT:    ret
530  %head = insertelement <vscale x 4 x i32> undef, i32 %b, i32 0
531  %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
532  %vc = select <vscale x 4 x i1> %cond, <vscale x 4 x i32> %splat, <vscale x 4 x i32> %va
533  ret <vscale x 4 x i32> %vc
534}
535
536define <vscale x 4 x i32> @vmerge_iv_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i1> %cond) {
537; CHECK-LABEL: vmerge_iv_nxv4i32:
538; CHECK:       # %bb.0:
539; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
540; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
541; CHECK-NEXT:    ret
542  %head = insertelement <vscale x 4 x i32> undef, i32 3, i32 0
543  %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
544  %vc = select <vscale x 4 x i1> %cond, <vscale x 4 x i32> %splat, <vscale x 4 x i32> %va
545  ret <vscale x 4 x i32> %vc
546}
547
548define <vscale x 8 x i32> @vmerge_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %cond) {
549; CHECK-LABEL: vmerge_vv_nxv8i32:
550; CHECK:       # %bb.0:
551; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
552; CHECK-NEXT:    vmerge.vvm v8, v12, v8, v0
553; CHECK-NEXT:    ret
554  %vc = select <vscale x 8 x i1> %cond, <vscale x 8 x i32> %va, <vscale x 8 x i32> %vb
555  ret <vscale x 8 x i32> %vc
556}
557
558define <vscale x 8 x i32> @vmerge_xv_nxv8i32(<vscale x 8 x i32> %va, i32 signext %b, <vscale x 8 x i1> %cond) {
559; CHECK-LABEL: vmerge_xv_nxv8i32:
560; CHECK:       # %bb.0:
561; CHECK-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
562; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
563; CHECK-NEXT:    ret
564  %head = insertelement <vscale x 8 x i32> undef, i32 %b, i32 0
565  %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> undef, <vscale x 8 x i32> zeroinitializer
566  %vc = select <vscale x 8 x i1> %cond, <vscale x 8 x i32> %splat, <vscale x 8 x i32> %va
567  ret <vscale x 8 x i32> %vc
568}
569
570define <vscale x 8 x i32> @vmerge_iv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %cond) {
571; CHECK-LABEL: vmerge_iv_nxv8i32:
572; CHECK:       # %bb.0:
573; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
574; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
575; CHECK-NEXT:    ret
576  %head = insertelement <vscale x 8 x i32> undef, i32 3, i32 0
577  %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> undef, <vscale x 8 x i32> zeroinitializer
578  %vc = select <vscale x 8 x i1> %cond, <vscale x 8 x i32> %splat, <vscale x 8 x i32> %va
579  ret <vscale x 8 x i32> %vc
580}
581
582define <vscale x 16 x i32> @vmerge_vv_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> %cond) {
583; CHECK-LABEL: vmerge_vv_nxv16i32:
584; CHECK:       # %bb.0:
585; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, mu
586; CHECK-NEXT:    vmerge.vvm v8, v16, v8, v0
587; CHECK-NEXT:    ret
588  %vc = select <vscale x 16 x i1> %cond, <vscale x 16 x i32> %va, <vscale x 16 x i32> %vb
589  ret <vscale x 16 x i32> %vc
590}
591
592define <vscale x 16 x i32> @vmerge_xv_nxv16i32(<vscale x 16 x i32> %va, i32 signext %b, <vscale x 16 x i1> %cond) {
593; CHECK-LABEL: vmerge_xv_nxv16i32:
594; CHECK:       # %bb.0:
595; CHECK-NEXT:    vsetvli a1, zero, e32, m8, ta, mu
596; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
597; CHECK-NEXT:    ret
598  %head = insertelement <vscale x 16 x i32> undef, i32 %b, i32 0
599  %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> undef, <vscale x 16 x i32> zeroinitializer
600  %vc = select <vscale x 16 x i1> %cond, <vscale x 16 x i32> %splat, <vscale x 16 x i32> %va
601  ret <vscale x 16 x i32> %vc
602}
603
604define <vscale x 16 x i32> @vmerge_iv_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i1> %cond) {
605; CHECK-LABEL: vmerge_iv_nxv16i32:
606; CHECK:       # %bb.0:
607; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, mu
608; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
609; CHECK-NEXT:    ret
610  %head = insertelement <vscale x 16 x i32> undef, i32 3, i32 0
611  %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> undef, <vscale x 16 x i32> zeroinitializer
612  %vc = select <vscale x 16 x i1> %cond, <vscale x 16 x i32> %splat, <vscale x 16 x i32> %va
613  ret <vscale x 16 x i32> %vc
614}
615
616define <vscale x 1 x i64> @vmerge_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %cond) {
617; CHECK-LABEL: vmerge_vv_nxv1i64:
618; CHECK:       # %bb.0:
619; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
620; CHECK-NEXT:    vmerge.vvm v8, v9, v8, v0
621; CHECK-NEXT:    ret
622  %vc = select <vscale x 1 x i1> %cond, <vscale x 1 x i64> %va, <vscale x 1 x i64> %vb
623  ret <vscale x 1 x i64> %vc
624}
625
626define <vscale x 1 x i64> @vmerge_xv_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %cond) {
627; CHECK-LABEL: vmerge_xv_nxv1i64:
628; CHECK:       # %bb.0:
629; CHECK-NEXT:    vsetvli a1, zero, e64, m1, ta, mu
630; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
631; CHECK-NEXT:    ret
632  %head = insertelement <vscale x 1 x i64> undef, i64 %b, i32 0
633  %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> undef, <vscale x 1 x i32> zeroinitializer
634  %vc = select <vscale x 1 x i1> %cond, <vscale x 1 x i64> %splat, <vscale x 1 x i64> %va
635  ret <vscale x 1 x i64> %vc
636}
637
638define <vscale x 1 x i64> @vmerge_iv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %cond) {
639; CHECK-LABEL: vmerge_iv_nxv1i64:
640; CHECK:       # %bb.0:
641; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
642; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
643; CHECK-NEXT:    ret
644  %head = insertelement <vscale x 1 x i64> undef, i64 3, i32 0
645  %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> undef, <vscale x 1 x i32> zeroinitializer
646  %vc = select <vscale x 1 x i1> %cond, <vscale x 1 x i64> %splat, <vscale x 1 x i64> %va
647  ret <vscale x 1 x i64> %vc
648}
649
650define <vscale x 2 x i64> @vmerge_vv_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> %cond) {
651; CHECK-LABEL: vmerge_vv_nxv2i64:
652; CHECK:       # %bb.0:
653; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
654; CHECK-NEXT:    vmerge.vvm v8, v10, v8, v0
655; CHECK-NEXT:    ret
656  %vc = select <vscale x 2 x i1> %cond, <vscale x 2 x i64> %va, <vscale x 2 x i64> %vb
657  ret <vscale x 2 x i64> %vc
658}
659
660define <vscale x 2 x i64> @vmerge_xv_nxv2i64(<vscale x 2 x i64> %va, i64 %b, <vscale x 2 x i1> %cond) {
661; CHECK-LABEL: vmerge_xv_nxv2i64:
662; CHECK:       # %bb.0:
663; CHECK-NEXT:    vsetvli a1, zero, e64, m2, ta, mu
664; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
665; CHECK-NEXT:    ret
666  %head = insertelement <vscale x 2 x i64> undef, i64 %b, i32 0
667  %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
668  %vc = select <vscale x 2 x i1> %cond, <vscale x 2 x i64> %splat, <vscale x 2 x i64> %va
669  ret <vscale x 2 x i64> %vc
670}
671
672define <vscale x 2 x i64> @vmerge_iv_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %cond) {
673; CHECK-LABEL: vmerge_iv_nxv2i64:
674; CHECK:       # %bb.0:
675; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
676; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
677; CHECK-NEXT:    ret
678  %head = insertelement <vscale x 2 x i64> undef, i64 3, i32 0
679  %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
680  %vc = select <vscale x 2 x i1> %cond, <vscale x 2 x i64> %splat, <vscale x 2 x i64> %va
681  ret <vscale x 2 x i64> %vc
682}
683
684define <vscale x 4 x i64> @vmerge_vv_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> %cond) {
685; CHECK-LABEL: vmerge_vv_nxv4i64:
686; CHECK:       # %bb.0:
687; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
688; CHECK-NEXT:    vmerge.vvm v8, v12, v8, v0
689; CHECK-NEXT:    ret
690  %vc = select <vscale x 4 x i1> %cond, <vscale x 4 x i64> %va, <vscale x 4 x i64> %vb
691  ret <vscale x 4 x i64> %vc
692}
693
694define <vscale x 4 x i64> @vmerge_xv_nxv4i64(<vscale x 4 x i64> %va, i64 %b, <vscale x 4 x i1> %cond) {
695; CHECK-LABEL: vmerge_xv_nxv4i64:
696; CHECK:       # %bb.0:
697; CHECK-NEXT:    vsetvli a1, zero, e64, m4, ta, mu
698; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
699; CHECK-NEXT:    ret
700  %head = insertelement <vscale x 4 x i64> undef, i64 %b, i32 0
701  %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> undef, <vscale x 4 x i32> zeroinitializer
702  %vc = select <vscale x 4 x i1> %cond, <vscale x 4 x i64> %splat, <vscale x 4 x i64> %va
703  ret <vscale x 4 x i64> %vc
704}
705
706define <vscale x 4 x i64> @vmerge_iv_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i1> %cond) {
707; CHECK-LABEL: vmerge_iv_nxv4i64:
708; CHECK:       # %bb.0:
709; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
710; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
711; CHECK-NEXT:    ret
712  %head = insertelement <vscale x 4 x i64> undef, i64 3, i32 0
713  %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> undef, <vscale x 4 x i32> zeroinitializer
714  %vc = select <vscale x 4 x i1> %cond, <vscale x 4 x i64> %splat, <vscale x 4 x i64> %va
715  ret <vscale x 4 x i64> %vc
716}
717
718define <vscale x 8 x i64> @vmerge_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %cond) {
719; CHECK-LABEL: vmerge_vv_nxv8i64:
720; CHECK:       # %bb.0:
721; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
722; CHECK-NEXT:    vmerge.vvm v8, v16, v8, v0
723; CHECK-NEXT:    ret
724  %vc = select <vscale x 8 x i1> %cond, <vscale x 8 x i64> %va, <vscale x 8 x i64> %vb
725  ret <vscale x 8 x i64> %vc
726}
727
728define <vscale x 8 x i64> @vmerge_xv_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %cond) {
729; CHECK-LABEL: vmerge_xv_nxv8i64:
730; CHECK:       # %bb.0:
731; CHECK-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
732; CHECK-NEXT:    vmerge.vxm v8, v8, a0, v0
733; CHECK-NEXT:    ret
734  %head = insertelement <vscale x 8 x i64> undef, i64 %b, i32 0
735  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> undef, <vscale x 8 x i32> zeroinitializer
736  %vc = select <vscale x 8 x i1> %cond, <vscale x 8 x i64> %splat, <vscale x 8 x i64> %va
737  ret <vscale x 8 x i64> %vc
738}
739
740define <vscale x 8 x i64> @vmerge_iv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %cond) {
741; CHECK-LABEL: vmerge_iv_nxv8i64:
742; CHECK:       # %bb.0:
743; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
744; CHECK-NEXT:    vmerge.vim v8, v8, 3, v0
745; CHECK-NEXT:    ret
746  %head = insertelement <vscale x 8 x i64> undef, i64 3, i32 0
747  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> undef, <vscale x 8 x i32> zeroinitializer
748  %vc = select <vscale x 8 x i1> %cond, <vscale x 8 x i64> %splat, <vscale x 8 x i64> %va
749  ret <vscale x 8 x i64> %vc
750}
751
752define <vscale x 8 x i64> @vmerge_truelhs_nxv8i64_0(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb) {
753; CHECK-LABEL: vmerge_truelhs_nxv8i64_0:
754; CHECK:       # %bb.0:
755; CHECK-NEXT:    ret
756  %mhead = insertelement <vscale x 8 x i1> undef, i1 1, i32 0
757  %mtrue = shufflevector <vscale x 8 x i1> %mhead, <vscale x 8 x i1> undef, <vscale x 8 x i32> zeroinitializer
758  %vc = select <vscale x 8 x i1> %mtrue, <vscale x 8 x i64> %va, <vscale x 8 x i64> %vb
759  ret <vscale x 8 x i64> %vc
760}
761
762define <vscale x 8 x i64> @vmerge_falselhs_nxv8i64_0(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb) {
763; CHECK-LABEL: vmerge_falselhs_nxv8i64_0:
764; CHECK:       # %bb.0:
765; CHECK-NEXT:    vmv8r.v v8, v16
766; CHECK-NEXT:    ret
767  %vc = select <vscale x 8 x i1> zeroinitializer, <vscale x 8 x i64> %va, <vscale x 8 x i64> %vb
768  ret <vscale x 8 x i64> %vc
769}
770