1; RUN: opt < %s -mtriple=arm-unknown-linux-gnu -S -inline | FileCheck %s
2; RUN: opt < %s -mtriple=arm-unknown-linux-gnu -S -passes='cgscc(inline)' | FileCheck %s
3; Check that we only inline when we have compatible target attributes.
4; ARM has implemented a target attribute that will verify that the attribute
5; sets are compatible.
6
7define i32 @foo() #0 {
8entry:
9  %call = call i32 (...) @baz()
10  ret i32 %call
11; CHECK-LABEL: foo
12; CHECK: call i32 (...) @baz()
13}
14declare i32 @baz(...) #0
15
16define i32 @bar() #1 {
17entry:
18  %call = call i32 @foo()
19  ret i32 %call
20; CHECK-LABEL: bar
21; CHECK: call i32 (...) @baz()
22}
23
24define i32 @qux() #0 {
25entry:
26  %call = call i32 @bar()
27  ret i32 %call
28; CHECK-LABEL: qux
29; CHECK: call i32 @bar()
30}
31
32define i32 @thumb_fn() #2 {
33entry:
34  %call = call i32 @foo()
35  ret i32 %call
36; CHECK-LABEL: thumb_fn
37; CHECK: call i32 @foo
38}
39
40define i32 @strict_align() #3 {
41entry:
42  %call = call i32 @foo()
43  ret i32 %call
44; CHECK-LABEL: strict_align
45; CHECK: call i32 (...) @baz()
46}
47
48define i32 @soft_float_fn() #4 {
49entry:
50  %call = call i32 @foo()
51  ret i32 %call
52; CHECK-LABEL: soft_float_fn
53; CHECK: call i32 @foo
54}
55
56attributes #0 = { "target-cpu"="generic" "target-features"="+dsp,+neon" }
57attributes #1 = { "target-cpu"="generic" "target-features"="+dsp,+neon,+fp16" }
58attributes #2 = { "target-cpu"="generic" "target-features"="+dsp,+neon,+fp16,+thumb-mode" }
59attributes #3 = { "target-cpu"="generic" "target-features"="+dsp,+neon,+strict-align" }
60attributes #4 = { "target-cpu"="generic" "target-features"="+dsp,+neon,+fp16,+soft-float" }
61