1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 %s
3# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX10 %s
4
5---
6name: load_global_s32_from_sgpr
7legalized:       true
8regBankSelected: true
9tracksRegLiveness: true
10
11body: |
12  bb.0:
13    liveins:  $sgpr0_sgpr1
14
15    ; GFX9-LABEL: name: load_global_s32_from_sgpr
16    ; GFX9: liveins: $sgpr0_sgpr1
17    ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
18    ; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
19    ; GFX9: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
20    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
21    ; GFX10-LABEL: name: load_global_s32_from_sgpr
22    ; GFX10: liveins: $sgpr0_sgpr1
23    ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
24    ; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
25    ; GFX10: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
26    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
27    %0:sgpr(p1) = COPY $sgpr0_sgpr1
28    %1:vgpr(p1) = COPY %0
29    %2:vgpr(s32) = G_LOAD %1 :: (load (s32), align 4, addrspace 1)
30    $vgpr0 = COPY %2
31
32...
33
34# FIXME: This zext wouldn't select on its own.
35---
36
37name: load_global_s32_from_sgpr_zext_vgpr
38legalized:       true
39regBankSelected: true
40tracksRegLiveness: true
41
42body: |
43  bb.0:
44    liveins:  $sgpr0_sgpr1, $vgpr0
45
46    ; GFX9-LABEL: name: load_global_s32_from_sgpr_zext_vgpr
47    ; GFX9: liveins: $sgpr0_sgpr1, $vgpr0
48    ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
49    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
50    ; GFX9: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[COPY1]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
51    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
52    ; GFX10-LABEL: name: load_global_s32_from_sgpr_zext_vgpr
53    ; GFX10: liveins: $sgpr0_sgpr1, $vgpr0
54    ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
55    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
56    ; GFX10: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[COPY1]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
57    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
58    %0:sgpr(p1) = COPY $sgpr0_sgpr1
59    %1:vgpr(s32) = COPY $vgpr0
60    %2:vgpr(p1) = COPY %0
61    %3:vgpr(s64) = G_ZEXT %1
62    %4:vgpr(p1) = G_PTR_ADD %2, %3
63    %5:vgpr(s32) = G_LOAD %4 :: (load (s32), align 4, addrspace 1)
64    $vgpr0 = COPY %5
65
66...
67
68# Test with zext lowered to G_MERGE_VALUES
69---
70
71name: load_global_s32_from_sgpr_merge_zext_vgpr
72legalized:       true
73regBankSelected: true
74tracksRegLiveness: true
75
76body: |
77  bb.0:
78    liveins:  $sgpr0_sgpr1, $vgpr0
79
80    ; GFX9-LABEL: name: load_global_s32_from_sgpr_merge_zext_vgpr
81    ; GFX9: liveins: $sgpr0_sgpr1, $vgpr0
82    ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
83    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
84    ; GFX9: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[COPY1]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
85    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
86    ; GFX10-LABEL: name: load_global_s32_from_sgpr_merge_zext_vgpr
87    ; GFX10: liveins: $sgpr0_sgpr1, $vgpr0
88    ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
89    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
90    ; GFX10: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[COPY1]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
91    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
92    %0:sgpr(p1) = COPY $sgpr0_sgpr1
93    %1:vgpr(s32) = COPY $vgpr0
94    %2:vgpr(p1) = COPY %0
95    %zero:vgpr(s32) = G_CONSTANT i32 0
96    %3:vgpr(s64) = G_MERGE_VALUES %1, %zero
97    %4:vgpr(p1) = G_PTR_ADD %2, %3
98    %5:vgpr(s32) = G_LOAD %4 :: (load (s32), align 4, addrspace 1)
99    $vgpr0 = COPY %5
100
101...
102
103---
104
105name: load_global_s32_from_sgpr_merge_not_0_vgpr
106legalized:       true
107regBankSelected: true
108tracksRegLiveness: true
109
110body: |
111  bb.0:
112    liveins:  $sgpr0_sgpr1, $vgpr0
113
114    ; GFX9-LABEL: name: load_global_s32_from_sgpr_merge_not_0_vgpr
115    ; GFX9: liveins: $sgpr0_sgpr1, $vgpr0
116    ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
117    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
118    ; GFX9: [[COPY2:%[0-9]+]]:vreg_64 = COPY [[COPY]]
119    ; GFX9: %notzero:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
120    ; GFX9: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, %notzero, %subreg.sub1
121    ; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY2]].sub0
122    ; GFX9: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
123    ; GFX9: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY2]].sub1
124    ; GFX9: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
125    ; GFX9: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY3]], [[COPY4]], 0, implicit $exec
126    ; GFX9: %12:vgpr_32, dead %14:sreg_64_xexec = V_ADDC_U32_e64 [[COPY5]], [[COPY6]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
127    ; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %12, %subreg.sub1
128    ; GFX9: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
129    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
130    ; GFX10-LABEL: name: load_global_s32_from_sgpr_merge_not_0_vgpr
131    ; GFX10: liveins: $sgpr0_sgpr1, $vgpr0
132    ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
133    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
134    ; GFX10: [[COPY2:%[0-9]+]]:vreg_64 = COPY [[COPY]]
135    ; GFX10: %notzero:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
136    ; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, %notzero, %subreg.sub1
137    ; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY2]].sub0
138    ; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
139    ; GFX10: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY2]].sub1
140    ; GFX10: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
141    ; GFX10: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY3]], [[COPY4]], 0, implicit $exec
142    ; GFX10: %12:vgpr_32, dead %14:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY5]], [[COPY6]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
143    ; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %12, %subreg.sub1
144    ; GFX10: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[REG_SEQUENCE1]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
145    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
146    %0:sgpr(p1) = COPY $sgpr0_sgpr1
147    %1:vgpr(s32) = COPY $vgpr0
148    %2:vgpr(p1) = COPY %0
149    %notzero:vgpr(s32) = G_CONSTANT i32 1
150    %3:vgpr(s64) = G_MERGE_VALUES %1, %notzero
151    %4:vgpr(p1) = G_PTR_ADD %2, %3
152    %5:vgpr(s32) = G_LOAD %4 :: (load (s32), align 4, addrspace 1)
153    $vgpr0 = COPY %5
154
155...
156
157---
158
159name: load_global_s32_from_sgpr_zext_vgpr_offset4095
160legalized:       true
161regBankSelected: true
162tracksRegLiveness: true
163
164body: |
165  bb.0:
166    liveins:  $sgpr0_sgpr1, $vgpr0
167
168    ; GFX9-LABEL: name: load_global_s32_from_sgpr_zext_vgpr_offset4095
169    ; GFX9: liveins: $sgpr0_sgpr1, $vgpr0
170    ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
171    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
172    ; GFX9: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[COPY1]], 4095, 0, implicit $exec :: (load (s32), addrspace 1)
173    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
174    ; GFX10-LABEL: name: load_global_s32_from_sgpr_zext_vgpr_offset4095
175    ; GFX10: liveins: $sgpr0_sgpr1, $vgpr0
176    ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
177    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
178    ; GFX10: [[COPY2:%[0-9]+]]:vreg_64 = COPY [[COPY]]
179    ; GFX10: %zero:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
180    ; GFX10: %zext:vreg_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, %zero, %subreg.sub1
181    ; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY2]].sub0
182    ; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY %zext.sub0
183    ; GFX10: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY2]].sub1
184    ; GFX10: [[COPY6:%[0-9]+]]:vgpr_32 = COPY %zext.sub1
185    ; GFX10: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY3]], [[COPY4]], 0, implicit $exec
186    ; GFX10: %24:vgpr_32, dead %26:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY5]], [[COPY6]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
187    ; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %24, %subreg.sub1
188    ; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4095, implicit $exec
189    ; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
190    ; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
191    ; GFX10: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
192    ; GFX10: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE1]].sub0
193    ; GFX10: [[COPY9:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
194    ; GFX10: [[COPY10:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE1]].sub1
195    ; GFX10: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY7]], [[COPY8]], 0, implicit $exec
196    ; GFX10: %14:vgpr_32, dead %16:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY9]], [[COPY10]], killed [[V_ADD_CO_U32_e64_3]], 0, implicit $exec
197    ; GFX10: [[REG_SEQUENCE2:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_2]], %subreg.sub0, %14, %subreg.sub1
198    ; GFX10: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[REG_SEQUENCE2]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
199    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
200    %0:sgpr(p1) = COPY $sgpr0_sgpr1
201    %1:vgpr(s32) = COPY $vgpr0
202    %2:vgpr(p1) = COPY %0
203    %zero:vgpr(s32) = G_CONSTANT i32 0
204    %zext:vgpr(s64) = G_MERGE_VALUES %1, %zero
205    %4:vgpr(p1) = G_PTR_ADD %2, %zext
206    %5:vgpr(s64) = G_CONSTANT i64 4095
207    %6:vgpr(p1) = G_PTR_ADD %4, %5
208    %7:vgpr(s32) = G_LOAD %6 :: (load (s32), align 4, addrspace 1)
209    $vgpr0 = COPY %7
210
211...
212
213---
214
215name: load_global_s32_from_sgpr_zext_vgpr_offset_neg4096
216legalized:       true
217regBankSelected: true
218tracksRegLiveness: true
219
220body: |
221  bb.0:
222    liveins:  $sgpr0_sgpr1, $vgpr0
223
224    ; GFX9-LABEL: name: load_global_s32_from_sgpr_zext_vgpr_offset_neg4096
225    ; GFX9: liveins: $sgpr0_sgpr1, $vgpr0
226    ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
227    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
228    ; GFX9: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[COPY1]], -4096, 0, implicit $exec :: (load (s32), addrspace 1)
229    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
230    ; GFX10-LABEL: name: load_global_s32_from_sgpr_zext_vgpr_offset_neg4096
231    ; GFX10: liveins: $sgpr0_sgpr1, $vgpr0
232    ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
233    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
234    ; GFX10: [[COPY2:%[0-9]+]]:vreg_64 = COPY [[COPY]]
235    ; GFX10: %zero:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
236    ; GFX10: %zext:vreg_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, %zero, %subreg.sub1
237    ; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY2]].sub0
238    ; GFX10: [[COPY4:%[0-9]+]]:vgpr_32 = COPY %zext.sub0
239    ; GFX10: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY2]].sub1
240    ; GFX10: [[COPY6:%[0-9]+]]:vgpr_32 = COPY %zext.sub1
241    ; GFX10: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY3]], [[COPY4]], 0, implicit $exec
242    ; GFX10: %24:vgpr_32, dead %26:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY5]], [[COPY6]], killed [[V_ADD_CO_U32_e64_1]], 0, implicit $exec
243    ; GFX10: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_]], %subreg.sub0, %24, %subreg.sub1
244    ; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294963200, implicit $exec
245    ; GFX10: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
246    ; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
247    ; GFX10: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
248    ; GFX10: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE1]].sub0
249    ; GFX10: [[COPY9:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
250    ; GFX10: [[COPY10:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE1]].sub1
251    ; GFX10: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_CO_U32_e64 [[COPY7]], [[COPY8]], 0, implicit $exec
252    ; GFX10: %14:vgpr_32, dead %16:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY9]], [[COPY10]], killed [[V_ADD_CO_U32_e64_3]], 0, implicit $exec
253    ; GFX10: [[REG_SEQUENCE2:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e64_2]], %subreg.sub0, %14, %subreg.sub1
254    ; GFX10: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[REG_SEQUENCE2]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
255    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
256    %0:sgpr(p1) = COPY $sgpr0_sgpr1
257    %1:vgpr(s32) = COPY $vgpr0
258    %2:vgpr(p1) = COPY %0
259    %zero:vgpr(s32) = G_CONSTANT i32 0
260    %zext:vgpr(s64) = G_MERGE_VALUES %1, %zero
261    %4:vgpr(p1) = G_PTR_ADD %2, %zext
262    %5:vgpr(s64) = G_CONSTANT i64 -4096
263    %6:vgpr(p1) = G_PTR_ADD %4, %5
264    %7:vgpr(s32) = G_LOAD %6 :: (load (s32), align 4, addrspace 1)
265    $vgpr0 = COPY %7
266
267...
268---
269name: load_global_s32_from_sgpr_base_offset_4096
270legalized:       true
271regBankSelected: true
272tracksRegLiveness: true
273
274body: |
275  bb.0:
276    liveins:  $sgpr0_sgpr1
277
278    ; GFX9-LABEL: name: load_global_s32_from_sgpr_base_offset_4096
279    ; GFX9: liveins: $sgpr0_sgpr1
280    ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
281    ; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
282    ; GFX9: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
283    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
284    ; GFX10-LABEL: name: load_global_s32_from_sgpr_base_offset_4096
285    ; GFX10: liveins: $sgpr0_sgpr1
286    ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
287    ; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
288    ; GFX10: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
289    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
290    %0:sgpr(p1) = COPY $sgpr0_sgpr1
291    %1:sgpr(s64) = G_CONSTANT i64 4096
292    %2:sgpr(p1) = G_PTR_ADD %0, %1
293    %3:vgpr(p1) = COPY %2
294    %4:vgpr(s32) = G_LOAD %3 :: (load (s32), align 4, addrspace 1)
295    $vgpr0 = COPY %4
296
297...
298
299---
300name: load_global_s32_from_sgpr_base_offset_4097
301legalized:       true
302regBankSelected: true
303tracksRegLiveness: true
304
305body: |
306  bb.0:
307    liveins:  $sgpr0_sgpr1
308
309    ; GFX9-LABEL: name: load_global_s32_from_sgpr_base_offset_4097
310    ; GFX9: liveins: $sgpr0_sgpr1
311    ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
312    ; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
313    ; GFX9: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[V_MOV_B32_e32_]], 1, 0, implicit $exec :: (load (s32), addrspace 1)
314    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
315    ; GFX10-LABEL: name: load_global_s32_from_sgpr_base_offset_4097
316    ; GFX10: liveins: $sgpr0_sgpr1
317    ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
318    ; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
319    ; GFX10: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[V_MOV_B32_e32_]], 1, 0, implicit $exec :: (load (s32), addrspace 1)
320    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
321    %0:sgpr(p1) = COPY $sgpr0_sgpr1
322    %1:sgpr(s64) = G_CONSTANT i64 4097
323    %2:sgpr(p1) = G_PTR_ADD %0, %1
324    %3:vgpr(p1) = COPY %2
325    %4:vgpr(s32) = G_LOAD %3 :: (load (s32), align 4, addrspace 1)
326    $vgpr0 = COPY %4
327
328...
329
330---
331name: load_global_s32_from_sgpr_base_offset_neg4097
332legalized:       true
333regBankSelected: true
334tracksRegLiveness: true
335
336body: |
337  bb.0:
338    liveins:  $sgpr0_sgpr1
339
340    ; GFX9-LABEL: name: load_global_s32_from_sgpr_base_offset_neg4097
341    ; GFX9: liveins: $sgpr0_sgpr1
342    ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
343    ; GFX9: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 4294963199
344    ; GFX9: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
345    ; GFX9: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
346    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
347    ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
348    ; GFX9: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
349    ; GFX9: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub1
350    ; GFX9: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY1]], [[COPY2]], implicit-def $scc
351    ; GFX9: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY3]], [[COPY4]], implicit-def $scc, implicit $scc
352    ; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
353    ; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
354    ; GFX9: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[REG_SEQUENCE1]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
355    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
356    ; GFX10-LABEL: name: load_global_s32_from_sgpr_base_offset_neg4097
357    ; GFX10: liveins: $sgpr0_sgpr1
358    ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
359    ; GFX10: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 4294963199
360    ; GFX10: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
361    ; GFX10: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
362    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
363    ; GFX10: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
364    ; GFX10: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
365    ; GFX10: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub1
366    ; GFX10: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY1]], [[COPY2]], implicit-def $scc
367    ; GFX10: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY3]], [[COPY4]], implicit-def $scc, implicit $scc
368    ; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
369    ; GFX10: [[COPY5:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE1]]
370    ; GFX10: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[COPY5]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
371    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
372    %0:sgpr(p1) = COPY $sgpr0_sgpr1
373    %1:sgpr(s64) = G_CONSTANT i64 -4097
374    %2:sgpr(p1) = G_PTR_ADD %0, %1
375    %3:vgpr(p1) = COPY %2
376    %4:vgpr(s32) = G_LOAD %3 :: (load (s32), align 4, addrspace 1)
377    $vgpr0 = COPY %4
378
379...
380
381---
382name: load_global_s32_from_sgpr_base_offset_2049
383legalized:       true
384regBankSelected: true
385tracksRegLiveness: true
386
387body: |
388  bb.0:
389    liveins:  $sgpr0_sgpr1
390
391    ; GFX9-LABEL: name: load_global_s32_from_sgpr_base_offset_2049
392    ; GFX9: liveins: $sgpr0_sgpr1
393    ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
394    ; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
395    ; GFX9: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[V_MOV_B32_e32_]], 2049, 0, implicit $exec :: (load (s32), addrspace 1)
396    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
397    ; GFX10-LABEL: name: load_global_s32_from_sgpr_base_offset_2049
398    ; GFX10: liveins: $sgpr0_sgpr1
399    ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
400    ; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2048, implicit $exec
401    ; GFX10: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[V_MOV_B32_e32_]], 1, 0, implicit $exec :: (load (s32), addrspace 1)
402    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
403    %0:sgpr(p1) = COPY $sgpr0_sgpr1
404    %1:sgpr(s64) = G_CONSTANT i64 2049
405    %2:sgpr(p1) = G_PTR_ADD %0, %1
406    %3:vgpr(p1) = COPY %2
407    %4:vgpr(s32) = G_LOAD %3 :: (load (s32), align 4, addrspace 1)
408    $vgpr0 = COPY %4
409
410...
411
412---
413name: load_global_s32_from_sgpr_base_offset_neg2049
414legalized:       true
415regBankSelected: true
416tracksRegLiveness: true
417
418body: |
419  bb.0:
420    liveins:  $sgpr0_sgpr1
421
422    ; GFX9-LABEL: name: load_global_s32_from_sgpr_base_offset_neg2049
423    ; GFX9: liveins: $sgpr0_sgpr1
424    ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
425    ; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
426    ; GFX9: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[V_MOV_B32_e32_]], -2049, 0, implicit $exec :: (load (s32), addrspace 1)
427    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
428    ; GFX10-LABEL: name: load_global_s32_from_sgpr_base_offset_neg2049
429    ; GFX10: liveins: $sgpr0_sgpr1
430    ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
431    ; GFX10: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 4294965247
432    ; GFX10: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
433    ; GFX10: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
434    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
435    ; GFX10: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
436    ; GFX10: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
437    ; GFX10: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub1
438    ; GFX10: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY1]], [[COPY2]], implicit-def $scc
439    ; GFX10: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY3]], [[COPY4]], implicit-def $scc, implicit $scc
440    ; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
441    ; GFX10: [[COPY5:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE1]]
442    ; GFX10: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[COPY5]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
443    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
444    %0:sgpr(p1) = COPY $sgpr0_sgpr1
445    %1:sgpr(s64) = G_CONSTANT i64 -2049
446    %2:sgpr(p1) = G_PTR_ADD %0, %1
447    %3:vgpr(p1) = COPY %2
448    %4:vgpr(s32) = G_LOAD %3 :: (load (s32), align 4, addrspace 1)
449    $vgpr0 = COPY %4
450
451...
452---
453name: load_global_s32_from_sgpr_base_offset_4294967295
454legalized:       true
455regBankSelected: true
456tracksRegLiveness: true
457
458body: |
459  bb.0:
460    liveins:  $sgpr0_sgpr1
461
462    ; GFX9-LABEL: name: load_global_s32_from_sgpr_base_offset_4294967295
463    ; GFX9: liveins: $sgpr0_sgpr1
464    ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
465    ; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294963200, implicit $exec
466    ; GFX9: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[V_MOV_B32_e32_]], 4095, 0, implicit $exec :: (load (s32), addrspace 1)
467    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
468    ; GFX10-LABEL: name: load_global_s32_from_sgpr_base_offset_4294967295
469    ; GFX10: liveins: $sgpr0_sgpr1
470    ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
471    ; GFX10: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294965248, implicit $exec
472    ; GFX10: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[COPY]], [[V_MOV_B32_e32_]], 2047, 0, implicit $exec :: (load (s32), addrspace 1)
473    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
474    %0:sgpr(p1) = COPY $sgpr0_sgpr1
475    %1:sgpr(s64) = G_CONSTANT i64 4294967295
476    %2:sgpr(p1) = G_PTR_ADD %0, %1
477    %3:vgpr(p1) = COPY %2
478    %4:vgpr(s32) = G_LOAD %3 :: (load (s32), align 4, addrspace 1)
479    $vgpr0 = COPY %4
480
481...
482---
483name: load_global_s32_from_sgpr_base_offset_4294967296
484legalized:       true
485regBankSelected: true
486tracksRegLiveness: true
487
488body: |
489  bb.0:
490    liveins:  $sgpr0_sgpr1
491
492    ; GFX9-LABEL: name: load_global_s32_from_sgpr_base_offset_4294967296
493    ; GFX9: liveins: $sgpr0_sgpr1
494    ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
495    ; GFX9: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
496    ; GFX9: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 1
497    ; GFX9: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
498    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
499    ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
500    ; GFX9: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
501    ; GFX9: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub1
502    ; GFX9: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY1]], [[COPY2]], implicit-def $scc
503    ; GFX9: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY3]], [[COPY4]], implicit-def $scc, implicit $scc
504    ; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
505    ; GFX9: [[COPY5:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE1]]
506    ; GFX9: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[COPY5]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
507    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
508    ; GFX10-LABEL: name: load_global_s32_from_sgpr_base_offset_4294967296
509    ; GFX10: liveins: $sgpr0_sgpr1
510    ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
511    ; GFX10: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
512    ; GFX10: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 1
513    ; GFX10: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
514    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
515    ; GFX10: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
516    ; GFX10: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
517    ; GFX10: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub1
518    ; GFX10: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY1]], [[COPY2]], implicit-def $scc
519    ; GFX10: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY3]], [[COPY4]], implicit-def $scc, implicit $scc
520    ; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
521    ; GFX10: [[COPY5:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE1]]
522    ; GFX10: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[COPY5]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
523    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
524    %0:sgpr(p1) = COPY $sgpr0_sgpr1
525    %1:sgpr(s64) = G_CONSTANT i64 4294967296
526    %2:sgpr(p1) = G_PTR_ADD %0, %1
527    %3:vgpr(p1) = COPY %2
528    %4:vgpr(s32) = G_LOAD %3 :: (load (s32), align 4, addrspace 1)
529    $vgpr0 = COPY %4
530
531...
532
533---
534name: load_global_s32_from_sgpr_base_offset_4294971390
535legalized:       true
536regBankSelected: true
537tracksRegLiveness: true
538
539body: |
540  bb.0:
541    liveins:  $sgpr0_sgpr1
542
543    ; GFX9-LABEL: name: load_global_s32_from_sgpr_base_offset_4294971390
544    ; GFX9: liveins: $sgpr0_sgpr1
545    ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
546    ; GFX9: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 4094
547    ; GFX9: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 1
548    ; GFX9: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
549    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
550    ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
551    ; GFX9: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
552    ; GFX9: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub1
553    ; GFX9: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY1]], [[COPY2]], implicit-def $scc
554    ; GFX9: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY3]], [[COPY4]], implicit-def $scc, implicit $scc
555    ; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
556    ; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
557    ; GFX9: [[GLOBAL_LOAD_DWORD_SADDR:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD_SADDR [[REG_SEQUENCE1]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
558    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD_SADDR]]
559    ; GFX10-LABEL: name: load_global_s32_from_sgpr_base_offset_4294971390
560    ; GFX10: liveins: $sgpr0_sgpr1
561    ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
562    ; GFX10: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 4094
563    ; GFX10: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 1
564    ; GFX10: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
565    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
566    ; GFX10: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
567    ; GFX10: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
568    ; GFX10: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub1
569    ; GFX10: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY1]], [[COPY2]], implicit-def $scc
570    ; GFX10: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY3]], [[COPY4]], implicit-def $scc, implicit $scc
571    ; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
572    ; GFX10: [[COPY5:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE1]]
573    ; GFX10: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[COPY5]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
574    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
575    %0:sgpr(p1) = COPY $sgpr0_sgpr1
576    %1:sgpr(s64) = G_CONSTANT i64 4294971390
577    %2:sgpr(p1) = G_PTR_ADD %0, %1
578    %3:vgpr(p1) = COPY %2
579    %4:vgpr(s32) = G_LOAD %3 :: (load (s32), align 4, addrspace 1)
580    $vgpr0 = COPY %4
581
582...
583
584---
585name: load_global_s32_from_sgpr_base_offset_neg4294967295
586legalized:       true
587regBankSelected: true
588tracksRegLiveness: true
589
590body: |
591  bb.0:
592    liveins:  $sgpr0_sgpr1
593
594    ; GFX9-LABEL: name: load_global_s32_from_sgpr_base_offset_neg4294967295
595    ; GFX9: liveins: $sgpr0_sgpr1
596    ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
597    ; GFX9: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1
598    ; GFX9: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
599    ; GFX9: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
600    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
601    ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
602    ; GFX9: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
603    ; GFX9: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub1
604    ; GFX9: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY1]], [[COPY2]], implicit-def $scc
605    ; GFX9: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY3]], [[COPY4]], implicit-def $scc, implicit $scc
606    ; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
607    ; GFX9: [[COPY5:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE1]]
608    ; GFX9: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[COPY5]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
609    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
610    ; GFX10-LABEL: name: load_global_s32_from_sgpr_base_offset_neg4294967295
611    ; GFX10: liveins: $sgpr0_sgpr1
612    ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
613    ; GFX10: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1
614    ; GFX10: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
615    ; GFX10: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
616    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
617    ; GFX10: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
618    ; GFX10: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
619    ; GFX10: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub1
620    ; GFX10: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY1]], [[COPY2]], implicit-def $scc
621    ; GFX10: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY3]], [[COPY4]], implicit-def $scc, implicit $scc
622    ; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
623    ; GFX10: [[COPY5:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE1]]
624    ; GFX10: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[COPY5]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
625    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
626    %0:sgpr(p1) = COPY $sgpr0_sgpr1
627    %1:sgpr(s64) = G_CONSTANT i64 -4294967295
628    %2:sgpr(p1) = G_PTR_ADD %0, %1
629    %3:vgpr(p1) = COPY %2
630    %4:vgpr(s32) = G_LOAD %3 :: (load (s32), align 4, addrspace 1)
631    $vgpr0 = COPY %4
632
633...
634---
635name: load_global_s32_from_sgpr_base_offset_neg4294967296
636legalized:       true
637regBankSelected: true
638tracksRegLiveness: true
639
640body: |
641  bb.0:
642    liveins:  $sgpr0_sgpr1
643
644    ; GFX9-LABEL: name: load_global_s32_from_sgpr_base_offset_neg4294967296
645    ; GFX9: liveins: $sgpr0_sgpr1
646    ; GFX9: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
647    ; GFX9: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
648    ; GFX9: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
649    ; GFX9: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
650    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
651    ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
652    ; GFX9: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
653    ; GFX9: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub1
654    ; GFX9: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY1]], [[COPY2]], implicit-def $scc
655    ; GFX9: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY3]], [[COPY4]], implicit-def $scc, implicit $scc
656    ; GFX9: [[REG_SEQUENCE1:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
657    ; GFX9: [[COPY5:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE1]]
658    ; GFX9: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[COPY5]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
659    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
660    ; GFX10-LABEL: name: load_global_s32_from_sgpr_base_offset_neg4294967296
661    ; GFX10: liveins: $sgpr0_sgpr1
662    ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
663    ; GFX10: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
664    ; GFX10: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
665    ; GFX10: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
666    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
667    ; GFX10: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub0
668    ; GFX10: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
669    ; GFX10: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[REG_SEQUENCE]].sub1
670    ; GFX10: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY1]], [[COPY2]], implicit-def $scc
671    ; GFX10: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY3]], [[COPY4]], implicit-def $scc, implicit $scc
672    ; GFX10: [[REG_SEQUENCE1:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
673    ; GFX10: [[COPY5:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE1]]
674    ; GFX10: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[COPY5]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
675    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
676    %0:sgpr(p1) = COPY $sgpr0_sgpr1
677    %1:sgpr(s64) = G_CONSTANT i64 -4294967296
678    %2:sgpr(p1) = G_PTR_ADD %0, %1
679    %3:vgpr(p1) = COPY %2
680    %4:vgpr(s32) = G_LOAD %3 :: (load (s32), align 4, addrspace 1)
681    $vgpr0 = COPY %4
682
683...
684
685---
686name: load_global_s32_from_copy_undef_sgpr
687legalized:       true
688regBankSelected: true
689tracksRegLiveness: true
690
691body: |
692  bb.0:
693    ; GFX9-LABEL: name: load_global_s32_from_copy_undef_sgpr
694    ; GFX9: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
695    ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY [[DEF]]
696    ; GFX9: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[COPY]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
697    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
698    ; GFX10-LABEL: name: load_global_s32_from_copy_undef_sgpr
699    ; GFX10: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
700    ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY [[DEF]]
701    ; GFX10: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[COPY]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
702    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
703    %0:sgpr(p1) = G_IMPLICIT_DEF
704    %1:vgpr(p1) = COPY %0
705    %2:vgpr(s32) = G_LOAD %1 :: (load (s32), align 4, addrspace 1)
706    $vgpr0 = COPY %2
707
708...
709
710---
711name: load_global_s32_from_undef_vgpr
712legalized:       true
713regBankSelected: true
714tracksRegLiveness: true
715
716body: |
717  bb.0:
718    ; GFX9-LABEL: name: load_global_s32_from_undef_vgpr
719    ; GFX9: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
720    ; GFX9: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[DEF]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
721    ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
722    ; GFX10-LABEL: name: load_global_s32_from_undef_vgpr
723    ; GFX10: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
724    ; GFX10: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[DEF]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
725    ; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
726    %0:vgpr(p1) = G_IMPLICIT_DEF
727    %1:vgpr(s32) = G_LOAD %0 :: (load (s32), align 4, addrspace 1)
728    $vgpr0 = COPY %1
729
730...
731