1; RUN: llc -mtriple=powerpc-unknown-aix-xcoff -vec-extabi -verify-machineinstrs -mcpu=pwr7 \ 2; RUN: -mattr=+altivec -stop-after=prologepilog < %s | \ 3; RUN: FileCheck --check-prefix=MIR32 %s 4 5; RUN: llc -mtriple=powerpc-unknown-aix-xcoff -vec-extabi -verify-machineinstrs \ 6; RUN: -mcpu=pwr7 -mattr=+altivec < %s | \ 7; RUN: FileCheck --check-prefix=ASM32 %s 8 9; RUN: llc -mtriple=powerpc64-unknown-aix-xcoff -vec-extabi -verify-machineinstrs \ 10; RUN: -mcpu=pwr7 -mattr=+altivec -stop-after=prologepilog < %s | \ 11; RUN: FileCheck --check-prefix=MIR64 %s 12 13; RUN: llc -mtriple=powerpc64-unknown-aix-xcoff -vec-extabi -verify-machineinstrs \ 14; RUN: -mcpu=pwr7 -mattr=+altivec < %s | \ 15; RUN: FileCheck --check-prefix=ASM64 %s 16 17 18define dso_local void @vec_regs() { 19entry: 20 call void asm sideeffect "", "~{v13},~{v20},~{v26},~{v31}"() 21 ret void 22} 23 24; MIR32: name: vec_regs 25 26; MIR32-LABEL: fixedStack: 27; MIR32-NEXT: - { id: 0, type: spill-slot, offset: -16, size: 16, alignment: 16, stack-id: default, 28; MIR32-NEXT: callee-saved-register: '$v31', callee-saved-restored: true, debug-info-variable: '', 29; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' } 30; MIR32-NEXT: - { id: 1, type: spill-slot, offset: -96, size: 16, alignment: 16, stack-id: default, 31; MIR32-NEXT: callee-saved-register: '$v26', callee-saved-restored: true, debug-info-variable: '', 32; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' } 33; MIR32-NEXT: - { id: 2, type: spill-slot, offset: -192, size: 16, alignment: 16, stack-id: default, 34; MIR32-NEXT: callee-saved-register: '$v20', callee-saved-restored: true, debug-info-variable: '', 35; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' } 36; MIR32-NEXT: stack: 37 38; MIR32: liveins: $v20, $v26, $v31 39 40; MIR32-DAG: STXVD2X killed $v20, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.2) 41; MIR32-DAG: STXVD2X killed $v26, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.1) 42; MIR32-DAG: STXVD2X killed $v31, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.0) 43 44; MIR32: INLINEASM 45 46; MIR32-DAG: $v20 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.2) 47; MIR32-DAG: $v26 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.1) 48; MIR32-DAG: $v31 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.0) 49; MIR32: BLR implicit $lr, implicit $rm 50 51; MIR64: name: vec_regs 52 53; MIR64-LABEL: fixedStack: 54; MIR64-NEXT: - { id: 0, type: spill-slot, offset: -16, size: 16, alignment: 16, stack-id: default, 55; MIR64-NEXT: callee-saved-register: '$v31', callee-saved-restored: true, debug-info-variable: '', 56; MIR64-NEXT: debug-info-expression: '', debug-info-location: '' } 57; MIR64-NEXT: - { id: 1, type: spill-slot, offset: -96, size: 16, alignment: 16, stack-id: default, 58; MIR64-NEXT: callee-saved-register: '$v26', callee-saved-restored: true, debug-info-variable: '', 59; MIR64-NEXT: debug-info-expression: '', debug-info-location: '' } 60; MIR64-NEXT: - { id: 2, type: spill-slot, offset: -192, size: 16, alignment: 16, stack-id: default, 61; MIR64-NEXT: callee-saved-register: '$v20', callee-saved-restored: true, debug-info-variable: '', 62; MIR64-NEXT: debug-info-expression: '', debug-info-location: '' } 63; MIR64-NEXT: stack: 64 65; MIR64: liveins: $v20, $v26, $v31 66 67; MIR64-DAG: STXVD2X killed $v20, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.2) 68; MIR64-DAG: STXVD2X killed $v26, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.1) 69; MIR64-DAG: STXVD2X killed $v31, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.0) 70 71; MIR64: INLINEASM 72 73; MIR64-DAG: $v20 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.2) 74; MIR64-DAG: $v26 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.1) 75; MIR64-DAG: $v31 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.0) 76; MIR64: BLR8 implicit $lr8, implicit $rm 77 78 79; ASM32-LABEL: .vec_regs: 80 81; ASM32: li {{[0-9]+}}, -192 82; ASM32-DAG: stxvd2x 52, 1, {{[0-9]+}} # 16-byte Folded Spill 83; ASM32-DAG: li {{[0-9]+}}, -96 84; ASM32-DAG: stxvd2x 58, 1, {{[0-9]+}} # 16-byte Folded Spill 85; ASM32-DAG: li {{[0-9]+}}, -16 86; ASM32-DAG: stxvd2x 63, 1, {{[0-9]+}} # 16-byte Folded Spill 87; ASM32: #APP 88; ASM32-DAG: #NO_APP 89; ASM32-DAG: lxvd2x 63, 1, {{[0-9]+}} # 16-byte Folded Reload 90; ASM32-DAG: li {{[0-9]+}}, -96 91; ASM32-DAG: lxvd2x 58, 1, {{[0-9]+}} # 16-byte Folded Reload 92; ASM32-DAG: li {{[0-9]+}}, -192 93; ASM32-DAG: lxvd2x 52, 1, {{[0-9]+}} # 16-byte Folded Reload 94; ASM32: blr 95 96; ASM64-LABEL: .vec_regs: 97 98; ASM64-DAG: li {{[0-9]+}}, -192 99; ASM64-DAG: stxvd2x 52, 1, {{[0-9]+}} # 16-byte Folded Spill 100; ASM64-DAG: li {{[0-9]+}}, -96 101; ASM64-DAG: stxvd2x 58, 1, {{[0-9]+}} # 16-byte Folded Spill 102; ASM64-DAG: li {{[0-9]+}}, -16 103; ASM64-DAG: stxvd2x {{[0-9]+}}, 1, {{[0-9]+}} # 16-byte Folded Spill 104; ASM64-DAG: #APP 105; ASM64-DAG: #NO_APP 106; ASM64-DAG: lxvd2x {{[0-9]+}}, 1, {{[0-9]+}} # 16-byte Folded Reload 107; ASM64-DAG: li {{[0-9]+}}, -96 108; ASM64-DAG: lxvd2x 58, 1, {{[0-9]+}} # 16-byte Folded Reload 109; ASM64-DAG: li {{[0-9]+}}, -192 110; ASM64-DAG: lxvd2x 52, 1, {{[0-9]+}} # 16-byte Folded Reload 111; ASM64-DAG: blr 112 113define dso_local void @fprs_gprs_vecregs() { 114 call void asm sideeffect "", "~{r14},~{r25},~{r31},~{f14},~{f21},~{f31},~{v20},~{v26},~{v31}"() 115 ret void 116} 117 118; MIR32: name: fprs_gprs_vecregs 119 120; MIR32-LABEL: fixedStack: 121; MIR32-NEXT: - { id: 0, type: spill-slot, offset: -240, size: 16, alignment: 16, stack-id: default, 122; MIR32-NEXT: callee-saved-register: '$v31', callee-saved-restored: true, debug-info-variable: '', 123; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' } 124; MIR32-NEXT: - { id: 1, type: spill-slot, offset: -320, size: 16, alignment: 16, stack-id: default, 125; MIR32-NEXT: callee-saved-register: '$v26', callee-saved-restored: true, debug-info-variable: '', 126; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' } 127; MIR32-NEXT: - { id: 2, type: spill-slot, offset: -416, size: 16, alignment: 16, stack-id: default, 128; MIR32-NEXT: callee-saved-register: '$v20', callee-saved-restored: true, debug-info-variable: '', 129; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' } 130; MIR32-NEXT: - { id: 3, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: default, 131; MIR32-NEXT: callee-saved-register: '$f31', callee-saved-restored: true, debug-info-variable: '', 132; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' } 133; MIR32-NEXT: - { id: 4, type: spill-slot, offset: -88, size: 8, alignment: 8, stack-id: default, 134; MIR32-NEXT: callee-saved-register: '$f21', callee-saved-restored: true, debug-info-variable: '', 135; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' } 136; MIR32-NEXT: - { id: 5, type: spill-slot, offset: -144, size: 8, alignment: 16, stack-id: default, 137; MIR32-NEXT: callee-saved-register: '$f14', callee-saved-restored: true, debug-info-variable: '', 138; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' } 139; MIR32-NEXT: - { id: 6, type: spill-slot, offset: -148, size: 4, alignment: 4, stack-id: default, 140; MIR32-NEXT: callee-saved-register: '$r31', callee-saved-restored: true, debug-info-variable: '', 141; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' } 142; MIR32-NEXT: - { id: 7, type: spill-slot, offset: -172, size: 4, alignment: 4, stack-id: default, 143; MIR32-NEXT: callee-saved-register: '$r25', callee-saved-restored: true, debug-info-variable: '', 144; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' } 145; MIR32-NEXT: - { id: 8, type: spill-slot, offset: -216, size: 4, alignment: 8, stack-id: default, 146; MIR32-NEXT: callee-saved-register: '$r14', callee-saved-restored: true, debug-info-variable: '', 147; MIR32-NEXT: debug-info-expression: '', debug-info-location: '' } 148; MIR32-NEXT: stack: 149 150; MIR32: liveins: $r14, $r25, $r31, $f14, $f21, $f31, $v20, $v26, $v31 151 152; MIR32-DAG: STW killed $r14, 232, $r1 :: (store (s32) into %fixed-stack.8, align 8) 153; MIR32-DAG: STW killed $r25, 276, $r1 :: (store (s32) into %fixed-stack.7) 154; MIR32-DAG: STW killed $r31, 300, $r1 :: (store (s32) into %fixed-stack.6) 155; MIR32-DAG: STFD killed $f14, 304, $r1 :: (store (s64) into %fixed-stack.5, align 16) 156; MIR32-DAG: STFD killed $f21, 360, $r1 :: (store (s64) into %fixed-stack.4) 157; MIR32-DAG: STFD killed $f31, 440, $r1 :: (store (s64) into %fixed-stack.3) 158; MIR32-DAG: $r{{[0-9]+}} = LI 32 159; MIR32-DAG: STXVD2X killed $v20, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.2) 160; MIR32-DAG: $r{{[0-9]+}} = LI 128 161; MIR32-DAG: STXVD2X killed $v26, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.1) 162; MIR32-DAG: $r{{[0-9]+}} = LI 208 163; MIR32-DAG: STXVD2X killed $v31, $r1, killed $r{{[0-9]+}} :: (store (s128) into %fixed-stack.0) 164; MIR32-DAG: $r1 = STWU $r1, -448, $r1 165 166; MIR32: INLINEASM 167 168; MIR32-DAG: $r14 = LWZ 232, $r1 :: (load (s32) from %fixed-stack.8, align 8) 169; MIR32-DAG: $r25 = LWZ 276, $r1 :: (load (s32) from %fixed-stack.7) 170; MIR32-DAG: $r31 = LWZ 300, $r1 :: (load (s32) from %fixed-stack.6) 171; MIR32-DAG: $f14 = LFD 304, $r1 :: (load (s64) from %fixed-stack.5, align 16) 172; MIR32-DAG: $f21 = LFD 360, $r1 :: (load (s64) from %fixed-stack.4) 173; MIR32-DAG: $f31 = LFD 440, $r1 :: (load (s64) from %fixed-stack.3) 174; MIR32-DAG: $v20 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.2) 175; MIR32-DAG: $r{{[0-9]+}} = LI 32 176; MIR32-DAG: $v26 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.1) 177; MIR32-DAG: $r{{[0-9]+}} = LI 128 178; MIR32-DAG: $v31 = LXVD2X $r1, killed $r{{[0-9]+}} :: (load (s128) from %fixed-stack.0) 179; MIR32-DAG: $r{{[0-9]+}} = LI 208 180; MIR32-DAG: $r1 = ADDI $r1, 448 181; MIR32-DAG: BLR implicit $lr, implicit $rm 182 183; MIR64: name: fprs_gprs_vecregs 184 185; MIR64-LABEL: fixedStack: 186; MIR64-NEXT: - { id: 0, type: spill-slot, offset: -304, size: 16, alignment: 16, stack-id: default, 187; MIR64-NEXT: callee-saved-register: '$v31', callee-saved-restored: true, debug-info-variable: '', 188; MIR64-NEXT: debug-info-expression: '', debug-info-location: '' } 189; MIR64-NEXT: - { id: 1, type: spill-slot, offset: -384, size: 16, alignment: 16, stack-id: default, 190; MIR64-NEXT: callee-saved-register: '$v26', callee-saved-restored: true, debug-info-variable: '', 191; MIR64-NEXT: debug-info-expression: '', debug-info-location: '' } 192; MIR64-NEXT: - { id: 2, type: spill-slot, offset: -480, size: 16, alignment: 16, stack-id: default, 193; MIR64-NEXT: callee-saved-register: '$v20', callee-saved-restored: true, debug-info-variable: '', 194; MIR64-NEXT: debug-info-expression: '', debug-info-location: '' } 195; MIR64-NEXT: - { id: 3, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: default, 196; MIR64-NEXT: callee-saved-register: '$f31', callee-saved-restored: true, debug-info-variable: '', 197; MIR64-NEXT: debug-info-expression: '', debug-info-location: '' } 198; MIR64-NEXT: - { id: 4, type: spill-slot, offset: -88, size: 8, alignment: 8, stack-id: default, 199; MIR64-NEXT: callee-saved-register: '$f21', callee-saved-restored: true, debug-info-variable: '', 200; MIR64-NEXT: debug-info-expression: '', debug-info-location: '' } 201; MIR64-NEXT: - { id: 5, type: spill-slot, offset: -144, size: 8, alignment: 16, stack-id: default, 202; MIR64-NEXT: callee-saved-register: '$f14', callee-saved-restored: true, debug-info-variable: '', 203; MIR64-NEXT: debug-info-expression: '', debug-info-location: '' } 204; MIR64-NEXT: - { id: 6, type: spill-slot, offset: -152, size: 8, alignment: 8, stack-id: default, 205; MIR64-NEXT: callee-saved-register: '$x31', callee-saved-restored: true, debug-info-variable: '', 206; MIR64-NEXT: debug-info-expression: '', debug-info-location: '' } 207; MIR64-NEXT: - { id: 7, type: spill-slot, offset: -200, size: 8, alignment: 8, stack-id: default, 208; MIR64-NEXT: callee-saved-register: '$x25', callee-saved-restored: true, debug-info-variable: '', 209; MIR64-NEXT: debug-info-expression: '', debug-info-location: '' } 210; MIR64-NEXT: - { id: 8, type: spill-slot, offset: -288, size: 8, alignment: 16, stack-id: default, 211; MIR64-NEXT: callee-saved-register: '$x14', callee-saved-restored: true, debug-info-variable: '', 212; MIR64-NEXT: debug-info-expression: '', debug-info-location: '' } 213; MIR64-NEXT: stack: 214 215; MIR64: liveins: $x14, $x25, $x31, $f14, $f21, $f31, $v20, $v26, $v31 216 217; MIR64-DAG: $x1 = STDU $x1, -544, $x1 218; MIR64-DAG: STD killed $x14, 256, $x1 :: (store (s64) into %fixed-stack.8, align 16) 219; MIR64-DAG: STD killed $x25, 344, $x1 :: (store (s64) into %fixed-stack.7) 220; MIR64-DAG: STD killed $x31, 392, $x1 :: (store (s64) into %fixed-stack.6) 221; MIR64-DAG: STFD killed $f14, 400, $x1 :: (store (s64) into %fixed-stack.5, align 16) 222; MIR64-DAG: STFD killed $f21, 456, $x1 :: (store (s64) into %fixed-stack.4) 223; MIR64-DAG: STFD killed $f31, 536, $x1 :: (store (s64) into %fixed-stack.3) 224; MIR64-DAG: $x{{[0-9]+}} = LI8 64 225; MIR64-DAG: STXVD2X killed $v20, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.2) 226; MIR64-DAG: $x{{[0-9]+}} = LI8 160 227; MIR64-DAG: STXVD2X killed $v26, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.1) 228; MIR64-DAG: $x{{[0-9]+}} = LI8 240 229; MIR64-DAG: STXVD2X killed $v31, $x1, killed $x{{[0-9]+}} :: (store (s128) into %fixed-stack.0) 230 231; MIR64: INLINEASM 232 233; MIR64-DAG: $x14 = LD 256, $x1 :: (load (s64) from %fixed-stack.8, align 16) 234; MIR64-DAG: $x25 = LD 344, $x1 :: (load (s64) from %fixed-stack.7) 235; MIR64-DAG: $x31 = LD 392, $x1 :: (load (s64) from %fixed-stack.6) 236; MIR64-DAG: $f14 = LFD 400, $x1 :: (load (s64) from %fixed-stack.5, align 16) 237; MIR64-DAG: $f21 = LFD 456, $x1 :: (load (s64) from %fixed-stack.4) 238; MIR64-DAG: $f31 = LFD 536, $x1 :: (load (s64) from %fixed-stack.3) 239; MIR64-DAG: $v20 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.2) 240; MIR64-DAG: $x{{[0-9]+}} = LI8 64 241; MIR64-DAG: $v26 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.1) 242; MIR64-DAG: $x{{[0-9]+}} = LI8 160 243; MIR64-DAG: $v31 = LXVD2X $x1, killed $x{{[0-9]+}} :: (load (s128) from %fixed-stack.0) 244; MIR64-DAG: $x{{[0-9]+}} = LI8 240 245; MIR64-DAG: $x1 = ADDI8 $x1, 544 246; MIR64-DAG: BLR8 implicit $lr8, implicit $rm 247 248; ASM32-LABEL: .fprs_gprs_vecregs: 249 250; ASM32: stwu 1, -448(1) 251; ASM32-DAG: li {{[0-9]+}}, 32 252; ASM32-DAG: stw 14, 232(1) # 4-byte Folded Spill 253; ASM32-DAG: stfd 14, 304(1) # 8-byte Folded Spill 254; ASM32-DAG: stxvd2x 52, 1, {{[0-9]+}} # 16-byte Folded Spill 255; ASM32-DAG: li {{[0-9]+}}, 128 256; ASM32-DAG: stw 25, 276(1) # 4-byte Folded Spill 257; ASM32-DAG: stxvd2x 58, 1, {{[0-9]+}} # 16-byte Folded Spill 258; ASM32-DAG: li {{[0-9]+}}, 208 259; ASM32-DAG: stw 31, 300(1) # 4-byte Folded Spill 260; ASM32-DAG: stfd 21, 360(1) # 8-byte Folded Spill 261; ASM32-DAG: stfd 31, 440(1) # 8-byte Folded Spill 262; ASM32-DAG: stxvd2x 63, 1, {{[0-9]+}} # 16-byte Folded Spill 263; ASM32-DAG: #APP 264; ASM32-DAG: #NO_APP 265; ASM32-DAG: lxvd2x 63, 1, {{[0-9]+}} # 16-byte Folded Reload 266; ASM32-DAG: li {{[0-9]+}}, 128 267; ASM32-DAG: lfd 31, 440(1) # 8-byte Folded Reload 268; ASM32-DAG: lxvd2x 58, 1, {{[0-9]+}} # 16-byte Folded Reload 269; ASM32-DAG: li {{[0-9]+}}, 32 270; ASM32-DAG: lfd 21, 360(1) # 8-byte Folded Reload 271; ASM32-DAG: lxvd2x 52, 1, {{[0-9]+}} # 16-byte Folded Reload 272; ASM32-DAG: lfd 14, 304(1) # 8-byte Folded Reload 273; ASM32-DAG: lwz 31, 300(1) # 4-byte Folded Reload 274; ASM32-DAG: lwz 25, 276(1) # 4-byte Folded Reload 275; ASM32-DAG: lwz 14, 232(1) # 4-byte Folded Reload 276; ASM32-DAG: addi 1, 1, 448 277; ASM32: blr 278 279; ASM64-LABEL .fprs_gprs_vecregs: 280 281; ASM64: stdu 1, -544(1) 282; ASM64-DAG: li {{[0-9]+}}, 64 283; ASM64-DAG: std 14, 256(1) # 8-byte Folded Spill 284; ASM64-DAG: stfd 14, 400(1) # 8-byte Folded Spill 285; ASM64-DAG: stxvd2x 52, 1, {{[0-9]+}} # 16-byte Folded Spill 286; ASM64-DAG: li {{[0-9]+}}, 160 287; ASM64-DAG: std 25, 344(1) # 8-byte Folded Spill 288; ASM64-DAG: stxvd2x 58, 1, {{[0-9]+}} # 16-byte Folded Spill 289; ASM64-DAG: li {{[0-9]+}}, 240 290; ASM64-DAG: std 31, 392(1) # 8-byte Folded Spill 291; ASM64-DAG: stfd 21, 456(1) # 8-byte Folded Spill 292; ASM64-DAG: stfd 31, 536(1) # 8-byte Folded Spill 293; ASM64-DAG: stxvd2x 63, 1, {{[0-9]+}} # 16-byte Folded Spill 294; ASM64-DAG: #APP 295; ASM64-DAG: #NO_APP 296; ASM64-DAG: lxvd2x 63, 1, {{[0-9]+}} # 16-byte Folded Reload 297; ASM64-DAG: li {{[0-9]+}}, 160 298; ASM64-DAG: lfd 31, 536(1) # 8-byte Folded Reload 299; ASM64-DAG: lxvd2x 58, 1, {{[0-9]+}} # 16-byte Folded Reload 300; ASM64-DAG: li {{[0-9]+}}, 64 301; ASM64-DAG: lfd 21, 456(1) # 8-byte Folded Reload 302; ASM64-DAG: lxvd2x 52, 1, {{[0-9]+}} # 16-byte Folded Reload 303; ASM64-DAG: lfd 14, 400(1) # 8-byte Folded Reload 304; ASM64-DAG: ld 31, 392(1) # 8-byte Folded Reload 305; ASM64-DAG: ld 25, 344(1) # 8-byte Folded Reload 306; ASM64-DAG: ld 14, 256(1) # 8-byte Folded Reload 307; ASM64-DAG: addi 1, 1, 544 308; ASM64: blr 309