1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-v -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=8 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX8
3; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-v -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=8 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX8
4; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-v -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX2
5; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-v -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX2
6; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-v -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX1
7; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-v -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX1
8
9define void @sext_v4i8_v4i32(<4 x i8>* %x, <4 x i32>* %z) {
10; CHECK-LABEL: sext_v4i8_v4i32:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
13; CHECK-NEXT:    vle8.v v25, (a0)
14; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
15; CHECK-NEXT:    vsext.vf4 v26, v25
16; CHECK-NEXT:    vse32.v v26, (a1)
17; CHECK-NEXT:    ret
18  %a = load <4 x i8>, <4 x i8>* %x
19  %b = sext <4 x i8> %a to <4 x i32>
20  store <4 x i32> %b, <4 x i32>* %z
21  ret void
22}
23
24define void @zext_v4i8_v4i32(<4 x i8>* %x, <4 x i32>* %z) {
25; CHECK-LABEL: zext_v4i8_v4i32:
26; CHECK:       # %bb.0:
27; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
28; CHECK-NEXT:    vle8.v v25, (a0)
29; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
30; CHECK-NEXT:    vzext.vf4 v26, v25
31; CHECK-NEXT:    vse32.v v26, (a1)
32; CHECK-NEXT:    ret
33  %a = load <4 x i8>, <4 x i8>* %x
34  %b = zext <4 x i8> %a to <4 x i32>
35  store <4 x i32> %b, <4 x i32>* %z
36  ret void
37}
38
39define void @sext_v8i8_v8i32(<8 x i8>* %x, <8 x i32>* %z) {
40; LMULMAX8-LABEL: sext_v8i8_v8i32:
41; LMULMAX8:       # %bb.0:
42; LMULMAX8-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
43; LMULMAX8-NEXT:    vle8.v v25, (a0)
44; LMULMAX8-NEXT:    vsetvli zero, zero, e32, m2, ta, mu
45; LMULMAX8-NEXT:    vsext.vf4 v26, v25
46; LMULMAX8-NEXT:    vse32.v v26, (a1)
47; LMULMAX8-NEXT:    ret
48;
49; LMULMAX2-LABEL: sext_v8i8_v8i32:
50; LMULMAX2:       # %bb.0:
51; LMULMAX2-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
52; LMULMAX2-NEXT:    vle8.v v25, (a0)
53; LMULMAX2-NEXT:    vsetvli zero, zero, e32, m2, ta, mu
54; LMULMAX2-NEXT:    vsext.vf4 v26, v25
55; LMULMAX2-NEXT:    vse32.v v26, (a1)
56; LMULMAX2-NEXT:    ret
57;
58; LMULMAX1-LABEL: sext_v8i8_v8i32:
59; LMULMAX1:       # %bb.0:
60; LMULMAX1-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
61; LMULMAX1-NEXT:    vle8.v v25, (a0)
62; LMULMAX1-NEXT:    vsetivli zero, 4, e8, mf2, ta, mu
63; LMULMAX1-NEXT:    vslidedown.vi v26, v25, 4
64; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
65; LMULMAX1-NEXT:    vsext.vf4 v27, v26
66; LMULMAX1-NEXT:    vsext.vf4 v26, v25
67; LMULMAX1-NEXT:    addi a0, a1, 16
68; LMULMAX1-NEXT:    vse32.v v27, (a0)
69; LMULMAX1-NEXT:    vse32.v v26, (a1)
70; LMULMAX1-NEXT:    ret
71  %a = load <8 x i8>, <8 x i8>* %x
72  %b = sext <8 x i8> %a to <8 x i32>
73  store <8 x i32> %b, <8 x i32>* %z
74  ret void
75}
76
77define void @sext_v32i8_v32i32(<32 x i8>* %x, <32 x i32>* %z) {
78; LMULMAX8-LABEL: sext_v32i8_v32i32:
79; LMULMAX8:       # %bb.0:
80; LMULMAX8-NEXT:    addi a2, zero, 32
81; LMULMAX8-NEXT:    vsetvli zero, a2, e8, m2, ta, mu
82; LMULMAX8-NEXT:    vle8.v v26, (a0)
83; LMULMAX8-NEXT:    vsetvli zero, zero, e32, m8, ta, mu
84; LMULMAX8-NEXT:    vsext.vf4 v8, v26
85; LMULMAX8-NEXT:    vse32.v v8, (a1)
86; LMULMAX8-NEXT:    ret
87;
88; LMULMAX2-LABEL: sext_v32i8_v32i32:
89; LMULMAX2:       # %bb.0:
90; LMULMAX2-NEXT:    addi a2, zero, 32
91; LMULMAX2-NEXT:    vsetvli zero, a2, e8, m2, ta, mu
92; LMULMAX2-NEXT:    vle8.v v26, (a0)
93; LMULMAX2-NEXT:    vsetivli zero, 8, e8, m1, ta, mu
94; LMULMAX2-NEXT:    vslidedown.vi v25, v26, 8
95; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
96; LMULMAX2-NEXT:    vsext.vf4 v28, v25
97; LMULMAX2-NEXT:    vsetivli zero, 16, e8, m2, ta, mu
98; LMULMAX2-NEXT:    vslidedown.vi v30, v26, 16
99; LMULMAX2-NEXT:    vsetivli zero, 8, e8, m1, ta, mu
100; LMULMAX2-NEXT:    vslidedown.vi v25, v30, 8
101; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
102; LMULMAX2-NEXT:    vsext.vf4 v8, v25
103; LMULMAX2-NEXT:    vsext.vf4 v10, v26
104; LMULMAX2-NEXT:    vsext.vf4 v26, v30
105; LMULMAX2-NEXT:    addi a0, a1, 64
106; LMULMAX2-NEXT:    vse32.v v26, (a0)
107; LMULMAX2-NEXT:    vse32.v v10, (a1)
108; LMULMAX2-NEXT:    addi a0, a1, 96
109; LMULMAX2-NEXT:    vse32.v v8, (a0)
110; LMULMAX2-NEXT:    addi a0, a1, 32
111; LMULMAX2-NEXT:    vse32.v v28, (a0)
112; LMULMAX2-NEXT:    ret
113;
114; LMULMAX1-LABEL: sext_v32i8_v32i32:
115; LMULMAX1:       # %bb.0:
116; LMULMAX1-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
117; LMULMAX1-NEXT:    addi a2, a0, 16
118; LMULMAX1-NEXT:    vle8.v v25, (a2)
119; LMULMAX1-NEXT:    vle8.v v26, (a0)
120; LMULMAX1-NEXT:    vsetivli zero, 4, e8, mf2, ta, mu
121; LMULMAX1-NEXT:    vslidedown.vi v27, v25, 4
122; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
123; LMULMAX1-NEXT:    vsext.vf4 v28, v27
124; LMULMAX1-NEXT:    vsetivli zero, 8, e8, m1, ta, mu
125; LMULMAX1-NEXT:    vslidedown.vi v27, v25, 8
126; LMULMAX1-NEXT:    vsetivli zero, 4, e8, mf2, ta, mu
127; LMULMAX1-NEXT:    vslidedown.vi v29, v27, 4
128; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
129; LMULMAX1-NEXT:    vsext.vf4 v30, v29
130; LMULMAX1-NEXT:    vsetivli zero, 4, e8, mf2, ta, mu
131; LMULMAX1-NEXT:    vslidedown.vi v29, v26, 4
132; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
133; LMULMAX1-NEXT:    vsext.vf4 v31, v29
134; LMULMAX1-NEXT:    vsetivli zero, 8, e8, m1, ta, mu
135; LMULMAX1-NEXT:    vslidedown.vi v29, v26, 8
136; LMULMAX1-NEXT:    vsetivli zero, 4, e8, mf2, ta, mu
137; LMULMAX1-NEXT:    vslidedown.vi v8, v29, 4
138; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
139; LMULMAX1-NEXT:    vsext.vf4 v9, v8
140; LMULMAX1-NEXT:    vsext.vf4 v8, v27
141; LMULMAX1-NEXT:    vsext.vf4 v27, v29
142; LMULMAX1-NEXT:    vsext.vf4 v29, v25
143; LMULMAX1-NEXT:    vsext.vf4 v25, v26
144; LMULMAX1-NEXT:    addi a0, a1, 32
145; LMULMAX1-NEXT:    vse32.v v27, (a0)
146; LMULMAX1-NEXT:    vse32.v v25, (a1)
147; LMULMAX1-NEXT:    addi a0, a1, 96
148; LMULMAX1-NEXT:    vse32.v v8, (a0)
149; LMULMAX1-NEXT:    addi a0, a1, 64
150; LMULMAX1-NEXT:    vse32.v v29, (a0)
151; LMULMAX1-NEXT:    addi a0, a1, 48
152; LMULMAX1-NEXT:    vse32.v v9, (a0)
153; LMULMAX1-NEXT:    addi a0, a1, 16
154; LMULMAX1-NEXT:    vse32.v v31, (a0)
155; LMULMAX1-NEXT:    addi a0, a1, 112
156; LMULMAX1-NEXT:    vse32.v v30, (a0)
157; LMULMAX1-NEXT:    addi a0, a1, 80
158; LMULMAX1-NEXT:    vse32.v v28, (a0)
159; LMULMAX1-NEXT:    ret
160  %a = load <32 x i8>, <32 x i8>* %x
161  %b = sext <32 x i8> %a to <32 x i32>
162  store <32 x i32> %b, <32 x i32>* %z
163  ret void
164}
165
166define void @trunc_v4i8_v4i32(<4 x i32>* %x, <4 x i8>* %z) {
167; CHECK-LABEL: trunc_v4i8_v4i32:
168; CHECK:       # %bb.0:
169; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
170; CHECK-NEXT:    vle32.v v25, (a0)
171; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, mu
172; CHECK-NEXT:    vnsrl.wi v25, v25, 0
173; CHECK-NEXT:    vsetvli zero, zero, e8, mf4, ta, mu
174; CHECK-NEXT:    vnsrl.wi v25, v25, 0
175; CHECK-NEXT:    vse8.v v25, (a1)
176; CHECK-NEXT:    ret
177  %a = load <4 x i32>, <4 x i32>* %x
178  %b = trunc <4 x i32> %a to <4 x i8>
179  store <4 x i8> %b, <4 x i8>* %z
180  ret void
181}
182
183define void @trunc_v8i8_v8i32(<8 x i32>* %x, <8 x i8>* %z) {
184; LMULMAX8-LABEL: trunc_v8i8_v8i32:
185; LMULMAX8:       # %bb.0:
186; LMULMAX8-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
187; LMULMAX8-NEXT:    vle32.v v26, (a0)
188; LMULMAX8-NEXT:    vsetvli zero, zero, e16, m1, ta, mu
189; LMULMAX8-NEXT:    vnsrl.wi v25, v26, 0
190; LMULMAX8-NEXT:    vsetvli zero, zero, e8, mf2, ta, mu
191; LMULMAX8-NEXT:    vnsrl.wi v25, v25, 0
192; LMULMAX8-NEXT:    vse8.v v25, (a1)
193; LMULMAX8-NEXT:    ret
194;
195; LMULMAX2-LABEL: trunc_v8i8_v8i32:
196; LMULMAX2:       # %bb.0:
197; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
198; LMULMAX2-NEXT:    vle32.v v26, (a0)
199; LMULMAX2-NEXT:    vsetvli zero, zero, e16, m1, ta, mu
200; LMULMAX2-NEXT:    vnsrl.wi v25, v26, 0
201; LMULMAX2-NEXT:    vsetvli zero, zero, e8, mf2, ta, mu
202; LMULMAX2-NEXT:    vnsrl.wi v25, v25, 0
203; LMULMAX2-NEXT:    vse8.v v25, (a1)
204; LMULMAX2-NEXT:    ret
205;
206; LMULMAX1-LABEL: trunc_v8i8_v8i32:
207; LMULMAX1:       # %bb.0:
208; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
209; LMULMAX1-NEXT:    vle32.v v25, (a0)
210; LMULMAX1-NEXT:    addi a0, a0, 16
211; LMULMAX1-NEXT:    vle32.v v26, (a0)
212; LMULMAX1-NEXT:    vsetvli zero, zero, e16, mf2, ta, mu
213; LMULMAX1-NEXT:    vnsrl.wi v25, v25, 0
214; LMULMAX1-NEXT:    vsetvli zero, zero, e8, mf4, ta, mu
215; LMULMAX1-NEXT:    vnsrl.wi v25, v25, 0
216; LMULMAX1-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
217; LMULMAX1-NEXT:    vmv.v.i v27, 0
218; LMULMAX1-NEXT:    vsetivli zero, 4, e8, mf2, tu, mu
219; LMULMAX1-NEXT:    vslideup.vi v27, v25, 0
220; LMULMAX1-NEXT:    vsetivli zero, 4, e16, mf2, ta, mu
221; LMULMAX1-NEXT:    vnsrl.wi v25, v26, 0
222; LMULMAX1-NEXT:    vsetvli zero, zero, e8, mf4, ta, mu
223; LMULMAX1-NEXT:    vnsrl.wi v25, v25, 0
224; LMULMAX1-NEXT:    vsetivli zero, 8, e8, mf2, tu, mu
225; LMULMAX1-NEXT:    vslideup.vi v27, v25, 4
226; LMULMAX1-NEXT:    vsetvli zero, zero, e8, mf2, ta, mu
227; LMULMAX1-NEXT:    vse8.v v27, (a1)
228; LMULMAX1-NEXT:    ret
229  %a = load <8 x i32>, <8 x i32>* %x
230  %b = trunc <8 x i32> %a to <8 x i8>
231  store <8 x i8> %b, <8 x i8>* %z
232  ret void
233}
234