1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv64 -mattr=+experimental-v -O0 < %s \
3; RUN:    | FileCheck --check-prefix=SPILL-O0 %s
4; RUN: llc -mtriple=riscv64 -mattr=+experimental-v -O2 < %s \
5; RUN:    | FileCheck --check-prefix=SPILL-O2 %s
6
7define <vscale x 1 x i64> @spill_lmul_1(<vscale x 1 x i64> %va) nounwind {
8; SPILL-O0-LABEL: spill_lmul_1:
9; SPILL-O0:       # %bb.0: # %entry
10; SPILL-O0-NEXT:    addi sp, sp, -16
11; SPILL-O0-NEXT:    csrr a0, vlenb
12; SPILL-O0-NEXT:    sub sp, sp, a0
13; SPILL-O0-NEXT:    addi a0, sp, 16
14; SPILL-O0-NEXT:    vs1r.v v8, (a0) # Unknown-size Folded Spill
15; SPILL-O0-NEXT:    #APP
16; SPILL-O0-NEXT:    #NO_APP
17; SPILL-O0-NEXT:    addi a0, sp, 16
18; SPILL-O0-NEXT:    vl1r.v v8, (a0) # Unknown-size Folded Reload
19; SPILL-O0-NEXT:    csrr a0, vlenb
20; SPILL-O0-NEXT:    add sp, sp, a0
21; SPILL-O0-NEXT:    addi sp, sp, 16
22; SPILL-O0-NEXT:    ret
23;
24; SPILL-O2-LABEL: spill_lmul_1:
25; SPILL-O2:       # %bb.0: # %entry
26; SPILL-O2-NEXT:    addi sp, sp, -16
27; SPILL-O2-NEXT:    csrr a0, vlenb
28; SPILL-O2-NEXT:    sub sp, sp, a0
29; SPILL-O2-NEXT:    addi a0, sp, 16
30; SPILL-O2-NEXT:    vs1r.v v8, (a0) # Unknown-size Folded Spill
31; SPILL-O2-NEXT:    #APP
32; SPILL-O2-NEXT:    #NO_APP
33; SPILL-O2-NEXT:    addi a0, sp, 16
34; SPILL-O2-NEXT:    vl1r.v v8, (a0) # Unknown-size Folded Reload
35; SPILL-O2-NEXT:    csrr a0, vlenb
36; SPILL-O2-NEXT:    add sp, sp, a0
37; SPILL-O2-NEXT:    addi sp, sp, 16
38; SPILL-O2-NEXT:    ret
39entry:
40  call void asm sideeffect "",
41  "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()
42
43  ret <vscale x 1 x i64> %va
44}
45
46define <vscale x 2 x i64> @spill_lmul_2(<vscale x 2 x i64> %va) nounwind {
47; SPILL-O0-LABEL: spill_lmul_2:
48; SPILL-O0:       # %bb.0: # %entry
49; SPILL-O0-NEXT:    addi sp, sp, -16
50; SPILL-O0-NEXT:    csrr a0, vlenb
51; SPILL-O0-NEXT:    slli a0, a0, 1
52; SPILL-O0-NEXT:    sub sp, sp, a0
53; SPILL-O0-NEXT:    addi a0, sp, 16
54; SPILL-O0-NEXT:    vs2r.v v8, (a0) # Unknown-size Folded Spill
55; SPILL-O0-NEXT:    #APP
56; SPILL-O0-NEXT:    #NO_APP
57; SPILL-O0-NEXT:    addi a0, sp, 16
58; SPILL-O0-NEXT:    vl2re8.v v8, (a0) # Unknown-size Folded Reload
59; SPILL-O0-NEXT:    csrr a0, vlenb
60; SPILL-O0-NEXT:    slli a0, a0, 1
61; SPILL-O0-NEXT:    add sp, sp, a0
62; SPILL-O0-NEXT:    addi sp, sp, 16
63; SPILL-O0-NEXT:    ret
64;
65; SPILL-O2-LABEL: spill_lmul_2:
66; SPILL-O2:       # %bb.0: # %entry
67; SPILL-O2-NEXT:    addi sp, sp, -16
68; SPILL-O2-NEXT:    csrr a0, vlenb
69; SPILL-O2-NEXT:    slli a0, a0, 1
70; SPILL-O2-NEXT:    sub sp, sp, a0
71; SPILL-O2-NEXT:    addi a0, sp, 16
72; SPILL-O2-NEXT:    vs2r.v v8, (a0) # Unknown-size Folded Spill
73; SPILL-O2-NEXT:    #APP
74; SPILL-O2-NEXT:    #NO_APP
75; SPILL-O2-NEXT:    addi a0, sp, 16
76; SPILL-O2-NEXT:    vl2re8.v v8, (a0) # Unknown-size Folded Reload
77; SPILL-O2-NEXT:    csrr a0, vlenb
78; SPILL-O2-NEXT:    slli a0, a0, 1
79; SPILL-O2-NEXT:    add sp, sp, a0
80; SPILL-O2-NEXT:    addi sp, sp, 16
81; SPILL-O2-NEXT:    ret
82entry:
83  call void asm sideeffect "",
84  "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()
85
86  ret <vscale x 2 x i64> %va
87}
88
89define <vscale x 4 x i64> @spill_lmul_4(<vscale x 4 x i64> %va) nounwind {
90; SPILL-O0-LABEL: spill_lmul_4:
91; SPILL-O0:       # %bb.0: # %entry
92; SPILL-O0-NEXT:    addi sp, sp, -16
93; SPILL-O0-NEXT:    csrr a0, vlenb
94; SPILL-O0-NEXT:    slli a0, a0, 2
95; SPILL-O0-NEXT:    sub sp, sp, a0
96; SPILL-O0-NEXT:    addi a0, sp, 16
97; SPILL-O0-NEXT:    vs4r.v v8, (a0) # Unknown-size Folded Spill
98; SPILL-O0-NEXT:    #APP
99; SPILL-O0-NEXT:    #NO_APP
100; SPILL-O0-NEXT:    addi a0, sp, 16
101; SPILL-O0-NEXT:    vl4re8.v v8, (a0) # Unknown-size Folded Reload
102; SPILL-O0-NEXT:    csrr a0, vlenb
103; SPILL-O0-NEXT:    slli a0, a0, 2
104; SPILL-O0-NEXT:    add sp, sp, a0
105; SPILL-O0-NEXT:    addi sp, sp, 16
106; SPILL-O0-NEXT:    ret
107;
108; SPILL-O2-LABEL: spill_lmul_4:
109; SPILL-O2:       # %bb.0: # %entry
110; SPILL-O2-NEXT:    addi sp, sp, -16
111; SPILL-O2-NEXT:    csrr a0, vlenb
112; SPILL-O2-NEXT:    slli a0, a0, 2
113; SPILL-O2-NEXT:    sub sp, sp, a0
114; SPILL-O2-NEXT:    addi a0, sp, 16
115; SPILL-O2-NEXT:    vs4r.v v8, (a0) # Unknown-size Folded Spill
116; SPILL-O2-NEXT:    #APP
117; SPILL-O2-NEXT:    #NO_APP
118; SPILL-O2-NEXT:    addi a0, sp, 16
119; SPILL-O2-NEXT:    vl4re8.v v8, (a0) # Unknown-size Folded Reload
120; SPILL-O2-NEXT:    csrr a0, vlenb
121; SPILL-O2-NEXT:    slli a0, a0, 2
122; SPILL-O2-NEXT:    add sp, sp, a0
123; SPILL-O2-NEXT:    addi sp, sp, 16
124; SPILL-O2-NEXT:    ret
125entry:
126  call void asm sideeffect "",
127  "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()
128
129  ret <vscale x 4 x i64> %va
130}
131
132define <vscale x 8 x i64> @spill_lmul_8(<vscale x 8 x i64> %va) nounwind {
133; SPILL-O0-LABEL: spill_lmul_8:
134; SPILL-O0:       # %bb.0: # %entry
135; SPILL-O0-NEXT:    addi sp, sp, -16
136; SPILL-O0-NEXT:    csrr a0, vlenb
137; SPILL-O0-NEXT:    slli a0, a0, 3
138; SPILL-O0-NEXT:    sub sp, sp, a0
139; SPILL-O0-NEXT:    addi a0, sp, 16
140; SPILL-O0-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
141; SPILL-O0-NEXT:    #APP
142; SPILL-O0-NEXT:    #NO_APP
143; SPILL-O0-NEXT:    addi a0, sp, 16
144; SPILL-O0-NEXT:    vl8re8.v v8, (a0) # Unknown-size Folded Reload
145; SPILL-O0-NEXT:    csrr a0, vlenb
146; SPILL-O0-NEXT:    slli a0, a0, 3
147; SPILL-O0-NEXT:    add sp, sp, a0
148; SPILL-O0-NEXT:    addi sp, sp, 16
149; SPILL-O0-NEXT:    ret
150;
151; SPILL-O2-LABEL: spill_lmul_8:
152; SPILL-O2:       # %bb.0: # %entry
153; SPILL-O2-NEXT:    addi sp, sp, -16
154; SPILL-O2-NEXT:    csrr a0, vlenb
155; SPILL-O2-NEXT:    slli a0, a0, 3
156; SPILL-O2-NEXT:    sub sp, sp, a0
157; SPILL-O2-NEXT:    addi a0, sp, 16
158; SPILL-O2-NEXT:    vs8r.v v8, (a0) # Unknown-size Folded Spill
159; SPILL-O2-NEXT:    #APP
160; SPILL-O2-NEXT:    #NO_APP
161; SPILL-O2-NEXT:    addi a0, sp, 16
162; SPILL-O2-NEXT:    vl8re8.v v8, (a0) # Unknown-size Folded Reload
163; SPILL-O2-NEXT:    csrr a0, vlenb
164; SPILL-O2-NEXT:    slli a0, a0, 3
165; SPILL-O2-NEXT:    add sp, sp, a0
166; SPILL-O2-NEXT:    addi sp, sp, 16
167; SPILL-O2-NEXT:    ret
168entry:
169  call void asm sideeffect "",
170  "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19},~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29},~{v30},~{v31}"()
171
172  ret <vscale x 8 x i64> %va
173}
174