1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+experimental-v -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s --check-prefixes=CHECK,RV32
4; RUN: llc -mtriple=riscv64 -mattr=+experimental-v -verify-machineinstrs < %s \
5; RUN:   | FileCheck %s --check-prefixes=CHECK,RV64
6
7declare <vscale x 1 x i8> @llvm.vp.and.nxv1i8(<vscale x 1 x i8>, <vscale x 1 x i8>, <vscale x 1 x i1>, i32)
8
9define <vscale x 1 x i8> @vand_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
10; CHECK-LABEL: vand_vv_nxv1i8:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, mu
13; CHECK-NEXT:    vand.vv v8, v8, v9, v0.t
14; CHECK-NEXT:    ret
15  %v = call <vscale x 1 x i8> @llvm.vp.and.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 %evl)
16  ret <vscale x 1 x i8> %v
17}
18
19define <vscale x 1 x i8> @vand_vv_nxv1i8_unmasked(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, i32 zeroext %evl) {
20; CHECK-LABEL: vand_vv_nxv1i8_unmasked:
21; CHECK:       # %bb.0:
22; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, mu
23; CHECK-NEXT:    vand.vv v8, v8, v9
24; CHECK-NEXT:    ret
25  %head = insertelement <vscale x 1 x i1> undef, i1 true, i32 0
26  %m = shufflevector <vscale x 1 x i1> %head, <vscale x 1 x i1> undef, <vscale x 1 x i32> zeroinitializer
27  %v = call <vscale x 1 x i8> @llvm.vp.and.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b, <vscale x 1 x i1> %m, i32 %evl)
28  ret <vscale x 1 x i8> %v
29}
30
31define <vscale x 1 x i8> @vand_vx_nxv1i8(<vscale x 1 x i8> %va, i8 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
32; CHECK-LABEL: vand_vx_nxv1i8:
33; CHECK:       # %bb.0:
34; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, mu
35; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
36; CHECK-NEXT:    ret
37  %elt.head = insertelement <vscale x 1 x i8> undef, i8 %b, i32 0
38  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> undef, <vscale x 1 x i32> zeroinitializer
39  %v = call <vscale x 1 x i8> @llvm.vp.and.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 %evl)
40  ret <vscale x 1 x i8> %v
41}
42
43define <vscale x 1 x i8> @vand_vx_nxv1i8_unmasked(<vscale x 1 x i8> %va, i8 %b, i32 zeroext %evl) {
44; CHECK-LABEL: vand_vx_nxv1i8_unmasked:
45; CHECK:       # %bb.0:
46; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, mu
47; CHECK-NEXT:    vand.vx v8, v8, a0
48; CHECK-NEXT:    ret
49  %elt.head = insertelement <vscale x 1 x i8> undef, i8 %b, i32 0
50  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> undef, <vscale x 1 x i32> zeroinitializer
51  %head = insertelement <vscale x 1 x i1> undef, i1 true, i32 0
52  %m = shufflevector <vscale x 1 x i1> %head, <vscale x 1 x i1> undef, <vscale x 1 x i32> zeroinitializer
53  %v = call <vscale x 1 x i8> @llvm.vp.and.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 %evl)
54  ret <vscale x 1 x i8> %v
55}
56
57define <vscale x 1 x i8> @vand_vi_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
58; CHECK-LABEL: vand_vi_nxv1i8:
59; CHECK:       # %bb.0:
60; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, mu
61; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
62; CHECK-NEXT:    ret
63  %elt.head = insertelement <vscale x 1 x i8> undef, i8 4, i32 0
64  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> undef, <vscale x 1 x i32> zeroinitializer
65  %v = call <vscale x 1 x i8> @llvm.vp.and.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 %evl)
66  ret <vscale x 1 x i8> %v
67}
68
69define <vscale x 1 x i8> @vand_vi_nxv1i8_unmasked(<vscale x 1 x i8> %va, i32 zeroext %evl) {
70; CHECK-LABEL: vand_vi_nxv1i8_unmasked:
71; CHECK:       # %bb.0:
72; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, mu
73; CHECK-NEXT:    vand.vi v8, v8, 4
74; CHECK-NEXT:    ret
75  %elt.head = insertelement <vscale x 1 x i8> undef, i8 4, i32 0
76  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> undef, <vscale x 1 x i32> zeroinitializer
77  %head = insertelement <vscale x 1 x i1> undef, i1 true, i32 0
78  %m = shufflevector <vscale x 1 x i1> %head, <vscale x 1 x i1> undef, <vscale x 1 x i32> zeroinitializer
79  %v = call <vscale x 1 x i8> @llvm.vp.and.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 %evl)
80  ret <vscale x 1 x i8> %v
81}
82
83declare <vscale x 2 x i8> @llvm.vp.and.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x i8>, <vscale x 2 x i1>, i32)
84
85define <vscale x 2 x i8> @vand_vv_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {
86; CHECK-LABEL: vand_vv_nxv2i8:
87; CHECK:       # %bb.0:
88; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, ta, mu
89; CHECK-NEXT:    vand.vv v8, v8, v9, v0.t
90; CHECK-NEXT:    ret
91  %v = call <vscale x 2 x i8> @llvm.vp.and.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 %evl)
92  ret <vscale x 2 x i8> %v
93}
94
95define <vscale x 2 x i8> @vand_vv_nxv2i8_unmasked(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, i32 zeroext %evl) {
96; CHECK-LABEL: vand_vv_nxv2i8_unmasked:
97; CHECK:       # %bb.0:
98; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, ta, mu
99; CHECK-NEXT:    vand.vv v8, v8, v9
100; CHECK-NEXT:    ret
101  %head = insertelement <vscale x 2 x i1> undef, i1 true, i32 0
102  %m = shufflevector <vscale x 2 x i1> %head, <vscale x 2 x i1> undef, <vscale x 2 x i32> zeroinitializer
103  %v = call <vscale x 2 x i8> @llvm.vp.and.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b, <vscale x 2 x i1> %m, i32 %evl)
104  ret <vscale x 2 x i8> %v
105}
106
107define <vscale x 2 x i8> @vand_vx_nxv2i8(<vscale x 2 x i8> %va, i8 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {
108; CHECK-LABEL: vand_vx_nxv2i8:
109; CHECK:       # %bb.0:
110; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, mu
111; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
112; CHECK-NEXT:    ret
113  %elt.head = insertelement <vscale x 2 x i8> undef, i8 %b, i32 0
114  %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> undef, <vscale x 2 x i32> zeroinitializer
115  %v = call <vscale x 2 x i8> @llvm.vp.and.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 %evl)
116  ret <vscale x 2 x i8> %v
117}
118
119define <vscale x 2 x i8> @vand_vx_nxv2i8_unmasked(<vscale x 2 x i8> %va, i8 %b, i32 zeroext %evl) {
120; CHECK-LABEL: vand_vx_nxv2i8_unmasked:
121; CHECK:       # %bb.0:
122; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, mu
123; CHECK-NEXT:    vand.vx v8, v8, a0
124; CHECK-NEXT:    ret
125  %elt.head = insertelement <vscale x 2 x i8> undef, i8 %b, i32 0
126  %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> undef, <vscale x 2 x i32> zeroinitializer
127  %head = insertelement <vscale x 2 x i1> undef, i1 true, i32 0
128  %m = shufflevector <vscale x 2 x i1> %head, <vscale x 2 x i1> undef, <vscale x 2 x i32> zeroinitializer
129  %v = call <vscale x 2 x i8> @llvm.vp.and.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 %evl)
130  ret <vscale x 2 x i8> %v
131}
132
133define <vscale x 2 x i8> @vand_vi_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
134; CHECK-LABEL: vand_vi_nxv2i8:
135; CHECK:       # %bb.0:
136; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, ta, mu
137; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
138; CHECK-NEXT:    ret
139  %elt.head = insertelement <vscale x 2 x i8> undef, i8 4, i32 0
140  %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> undef, <vscale x 2 x i32> zeroinitializer
141  %v = call <vscale x 2 x i8> @llvm.vp.and.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 %evl)
142  ret <vscale x 2 x i8> %v
143}
144
145define <vscale x 2 x i8> @vand_vi_nxv2i8_unmasked(<vscale x 2 x i8> %va, i32 zeroext %evl) {
146; CHECK-LABEL: vand_vi_nxv2i8_unmasked:
147; CHECK:       # %bb.0:
148; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, ta, mu
149; CHECK-NEXT:    vand.vi v8, v8, 4
150; CHECK-NEXT:    ret
151  %elt.head = insertelement <vscale x 2 x i8> undef, i8 4, i32 0
152  %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> undef, <vscale x 2 x i32> zeroinitializer
153  %head = insertelement <vscale x 2 x i1> undef, i1 true, i32 0
154  %m = shufflevector <vscale x 2 x i1> %head, <vscale x 2 x i1> undef, <vscale x 2 x i32> zeroinitializer
155  %v = call <vscale x 2 x i8> @llvm.vp.and.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 %evl)
156  ret <vscale x 2 x i8> %v
157}
158
159declare <vscale x 4 x i8> @llvm.vp.and.nxv4i8(<vscale x 4 x i8>, <vscale x 4 x i8>, <vscale x 4 x i1>, i32)
160
161define <vscale x 4 x i8> @vand_vv_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {
162; CHECK-LABEL: vand_vv_nxv4i8:
163; CHECK:       # %bb.0:
164; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, mu
165; CHECK-NEXT:    vand.vv v8, v8, v9, v0.t
166; CHECK-NEXT:    ret
167  %v = call <vscale x 4 x i8> @llvm.vp.and.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 %evl)
168  ret <vscale x 4 x i8> %v
169}
170
171define <vscale x 4 x i8> @vand_vv_nxv4i8_unmasked(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, i32 zeroext %evl) {
172; CHECK-LABEL: vand_vv_nxv4i8_unmasked:
173; CHECK:       # %bb.0:
174; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, mu
175; CHECK-NEXT:    vand.vv v8, v8, v9
176; CHECK-NEXT:    ret
177  %head = insertelement <vscale x 4 x i1> undef, i1 true, i32 0
178  %m = shufflevector <vscale x 4 x i1> %head, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
179  %v = call <vscale x 4 x i8> @llvm.vp.and.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b, <vscale x 4 x i1> %m, i32 %evl)
180  ret <vscale x 4 x i8> %v
181}
182
183define <vscale x 4 x i8> @vand_vx_nxv4i8(<vscale x 4 x i8> %va, i8 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {
184; CHECK-LABEL: vand_vx_nxv4i8:
185; CHECK:       # %bb.0:
186; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, mu
187; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
188; CHECK-NEXT:    ret
189  %elt.head = insertelement <vscale x 4 x i8> undef, i8 %b, i32 0
190  %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> undef, <vscale x 4 x i32> zeroinitializer
191  %v = call <vscale x 4 x i8> @llvm.vp.and.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 %evl)
192  ret <vscale x 4 x i8> %v
193}
194
195define <vscale x 4 x i8> @vand_vx_nxv4i8_unmasked(<vscale x 4 x i8> %va, i8 %b, i32 zeroext %evl) {
196; CHECK-LABEL: vand_vx_nxv4i8_unmasked:
197; CHECK:       # %bb.0:
198; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, mu
199; CHECK-NEXT:    vand.vx v8, v8, a0
200; CHECK-NEXT:    ret
201  %elt.head = insertelement <vscale x 4 x i8> undef, i8 %b, i32 0
202  %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> undef, <vscale x 4 x i32> zeroinitializer
203  %head = insertelement <vscale x 4 x i1> undef, i1 true, i32 0
204  %m = shufflevector <vscale x 4 x i1> %head, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
205  %v = call <vscale x 4 x i8> @llvm.vp.and.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 %evl)
206  ret <vscale x 4 x i8> %v
207}
208
209define <vscale x 4 x i8> @vand_vi_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {
210; CHECK-LABEL: vand_vi_nxv4i8:
211; CHECK:       # %bb.0:
212; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, mu
213; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
214; CHECK-NEXT:    ret
215  %elt.head = insertelement <vscale x 4 x i8> undef, i8 4, i32 0
216  %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> undef, <vscale x 4 x i32> zeroinitializer
217  %v = call <vscale x 4 x i8> @llvm.vp.and.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 %evl)
218  ret <vscale x 4 x i8> %v
219}
220
221define <vscale x 4 x i8> @vand_vi_nxv4i8_unmasked(<vscale x 4 x i8> %va, i32 zeroext %evl) {
222; CHECK-LABEL: vand_vi_nxv4i8_unmasked:
223; CHECK:       # %bb.0:
224; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, mu
225; CHECK-NEXT:    vand.vi v8, v8, 4
226; CHECK-NEXT:    ret
227  %elt.head = insertelement <vscale x 4 x i8> undef, i8 4, i32 0
228  %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> undef, <vscale x 4 x i32> zeroinitializer
229  %head = insertelement <vscale x 4 x i1> undef, i1 true, i32 0
230  %m = shufflevector <vscale x 4 x i1> %head, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
231  %v = call <vscale x 4 x i8> @llvm.vp.and.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 %evl)
232  ret <vscale x 4 x i8> %v
233}
234
235declare <vscale x 8 x i8> @llvm.vp.and.nxv8i8(<vscale x 8 x i8>, <vscale x 8 x i8>, <vscale x 8 x i1>, i32)
236
237define <vscale x 8 x i8> @vand_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
238; CHECK-LABEL: vand_vv_nxv8i8:
239; CHECK:       # %bb.0:
240; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, mu
241; CHECK-NEXT:    vand.vv v8, v8, v9, v0.t
242; CHECK-NEXT:    ret
243  %v = call <vscale x 8 x i8> @llvm.vp.and.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 %evl)
244  ret <vscale x 8 x i8> %v
245}
246
247define <vscale x 8 x i8> @vand_vv_nxv8i8_unmasked(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, i32 zeroext %evl) {
248; CHECK-LABEL: vand_vv_nxv8i8_unmasked:
249; CHECK:       # %bb.0:
250; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, mu
251; CHECK-NEXT:    vand.vv v8, v8, v9
252; CHECK-NEXT:    ret
253  %head = insertelement <vscale x 8 x i1> undef, i1 true, i32 0
254  %m = shufflevector <vscale x 8 x i1> %head, <vscale x 8 x i1> undef, <vscale x 8 x i32> zeroinitializer
255  %v = call <vscale x 8 x i8> @llvm.vp.and.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b, <vscale x 8 x i1> %m, i32 %evl)
256  ret <vscale x 8 x i8> %v
257}
258
259define <vscale x 8 x i8> @vand_vx_nxv8i8(<vscale x 8 x i8> %va, i8 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
260; CHECK-LABEL: vand_vx_nxv8i8:
261; CHECK:       # %bb.0:
262; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, mu
263; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
264; CHECK-NEXT:    ret
265  %elt.head = insertelement <vscale x 8 x i8> undef, i8 %b, i32 0
266  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> undef, <vscale x 8 x i32> zeroinitializer
267  %v = call <vscale x 8 x i8> @llvm.vp.and.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 %evl)
268  ret <vscale x 8 x i8> %v
269}
270
271define <vscale x 8 x i8> @vand_vx_nxv8i8_unmasked(<vscale x 8 x i8> %va, i8 %b, i32 zeroext %evl) {
272; CHECK-LABEL: vand_vx_nxv8i8_unmasked:
273; CHECK:       # %bb.0:
274; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, mu
275; CHECK-NEXT:    vand.vx v8, v8, a0
276; CHECK-NEXT:    ret
277  %elt.head = insertelement <vscale x 8 x i8> undef, i8 %b, i32 0
278  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> undef, <vscale x 8 x i32> zeroinitializer
279  %head = insertelement <vscale x 8 x i1> undef, i1 true, i32 0
280  %m = shufflevector <vscale x 8 x i1> %head, <vscale x 8 x i1> undef, <vscale x 8 x i32> zeroinitializer
281  %v = call <vscale x 8 x i8> @llvm.vp.and.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 %evl)
282  ret <vscale x 8 x i8> %v
283}
284
285define <vscale x 8 x i8> @vand_vi_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
286; CHECK-LABEL: vand_vi_nxv8i8:
287; CHECK:       # %bb.0:
288; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, mu
289; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
290; CHECK-NEXT:    ret
291  %elt.head = insertelement <vscale x 8 x i8> undef, i8 4, i32 0
292  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> undef, <vscale x 8 x i32> zeroinitializer
293  %v = call <vscale x 8 x i8> @llvm.vp.and.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 %evl)
294  ret <vscale x 8 x i8> %v
295}
296
297define <vscale x 8 x i8> @vand_vi_nxv8i8_unmasked(<vscale x 8 x i8> %va, i32 zeroext %evl) {
298; CHECK-LABEL: vand_vi_nxv8i8_unmasked:
299; CHECK:       # %bb.0:
300; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, mu
301; CHECK-NEXT:    vand.vi v8, v8, 4
302; CHECK-NEXT:    ret
303  %elt.head = insertelement <vscale x 8 x i8> undef, i8 4, i32 0
304  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> undef, <vscale x 8 x i32> zeroinitializer
305  %head = insertelement <vscale x 8 x i1> undef, i1 true, i32 0
306  %m = shufflevector <vscale x 8 x i1> %head, <vscale x 8 x i1> undef, <vscale x 8 x i32> zeroinitializer
307  %v = call <vscale x 8 x i8> @llvm.vp.and.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 %evl)
308  ret <vscale x 8 x i8> %v
309}
310
311declare <vscale x 16 x i8> @llvm.vp.and.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i1>, i32)
312
313define <vscale x 16 x i8> @vand_vv_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {
314; CHECK-LABEL: vand_vv_nxv16i8:
315; CHECK:       # %bb.0:
316; CHECK-NEXT:    vsetvli zero, a0, e8, m2, ta, mu
317; CHECK-NEXT:    vand.vv v8, v8, v10, v0.t
318; CHECK-NEXT:    ret
319  %v = call <vscale x 16 x i8> @llvm.vp.and.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 %evl)
320  ret <vscale x 16 x i8> %v
321}
322
323define <vscale x 16 x i8> @vand_vv_nxv16i8_unmasked(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, i32 zeroext %evl) {
324; CHECK-LABEL: vand_vv_nxv16i8_unmasked:
325; CHECK:       # %bb.0:
326; CHECK-NEXT:    vsetvli zero, a0, e8, m2, ta, mu
327; CHECK-NEXT:    vand.vv v8, v8, v10
328; CHECK-NEXT:    ret
329  %head = insertelement <vscale x 16 x i1> undef, i1 true, i32 0
330  %m = shufflevector <vscale x 16 x i1> %head, <vscale x 16 x i1> undef, <vscale x 16 x i32> zeroinitializer
331  %v = call <vscale x 16 x i8> @llvm.vp.and.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b, <vscale x 16 x i1> %m, i32 %evl)
332  ret <vscale x 16 x i8> %v
333}
334
335define <vscale x 16 x i8> @vand_vx_nxv16i8(<vscale x 16 x i8> %va, i8 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {
336; CHECK-LABEL: vand_vx_nxv16i8:
337; CHECK:       # %bb.0:
338; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, mu
339; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
340; CHECK-NEXT:    ret
341  %elt.head = insertelement <vscale x 16 x i8> undef, i8 %b, i32 0
342  %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
343  %v = call <vscale x 16 x i8> @llvm.vp.and.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 %evl)
344  ret <vscale x 16 x i8> %v
345}
346
347define <vscale x 16 x i8> @vand_vx_nxv16i8_unmasked(<vscale x 16 x i8> %va, i8 %b, i32 zeroext %evl) {
348; CHECK-LABEL: vand_vx_nxv16i8_unmasked:
349; CHECK:       # %bb.0:
350; CHECK-NEXT:    vsetvli zero, a1, e8, m2, ta, mu
351; CHECK-NEXT:    vand.vx v8, v8, a0
352; CHECK-NEXT:    ret
353  %elt.head = insertelement <vscale x 16 x i8> undef, i8 %b, i32 0
354  %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
355  %head = insertelement <vscale x 16 x i1> undef, i1 true, i32 0
356  %m = shufflevector <vscale x 16 x i1> %head, <vscale x 16 x i1> undef, <vscale x 16 x i32> zeroinitializer
357  %v = call <vscale x 16 x i8> @llvm.vp.and.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 %evl)
358  ret <vscale x 16 x i8> %v
359}
360
361define <vscale x 16 x i8> @vand_vi_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {
362; CHECK-LABEL: vand_vi_nxv16i8:
363; CHECK:       # %bb.0:
364; CHECK-NEXT:    vsetvli zero, a0, e8, m2, ta, mu
365; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
366; CHECK-NEXT:    ret
367  %elt.head = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
368  %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
369  %v = call <vscale x 16 x i8> @llvm.vp.and.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 %evl)
370  ret <vscale x 16 x i8> %v
371}
372
373define <vscale x 16 x i8> @vand_vi_nxv16i8_unmasked(<vscale x 16 x i8> %va, i32 zeroext %evl) {
374; CHECK-LABEL: vand_vi_nxv16i8_unmasked:
375; CHECK:       # %bb.0:
376; CHECK-NEXT:    vsetvli zero, a0, e8, m2, ta, mu
377; CHECK-NEXT:    vand.vi v8, v8, 4
378; CHECK-NEXT:    ret
379  %elt.head = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
380  %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
381  %head = insertelement <vscale x 16 x i1> undef, i1 true, i32 0
382  %m = shufflevector <vscale x 16 x i1> %head, <vscale x 16 x i1> undef, <vscale x 16 x i32> zeroinitializer
383  %v = call <vscale x 16 x i8> @llvm.vp.and.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 %evl)
384  ret <vscale x 16 x i8> %v
385}
386
387declare <vscale x 32 x i8> @llvm.vp.and.nxv32i8(<vscale x 32 x i8>, <vscale x 32 x i8>, <vscale x 32 x i1>, i32)
388
389define <vscale x 32 x i8> @vand_vv_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {
390; CHECK-LABEL: vand_vv_nxv32i8:
391; CHECK:       # %bb.0:
392; CHECK-NEXT:    vsetvli zero, a0, e8, m4, ta, mu
393; CHECK-NEXT:    vand.vv v8, v8, v12, v0.t
394; CHECK-NEXT:    ret
395  %v = call <vscale x 32 x i8> @llvm.vp.and.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 %evl)
396  ret <vscale x 32 x i8> %v
397}
398
399define <vscale x 32 x i8> @vand_vv_nxv32i8_unmasked(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, i32 zeroext %evl) {
400; CHECK-LABEL: vand_vv_nxv32i8_unmasked:
401; CHECK:       # %bb.0:
402; CHECK-NEXT:    vsetvli zero, a0, e8, m4, ta, mu
403; CHECK-NEXT:    vand.vv v8, v8, v12
404; CHECK-NEXT:    ret
405  %head = insertelement <vscale x 32 x i1> undef, i1 true, i32 0
406  %m = shufflevector <vscale x 32 x i1> %head, <vscale x 32 x i1> undef, <vscale x 32 x i32> zeroinitializer
407  %v = call <vscale x 32 x i8> @llvm.vp.and.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b, <vscale x 32 x i1> %m, i32 %evl)
408  ret <vscale x 32 x i8> %v
409}
410
411define <vscale x 32 x i8> @vand_vx_nxv32i8(<vscale x 32 x i8> %va, i8 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {
412; CHECK-LABEL: vand_vx_nxv32i8:
413; CHECK:       # %bb.0:
414; CHECK-NEXT:    vsetvli zero, a1, e8, m4, ta, mu
415; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
416; CHECK-NEXT:    ret
417  %elt.head = insertelement <vscale x 32 x i8> undef, i8 %b, i32 0
418  %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> undef, <vscale x 32 x i32> zeroinitializer
419  %v = call <vscale x 32 x i8> @llvm.vp.and.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 %evl)
420  ret <vscale x 32 x i8> %v
421}
422
423define <vscale x 32 x i8> @vand_vx_nxv32i8_unmasked(<vscale x 32 x i8> %va, i8 %b, i32 zeroext %evl) {
424; CHECK-LABEL: vand_vx_nxv32i8_unmasked:
425; CHECK:       # %bb.0:
426; CHECK-NEXT:    vsetvli zero, a1, e8, m4, ta, mu
427; CHECK-NEXT:    vand.vx v8, v8, a0
428; CHECK-NEXT:    ret
429  %elt.head = insertelement <vscale x 32 x i8> undef, i8 %b, i32 0
430  %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> undef, <vscale x 32 x i32> zeroinitializer
431  %head = insertelement <vscale x 32 x i1> undef, i1 true, i32 0
432  %m = shufflevector <vscale x 32 x i1> %head, <vscale x 32 x i1> undef, <vscale x 32 x i32> zeroinitializer
433  %v = call <vscale x 32 x i8> @llvm.vp.and.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 %evl)
434  ret <vscale x 32 x i8> %v
435}
436
437define <vscale x 32 x i8> @vand_vi_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {
438; CHECK-LABEL: vand_vi_nxv32i8:
439; CHECK:       # %bb.0:
440; CHECK-NEXT:    vsetvli zero, a0, e8, m4, ta, mu
441; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
442; CHECK-NEXT:    ret
443  %elt.head = insertelement <vscale x 32 x i8> undef, i8 4, i32 0
444  %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> undef, <vscale x 32 x i32> zeroinitializer
445  %v = call <vscale x 32 x i8> @llvm.vp.and.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 %evl)
446  ret <vscale x 32 x i8> %v
447}
448
449define <vscale x 32 x i8> @vand_vi_nxv32i8_unmasked(<vscale x 32 x i8> %va, i32 zeroext %evl) {
450; CHECK-LABEL: vand_vi_nxv32i8_unmasked:
451; CHECK:       # %bb.0:
452; CHECK-NEXT:    vsetvli zero, a0, e8, m4, ta, mu
453; CHECK-NEXT:    vand.vi v8, v8, 4
454; CHECK-NEXT:    ret
455  %elt.head = insertelement <vscale x 32 x i8> undef, i8 4, i32 0
456  %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> undef, <vscale x 32 x i32> zeroinitializer
457  %head = insertelement <vscale x 32 x i1> undef, i1 true, i32 0
458  %m = shufflevector <vscale x 32 x i1> %head, <vscale x 32 x i1> undef, <vscale x 32 x i32> zeroinitializer
459  %v = call <vscale x 32 x i8> @llvm.vp.and.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 %evl)
460  ret <vscale x 32 x i8> %v
461}
462
463declare <vscale x 64 x i8> @llvm.vp.and.nxv64i8(<vscale x 64 x i8>, <vscale x 64 x i8>, <vscale x 64 x i1>, i32)
464
465define <vscale x 64 x i8> @vand_vv_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {
466; CHECK-LABEL: vand_vv_nxv64i8:
467; CHECK:       # %bb.0:
468; CHECK-NEXT:    vsetvli zero, a0, e8, m8, ta, mu
469; CHECK-NEXT:    vand.vv v8, v8, v16, v0.t
470; CHECK-NEXT:    ret
471  %v = call <vscale x 64 x i8> @llvm.vp.and.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 %evl)
472  ret <vscale x 64 x i8> %v
473}
474
475define <vscale x 64 x i8> @vand_vv_nxv64i8_unmasked(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, i32 zeroext %evl) {
476; CHECK-LABEL: vand_vv_nxv64i8_unmasked:
477; CHECK:       # %bb.0:
478; CHECK-NEXT:    vsetvli zero, a0, e8, m8, ta, mu
479; CHECK-NEXT:    vand.vv v8, v8, v16
480; CHECK-NEXT:    ret
481  %head = insertelement <vscale x 64 x i1> undef, i1 true, i32 0
482  %m = shufflevector <vscale x 64 x i1> %head, <vscale x 64 x i1> undef, <vscale x 64 x i32> zeroinitializer
483  %v = call <vscale x 64 x i8> @llvm.vp.and.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b, <vscale x 64 x i1> %m, i32 %evl)
484  ret <vscale x 64 x i8> %v
485}
486
487define <vscale x 64 x i8> @vand_vx_nxv64i8(<vscale x 64 x i8> %va, i8 %b, <vscale x 64 x i1> %m, i32 zeroext %evl) {
488; CHECK-LABEL: vand_vx_nxv64i8:
489; CHECK:       # %bb.0:
490; CHECK-NEXT:    vsetvli zero, a1, e8, m8, ta, mu
491; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
492; CHECK-NEXT:    ret
493  %elt.head = insertelement <vscale x 64 x i8> undef, i8 %b, i32 0
494  %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> undef, <vscale x 64 x i32> zeroinitializer
495  %v = call <vscale x 64 x i8> @llvm.vp.and.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 %evl)
496  ret <vscale x 64 x i8> %v
497}
498
499define <vscale x 64 x i8> @vand_vx_nxv64i8_unmasked(<vscale x 64 x i8> %va, i8 %b, i32 zeroext %evl) {
500; CHECK-LABEL: vand_vx_nxv64i8_unmasked:
501; CHECK:       # %bb.0:
502; CHECK-NEXT:    vsetvli zero, a1, e8, m8, ta, mu
503; CHECK-NEXT:    vand.vx v8, v8, a0
504; CHECK-NEXT:    ret
505  %elt.head = insertelement <vscale x 64 x i8> undef, i8 %b, i32 0
506  %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> undef, <vscale x 64 x i32> zeroinitializer
507  %head = insertelement <vscale x 64 x i1> undef, i1 true, i32 0
508  %m = shufflevector <vscale x 64 x i1> %head, <vscale x 64 x i1> undef, <vscale x 64 x i32> zeroinitializer
509  %v = call <vscale x 64 x i8> @llvm.vp.and.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 %evl)
510  ret <vscale x 64 x i8> %v
511}
512
513define <vscale x 64 x i8> @vand_vi_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i1> %m, i32 zeroext %evl) {
514; CHECK-LABEL: vand_vi_nxv64i8:
515; CHECK:       # %bb.0:
516; CHECK-NEXT:    vsetvli zero, a0, e8, m8, ta, mu
517; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
518; CHECK-NEXT:    ret
519  %elt.head = insertelement <vscale x 64 x i8> undef, i8 4, i32 0
520  %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> undef, <vscale x 64 x i32> zeroinitializer
521  %v = call <vscale x 64 x i8> @llvm.vp.and.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 %evl)
522  ret <vscale x 64 x i8> %v
523}
524
525define <vscale x 64 x i8> @vand_vi_nxv64i8_unmasked(<vscale x 64 x i8> %va, i32 zeroext %evl) {
526; CHECK-LABEL: vand_vi_nxv64i8_unmasked:
527; CHECK:       # %bb.0:
528; CHECK-NEXT:    vsetvli zero, a0, e8, m8, ta, mu
529; CHECK-NEXT:    vand.vi v8, v8, 4
530; CHECK-NEXT:    ret
531  %elt.head = insertelement <vscale x 64 x i8> undef, i8 4, i32 0
532  %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> undef, <vscale x 64 x i32> zeroinitializer
533  %head = insertelement <vscale x 64 x i1> undef, i1 true, i32 0
534  %m = shufflevector <vscale x 64 x i1> %head, <vscale x 64 x i1> undef, <vscale x 64 x i32> zeroinitializer
535  %v = call <vscale x 64 x i8> @llvm.vp.and.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 %evl)
536  ret <vscale x 64 x i8> %v
537}
538
539declare <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16>, <vscale x 1 x i16>, <vscale x 1 x i1>, i32)
540
541define <vscale x 1 x i16> @vand_vv_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
542; CHECK-LABEL: vand_vv_nxv1i16:
543; CHECK:       # %bb.0:
544; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, mu
545; CHECK-NEXT:    vand.vv v8, v8, v9, v0.t
546; CHECK-NEXT:    ret
547  %v = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 %evl)
548  ret <vscale x 1 x i16> %v
549}
550
551define <vscale x 1 x i16> @vand_vv_nxv1i16_unmasked(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, i32 zeroext %evl) {
552; CHECK-LABEL: vand_vv_nxv1i16_unmasked:
553; CHECK:       # %bb.0:
554; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, mu
555; CHECK-NEXT:    vand.vv v8, v8, v9
556; CHECK-NEXT:    ret
557  %head = insertelement <vscale x 1 x i1> undef, i1 true, i32 0
558  %m = shufflevector <vscale x 1 x i1> %head, <vscale x 1 x i1> undef, <vscale x 1 x i32> zeroinitializer
559  %v = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b, <vscale x 1 x i1> %m, i32 %evl)
560  ret <vscale x 1 x i16> %v
561}
562
563define <vscale x 1 x i16> @vand_vx_nxv1i16(<vscale x 1 x i16> %va, i16 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
564; CHECK-LABEL: vand_vx_nxv1i16:
565; CHECK:       # %bb.0:
566; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, mu
567; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
568; CHECK-NEXT:    ret
569  %elt.head = insertelement <vscale x 1 x i16> undef, i16 %b, i32 0
570  %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> undef, <vscale x 1 x i32> zeroinitializer
571  %v = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 %evl)
572  ret <vscale x 1 x i16> %v
573}
574
575define <vscale x 1 x i16> @vand_vx_nxv1i16_unmasked(<vscale x 1 x i16> %va, i16 %b, i32 zeroext %evl) {
576; CHECK-LABEL: vand_vx_nxv1i16_unmasked:
577; CHECK:       # %bb.0:
578; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, mu
579; CHECK-NEXT:    vand.vx v8, v8, a0
580; CHECK-NEXT:    ret
581  %elt.head = insertelement <vscale x 1 x i16> undef, i16 %b, i32 0
582  %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> undef, <vscale x 1 x i32> zeroinitializer
583  %head = insertelement <vscale x 1 x i1> undef, i1 true, i32 0
584  %m = shufflevector <vscale x 1 x i1> %head, <vscale x 1 x i1> undef, <vscale x 1 x i32> zeroinitializer
585  %v = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 %evl)
586  ret <vscale x 1 x i16> %v
587}
588
589define <vscale x 1 x i16> @vand_vi_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
590; CHECK-LABEL: vand_vi_nxv1i16:
591; CHECK:       # %bb.0:
592; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, mu
593; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
594; CHECK-NEXT:    ret
595  %elt.head = insertelement <vscale x 1 x i16> undef, i16 4, i32 0
596  %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> undef, <vscale x 1 x i32> zeroinitializer
597  %v = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 %evl)
598  ret <vscale x 1 x i16> %v
599}
600
601define <vscale x 1 x i16> @vand_vi_nxv1i16_unmasked(<vscale x 1 x i16> %va, i32 zeroext %evl) {
602; CHECK-LABEL: vand_vi_nxv1i16_unmasked:
603; CHECK:       # %bb.0:
604; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, mu
605; CHECK-NEXT:    vand.vi v8, v8, 4
606; CHECK-NEXT:    ret
607  %elt.head = insertelement <vscale x 1 x i16> undef, i16 4, i32 0
608  %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> undef, <vscale x 1 x i32> zeroinitializer
609  %head = insertelement <vscale x 1 x i1> undef, i1 true, i32 0
610  %m = shufflevector <vscale x 1 x i1> %head, <vscale x 1 x i1> undef, <vscale x 1 x i32> zeroinitializer
611  %v = call <vscale x 1 x i16> @llvm.vp.and.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 %evl)
612  ret <vscale x 1 x i16> %v
613}
614
615declare <vscale x 2 x i16> @llvm.vp.and.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x i16>, <vscale x 2 x i1>, i32)
616
617define <vscale x 2 x i16> @vand_vv_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {
618; CHECK-LABEL: vand_vv_nxv2i16:
619; CHECK:       # %bb.0:
620; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, mu
621; CHECK-NEXT:    vand.vv v8, v8, v9, v0.t
622; CHECK-NEXT:    ret
623  %v = call <vscale x 2 x i16> @llvm.vp.and.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 %evl)
624  ret <vscale x 2 x i16> %v
625}
626
627define <vscale x 2 x i16> @vand_vv_nxv2i16_unmasked(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, i32 zeroext %evl) {
628; CHECK-LABEL: vand_vv_nxv2i16_unmasked:
629; CHECK:       # %bb.0:
630; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, mu
631; CHECK-NEXT:    vand.vv v8, v8, v9
632; CHECK-NEXT:    ret
633  %head = insertelement <vscale x 2 x i1> undef, i1 true, i32 0
634  %m = shufflevector <vscale x 2 x i1> %head, <vscale x 2 x i1> undef, <vscale x 2 x i32> zeroinitializer
635  %v = call <vscale x 2 x i16> @llvm.vp.and.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b, <vscale x 2 x i1> %m, i32 %evl)
636  ret <vscale x 2 x i16> %v
637}
638
639define <vscale x 2 x i16> @vand_vx_nxv2i16(<vscale x 2 x i16> %va, i16 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {
640; CHECK-LABEL: vand_vx_nxv2i16:
641; CHECK:       # %bb.0:
642; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, mu
643; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
644; CHECK-NEXT:    ret
645  %elt.head = insertelement <vscale x 2 x i16> undef, i16 %b, i32 0
646  %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> undef, <vscale x 2 x i32> zeroinitializer
647  %v = call <vscale x 2 x i16> @llvm.vp.and.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 %evl)
648  ret <vscale x 2 x i16> %v
649}
650
651define <vscale x 2 x i16> @vand_vx_nxv2i16_unmasked(<vscale x 2 x i16> %va, i16 %b, i32 zeroext %evl) {
652; CHECK-LABEL: vand_vx_nxv2i16_unmasked:
653; CHECK:       # %bb.0:
654; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, mu
655; CHECK-NEXT:    vand.vx v8, v8, a0
656; CHECK-NEXT:    ret
657  %elt.head = insertelement <vscale x 2 x i16> undef, i16 %b, i32 0
658  %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> undef, <vscale x 2 x i32> zeroinitializer
659  %head = insertelement <vscale x 2 x i1> undef, i1 true, i32 0
660  %m = shufflevector <vscale x 2 x i1> %head, <vscale x 2 x i1> undef, <vscale x 2 x i32> zeroinitializer
661  %v = call <vscale x 2 x i16> @llvm.vp.and.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 %evl)
662  ret <vscale x 2 x i16> %v
663}
664
665define <vscale x 2 x i16> @vand_vi_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
666; CHECK-LABEL: vand_vi_nxv2i16:
667; CHECK:       # %bb.0:
668; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, mu
669; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
670; CHECK-NEXT:    ret
671  %elt.head = insertelement <vscale x 2 x i16> undef, i16 4, i32 0
672  %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> undef, <vscale x 2 x i32> zeroinitializer
673  %v = call <vscale x 2 x i16> @llvm.vp.and.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 %evl)
674  ret <vscale x 2 x i16> %v
675}
676
677define <vscale x 2 x i16> @vand_vi_nxv2i16_unmasked(<vscale x 2 x i16> %va, i32 zeroext %evl) {
678; CHECK-LABEL: vand_vi_nxv2i16_unmasked:
679; CHECK:       # %bb.0:
680; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, mu
681; CHECK-NEXT:    vand.vi v8, v8, 4
682; CHECK-NEXT:    ret
683  %elt.head = insertelement <vscale x 2 x i16> undef, i16 4, i32 0
684  %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> undef, <vscale x 2 x i32> zeroinitializer
685  %head = insertelement <vscale x 2 x i1> undef, i1 true, i32 0
686  %m = shufflevector <vscale x 2 x i1> %head, <vscale x 2 x i1> undef, <vscale x 2 x i32> zeroinitializer
687  %v = call <vscale x 2 x i16> @llvm.vp.and.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 %evl)
688  ret <vscale x 2 x i16> %v
689}
690
691declare <vscale x 4 x i16> @llvm.vp.and.nxv4i16(<vscale x 4 x i16>, <vscale x 4 x i16>, <vscale x 4 x i1>, i32)
692
693define <vscale x 4 x i16> @vand_vv_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {
694; CHECK-LABEL: vand_vv_nxv4i16:
695; CHECK:       # %bb.0:
696; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, mu
697; CHECK-NEXT:    vand.vv v8, v8, v9, v0.t
698; CHECK-NEXT:    ret
699  %v = call <vscale x 4 x i16> @llvm.vp.and.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 %evl)
700  ret <vscale x 4 x i16> %v
701}
702
703define <vscale x 4 x i16> @vand_vv_nxv4i16_unmasked(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, i32 zeroext %evl) {
704; CHECK-LABEL: vand_vv_nxv4i16_unmasked:
705; CHECK:       # %bb.0:
706; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, mu
707; CHECK-NEXT:    vand.vv v8, v8, v9
708; CHECK-NEXT:    ret
709  %head = insertelement <vscale x 4 x i1> undef, i1 true, i32 0
710  %m = shufflevector <vscale x 4 x i1> %head, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
711  %v = call <vscale x 4 x i16> @llvm.vp.and.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b, <vscale x 4 x i1> %m, i32 %evl)
712  ret <vscale x 4 x i16> %v
713}
714
715define <vscale x 4 x i16> @vand_vx_nxv4i16(<vscale x 4 x i16> %va, i16 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {
716; CHECK-LABEL: vand_vx_nxv4i16:
717; CHECK:       # %bb.0:
718; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, mu
719; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
720; CHECK-NEXT:    ret
721  %elt.head = insertelement <vscale x 4 x i16> undef, i16 %b, i32 0
722  %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> undef, <vscale x 4 x i32> zeroinitializer
723  %v = call <vscale x 4 x i16> @llvm.vp.and.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 %evl)
724  ret <vscale x 4 x i16> %v
725}
726
727define <vscale x 4 x i16> @vand_vx_nxv4i16_unmasked(<vscale x 4 x i16> %va, i16 %b, i32 zeroext %evl) {
728; CHECK-LABEL: vand_vx_nxv4i16_unmasked:
729; CHECK:       # %bb.0:
730; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, mu
731; CHECK-NEXT:    vand.vx v8, v8, a0
732; CHECK-NEXT:    ret
733  %elt.head = insertelement <vscale x 4 x i16> undef, i16 %b, i32 0
734  %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> undef, <vscale x 4 x i32> zeroinitializer
735  %head = insertelement <vscale x 4 x i1> undef, i1 true, i32 0
736  %m = shufflevector <vscale x 4 x i1> %head, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
737  %v = call <vscale x 4 x i16> @llvm.vp.and.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 %evl)
738  ret <vscale x 4 x i16> %v
739}
740
741define <vscale x 4 x i16> @vand_vi_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {
742; CHECK-LABEL: vand_vi_nxv4i16:
743; CHECK:       # %bb.0:
744; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, mu
745; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
746; CHECK-NEXT:    ret
747  %elt.head = insertelement <vscale x 4 x i16> undef, i16 4, i32 0
748  %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> undef, <vscale x 4 x i32> zeroinitializer
749  %v = call <vscale x 4 x i16> @llvm.vp.and.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 %evl)
750  ret <vscale x 4 x i16> %v
751}
752
753define <vscale x 4 x i16> @vand_vi_nxv4i16_unmasked(<vscale x 4 x i16> %va, i32 zeroext %evl) {
754; CHECK-LABEL: vand_vi_nxv4i16_unmasked:
755; CHECK:       # %bb.0:
756; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, mu
757; CHECK-NEXT:    vand.vi v8, v8, 4
758; CHECK-NEXT:    ret
759  %elt.head = insertelement <vscale x 4 x i16> undef, i16 4, i32 0
760  %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> undef, <vscale x 4 x i32> zeroinitializer
761  %head = insertelement <vscale x 4 x i1> undef, i1 true, i32 0
762  %m = shufflevector <vscale x 4 x i1> %head, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
763  %v = call <vscale x 4 x i16> @llvm.vp.and.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 %evl)
764  ret <vscale x 4 x i16> %v
765}
766
767declare <vscale x 8 x i16> @llvm.vp.and.nxv8i16(<vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i1>, i32)
768
769define <vscale x 8 x i16> @vand_vv_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
770; CHECK-LABEL: vand_vv_nxv8i16:
771; CHECK:       # %bb.0:
772; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, mu
773; CHECK-NEXT:    vand.vv v8, v8, v10, v0.t
774; CHECK-NEXT:    ret
775  %v = call <vscale x 8 x i16> @llvm.vp.and.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 %evl)
776  ret <vscale x 8 x i16> %v
777}
778
779define <vscale x 8 x i16> @vand_vv_nxv8i16_unmasked(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, i32 zeroext %evl) {
780; CHECK-LABEL: vand_vv_nxv8i16_unmasked:
781; CHECK:       # %bb.0:
782; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, mu
783; CHECK-NEXT:    vand.vv v8, v8, v10
784; CHECK-NEXT:    ret
785  %head = insertelement <vscale x 8 x i1> undef, i1 true, i32 0
786  %m = shufflevector <vscale x 8 x i1> %head, <vscale x 8 x i1> undef, <vscale x 8 x i32> zeroinitializer
787  %v = call <vscale x 8 x i16> @llvm.vp.and.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b, <vscale x 8 x i1> %m, i32 %evl)
788  ret <vscale x 8 x i16> %v
789}
790
791define <vscale x 8 x i16> @vand_vx_nxv8i16(<vscale x 8 x i16> %va, i16 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
792; CHECK-LABEL: vand_vx_nxv8i16:
793; CHECK:       # %bb.0:
794; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
795; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
796; CHECK-NEXT:    ret
797  %elt.head = insertelement <vscale x 8 x i16> undef, i16 %b, i32 0
798  %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
799  %v = call <vscale x 8 x i16> @llvm.vp.and.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 %evl)
800  ret <vscale x 8 x i16> %v
801}
802
803define <vscale x 8 x i16> @vand_vx_nxv8i16_unmasked(<vscale x 8 x i16> %va, i16 %b, i32 zeroext %evl) {
804; CHECK-LABEL: vand_vx_nxv8i16_unmasked:
805; CHECK:       # %bb.0:
806; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
807; CHECK-NEXT:    vand.vx v8, v8, a0
808; CHECK-NEXT:    ret
809  %elt.head = insertelement <vscale x 8 x i16> undef, i16 %b, i32 0
810  %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
811  %head = insertelement <vscale x 8 x i1> undef, i1 true, i32 0
812  %m = shufflevector <vscale x 8 x i1> %head, <vscale x 8 x i1> undef, <vscale x 8 x i32> zeroinitializer
813  %v = call <vscale x 8 x i16> @llvm.vp.and.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 %evl)
814  ret <vscale x 8 x i16> %v
815}
816
817define <vscale x 8 x i16> @vand_vi_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
818; CHECK-LABEL: vand_vi_nxv8i16:
819; CHECK:       # %bb.0:
820; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, mu
821; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
822; CHECK-NEXT:    ret
823  %elt.head = insertelement <vscale x 8 x i16> undef, i16 4, i32 0
824  %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
825  %v = call <vscale x 8 x i16> @llvm.vp.and.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 %evl)
826  ret <vscale x 8 x i16> %v
827}
828
829define <vscale x 8 x i16> @vand_vi_nxv8i16_unmasked(<vscale x 8 x i16> %va, i32 zeroext %evl) {
830; CHECK-LABEL: vand_vi_nxv8i16_unmasked:
831; CHECK:       # %bb.0:
832; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, mu
833; CHECK-NEXT:    vand.vi v8, v8, 4
834; CHECK-NEXT:    ret
835  %elt.head = insertelement <vscale x 8 x i16> undef, i16 4, i32 0
836  %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
837  %head = insertelement <vscale x 8 x i1> undef, i1 true, i32 0
838  %m = shufflevector <vscale x 8 x i1> %head, <vscale x 8 x i1> undef, <vscale x 8 x i32> zeroinitializer
839  %v = call <vscale x 8 x i16> @llvm.vp.and.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 %evl)
840  ret <vscale x 8 x i16> %v
841}
842
843declare <vscale x 16 x i16> @llvm.vp.and.nxv16i16(<vscale x 16 x i16>, <vscale x 16 x i16>, <vscale x 16 x i1>, i32)
844
845define <vscale x 16 x i16> @vand_vv_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {
846; CHECK-LABEL: vand_vv_nxv16i16:
847; CHECK:       # %bb.0:
848; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, mu
849; CHECK-NEXT:    vand.vv v8, v8, v12, v0.t
850; CHECK-NEXT:    ret
851  %v = call <vscale x 16 x i16> @llvm.vp.and.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 %evl)
852  ret <vscale x 16 x i16> %v
853}
854
855define <vscale x 16 x i16> @vand_vv_nxv16i16_unmasked(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, i32 zeroext %evl) {
856; CHECK-LABEL: vand_vv_nxv16i16_unmasked:
857; CHECK:       # %bb.0:
858; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, mu
859; CHECK-NEXT:    vand.vv v8, v8, v12
860; CHECK-NEXT:    ret
861  %head = insertelement <vscale x 16 x i1> undef, i1 true, i32 0
862  %m = shufflevector <vscale x 16 x i1> %head, <vscale x 16 x i1> undef, <vscale x 16 x i32> zeroinitializer
863  %v = call <vscale x 16 x i16> @llvm.vp.and.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b, <vscale x 16 x i1> %m, i32 %evl)
864  ret <vscale x 16 x i16> %v
865}
866
867define <vscale x 16 x i16> @vand_vx_nxv16i16(<vscale x 16 x i16> %va, i16 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {
868; CHECK-LABEL: vand_vx_nxv16i16:
869; CHECK:       # %bb.0:
870; CHECK-NEXT:    vsetvli zero, a1, e16, m4, ta, mu
871; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
872; CHECK-NEXT:    ret
873  %elt.head = insertelement <vscale x 16 x i16> undef, i16 %b, i32 0
874  %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> undef, <vscale x 16 x i32> zeroinitializer
875  %v = call <vscale x 16 x i16> @llvm.vp.and.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 %evl)
876  ret <vscale x 16 x i16> %v
877}
878
879define <vscale x 16 x i16> @vand_vx_nxv16i16_unmasked(<vscale x 16 x i16> %va, i16 %b, i32 zeroext %evl) {
880; CHECK-LABEL: vand_vx_nxv16i16_unmasked:
881; CHECK:       # %bb.0:
882; CHECK-NEXT:    vsetvli zero, a1, e16, m4, ta, mu
883; CHECK-NEXT:    vand.vx v8, v8, a0
884; CHECK-NEXT:    ret
885  %elt.head = insertelement <vscale x 16 x i16> undef, i16 %b, i32 0
886  %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> undef, <vscale x 16 x i32> zeroinitializer
887  %head = insertelement <vscale x 16 x i1> undef, i1 true, i32 0
888  %m = shufflevector <vscale x 16 x i1> %head, <vscale x 16 x i1> undef, <vscale x 16 x i32> zeroinitializer
889  %v = call <vscale x 16 x i16> @llvm.vp.and.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 %evl)
890  ret <vscale x 16 x i16> %v
891}
892
893define <vscale x 16 x i16> @vand_vi_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {
894; CHECK-LABEL: vand_vi_nxv16i16:
895; CHECK:       # %bb.0:
896; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, mu
897; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
898; CHECK-NEXT:    ret
899  %elt.head = insertelement <vscale x 16 x i16> undef, i16 4, i32 0
900  %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> undef, <vscale x 16 x i32> zeroinitializer
901  %v = call <vscale x 16 x i16> @llvm.vp.and.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 %evl)
902  ret <vscale x 16 x i16> %v
903}
904
905define <vscale x 16 x i16> @vand_vi_nxv16i16_unmasked(<vscale x 16 x i16> %va, i32 zeroext %evl) {
906; CHECK-LABEL: vand_vi_nxv16i16_unmasked:
907; CHECK:       # %bb.0:
908; CHECK-NEXT:    vsetvli zero, a0, e16, m4, ta, mu
909; CHECK-NEXT:    vand.vi v8, v8, 4
910; CHECK-NEXT:    ret
911  %elt.head = insertelement <vscale x 16 x i16> undef, i16 4, i32 0
912  %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> undef, <vscale x 16 x i32> zeroinitializer
913  %head = insertelement <vscale x 16 x i1> undef, i1 true, i32 0
914  %m = shufflevector <vscale x 16 x i1> %head, <vscale x 16 x i1> undef, <vscale x 16 x i32> zeroinitializer
915  %v = call <vscale x 16 x i16> @llvm.vp.and.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 %evl)
916  ret <vscale x 16 x i16> %v
917}
918
919declare <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16>, <vscale x 32 x i16>, <vscale x 32 x i1>, i32)
920
921define <vscale x 32 x i16> @vand_vv_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {
922; CHECK-LABEL: vand_vv_nxv32i16:
923; CHECK:       # %bb.0:
924; CHECK-NEXT:    vsetvli zero, a0, e16, m8, ta, mu
925; CHECK-NEXT:    vand.vv v8, v8, v16, v0.t
926; CHECK-NEXT:    ret
927  %v = call <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 %evl)
928  ret <vscale x 32 x i16> %v
929}
930
931define <vscale x 32 x i16> @vand_vv_nxv32i16_unmasked(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, i32 zeroext %evl) {
932; CHECK-LABEL: vand_vv_nxv32i16_unmasked:
933; CHECK:       # %bb.0:
934; CHECK-NEXT:    vsetvli zero, a0, e16, m8, ta, mu
935; CHECK-NEXT:    vand.vv v8, v8, v16
936; CHECK-NEXT:    ret
937  %head = insertelement <vscale x 32 x i1> undef, i1 true, i32 0
938  %m = shufflevector <vscale x 32 x i1> %head, <vscale x 32 x i1> undef, <vscale x 32 x i32> zeroinitializer
939  %v = call <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b, <vscale x 32 x i1> %m, i32 %evl)
940  ret <vscale x 32 x i16> %v
941}
942
943define <vscale x 32 x i16> @vand_vx_nxv32i16(<vscale x 32 x i16> %va, i16 %b, <vscale x 32 x i1> %m, i32 zeroext %evl) {
944; CHECK-LABEL: vand_vx_nxv32i16:
945; CHECK:       # %bb.0:
946; CHECK-NEXT:    vsetvli zero, a1, e16, m8, ta, mu
947; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
948; CHECK-NEXT:    ret
949  %elt.head = insertelement <vscale x 32 x i16> undef, i16 %b, i32 0
950  %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> undef, <vscale x 32 x i32> zeroinitializer
951  %v = call <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 %evl)
952  ret <vscale x 32 x i16> %v
953}
954
955define <vscale x 32 x i16> @vand_vx_nxv32i16_unmasked(<vscale x 32 x i16> %va, i16 %b, i32 zeroext %evl) {
956; CHECK-LABEL: vand_vx_nxv32i16_unmasked:
957; CHECK:       # %bb.0:
958; CHECK-NEXT:    vsetvli zero, a1, e16, m8, ta, mu
959; CHECK-NEXT:    vand.vx v8, v8, a0
960; CHECK-NEXT:    ret
961  %elt.head = insertelement <vscale x 32 x i16> undef, i16 %b, i32 0
962  %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> undef, <vscale x 32 x i32> zeroinitializer
963  %head = insertelement <vscale x 32 x i1> undef, i1 true, i32 0
964  %m = shufflevector <vscale x 32 x i1> %head, <vscale x 32 x i1> undef, <vscale x 32 x i32> zeroinitializer
965  %v = call <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 %evl)
966  ret <vscale x 32 x i16> %v
967}
968
969define <vscale x 32 x i16> @vand_vi_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {
970; CHECK-LABEL: vand_vi_nxv32i16:
971; CHECK:       # %bb.0:
972; CHECK-NEXT:    vsetvli zero, a0, e16, m8, ta, mu
973; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
974; CHECK-NEXT:    ret
975  %elt.head = insertelement <vscale x 32 x i16> undef, i16 4, i32 0
976  %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> undef, <vscale x 32 x i32> zeroinitializer
977  %v = call <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 %evl)
978  ret <vscale x 32 x i16> %v
979}
980
981define <vscale x 32 x i16> @vand_vi_nxv32i16_unmasked(<vscale x 32 x i16> %va, i32 zeroext %evl) {
982; CHECK-LABEL: vand_vi_nxv32i16_unmasked:
983; CHECK:       # %bb.0:
984; CHECK-NEXT:    vsetvli zero, a0, e16, m8, ta, mu
985; CHECK-NEXT:    vand.vi v8, v8, 4
986; CHECK-NEXT:    ret
987  %elt.head = insertelement <vscale x 32 x i16> undef, i16 4, i32 0
988  %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> undef, <vscale x 32 x i32> zeroinitializer
989  %head = insertelement <vscale x 32 x i1> undef, i1 true, i32 0
990  %m = shufflevector <vscale x 32 x i1> %head, <vscale x 32 x i1> undef, <vscale x 32 x i32> zeroinitializer
991  %v = call <vscale x 32 x i16> @llvm.vp.and.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 %evl)
992  ret <vscale x 32 x i16> %v
993}
994
995declare <vscale x 1 x i32> @llvm.vp.and.nxv1i32(<vscale x 1 x i32>, <vscale x 1 x i32>, <vscale x 1 x i1>, i32)
996
997define <vscale x 1 x i32> @vand_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
998; CHECK-LABEL: vand_vv_nxv1i32:
999; CHECK:       # %bb.0:
1000; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, mu
1001; CHECK-NEXT:    vand.vv v8, v8, v9, v0.t
1002; CHECK-NEXT:    ret
1003  %v = call <vscale x 1 x i32> @llvm.vp.and.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 %evl)
1004  ret <vscale x 1 x i32> %v
1005}
1006
1007define <vscale x 1 x i32> @vand_vv_nxv1i32_unmasked(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, i32 zeroext %evl) {
1008; CHECK-LABEL: vand_vv_nxv1i32_unmasked:
1009; CHECK:       # %bb.0:
1010; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, mu
1011; CHECK-NEXT:    vand.vv v8, v8, v9
1012; CHECK-NEXT:    ret
1013  %head = insertelement <vscale x 1 x i1> undef, i1 true, i32 0
1014  %m = shufflevector <vscale x 1 x i1> %head, <vscale x 1 x i1> undef, <vscale x 1 x i32> zeroinitializer
1015  %v = call <vscale x 1 x i32> @llvm.vp.and.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b, <vscale x 1 x i1> %m, i32 %evl)
1016  ret <vscale x 1 x i32> %v
1017}
1018
1019define <vscale x 1 x i32> @vand_vx_nxv1i32(<vscale x 1 x i32> %va, i32 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1020; CHECK-LABEL: vand_vx_nxv1i32:
1021; CHECK:       # %bb.0:
1022; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, mu
1023; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
1024; CHECK-NEXT:    ret
1025  %elt.head = insertelement <vscale x 1 x i32> undef, i32 %b, i32 0
1026  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> undef, <vscale x 1 x i32> zeroinitializer
1027  %v = call <vscale x 1 x i32> @llvm.vp.and.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 %evl)
1028  ret <vscale x 1 x i32> %v
1029}
1030
1031define <vscale x 1 x i32> @vand_vx_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 %b, i32 zeroext %evl) {
1032; CHECK-LABEL: vand_vx_nxv1i32_unmasked:
1033; CHECK:       # %bb.0:
1034; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, mu
1035; CHECK-NEXT:    vand.vx v8, v8, a0
1036; CHECK-NEXT:    ret
1037  %elt.head = insertelement <vscale x 1 x i32> undef, i32 %b, i32 0
1038  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> undef, <vscale x 1 x i32> zeroinitializer
1039  %head = insertelement <vscale x 1 x i1> undef, i1 true, i32 0
1040  %m = shufflevector <vscale x 1 x i1> %head, <vscale x 1 x i1> undef, <vscale x 1 x i32> zeroinitializer
1041  %v = call <vscale x 1 x i32> @llvm.vp.and.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 %evl)
1042  ret <vscale x 1 x i32> %v
1043}
1044
1045define <vscale x 1 x i32> @vand_vi_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1046; CHECK-LABEL: vand_vi_nxv1i32:
1047; CHECK:       # %bb.0:
1048; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, mu
1049; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
1050; CHECK-NEXT:    ret
1051  %elt.head = insertelement <vscale x 1 x i32> undef, i32 4, i32 0
1052  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> undef, <vscale x 1 x i32> zeroinitializer
1053  %v = call <vscale x 1 x i32> @llvm.vp.and.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 %evl)
1054  ret <vscale x 1 x i32> %v
1055}
1056
1057define <vscale x 1 x i32> @vand_vi_nxv1i32_unmasked(<vscale x 1 x i32> %va, i32 zeroext %evl) {
1058; CHECK-LABEL: vand_vi_nxv1i32_unmasked:
1059; CHECK:       # %bb.0:
1060; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, mu
1061; CHECK-NEXT:    vand.vi v8, v8, 4
1062; CHECK-NEXT:    ret
1063  %elt.head = insertelement <vscale x 1 x i32> undef, i32 4, i32 0
1064  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> undef, <vscale x 1 x i32> zeroinitializer
1065  %head = insertelement <vscale x 1 x i1> undef, i1 true, i32 0
1066  %m = shufflevector <vscale x 1 x i1> %head, <vscale x 1 x i1> undef, <vscale x 1 x i32> zeroinitializer
1067  %v = call <vscale x 1 x i32> @llvm.vp.and.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 %evl)
1068  ret <vscale x 1 x i32> %v
1069}
1070
1071declare <vscale x 2 x i32> @llvm.vp.and.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i1>, i32)
1072
1073define <vscale x 2 x i32> @vand_vv_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1074; CHECK-LABEL: vand_vv_nxv2i32:
1075; CHECK:       # %bb.0:
1076; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, mu
1077; CHECK-NEXT:    vand.vv v8, v8, v9, v0.t
1078; CHECK-NEXT:    ret
1079  %v = call <vscale x 2 x i32> @llvm.vp.and.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 %evl)
1080  ret <vscale x 2 x i32> %v
1081}
1082
1083define <vscale x 2 x i32> @vand_vv_nxv2i32_unmasked(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, i32 zeroext %evl) {
1084; CHECK-LABEL: vand_vv_nxv2i32_unmasked:
1085; CHECK:       # %bb.0:
1086; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, mu
1087; CHECK-NEXT:    vand.vv v8, v8, v9
1088; CHECK-NEXT:    ret
1089  %head = insertelement <vscale x 2 x i1> undef, i1 true, i32 0
1090  %m = shufflevector <vscale x 2 x i1> %head, <vscale x 2 x i1> undef, <vscale x 2 x i32> zeroinitializer
1091  %v = call <vscale x 2 x i32> @llvm.vp.and.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b, <vscale x 2 x i1> %m, i32 %evl)
1092  ret <vscale x 2 x i32> %v
1093}
1094
1095define <vscale x 2 x i32> @vand_vx_nxv2i32(<vscale x 2 x i32> %va, i32 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1096; CHECK-LABEL: vand_vx_nxv2i32:
1097; CHECK:       # %bb.0:
1098; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, mu
1099; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
1100; CHECK-NEXT:    ret
1101  %elt.head = insertelement <vscale x 2 x i32> undef, i32 %b, i32 0
1102  %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> undef, <vscale x 2 x i32> zeroinitializer
1103  %v = call <vscale x 2 x i32> @llvm.vp.and.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 %evl)
1104  ret <vscale x 2 x i32> %v
1105}
1106
1107define <vscale x 2 x i32> @vand_vx_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 %b, i32 zeroext %evl) {
1108; CHECK-LABEL: vand_vx_nxv2i32_unmasked:
1109; CHECK:       # %bb.0:
1110; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, mu
1111; CHECK-NEXT:    vand.vx v8, v8, a0
1112; CHECK-NEXT:    ret
1113  %elt.head = insertelement <vscale x 2 x i32> undef, i32 %b, i32 0
1114  %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> undef, <vscale x 2 x i32> zeroinitializer
1115  %head = insertelement <vscale x 2 x i1> undef, i1 true, i32 0
1116  %m = shufflevector <vscale x 2 x i1> %head, <vscale x 2 x i1> undef, <vscale x 2 x i32> zeroinitializer
1117  %v = call <vscale x 2 x i32> @llvm.vp.and.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 %evl)
1118  ret <vscale x 2 x i32> %v
1119}
1120
1121define <vscale x 2 x i32> @vand_vi_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1122; CHECK-LABEL: vand_vi_nxv2i32:
1123; CHECK:       # %bb.0:
1124; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, mu
1125; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
1126; CHECK-NEXT:    ret
1127  %elt.head = insertelement <vscale x 2 x i32> undef, i32 4, i32 0
1128  %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> undef, <vscale x 2 x i32> zeroinitializer
1129  %v = call <vscale x 2 x i32> @llvm.vp.and.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 %evl)
1130  ret <vscale x 2 x i32> %v
1131}
1132
1133define <vscale x 2 x i32> @vand_vi_nxv2i32_unmasked(<vscale x 2 x i32> %va, i32 zeroext %evl) {
1134; CHECK-LABEL: vand_vi_nxv2i32_unmasked:
1135; CHECK:       # %bb.0:
1136; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, mu
1137; CHECK-NEXT:    vand.vi v8, v8, 4
1138; CHECK-NEXT:    ret
1139  %elt.head = insertelement <vscale x 2 x i32> undef, i32 4, i32 0
1140  %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> undef, <vscale x 2 x i32> zeroinitializer
1141  %head = insertelement <vscale x 2 x i1> undef, i1 true, i32 0
1142  %m = shufflevector <vscale x 2 x i1> %head, <vscale x 2 x i1> undef, <vscale x 2 x i32> zeroinitializer
1143  %v = call <vscale x 2 x i32> @llvm.vp.and.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 %evl)
1144  ret <vscale x 2 x i32> %v
1145}
1146
1147declare <vscale x 4 x i32> @llvm.vp.and.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i1>, i32)
1148
1149define <vscale x 4 x i32> @vand_vv_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1150; CHECK-LABEL: vand_vv_nxv4i32:
1151; CHECK:       # %bb.0:
1152; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, mu
1153; CHECK-NEXT:    vand.vv v8, v8, v10, v0.t
1154; CHECK-NEXT:    ret
1155  %v = call <vscale x 4 x i32> @llvm.vp.and.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 %evl)
1156  ret <vscale x 4 x i32> %v
1157}
1158
1159define <vscale x 4 x i32> @vand_vv_nxv4i32_unmasked(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, i32 zeroext %evl) {
1160; CHECK-LABEL: vand_vv_nxv4i32_unmasked:
1161; CHECK:       # %bb.0:
1162; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, mu
1163; CHECK-NEXT:    vand.vv v8, v8, v10
1164; CHECK-NEXT:    ret
1165  %head = insertelement <vscale x 4 x i1> undef, i1 true, i32 0
1166  %m = shufflevector <vscale x 4 x i1> %head, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
1167  %v = call <vscale x 4 x i32> @llvm.vp.and.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, i32 %evl)
1168  ret <vscale x 4 x i32> %v
1169}
1170
1171define <vscale x 4 x i32> @vand_vx_nxv4i32(<vscale x 4 x i32> %va, i32 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1172; CHECK-LABEL: vand_vx_nxv4i32:
1173; CHECK:       # %bb.0:
1174; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, mu
1175; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
1176; CHECK-NEXT:    ret
1177  %elt.head = insertelement <vscale x 4 x i32> undef, i32 %b, i32 0
1178  %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
1179  %v = call <vscale x 4 x i32> @llvm.vp.and.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 %evl)
1180  ret <vscale x 4 x i32> %v
1181}
1182
1183define <vscale x 4 x i32> @vand_vx_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 %b, i32 zeroext %evl) {
1184; CHECK-LABEL: vand_vx_nxv4i32_unmasked:
1185; CHECK:       # %bb.0:
1186; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, mu
1187; CHECK-NEXT:    vand.vx v8, v8, a0
1188; CHECK-NEXT:    ret
1189  %elt.head = insertelement <vscale x 4 x i32> undef, i32 %b, i32 0
1190  %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
1191  %head = insertelement <vscale x 4 x i1> undef, i1 true, i32 0
1192  %m = shufflevector <vscale x 4 x i1> %head, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
1193  %v = call <vscale x 4 x i32> @llvm.vp.and.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 %evl)
1194  ret <vscale x 4 x i32> %v
1195}
1196
1197define <vscale x 4 x i32> @vand_vi_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1198; CHECK-LABEL: vand_vi_nxv4i32:
1199; CHECK:       # %bb.0:
1200; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, mu
1201; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
1202; CHECK-NEXT:    ret
1203  %elt.head = insertelement <vscale x 4 x i32> undef, i32 4, i32 0
1204  %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
1205  %v = call <vscale x 4 x i32> @llvm.vp.and.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 %evl)
1206  ret <vscale x 4 x i32> %v
1207}
1208
1209define <vscale x 4 x i32> @vand_vi_nxv4i32_unmasked(<vscale x 4 x i32> %va, i32 zeroext %evl) {
1210; CHECK-LABEL: vand_vi_nxv4i32_unmasked:
1211; CHECK:       # %bb.0:
1212; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, mu
1213; CHECK-NEXT:    vand.vi v8, v8, 4
1214; CHECK-NEXT:    ret
1215  %elt.head = insertelement <vscale x 4 x i32> undef, i32 4, i32 0
1216  %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
1217  %head = insertelement <vscale x 4 x i1> undef, i1 true, i32 0
1218  %m = shufflevector <vscale x 4 x i1> %head, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
1219  %v = call <vscale x 4 x i32> @llvm.vp.and.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 %evl)
1220  ret <vscale x 4 x i32> %v
1221}
1222
1223declare <vscale x 8 x i32> @llvm.vp.and.nxv8i32(<vscale x 8 x i32>, <vscale x 8 x i32>, <vscale x 8 x i1>, i32)
1224
1225define <vscale x 8 x i32> @vand_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1226; CHECK-LABEL: vand_vv_nxv8i32:
1227; CHECK:       # %bb.0:
1228; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, mu
1229; CHECK-NEXT:    vand.vv v8, v8, v12, v0.t
1230; CHECK-NEXT:    ret
1231  %v = call <vscale x 8 x i32> @llvm.vp.and.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 %evl)
1232  ret <vscale x 8 x i32> %v
1233}
1234
1235define <vscale x 8 x i32> @vand_vv_nxv8i32_unmasked(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, i32 zeroext %evl) {
1236; CHECK-LABEL: vand_vv_nxv8i32_unmasked:
1237; CHECK:       # %bb.0:
1238; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, mu
1239; CHECK-NEXT:    vand.vv v8, v8, v12
1240; CHECK-NEXT:    ret
1241  %head = insertelement <vscale x 8 x i1> undef, i1 true, i32 0
1242  %m = shufflevector <vscale x 8 x i1> %head, <vscale x 8 x i1> undef, <vscale x 8 x i32> zeroinitializer
1243  %v = call <vscale x 8 x i32> @llvm.vp.and.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b, <vscale x 8 x i1> %m, i32 %evl)
1244  ret <vscale x 8 x i32> %v
1245}
1246
1247define <vscale x 8 x i32> @vand_vx_nxv8i32(<vscale x 8 x i32> %va, i32 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1248; CHECK-LABEL: vand_vx_nxv8i32:
1249; CHECK:       # %bb.0:
1250; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
1251; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
1252; CHECK-NEXT:    ret
1253  %elt.head = insertelement <vscale x 8 x i32> undef, i32 %b, i32 0
1254  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> undef, <vscale x 8 x i32> zeroinitializer
1255  %v = call <vscale x 8 x i32> @llvm.vp.and.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 %evl)
1256  ret <vscale x 8 x i32> %v
1257}
1258
1259define <vscale x 8 x i32> @vand_vx_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 %b, i32 zeroext %evl) {
1260; CHECK-LABEL: vand_vx_nxv8i32_unmasked:
1261; CHECK:       # %bb.0:
1262; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
1263; CHECK-NEXT:    vand.vx v8, v8, a0
1264; CHECK-NEXT:    ret
1265  %elt.head = insertelement <vscale x 8 x i32> undef, i32 %b, i32 0
1266  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> undef, <vscale x 8 x i32> zeroinitializer
1267  %head = insertelement <vscale x 8 x i1> undef, i1 true, i32 0
1268  %m = shufflevector <vscale x 8 x i1> %head, <vscale x 8 x i1> undef, <vscale x 8 x i32> zeroinitializer
1269  %v = call <vscale x 8 x i32> @llvm.vp.and.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 %evl)
1270  ret <vscale x 8 x i32> %v
1271}
1272
1273define <vscale x 8 x i32> @vand_vi_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1274; CHECK-LABEL: vand_vi_nxv8i32:
1275; CHECK:       # %bb.0:
1276; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, mu
1277; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
1278; CHECK-NEXT:    ret
1279  %elt.head = insertelement <vscale x 8 x i32> undef, i32 4, i32 0
1280  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> undef, <vscale x 8 x i32> zeroinitializer
1281  %v = call <vscale x 8 x i32> @llvm.vp.and.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 %evl)
1282  ret <vscale x 8 x i32> %v
1283}
1284
1285define <vscale x 8 x i32> @vand_vi_nxv8i32_unmasked(<vscale x 8 x i32> %va, i32 zeroext %evl) {
1286; CHECK-LABEL: vand_vi_nxv8i32_unmasked:
1287; CHECK:       # %bb.0:
1288; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, mu
1289; CHECK-NEXT:    vand.vi v8, v8, 4
1290; CHECK-NEXT:    ret
1291  %elt.head = insertelement <vscale x 8 x i32> undef, i32 4, i32 0
1292  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> undef, <vscale x 8 x i32> zeroinitializer
1293  %head = insertelement <vscale x 8 x i1> undef, i1 true, i32 0
1294  %m = shufflevector <vscale x 8 x i1> %head, <vscale x 8 x i1> undef, <vscale x 8 x i32> zeroinitializer
1295  %v = call <vscale x 8 x i32> @llvm.vp.and.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 %evl)
1296  ret <vscale x 8 x i32> %v
1297}
1298
1299declare <vscale x 16 x i32> @llvm.vp.and.nxv16i32(<vscale x 16 x i32>, <vscale x 16 x i32>, <vscale x 16 x i1>, i32)
1300
1301define <vscale x 16 x i32> @vand_vv_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {
1302; CHECK-LABEL: vand_vv_nxv16i32:
1303; CHECK:       # %bb.0:
1304; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, mu
1305; CHECK-NEXT:    vand.vv v8, v8, v16, v0.t
1306; CHECK-NEXT:    ret
1307  %v = call <vscale x 16 x i32> @llvm.vp.and.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 %evl)
1308  ret <vscale x 16 x i32> %v
1309}
1310
1311define <vscale x 16 x i32> @vand_vv_nxv16i32_unmasked(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, i32 zeroext %evl) {
1312; CHECK-LABEL: vand_vv_nxv16i32_unmasked:
1313; CHECK:       # %bb.0:
1314; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, mu
1315; CHECK-NEXT:    vand.vv v8, v8, v16
1316; CHECK-NEXT:    ret
1317  %head = insertelement <vscale x 16 x i1> undef, i1 true, i32 0
1318  %m = shufflevector <vscale x 16 x i1> %head, <vscale x 16 x i1> undef, <vscale x 16 x i32> zeroinitializer
1319  %v = call <vscale x 16 x i32> @llvm.vp.and.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b, <vscale x 16 x i1> %m, i32 %evl)
1320  ret <vscale x 16 x i32> %v
1321}
1322
1323define <vscale x 16 x i32> @vand_vx_nxv16i32(<vscale x 16 x i32> %va, i32 %b, <vscale x 16 x i1> %m, i32 zeroext %evl) {
1324; CHECK-LABEL: vand_vx_nxv16i32:
1325; CHECK:       # %bb.0:
1326; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, mu
1327; CHECK-NEXT:    vand.vx v8, v8, a0, v0.t
1328; CHECK-NEXT:    ret
1329  %elt.head = insertelement <vscale x 16 x i32> undef, i32 %b, i32 0
1330  %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> undef, <vscale x 16 x i32> zeroinitializer
1331  %v = call <vscale x 16 x i32> @llvm.vp.and.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 %evl)
1332  ret <vscale x 16 x i32> %v
1333}
1334
1335define <vscale x 16 x i32> @vand_vx_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 %b, i32 zeroext %evl) {
1336; CHECK-LABEL: vand_vx_nxv16i32_unmasked:
1337; CHECK:       # %bb.0:
1338; CHECK-NEXT:    vsetvli zero, a1, e32, m8, ta, mu
1339; CHECK-NEXT:    vand.vx v8, v8, a0
1340; CHECK-NEXT:    ret
1341  %elt.head = insertelement <vscale x 16 x i32> undef, i32 %b, i32 0
1342  %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> undef, <vscale x 16 x i32> zeroinitializer
1343  %head = insertelement <vscale x 16 x i1> undef, i1 true, i32 0
1344  %m = shufflevector <vscale x 16 x i1> %head, <vscale x 16 x i1> undef, <vscale x 16 x i32> zeroinitializer
1345  %v = call <vscale x 16 x i32> @llvm.vp.and.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 %evl)
1346  ret <vscale x 16 x i32> %v
1347}
1348
1349define <vscale x 16 x i32> @vand_vi_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i1> %m, i32 zeroext %evl) {
1350; CHECK-LABEL: vand_vi_nxv16i32:
1351; CHECK:       # %bb.0:
1352; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, mu
1353; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
1354; CHECK-NEXT:    ret
1355  %elt.head = insertelement <vscale x 16 x i32> undef, i32 4, i32 0
1356  %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> undef, <vscale x 16 x i32> zeroinitializer
1357  %v = call <vscale x 16 x i32> @llvm.vp.and.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 %evl)
1358  ret <vscale x 16 x i32> %v
1359}
1360
1361define <vscale x 16 x i32> @vand_vi_nxv16i32_unmasked(<vscale x 16 x i32> %va, i32 zeroext %evl) {
1362; CHECK-LABEL: vand_vi_nxv16i32_unmasked:
1363; CHECK:       # %bb.0:
1364; CHECK-NEXT:    vsetvli zero, a0, e32, m8, ta, mu
1365; CHECK-NEXT:    vand.vi v8, v8, 4
1366; CHECK-NEXT:    ret
1367  %elt.head = insertelement <vscale x 16 x i32> undef, i32 4, i32 0
1368  %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> undef, <vscale x 16 x i32> zeroinitializer
1369  %head = insertelement <vscale x 16 x i1> undef, i1 true, i32 0
1370  %m = shufflevector <vscale x 16 x i1> %head, <vscale x 16 x i1> undef, <vscale x 16 x i32> zeroinitializer
1371  %v = call <vscale x 16 x i32> @llvm.vp.and.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 %evl)
1372  ret <vscale x 16 x i32> %v
1373}
1374
1375declare <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i1>, i32)
1376
1377define <vscale x 1 x i64> @vand_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1378; CHECK-LABEL: vand_vv_nxv1i64:
1379; CHECK:       # %bb.0:
1380; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, mu
1381; CHECK-NEXT:    vand.vv v8, v8, v9, v0.t
1382; CHECK-NEXT:    ret
1383  %v = call <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 %evl)
1384  ret <vscale x 1 x i64> %v
1385}
1386
1387define <vscale x 1 x i64> @vand_vv_nxv1i64_unmasked(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, i32 zeroext %evl) {
1388; CHECK-LABEL: vand_vv_nxv1i64_unmasked:
1389; CHECK:       # %bb.0:
1390; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, mu
1391; CHECK-NEXT:    vand.vv v8, v8, v9
1392; CHECK-NEXT:    ret
1393  %head = insertelement <vscale x 1 x i1> undef, i1 true, i32 0
1394  %m = shufflevector <vscale x 1 x i1> %head, <vscale x 1 x i1> undef, <vscale x 1 x i32> zeroinitializer
1395  %v = call <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b, <vscale x 1 x i1> %m, i32 %evl)
1396  ret <vscale x 1 x i64> %v
1397}
1398
1399define <vscale x 1 x i64> @vand_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1400; RV32-LABEL: vand_vx_nxv1i64:
1401; RV32:       # %bb.0:
1402; RV32-NEXT:    addi sp, sp, -16
1403; RV32-NEXT:    .cfi_def_cfa_offset 16
1404; RV32-NEXT:    sw a1, 12(sp)
1405; RV32-NEXT:    sw a0, 8(sp)
1406; RV32-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
1407; RV32-NEXT:    addi a0, sp, 8
1408; RV32-NEXT:    vlse64.v v25, (a0), zero
1409; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, mu
1410; RV32-NEXT:    vand.vv v8, v8, v25, v0.t
1411; RV32-NEXT:    addi sp, sp, 16
1412; RV32-NEXT:    ret
1413;
1414; RV64-LABEL: vand_vx_nxv1i64:
1415; RV64:       # %bb.0:
1416; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, mu
1417; RV64-NEXT:    vand.vx v8, v8, a0, v0.t
1418; RV64-NEXT:    ret
1419  %elt.head = insertelement <vscale x 1 x i64> undef, i64 %b, i32 0
1420  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> undef, <vscale x 1 x i32> zeroinitializer
1421  %v = call <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 %evl)
1422  ret <vscale x 1 x i64> %v
1423}
1424
1425define <vscale x 1 x i64> @vand_vx_nxv1i64_unmasked(<vscale x 1 x i64> %va, i64 %b, i32 zeroext %evl) {
1426; RV32-LABEL: vand_vx_nxv1i64_unmasked:
1427; RV32:       # %bb.0:
1428; RV32-NEXT:    addi sp, sp, -16
1429; RV32-NEXT:    .cfi_def_cfa_offset 16
1430; RV32-NEXT:    sw a1, 12(sp)
1431; RV32-NEXT:    sw a0, 8(sp)
1432; RV32-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
1433; RV32-NEXT:    addi a0, sp, 8
1434; RV32-NEXT:    vlse64.v v25, (a0), zero
1435; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, mu
1436; RV32-NEXT:    vand.vv v8, v8, v25
1437; RV32-NEXT:    addi sp, sp, 16
1438; RV32-NEXT:    ret
1439;
1440; RV64-LABEL: vand_vx_nxv1i64_unmasked:
1441; RV64:       # %bb.0:
1442; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, mu
1443; RV64-NEXT:    vand.vx v8, v8, a0
1444; RV64-NEXT:    ret
1445  %elt.head = insertelement <vscale x 1 x i64> undef, i64 %b, i32 0
1446  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> undef, <vscale x 1 x i32> zeroinitializer
1447  %head = insertelement <vscale x 1 x i1> undef, i1 true, i32 0
1448  %m = shufflevector <vscale x 1 x i1> %head, <vscale x 1 x i1> undef, <vscale x 1 x i32> zeroinitializer
1449  %v = call <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 %evl)
1450  ret <vscale x 1 x i64> %v
1451}
1452
1453define <vscale x 1 x i64> @vand_vi_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1454; CHECK-LABEL: vand_vi_nxv1i64:
1455; CHECK:       # %bb.0:
1456; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, mu
1457; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
1458; CHECK-NEXT:    ret
1459  %elt.head = insertelement <vscale x 1 x i64> undef, i64 4, i32 0
1460  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> undef, <vscale x 1 x i32> zeroinitializer
1461  %v = call <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 %evl)
1462  ret <vscale x 1 x i64> %v
1463}
1464
1465define <vscale x 1 x i64> @vand_vi_nxv1i64_unmasked(<vscale x 1 x i64> %va, i32 zeroext %evl) {
1466; CHECK-LABEL: vand_vi_nxv1i64_unmasked:
1467; CHECK:       # %bb.0:
1468; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, mu
1469; CHECK-NEXT:    vand.vi v8, v8, 4
1470; CHECK-NEXT:    ret
1471  %elt.head = insertelement <vscale x 1 x i64> undef, i64 4, i32 0
1472  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> undef, <vscale x 1 x i32> zeroinitializer
1473  %head = insertelement <vscale x 1 x i1> undef, i1 true, i32 0
1474  %m = shufflevector <vscale x 1 x i1> %head, <vscale x 1 x i1> undef, <vscale x 1 x i32> zeroinitializer
1475  %v = call <vscale x 1 x i64> @llvm.vp.and.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 %evl)
1476  ret <vscale x 1 x i64> %v
1477}
1478
1479declare <vscale x 2 x i64> @llvm.vp.and.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i1>, i32)
1480
1481define <vscale x 2 x i64> @vand_vv_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1482; CHECK-LABEL: vand_vv_nxv2i64:
1483; CHECK:       # %bb.0:
1484; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, mu
1485; CHECK-NEXT:    vand.vv v8, v8, v10, v0.t
1486; CHECK-NEXT:    ret
1487  %v = call <vscale x 2 x i64> @llvm.vp.and.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 %evl)
1488  ret <vscale x 2 x i64> %v
1489}
1490
1491define <vscale x 2 x i64> @vand_vv_nxv2i64_unmasked(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, i32 zeroext %evl) {
1492; CHECK-LABEL: vand_vv_nxv2i64_unmasked:
1493; CHECK:       # %bb.0:
1494; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, mu
1495; CHECK-NEXT:    vand.vv v8, v8, v10
1496; CHECK-NEXT:    ret
1497  %head = insertelement <vscale x 2 x i1> undef, i1 true, i32 0
1498  %m = shufflevector <vscale x 2 x i1> %head, <vscale x 2 x i1> undef, <vscale x 2 x i32> zeroinitializer
1499  %v = call <vscale x 2 x i64> @llvm.vp.and.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b, <vscale x 2 x i1> %m, i32 %evl)
1500  ret <vscale x 2 x i64> %v
1501}
1502
1503define <vscale x 2 x i64> @vand_vx_nxv2i64(<vscale x 2 x i64> %va, i64 %b, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1504; RV32-LABEL: vand_vx_nxv2i64:
1505; RV32:       # %bb.0:
1506; RV32-NEXT:    addi sp, sp, -16
1507; RV32-NEXT:    .cfi_def_cfa_offset 16
1508; RV32-NEXT:    sw a1, 12(sp)
1509; RV32-NEXT:    sw a0, 8(sp)
1510; RV32-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
1511; RV32-NEXT:    addi a0, sp, 8
1512; RV32-NEXT:    vlse64.v v26, (a0), zero
1513; RV32-NEXT:    vsetvli zero, a2, e64, m2, ta, mu
1514; RV32-NEXT:    vand.vv v8, v8, v26, v0.t
1515; RV32-NEXT:    addi sp, sp, 16
1516; RV32-NEXT:    ret
1517;
1518; RV64-LABEL: vand_vx_nxv2i64:
1519; RV64:       # %bb.0:
1520; RV64-NEXT:    vsetvli zero, a1, e64, m2, ta, mu
1521; RV64-NEXT:    vand.vx v8, v8, a0, v0.t
1522; RV64-NEXT:    ret
1523  %elt.head = insertelement <vscale x 2 x i64> undef, i64 %b, i32 0
1524  %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1525  %v = call <vscale x 2 x i64> @llvm.vp.and.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 %evl)
1526  ret <vscale x 2 x i64> %v
1527}
1528
1529define <vscale x 2 x i64> @vand_vx_nxv2i64_unmasked(<vscale x 2 x i64> %va, i64 %b, i32 zeroext %evl) {
1530; RV32-LABEL: vand_vx_nxv2i64_unmasked:
1531; RV32:       # %bb.0:
1532; RV32-NEXT:    addi sp, sp, -16
1533; RV32-NEXT:    .cfi_def_cfa_offset 16
1534; RV32-NEXT:    sw a1, 12(sp)
1535; RV32-NEXT:    sw a0, 8(sp)
1536; RV32-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
1537; RV32-NEXT:    addi a0, sp, 8
1538; RV32-NEXT:    vlse64.v v26, (a0), zero
1539; RV32-NEXT:    vsetvli zero, a2, e64, m2, ta, mu
1540; RV32-NEXT:    vand.vv v8, v8, v26
1541; RV32-NEXT:    addi sp, sp, 16
1542; RV32-NEXT:    ret
1543;
1544; RV64-LABEL: vand_vx_nxv2i64_unmasked:
1545; RV64:       # %bb.0:
1546; RV64-NEXT:    vsetvli zero, a1, e64, m2, ta, mu
1547; RV64-NEXT:    vand.vx v8, v8, a0
1548; RV64-NEXT:    ret
1549  %elt.head = insertelement <vscale x 2 x i64> undef, i64 %b, i32 0
1550  %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1551  %head = insertelement <vscale x 2 x i1> undef, i1 true, i32 0
1552  %m = shufflevector <vscale x 2 x i1> %head, <vscale x 2 x i1> undef, <vscale x 2 x i32> zeroinitializer
1553  %v = call <vscale x 2 x i64> @llvm.vp.and.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 %evl)
1554  ret <vscale x 2 x i64> %v
1555}
1556
1557define <vscale x 2 x i64> @vand_vi_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1558; CHECK-LABEL: vand_vi_nxv2i64:
1559; CHECK:       # %bb.0:
1560; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, mu
1561; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
1562; CHECK-NEXT:    ret
1563  %elt.head = insertelement <vscale x 2 x i64> undef, i64 4, i32 0
1564  %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1565  %v = call <vscale x 2 x i64> @llvm.vp.and.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 %evl)
1566  ret <vscale x 2 x i64> %v
1567}
1568
1569define <vscale x 2 x i64> @vand_vi_nxv2i64_unmasked(<vscale x 2 x i64> %va, i32 zeroext %evl) {
1570; CHECK-LABEL: vand_vi_nxv2i64_unmasked:
1571; CHECK:       # %bb.0:
1572; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, mu
1573; CHECK-NEXT:    vand.vi v8, v8, 4
1574; CHECK-NEXT:    ret
1575  %elt.head = insertelement <vscale x 2 x i64> undef, i64 4, i32 0
1576  %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1577  %head = insertelement <vscale x 2 x i1> undef, i1 true, i32 0
1578  %m = shufflevector <vscale x 2 x i1> %head, <vscale x 2 x i1> undef, <vscale x 2 x i32> zeroinitializer
1579  %v = call <vscale x 2 x i64> @llvm.vp.and.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 %evl)
1580  ret <vscale x 2 x i64> %v
1581}
1582
1583declare <vscale x 4 x i64> @llvm.vp.and.nxv4i64(<vscale x 4 x i64>, <vscale x 4 x i64>, <vscale x 4 x i1>, i32)
1584
1585define <vscale x 4 x i64> @vand_vv_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1586; CHECK-LABEL: vand_vv_nxv4i64:
1587; CHECK:       # %bb.0:
1588; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, mu
1589; CHECK-NEXT:    vand.vv v8, v8, v12, v0.t
1590; CHECK-NEXT:    ret
1591  %v = call <vscale x 4 x i64> @llvm.vp.and.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 %evl)
1592  ret <vscale x 4 x i64> %v
1593}
1594
1595define <vscale x 4 x i64> @vand_vv_nxv4i64_unmasked(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, i32 zeroext %evl) {
1596; CHECK-LABEL: vand_vv_nxv4i64_unmasked:
1597; CHECK:       # %bb.0:
1598; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, mu
1599; CHECK-NEXT:    vand.vv v8, v8, v12
1600; CHECK-NEXT:    ret
1601  %head = insertelement <vscale x 4 x i1> undef, i1 true, i32 0
1602  %m = shufflevector <vscale x 4 x i1> %head, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
1603  %v = call <vscale x 4 x i64> @llvm.vp.and.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b, <vscale x 4 x i1> %m, i32 %evl)
1604  ret <vscale x 4 x i64> %v
1605}
1606
1607define <vscale x 4 x i64> @vand_vx_nxv4i64(<vscale x 4 x i64> %va, i64 %b, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1608; RV32-LABEL: vand_vx_nxv4i64:
1609; RV32:       # %bb.0:
1610; RV32-NEXT:    addi sp, sp, -16
1611; RV32-NEXT:    .cfi_def_cfa_offset 16
1612; RV32-NEXT:    sw a1, 12(sp)
1613; RV32-NEXT:    sw a0, 8(sp)
1614; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
1615; RV32-NEXT:    addi a0, sp, 8
1616; RV32-NEXT:    vlse64.v v28, (a0), zero
1617; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, mu
1618; RV32-NEXT:    vand.vv v8, v8, v28, v0.t
1619; RV32-NEXT:    addi sp, sp, 16
1620; RV32-NEXT:    ret
1621;
1622; RV64-LABEL: vand_vx_nxv4i64:
1623; RV64:       # %bb.0:
1624; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, mu
1625; RV64-NEXT:    vand.vx v8, v8, a0, v0.t
1626; RV64-NEXT:    ret
1627  %elt.head = insertelement <vscale x 4 x i64> undef, i64 %b, i32 0
1628  %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> undef, <vscale x 4 x i32> zeroinitializer
1629  %v = call <vscale x 4 x i64> @llvm.vp.and.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 %evl)
1630  ret <vscale x 4 x i64> %v
1631}
1632
1633define <vscale x 4 x i64> @vand_vx_nxv4i64_unmasked(<vscale x 4 x i64> %va, i64 %b, i32 zeroext %evl) {
1634; RV32-LABEL: vand_vx_nxv4i64_unmasked:
1635; RV32:       # %bb.0:
1636; RV32-NEXT:    addi sp, sp, -16
1637; RV32-NEXT:    .cfi_def_cfa_offset 16
1638; RV32-NEXT:    sw a1, 12(sp)
1639; RV32-NEXT:    sw a0, 8(sp)
1640; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
1641; RV32-NEXT:    addi a0, sp, 8
1642; RV32-NEXT:    vlse64.v v28, (a0), zero
1643; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, mu
1644; RV32-NEXT:    vand.vv v8, v8, v28
1645; RV32-NEXT:    addi sp, sp, 16
1646; RV32-NEXT:    ret
1647;
1648; RV64-LABEL: vand_vx_nxv4i64_unmasked:
1649; RV64:       # %bb.0:
1650; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, mu
1651; RV64-NEXT:    vand.vx v8, v8, a0
1652; RV64-NEXT:    ret
1653  %elt.head = insertelement <vscale x 4 x i64> undef, i64 %b, i32 0
1654  %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> undef, <vscale x 4 x i32> zeroinitializer
1655  %head = insertelement <vscale x 4 x i1> undef, i1 true, i32 0
1656  %m = shufflevector <vscale x 4 x i1> %head, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
1657  %v = call <vscale x 4 x i64> @llvm.vp.and.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 %evl)
1658  ret <vscale x 4 x i64> %v
1659}
1660
1661define <vscale x 4 x i64> @vand_vi_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1662; CHECK-LABEL: vand_vi_nxv4i64:
1663; CHECK:       # %bb.0:
1664; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, mu
1665; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
1666; CHECK-NEXT:    ret
1667  %elt.head = insertelement <vscale x 4 x i64> undef, i64 4, i32 0
1668  %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> undef, <vscale x 4 x i32> zeroinitializer
1669  %v = call <vscale x 4 x i64> @llvm.vp.and.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 %evl)
1670  ret <vscale x 4 x i64> %v
1671}
1672
1673define <vscale x 4 x i64> @vand_vi_nxv4i64_unmasked(<vscale x 4 x i64> %va, i32 zeroext %evl) {
1674; CHECK-LABEL: vand_vi_nxv4i64_unmasked:
1675; CHECK:       # %bb.0:
1676; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, mu
1677; CHECK-NEXT:    vand.vi v8, v8, 4
1678; CHECK-NEXT:    ret
1679  %elt.head = insertelement <vscale x 4 x i64> undef, i64 4, i32 0
1680  %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> undef, <vscale x 4 x i32> zeroinitializer
1681  %head = insertelement <vscale x 4 x i1> undef, i1 true, i32 0
1682  %m = shufflevector <vscale x 4 x i1> %head, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
1683  %v = call <vscale x 4 x i64> @llvm.vp.and.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 %evl)
1684  ret <vscale x 4 x i64> %v
1685}
1686
1687declare <vscale x 8 x i64> @llvm.vp.and.nxv8i64(<vscale x 8 x i64>, <vscale x 8 x i64>, <vscale x 8 x i1>, i32)
1688
1689define <vscale x 8 x i64> @vand_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1690; CHECK-LABEL: vand_vv_nxv8i64:
1691; CHECK:       # %bb.0:
1692; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, mu
1693; CHECK-NEXT:    vand.vv v8, v8, v16, v0.t
1694; CHECK-NEXT:    ret
1695  %v = call <vscale x 8 x i64> @llvm.vp.and.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 %evl)
1696  ret <vscale x 8 x i64> %v
1697}
1698
1699define <vscale x 8 x i64> @vand_vv_nxv8i64_unmasked(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, i32 zeroext %evl) {
1700; CHECK-LABEL: vand_vv_nxv8i64_unmasked:
1701; CHECK:       # %bb.0:
1702; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, mu
1703; CHECK-NEXT:    vand.vv v8, v8, v16
1704; CHECK-NEXT:    ret
1705  %head = insertelement <vscale x 8 x i1> undef, i1 true, i32 0
1706  %m = shufflevector <vscale x 8 x i1> %head, <vscale x 8 x i1> undef, <vscale x 8 x i32> zeroinitializer
1707  %v = call <vscale x 8 x i64> @llvm.vp.and.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b, <vscale x 8 x i1> %m, i32 %evl)
1708  ret <vscale x 8 x i64> %v
1709}
1710
1711define <vscale x 8 x i64> @vand_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1712; RV32-LABEL: vand_vx_nxv8i64:
1713; RV32:       # %bb.0:
1714; RV32-NEXT:    addi sp, sp, -16
1715; RV32-NEXT:    .cfi_def_cfa_offset 16
1716; RV32-NEXT:    sw a1, 12(sp)
1717; RV32-NEXT:    sw a0, 8(sp)
1718; RV32-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
1719; RV32-NEXT:    addi a0, sp, 8
1720; RV32-NEXT:    vlse64.v v16, (a0), zero
1721; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, mu
1722; RV32-NEXT:    vand.vv v8, v8, v16, v0.t
1723; RV32-NEXT:    addi sp, sp, 16
1724; RV32-NEXT:    ret
1725;
1726; RV64-LABEL: vand_vx_nxv8i64:
1727; RV64:       # %bb.0:
1728; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
1729; RV64-NEXT:    vand.vx v8, v8, a0, v0.t
1730; RV64-NEXT:    ret
1731  %elt.head = insertelement <vscale x 8 x i64> undef, i64 %b, i32 0
1732  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> undef, <vscale x 8 x i32> zeroinitializer
1733  %v = call <vscale x 8 x i64> @llvm.vp.and.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 %evl)
1734  ret <vscale x 8 x i64> %v
1735}
1736
1737define <vscale x 8 x i64> @vand_vx_nxv8i64_unmasked(<vscale x 8 x i64> %va, i64 %b, i32 zeroext %evl) {
1738; RV32-LABEL: vand_vx_nxv8i64_unmasked:
1739; RV32:       # %bb.0:
1740; RV32-NEXT:    addi sp, sp, -16
1741; RV32-NEXT:    .cfi_def_cfa_offset 16
1742; RV32-NEXT:    sw a1, 12(sp)
1743; RV32-NEXT:    sw a0, 8(sp)
1744; RV32-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
1745; RV32-NEXT:    addi a0, sp, 8
1746; RV32-NEXT:    vlse64.v v16, (a0), zero
1747; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, mu
1748; RV32-NEXT:    vand.vv v8, v8, v16
1749; RV32-NEXT:    addi sp, sp, 16
1750; RV32-NEXT:    ret
1751;
1752; RV64-LABEL: vand_vx_nxv8i64_unmasked:
1753; RV64:       # %bb.0:
1754; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
1755; RV64-NEXT:    vand.vx v8, v8, a0
1756; RV64-NEXT:    ret
1757  %elt.head = insertelement <vscale x 8 x i64> undef, i64 %b, i32 0
1758  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> undef, <vscale x 8 x i32> zeroinitializer
1759  %head = insertelement <vscale x 8 x i1> undef, i1 true, i32 0
1760  %m = shufflevector <vscale x 8 x i1> %head, <vscale x 8 x i1> undef, <vscale x 8 x i32> zeroinitializer
1761  %v = call <vscale x 8 x i64> @llvm.vp.and.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 %evl)
1762  ret <vscale x 8 x i64> %v
1763}
1764
1765define <vscale x 8 x i64> @vand_vi_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1766; CHECK-LABEL: vand_vi_nxv8i64:
1767; CHECK:       # %bb.0:
1768; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, mu
1769; CHECK-NEXT:    vand.vi v8, v8, 4, v0.t
1770; CHECK-NEXT:    ret
1771  %elt.head = insertelement <vscale x 8 x i64> undef, i64 4, i32 0
1772  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> undef, <vscale x 8 x i32> zeroinitializer
1773  %v = call <vscale x 8 x i64> @llvm.vp.and.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 %evl)
1774  ret <vscale x 8 x i64> %v
1775}
1776
1777define <vscale x 8 x i64> @vand_vi_nxv8i64_unmasked(<vscale x 8 x i64> %va, i32 zeroext %evl) {
1778; CHECK-LABEL: vand_vi_nxv8i64_unmasked:
1779; CHECK:       # %bb.0:
1780; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, mu
1781; CHECK-NEXT:    vand.vi v8, v8, 4
1782; CHECK-NEXT:    ret
1783  %elt.head = insertelement <vscale x 8 x i64> undef, i64 4, i32 0
1784  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> undef, <vscale x 8 x i32> zeroinitializer
1785  %head = insertelement <vscale x 8 x i1> undef, i1 true, i32 0
1786  %m = shufflevector <vscale x 8 x i1> %head, <vscale x 8 x i1> undef, <vscale x 8 x i32> zeroinitializer
1787  %v = call <vscale x 8 x i64> @llvm.vp.and.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 %evl)
1788  ret <vscale x 8 x i64> %v
1789}
1790