1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+experimental-zfh,+experimental-v -target-abi=ilp32d \
3; RUN:     -verify-machineinstrs < %s | FileCheck %s
4; RUN: llc -mtriple=riscv64 -mattr=+d,+experimental-zfh,+experimental-v -target-abi=lp64d \
5; RUN:     -verify-machineinstrs < %s | FileCheck %s
6
7; This tests a mix of vfnmsac and vfnmsub by using different operand orders to
8; trigger commuting in TwoAddressInstructionPass.
9
10declare <vscale x 1 x half> @llvm.fma.v1f16(<vscale x 1 x half>, <vscale x 1 x half>, <vscale x 1 x half>)
11
12define <vscale x 1 x half> @vfnmsub_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x half> %vc) {
13; CHECK-LABEL: vfnmsub_vv_nxv1f16:
14; CHECK:       # %bb.0:
15; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
16; CHECK-NEXT:    vfnmsub.vv v8, v9, v10
17; CHECK-NEXT:    ret
18  %neg = fneg <vscale x 1 x half> %va
19  %vd = call <vscale x 1 x half> @llvm.fma.v1f16(<vscale x 1 x half> %neg, <vscale x 1 x half> %vb, <vscale x 1 x half> %vc)
20  ret <vscale x 1 x half> %vd
21}
22
23define <vscale x 1 x half> @vfnmsub_vf_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, half %c) {
24; CHECK-LABEL: vfnmsub_vf_nxv1f16:
25; CHECK:       # %bb.0:
26; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
27; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
28; CHECK-NEXT:    ret
29  %head = insertelement <vscale x 1 x half> undef, half %c, i32 0
30  %splat = shufflevector <vscale x 1 x half> %head, <vscale x 1 x half> undef, <vscale x 1 x i32> zeroinitializer
31  %neg = fneg <vscale x 1 x half> %va
32  %vd = call <vscale x 1 x half> @llvm.fma.v1f16(<vscale x 1 x half> %neg, <vscale x 1 x half> %splat, <vscale x 1 x half> %vb)
33  ret <vscale x 1 x half> %vd
34}
35
36declare <vscale x 2 x half> @llvm.fma.v2f16(<vscale x 2 x half>, <vscale x 2 x half>, <vscale x 2 x half>)
37
38define <vscale x 2 x half> @vfnmsub_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x half> %vc) {
39; CHECK-LABEL: vfnmsub_vv_nxv2f16:
40; CHECK:       # %bb.0:
41; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
42; CHECK-NEXT:    vfnmsub.vv v8, v10, v9
43; CHECK-NEXT:    ret
44  %neg = fneg <vscale x 2 x half> %va
45  %vd = call <vscale x 2 x half> @llvm.fma.v2f16(<vscale x 2 x half> %neg, <vscale x 2 x half> %vc, <vscale x 2 x half> %vb)
46  ret <vscale x 2 x half> %vd
47}
48
49define <vscale x 2 x half> @vfnmsub_vf_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, half %c) {
50; CHECK-LABEL: vfnmsub_vf_nxv2f16:
51; CHECK:       # %bb.0:
52; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
53; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
54; CHECK-NEXT:    ret
55  %head = insertelement <vscale x 2 x half> undef, half %c, i32 0
56  %splat = shufflevector <vscale x 2 x half> %head, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
57  %neg = fneg <vscale x 2 x half> %va
58  %vd = call <vscale x 2 x half> @llvm.fma.v2f16(<vscale x 2 x half> %splat, <vscale x 2 x half> %neg, <vscale x 2 x half> %vb)
59  ret <vscale x 2 x half> %vd
60}
61
62declare <vscale x 4 x half> @llvm.fma.v4f16(<vscale x 4 x half>, <vscale x 4 x half>, <vscale x 4 x half>)
63
64define <vscale x 4 x half> @vfnmsub_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x half> %vc) {
65; CHECK-LABEL: vfnmsub_vv_nxv4f16:
66; CHECK:       # %bb.0:
67; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
68; CHECK-NEXT:    vfnmsub.vv v8, v9, v10
69; CHECK-NEXT:    ret
70  %neg = fneg <vscale x 4 x half> %vb
71  %vd = call <vscale x 4 x half> @llvm.fma.v4f16(<vscale x 4 x half> %neg, <vscale x 4 x half> %va, <vscale x 4 x half> %vc)
72  ret <vscale x 4 x half> %vd
73}
74
75define <vscale x 4 x half> @vfnmsub_vf_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, half %c) {
76; CHECK-LABEL: vfnmsub_vf_nxv4f16:
77; CHECK:       # %bb.0:
78; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
79; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
80; CHECK-NEXT:    ret
81  %head = insertelement <vscale x 4 x half> undef, half %c, i32 0
82  %splat = shufflevector <vscale x 4 x half> %head, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
83  %neg = fneg <vscale x 4 x half> %splat
84  %vd = call <vscale x 4 x half> @llvm.fma.v4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %neg, <vscale x 4 x half> %vb)
85  ret <vscale x 4 x half> %vd
86}
87
88declare <vscale x 8 x half> @llvm.fma.v8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>)
89
90define <vscale x 8 x half> @vfnmsub_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x half> %vc) {
91; CHECK-LABEL: vfnmsub_vv_nxv8f16:
92; CHECK:       # %bb.0:
93; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
94; CHECK-NEXT:    vfnmsac.vv v8, v12, v10
95; CHECK-NEXT:    ret
96  %neg = fneg <vscale x 8 x half> %vb
97  %vd = call <vscale x 8 x half> @llvm.fma.v8f16(<vscale x 8 x half> %neg, <vscale x 8 x half> %vc, <vscale x 8 x half> %va)
98  ret <vscale x 8 x half> %vd
99}
100
101define <vscale x 8 x half> @vfnmsub_vf_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, half %c) {
102; CHECK-LABEL: vfnmsub_vf_nxv8f16:
103; CHECK:       # %bb.0:
104; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
105; CHECK-NEXT:    vfnmsac.vf v8, fa0, v10
106; CHECK-NEXT:    ret
107  %head = insertelement <vscale x 8 x half> undef, half %c, i32 0
108  %splat = shufflevector <vscale x 8 x half> %head, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
109  %neg = fneg <vscale x 8 x half> %splat
110  %vd = call <vscale x 8 x half> @llvm.fma.v8f16(<vscale x 8 x half> %vb, <vscale x 8 x half> %neg, <vscale x 8 x half> %va)
111  ret <vscale x 8 x half> %vd
112}
113
114declare <vscale x 16 x half> @llvm.fma.v16f16(<vscale x 16 x half>, <vscale x 16 x half>, <vscale x 16 x half>)
115
116define <vscale x 16 x half> @vfnmsub_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x half> %vc) {
117; CHECK-LABEL: vfnmsub_vv_nxv16f16:
118; CHECK:       # %bb.0:
119; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, mu
120; CHECK-NEXT:    vfnmsub.vv v8, v16, v12
121; CHECK-NEXT:    ret
122  %neg = fneg <vscale x 16 x half> %vc
123  %vd = call <vscale x 16 x half> @llvm.fma.v16f16(<vscale x 16 x half> %neg, <vscale x 16 x half> %va, <vscale x 16 x half> %vb)
124  ret <vscale x 16 x half> %vd
125}
126
127define <vscale x 16 x half> @vfnmsub_vf_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, half %c) {
128; CHECK-LABEL: vfnmsub_vf_nxv16f16:
129; CHECK:       # %bb.0:
130; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, mu
131; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12
132; CHECK-NEXT:    ret
133  %head = insertelement <vscale x 16 x half> undef, half %c, i32 0
134  %splat = shufflevector <vscale x 16 x half> %head, <vscale x 16 x half> undef, <vscale x 16 x i32> zeroinitializer
135  %neg = fneg <vscale x 16 x half> %splat
136  %vd = call <vscale x 16 x half> @llvm.fma.v16f16(<vscale x 16 x half> %neg, <vscale x 16 x half> %va, <vscale x 16 x half> %vb)
137  ret <vscale x 16 x half> %vd
138}
139
140declare <vscale x 32 x half> @llvm.fma.v32f16(<vscale x 32 x half>, <vscale x 32 x half>, <vscale x 32 x half>)
141
142define <vscale x 32 x half> @vfnmsub_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x half> %vc) {
143; CHECK-LABEL: vfnmsub_vv_nxv32f16:
144; CHECK:       # %bb.0:
145; CHECK-NEXT:    vl8re16.v v24, (a0)
146; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, mu
147; CHECK-NEXT:    vfnmsub.vv v8, v24, v16
148; CHECK-NEXT:    ret
149  %neg = fneg <vscale x 32 x half> %vc
150  %vd = call <vscale x 32 x half> @llvm.fma.v32f16(<vscale x 32 x half> %neg, <vscale x 32 x half> %va, <vscale x 32 x half> %vb)
151  ret <vscale x 32 x half> %vd
152}
153
154define <vscale x 32 x half> @vfnmsub_vf_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, half %c) {
155; CHECK-LABEL: vfnmsub_vf_nxv32f16:
156; CHECK:       # %bb.0:
157; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, mu
158; CHECK-NEXT:    vfnmsac.vf v8, fa0, v16
159; CHECK-NEXT:    ret
160  %head = insertelement <vscale x 32 x half> undef, half %c, i32 0
161  %splat = shufflevector <vscale x 32 x half> %head, <vscale x 32 x half> undef, <vscale x 32 x i32> zeroinitializer
162  %neg = fneg <vscale x 32 x half> %splat
163  %vd = call <vscale x 32 x half> @llvm.fma.v32f16(<vscale x 32 x half> %neg, <vscale x 32 x half> %vb, <vscale x 32 x half> %va)
164  ret <vscale x 32 x half> %vd
165}
166
167declare <vscale x 1 x float> @llvm.fma.v1f32(<vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x float>)
168
169define <vscale x 1 x float> @vfnmsub_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x float> %vc) {
170; CHECK-LABEL: vfnmsub_vv_nxv1f32:
171; CHECK:       # %bb.0:
172; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
173; CHECK-NEXT:    vfnmsub.vv v8, v9, v10
174; CHECK-NEXT:    ret
175  %neg = fneg <vscale x 1 x float> %vb
176  %vd = call <vscale x 1 x float> @llvm.fma.v1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %neg, <vscale x 1 x float> %vc)
177  ret <vscale x 1 x float> %vd
178}
179
180define <vscale x 1 x float> @vfnmsub_vf_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, float %c) {
181; CHECK-LABEL: vfnmsub_vf_nxv1f32:
182; CHECK:       # %bb.0:
183; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
184; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
185; CHECK-NEXT:    ret
186  %head = insertelement <vscale x 1 x float> undef, float %c, i32 0
187  %splat = shufflevector <vscale x 1 x float> %head, <vscale x 1 x float> undef, <vscale x 1 x i32> zeroinitializer
188  %neg = fneg <vscale x 1 x float> %va
189  %vd = call <vscale x 1 x float> @llvm.fma.v1f32(<vscale x 1 x float> %neg, <vscale x 1 x float> %splat, <vscale x 1 x float> %vb)
190  ret <vscale x 1 x float> %vd
191}
192
193declare <vscale x 2 x float> @llvm.fma.v2f32(<vscale x 2 x float>, <vscale x 2 x float>, <vscale x 2 x float>)
194
195define <vscale x 2 x float> @vfnmsub_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x float> %vc) {
196; CHECK-LABEL: vfnmsub_vv_nxv2f32:
197; CHECK:       # %bb.0:
198; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
199; CHECK-NEXT:    vfnmsub.vv v8, v10, v9
200; CHECK-NEXT:    ret
201  %neg = fneg <vscale x 2 x float> %vc
202  %vd = call <vscale x 2 x float> @llvm.fma.v2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %neg, <vscale x 2 x float> %vb)
203  ret <vscale x 2 x float> %vd
204}
205
206define <vscale x 2 x float> @vfnmsub_vf_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, float %c) {
207; CHECK-LABEL: vfnmsub_vf_nxv2f32:
208; CHECK:       # %bb.0:
209; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
210; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
211; CHECK-NEXT:    ret
212  %head = insertelement <vscale x 2 x float> undef, float %c, i32 0
213  %splat = shufflevector <vscale x 2 x float> %head, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
214  %neg = fneg <vscale x 2 x float> %va
215  %vd = call <vscale x 2 x float> @llvm.fma.v2f32(<vscale x 2 x float> %splat, <vscale x 2 x float> %neg, <vscale x 2 x float> %vb)
216  ret <vscale x 2 x float> %vd
217}
218
219declare <vscale x 4 x float> @llvm.fma.v4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>)
220
221define <vscale x 4 x float> @vfnmsub_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x float> %vc) {
222; CHECK-LABEL: vfnmsub_vv_nxv4f32:
223; CHECK:       # %bb.0:
224; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
225; CHECK-NEXT:    vfnmsub.vv v8, v10, v12
226; CHECK-NEXT:    ret
227  %neg = fneg <vscale x 4 x float> %va
228  %vd = call <vscale x 4 x float> @llvm.fma.v4f32(<vscale x 4 x float> %vb, <vscale x 4 x float> %neg, <vscale x 4 x float> %vc)
229  ret <vscale x 4 x float> %vd
230}
231
232define <vscale x 4 x float> @vfnmsub_vf_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, float %c) {
233; CHECK-LABEL: vfnmsub_vf_nxv4f32:
234; CHECK:       # %bb.0:
235; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
236; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10
237; CHECK-NEXT:    ret
238  %head = insertelement <vscale x 4 x float> undef, float %c, i32 0
239  %splat = shufflevector <vscale x 4 x float> %head, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
240  %neg = fneg <vscale x 4 x float> %splat
241  %vd = call <vscale x 4 x float> @llvm.fma.v4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %neg, <vscale x 4 x float> %vb)
242  ret <vscale x 4 x float> %vd
243}
244
245declare <vscale x 8 x float> @llvm.fma.v8f32(<vscale x 8 x float>, <vscale x 8 x float>, <vscale x 8 x float>)
246
247define <vscale x 8 x float> @vfnmsub_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x float> %vc) {
248; CHECK-LABEL: vfnmsub_vv_nxv8f32:
249; CHECK:       # %bb.0:
250; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
251; CHECK-NEXT:    vfnmsac.vv v8, v16, v12
252; CHECK-NEXT:    ret
253  %neg = fneg <vscale x 8 x float> %vc
254  %vd = call <vscale x 8 x float> @llvm.fma.v8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %neg, <vscale x 8 x float> %va)
255  ret <vscale x 8 x float> %vd
256}
257
258define <vscale x 8 x float> @vfnmsub_vf_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, float %c) {
259; CHECK-LABEL: vfnmsub_vf_nxv8f32:
260; CHECK:       # %bb.0:
261; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
262; CHECK-NEXT:    vfnmsac.vf v8, fa0, v12
263; CHECK-NEXT:    ret
264  %head = insertelement <vscale x 8 x float> undef, float %c, i32 0
265  %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> undef, <vscale x 8 x i32> zeroinitializer
266  %neg = fneg <vscale x 8 x float> %splat
267  %vd = call <vscale x 8 x float> @llvm.fma.v8f32(<vscale x 8 x float> %vb, <vscale x 8 x float> %neg, <vscale x 8 x float> %va)
268  ret <vscale x 8 x float> %vd
269}
270
271declare <vscale x 16 x float> @llvm.fma.v16f32(<vscale x 16 x float>, <vscale x 16 x float>, <vscale x 16 x float>)
272
273define <vscale x 16 x float> @vfnmsub_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x float> %vc) {
274; CHECK-LABEL: vfnmsub_vv_nxv16f32:
275; CHECK:       # %bb.0:
276; CHECK-NEXT:    vl8re32.v v24, (a0)
277; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, mu
278; CHECK-NEXT:    vfnmsub.vv v8, v24, v16
279; CHECK-NEXT:    ret
280  %neg = fneg <vscale x 16 x float> %va
281  %vd = call <vscale x 16 x float> @llvm.fma.v16f32(<vscale x 16 x float> %vc, <vscale x 16 x float> %neg, <vscale x 16 x float> %vb)
282  ret <vscale x 16 x float> %vd
283}
284
285define <vscale x 16 x float> @vfnmsub_vf_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, float %c) {
286; CHECK-LABEL: vfnmsub_vf_nxv16f32:
287; CHECK:       # %bb.0:
288; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, mu
289; CHECK-NEXT:    vfnmsub.vf v8, fa0, v16
290; CHECK-NEXT:    ret
291  %head = insertelement <vscale x 16 x float> undef, float %c, i32 0
292  %splat = shufflevector <vscale x 16 x float> %head, <vscale x 16 x float> undef, <vscale x 16 x i32> zeroinitializer
293  %neg = fneg <vscale x 16 x float> %splat
294  %vd = call <vscale x 16 x float> @llvm.fma.v16f32(<vscale x 16 x float> %neg, <vscale x 16 x float> %va, <vscale x 16 x float> %vb)
295  ret <vscale x 16 x float> %vd
296}
297
298declare <vscale x 1 x double> @llvm.fma.v1f64(<vscale x 1 x double>, <vscale x 1 x double>, <vscale x 1 x double>)
299
300define <vscale x 1 x double> @vfnmsub_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x double> %vc) {
301; CHECK-LABEL: vfnmsub_vv_nxv1f64:
302; CHECK:       # %bb.0:
303; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
304; CHECK-NEXT:    vfnmsac.vv v8, v10, v9
305; CHECK-NEXT:    ret
306  %neg = fneg <vscale x 1 x double> %vb
307  %vd = call <vscale x 1 x double> @llvm.fma.v1f64(<vscale x 1 x double> %vc, <vscale x 1 x double> %neg, <vscale x 1 x double> %va)
308  ret <vscale x 1 x double> %vd
309}
310
311define <vscale x 1 x double> @vfnmsub_vf_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, double %c) {
312; CHECK-LABEL: vfnmsub_vf_nxv1f64:
313; CHECK:       # %bb.0:
314; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
315; CHECK-NEXT:    vfnmsub.vf v8, fa0, v9
316; CHECK-NEXT:    ret
317  %head = insertelement <vscale x 1 x double> undef, double %c, i32 0
318  %splat = shufflevector <vscale x 1 x double> %head, <vscale x 1 x double> undef, <vscale x 1 x i32> zeroinitializer
319  %neg = fneg <vscale x 1 x double> %va
320  %vd = call <vscale x 1 x double> @llvm.fma.v1f64(<vscale x 1 x double> %neg, <vscale x 1 x double> %splat, <vscale x 1 x double> %vb)
321  ret <vscale x 1 x double> %vd
322}
323
324declare <vscale x 2 x double> @llvm.fma.v2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>)
325
326define <vscale x 2 x double> @vfnmsub_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x double> %vc) {
327; CHECK-LABEL: vfnmsub_vv_nxv2f64:
328; CHECK:       # %bb.0:
329; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
330; CHECK-NEXT:    vfnmsub.vv v8, v12, v10
331; CHECK-NEXT:    ret
332  %neg = fneg <vscale x 2 x double> %va
333  %vd = call <vscale x 2 x double> @llvm.fma.v2f64(<vscale x 2 x double> %neg, <vscale x 2 x double> %vc, <vscale x 2 x double> %vb)
334  ret <vscale x 2 x double> %vd
335}
336
337define <vscale x 2 x double> @vfnmsub_vf_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, double %c) {
338; CHECK-LABEL: vfnmsub_vf_nxv2f64:
339; CHECK:       # %bb.0:
340; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
341; CHECK-NEXT:    vfnmsub.vf v8, fa0, v10
342; CHECK-NEXT:    ret
343  %head = insertelement <vscale x 2 x double> undef, double %c, i32 0
344  %splat = shufflevector <vscale x 2 x double> %head, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
345  %neg = fneg <vscale x 2 x double> %va
346  %vd = call <vscale x 2 x double> @llvm.fma.v2f64(<vscale x 2 x double> %splat, <vscale x 2 x double> %neg, <vscale x 2 x double> %vb)
347  ret <vscale x 2 x double> %vd
348}
349
350declare <vscale x 4 x double> @llvm.fma.v4f64(<vscale x 4 x double>, <vscale x 4 x double>, <vscale x 4 x double>)
351
352define <vscale x 4 x double> @vfnmsub_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x double> %vc) {
353; CHECK-LABEL: vfnmsub_vv_nxv4f64:
354; CHECK:       # %bb.0:
355; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
356; CHECK-NEXT:    vfnmsub.vv v8, v12, v16
357; CHECK-NEXT:    ret
358  %neg = fneg <vscale x 4 x double> %vb
359  %vd = call <vscale x 4 x double> @llvm.fma.v4f64(<vscale x 4 x double> %neg, <vscale x 4 x double> %va, <vscale x 4 x double> %vc)
360  ret <vscale x 4 x double> %vd
361}
362
363define <vscale x 4 x double> @vfnmsub_vf_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, double %c) {
364; CHECK-LABEL: vfnmsub_vf_nxv4f64:
365; CHECK:       # %bb.0:
366; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
367; CHECK-NEXT:    vfnmsub.vf v8, fa0, v12
368; CHECK-NEXT:    ret
369  %head = insertelement <vscale x 4 x double> undef, double %c, i32 0
370  %splat = shufflevector <vscale x 4 x double> %head, <vscale x 4 x double> undef, <vscale x 4 x i32> zeroinitializer
371  %neg = fneg <vscale x 4 x double> %splat
372  %vd = call <vscale x 4 x double> @llvm.fma.v4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %neg, <vscale x 4 x double> %vb)
373  ret <vscale x 4 x double> %vd
374}
375
376declare <vscale x 8 x double> @llvm.fma.v8f64(<vscale x 8 x double>, <vscale x 8 x double>, <vscale x 8 x double>)
377
378define <vscale x 8 x double> @vfnmsub_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x double> %vc) {
379; CHECK-LABEL: vfnmsub_vv_nxv8f64:
380; CHECK:       # %bb.0:
381; CHECK-NEXT:    vl8re64.v v24, (a0)
382; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
383; CHECK-NEXT:    vfnmsac.vv v8, v16, v24
384; CHECK-NEXT:    ret
385  %neg = fneg <vscale x 8 x double> %vb
386  %vd = call <vscale x 8 x double> @llvm.fma.v8f64(<vscale x 8 x double> %neg, <vscale x 8 x double> %vc, <vscale x 8 x double> %va)
387  ret <vscale x 8 x double> %vd
388}
389
390define <vscale x 8 x double> @vfnmsub_vf_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, double %c) {
391; CHECK-LABEL: vfnmsub_vf_nxv8f64:
392; CHECK:       # %bb.0:
393; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
394; CHECK-NEXT:    vfnmsac.vf v8, fa0, v16
395; CHECK-NEXT:    ret
396  %head = insertelement <vscale x 8 x double> undef, double %c, i32 0
397  %splat = shufflevector <vscale x 8 x double> %head, <vscale x 8 x double> undef, <vscale x 8 x i32> zeroinitializer
398  %neg = fneg <vscale x 8 x double> %splat
399  %vd = call <vscale x 8 x double> @llvm.fma.v8f64(<vscale x 8 x double> %vb, <vscale x 8 x double> %neg, <vscale x 8 x double> %va)
400  ret <vscale x 8 x double> %vd
401}
402