1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+experimental-zfh,+experimental-v -target-abi=ilp32d \
3; RUN:     -verify-machineinstrs < %s | FileCheck %s
4; RUN: llc -mtriple=riscv64 -mattr=+d,+experimental-zfh,+experimental-v -target-abi=lp64d \
5; RUN:     -verify-machineinstrs < %s | FileCheck %s
6
7define <vscale x 1 x half> @vfsub_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb) {
8; CHECK-LABEL: vfsub_vv_nxv1f16:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
11; CHECK-NEXT:    vfsub.vv v8, v8, v9
12; CHECK-NEXT:    ret
13  %vc = fsub <vscale x 1 x half> %va, %vb
14  ret <vscale x 1 x half> %vc
15}
16
17define <vscale x 1 x half> @vfsub_vf_nxv1f16(<vscale x 1 x half> %va, half %b) {
18; CHECK-LABEL: vfsub_vf_nxv1f16:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
21; CHECK-NEXT:    vfsub.vf v8, v8, fa0
22; CHECK-NEXT:    ret
23  %head = insertelement <vscale x 1 x half> undef, half %b, i32 0
24  %splat = shufflevector <vscale x 1 x half> %head, <vscale x 1 x half> undef, <vscale x 1 x i32> zeroinitializer
25  %vc = fsub <vscale x 1 x half> %va, %splat
26  ret <vscale x 1 x half> %vc
27}
28
29define <vscale x 2 x half> @vfsub_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb) {
30; CHECK-LABEL: vfsub_vv_nxv2f16:
31; CHECK:       # %bb.0:
32; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
33; CHECK-NEXT:    vfsub.vv v8, v8, v9
34; CHECK-NEXT:    ret
35  %vc = fsub <vscale x 2 x half> %va, %vb
36  ret <vscale x 2 x half> %vc
37}
38
39define <vscale x 2 x half> @vfsub_vf_nxv2f16(<vscale x 2 x half> %va, half %b) {
40; CHECK-LABEL: vfsub_vf_nxv2f16:
41; CHECK:       # %bb.0:
42; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
43; CHECK-NEXT:    vfsub.vf v8, v8, fa0
44; CHECK-NEXT:    ret
45  %head = insertelement <vscale x 2 x half> undef, half %b, i32 0
46  %splat = shufflevector <vscale x 2 x half> %head, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
47  %vc = fsub <vscale x 2 x half> %va, %splat
48  ret <vscale x 2 x half> %vc
49}
50
51define <vscale x 4 x half> @vfsub_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb) {
52; CHECK-LABEL: vfsub_vv_nxv4f16:
53; CHECK:       # %bb.0:
54; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
55; CHECK-NEXT:    vfsub.vv v8, v8, v9
56; CHECK-NEXT:    ret
57  %vc = fsub <vscale x 4 x half> %va, %vb
58  ret <vscale x 4 x half> %vc
59}
60
61define <vscale x 4 x half> @vfsub_vf_nxv4f16(<vscale x 4 x half> %va, half %b) {
62; CHECK-LABEL: vfsub_vf_nxv4f16:
63; CHECK:       # %bb.0:
64; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
65; CHECK-NEXT:    vfsub.vf v8, v8, fa0
66; CHECK-NEXT:    ret
67  %head = insertelement <vscale x 4 x half> undef, half %b, i32 0
68  %splat = shufflevector <vscale x 4 x half> %head, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
69  %vc = fsub <vscale x 4 x half> %va, %splat
70  ret <vscale x 4 x half> %vc
71}
72
73define <vscale x 8 x half> @vfsub_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb) {
74; CHECK-LABEL: vfsub_vv_nxv8f16:
75; CHECK:       # %bb.0:
76; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
77; CHECK-NEXT:    vfsub.vv v8, v8, v10
78; CHECK-NEXT:    ret
79  %vc = fsub <vscale x 8 x half> %va, %vb
80  ret <vscale x 8 x half> %vc
81}
82
83define <vscale x 8 x half> @vfsub_vf_nxv8f16(<vscale x 8 x half> %va, half %b) {
84; CHECK-LABEL: vfsub_vf_nxv8f16:
85; CHECK:       # %bb.0:
86; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
87; CHECK-NEXT:    vfsub.vf v8, v8, fa0
88; CHECK-NEXT:    ret
89  %head = insertelement <vscale x 8 x half> undef, half %b, i32 0
90  %splat = shufflevector <vscale x 8 x half> %head, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
91  %vc = fsub <vscale x 8 x half> %va, %splat
92  ret <vscale x 8 x half> %vc
93}
94
95define <vscale x 8 x half> @vfsub_fv_nxv8f16(<vscale x 8 x half> %va, half %b) {
96; CHECK-LABEL: vfsub_fv_nxv8f16:
97; CHECK:       # %bb.0:
98; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
99; CHECK-NEXT:    vfrsub.vf v8, v8, fa0
100; CHECK-NEXT:    ret
101  %head = insertelement <vscale x 8 x half> undef, half %b, i32 0
102  %splat = shufflevector <vscale x 8 x half> %head, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
103  %vc = fsub <vscale x 8 x half> %splat, %va
104  ret <vscale x 8 x half> %vc
105}
106
107define <vscale x 16 x half> @vfsub_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb) {
108; CHECK-LABEL: vfsub_vv_nxv16f16:
109; CHECK:       # %bb.0:
110; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, mu
111; CHECK-NEXT:    vfsub.vv v8, v8, v12
112; CHECK-NEXT:    ret
113  %vc = fsub <vscale x 16 x half> %va, %vb
114  ret <vscale x 16 x half> %vc
115}
116
117define <vscale x 16 x half> @vfsub_vf_nxv16f16(<vscale x 16 x half> %va, half %b) {
118; CHECK-LABEL: vfsub_vf_nxv16f16:
119; CHECK:       # %bb.0:
120; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, mu
121; CHECK-NEXT:    vfsub.vf v8, v8, fa0
122; CHECK-NEXT:    ret
123  %head = insertelement <vscale x 16 x half> undef, half %b, i32 0
124  %splat = shufflevector <vscale x 16 x half> %head, <vscale x 16 x half> undef, <vscale x 16 x i32> zeroinitializer
125  %vc = fsub <vscale x 16 x half> %va, %splat
126  ret <vscale x 16 x half> %vc
127}
128
129define <vscale x 32 x half> @vfsub_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb) {
130; CHECK-LABEL: vfsub_vv_nxv32f16:
131; CHECK:       # %bb.0:
132; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, mu
133; CHECK-NEXT:    vfsub.vv v8, v8, v16
134; CHECK-NEXT:    ret
135  %vc = fsub <vscale x 32 x half> %va, %vb
136  ret <vscale x 32 x half> %vc
137}
138
139define <vscale x 32 x half> @vfsub_vf_nxv32f16(<vscale x 32 x half> %va, half %b) {
140; CHECK-LABEL: vfsub_vf_nxv32f16:
141; CHECK:       # %bb.0:
142; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, mu
143; CHECK-NEXT:    vfsub.vf v8, v8, fa0
144; CHECK-NEXT:    ret
145  %head = insertelement <vscale x 32 x half> undef, half %b, i32 0
146  %splat = shufflevector <vscale x 32 x half> %head, <vscale x 32 x half> undef, <vscale x 32 x i32> zeroinitializer
147  %vc = fsub <vscale x 32 x half> %va, %splat
148  ret <vscale x 32 x half> %vc
149}
150
151define <vscale x 1 x float> @vfsub_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb) {
152; CHECK-LABEL: vfsub_vv_nxv1f32:
153; CHECK:       # %bb.0:
154; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
155; CHECK-NEXT:    vfsub.vv v8, v8, v9
156; CHECK-NEXT:    ret
157  %vc = fsub <vscale x 1 x float> %va, %vb
158  ret <vscale x 1 x float> %vc
159}
160
161define <vscale x 1 x float> @vfsub_vf_nxv1f32(<vscale x 1 x float> %va, float %b) {
162; CHECK-LABEL: vfsub_vf_nxv1f32:
163; CHECK:       # %bb.0:
164; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
165; CHECK-NEXT:    vfsub.vf v8, v8, fa0
166; CHECK-NEXT:    ret
167  %head = insertelement <vscale x 1 x float> undef, float %b, i32 0
168  %splat = shufflevector <vscale x 1 x float> %head, <vscale x 1 x float> undef, <vscale x 1 x i32> zeroinitializer
169  %vc = fsub <vscale x 1 x float> %va, %splat
170  ret <vscale x 1 x float> %vc
171}
172
173define <vscale x 2 x float> @vfsub_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb) {
174; CHECK-LABEL: vfsub_vv_nxv2f32:
175; CHECK:       # %bb.0:
176; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
177; CHECK-NEXT:    vfsub.vv v8, v8, v9
178; CHECK-NEXT:    ret
179  %vc = fsub <vscale x 2 x float> %va, %vb
180  ret <vscale x 2 x float> %vc
181}
182
183define <vscale x 2 x float> @vfsub_vf_nxv2f32(<vscale x 2 x float> %va, float %b) {
184; CHECK-LABEL: vfsub_vf_nxv2f32:
185; CHECK:       # %bb.0:
186; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
187; CHECK-NEXT:    vfsub.vf v8, v8, fa0
188; CHECK-NEXT:    ret
189  %head = insertelement <vscale x 2 x float> undef, float %b, i32 0
190  %splat = shufflevector <vscale x 2 x float> %head, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
191  %vc = fsub <vscale x 2 x float> %va, %splat
192  ret <vscale x 2 x float> %vc
193}
194
195define <vscale x 4 x float> @vfsub_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb) {
196; CHECK-LABEL: vfsub_vv_nxv4f32:
197; CHECK:       # %bb.0:
198; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
199; CHECK-NEXT:    vfsub.vv v8, v8, v10
200; CHECK-NEXT:    ret
201  %vc = fsub <vscale x 4 x float> %va, %vb
202  ret <vscale x 4 x float> %vc
203}
204
205define <vscale x 4 x float> @vfsub_vf_nxv4f32(<vscale x 4 x float> %va, float %b) {
206; CHECK-LABEL: vfsub_vf_nxv4f32:
207; CHECK:       # %bb.0:
208; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
209; CHECK-NEXT:    vfsub.vf v8, v8, fa0
210; CHECK-NEXT:    ret
211  %head = insertelement <vscale x 4 x float> undef, float %b, i32 0
212  %splat = shufflevector <vscale x 4 x float> %head, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
213  %vc = fsub <vscale x 4 x float> %va, %splat
214  ret <vscale x 4 x float> %vc
215}
216
217define <vscale x 8 x float> @vfsub_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb) {
218; CHECK-LABEL: vfsub_vv_nxv8f32:
219; CHECK:       # %bb.0:
220; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
221; CHECK-NEXT:    vfsub.vv v8, v8, v12
222; CHECK-NEXT:    ret
223  %vc = fsub <vscale x 8 x float> %va, %vb
224  ret <vscale x 8 x float> %vc
225}
226
227define <vscale x 8 x float> @vfsub_vf_nxv8f32(<vscale x 8 x float> %va, float %b) {
228; CHECK-LABEL: vfsub_vf_nxv8f32:
229; CHECK:       # %bb.0:
230; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
231; CHECK-NEXT:    vfsub.vf v8, v8, fa0
232; CHECK-NEXT:    ret
233  %head = insertelement <vscale x 8 x float> undef, float %b, i32 0
234  %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> undef, <vscale x 8 x i32> zeroinitializer
235  %vc = fsub <vscale x 8 x float> %va, %splat
236  ret <vscale x 8 x float> %vc
237}
238
239define <vscale x 8 x float> @vfsub_fv_nxv8f32(<vscale x 8 x float> %va, float %b) {
240; CHECK-LABEL: vfsub_fv_nxv8f32:
241; CHECK:       # %bb.0:
242; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
243; CHECK-NEXT:    vfrsub.vf v8, v8, fa0
244; CHECK-NEXT:    ret
245  %head = insertelement <vscale x 8 x float> undef, float %b, i32 0
246  %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> undef, <vscale x 8 x i32> zeroinitializer
247  %vc = fsub <vscale x 8 x float> %splat, %va
248  ret <vscale x 8 x float> %vc
249}
250
251define <vscale x 16 x float> @vfsub_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb) {
252; CHECK-LABEL: vfsub_vv_nxv16f32:
253; CHECK:       # %bb.0:
254; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, mu
255; CHECK-NEXT:    vfsub.vv v8, v8, v16
256; CHECK-NEXT:    ret
257  %vc = fsub <vscale x 16 x float> %va, %vb
258  ret <vscale x 16 x float> %vc
259}
260
261define <vscale x 16 x float> @vfsub_vf_nxv16f32(<vscale x 16 x float> %va, float %b) {
262; CHECK-LABEL: vfsub_vf_nxv16f32:
263; CHECK:       # %bb.0:
264; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, mu
265; CHECK-NEXT:    vfsub.vf v8, v8, fa0
266; CHECK-NEXT:    ret
267  %head = insertelement <vscale x 16 x float> undef, float %b, i32 0
268  %splat = shufflevector <vscale x 16 x float> %head, <vscale x 16 x float> undef, <vscale x 16 x i32> zeroinitializer
269  %vc = fsub <vscale x 16 x float> %va, %splat
270  ret <vscale x 16 x float> %vc
271}
272
273define <vscale x 1 x double> @vfsub_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb) {
274; CHECK-LABEL: vfsub_vv_nxv1f64:
275; CHECK:       # %bb.0:
276; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
277; CHECK-NEXT:    vfsub.vv v8, v8, v9
278; CHECK-NEXT:    ret
279  %vc = fsub <vscale x 1 x double> %va, %vb
280  ret <vscale x 1 x double> %vc
281}
282
283define <vscale x 1 x double> @vfsub_vf_nxv1f64(<vscale x 1 x double> %va, double %b) {
284; CHECK-LABEL: vfsub_vf_nxv1f64:
285; CHECK:       # %bb.0:
286; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
287; CHECK-NEXT:    vfsub.vf v8, v8, fa0
288; CHECK-NEXT:    ret
289  %head = insertelement <vscale x 1 x double> undef, double %b, i32 0
290  %splat = shufflevector <vscale x 1 x double> %head, <vscale x 1 x double> undef, <vscale x 1 x i32> zeroinitializer
291  %vc = fsub <vscale x 1 x double> %va, %splat
292  ret <vscale x 1 x double> %vc
293}
294
295define <vscale x 2 x double> @vfsub_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb) {
296; CHECK-LABEL: vfsub_vv_nxv2f64:
297; CHECK:       # %bb.0:
298; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
299; CHECK-NEXT:    vfsub.vv v8, v8, v10
300; CHECK-NEXT:    ret
301  %vc = fsub <vscale x 2 x double> %va, %vb
302  ret <vscale x 2 x double> %vc
303}
304
305define <vscale x 2 x double> @vfsub_vf_nxv2f64(<vscale x 2 x double> %va, double %b) {
306; CHECK-LABEL: vfsub_vf_nxv2f64:
307; CHECK:       # %bb.0:
308; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
309; CHECK-NEXT:    vfsub.vf v8, v8, fa0
310; CHECK-NEXT:    ret
311  %head = insertelement <vscale x 2 x double> undef, double %b, i32 0
312  %splat = shufflevector <vscale x 2 x double> %head, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
313  %vc = fsub <vscale x 2 x double> %va, %splat
314  ret <vscale x 2 x double> %vc
315}
316
317define <vscale x 4 x double> @vfsub_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb) {
318; CHECK-LABEL: vfsub_vv_nxv4f64:
319; CHECK:       # %bb.0:
320; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
321; CHECK-NEXT:    vfsub.vv v8, v8, v12
322; CHECK-NEXT:    ret
323  %vc = fsub <vscale x 4 x double> %va, %vb
324  ret <vscale x 4 x double> %vc
325}
326
327define <vscale x 4 x double> @vfsub_vf_nxv4f64(<vscale x 4 x double> %va, double %b) {
328; CHECK-LABEL: vfsub_vf_nxv4f64:
329; CHECK:       # %bb.0:
330; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
331; CHECK-NEXT:    vfsub.vf v8, v8, fa0
332; CHECK-NEXT:    ret
333  %head = insertelement <vscale x 4 x double> undef, double %b, i32 0
334  %splat = shufflevector <vscale x 4 x double> %head, <vscale x 4 x double> undef, <vscale x 4 x i32> zeroinitializer
335  %vc = fsub <vscale x 4 x double> %va, %splat
336  ret <vscale x 4 x double> %vc
337}
338
339define <vscale x 8 x double> @vfsub_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb) {
340; CHECK-LABEL: vfsub_vv_nxv8f64:
341; CHECK:       # %bb.0:
342; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
343; CHECK-NEXT:    vfsub.vv v8, v8, v16
344; CHECK-NEXT:    ret
345  %vc = fsub <vscale x 8 x double> %va, %vb
346  ret <vscale x 8 x double> %vc
347}
348
349define <vscale x 8 x double> @vfsub_vf_nxv8f64(<vscale x 8 x double> %va, double %b) {
350; CHECK-LABEL: vfsub_vf_nxv8f64:
351; CHECK:       # %bb.0:
352; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
353; CHECK-NEXT:    vfsub.vf v8, v8, fa0
354; CHECK-NEXT:    ret
355  %head = insertelement <vscale x 8 x double> undef, double %b, i32 0
356  %splat = shufflevector <vscale x 8 x double> %head, <vscale x 8 x double> undef, <vscale x 8 x i32> zeroinitializer
357  %vc = fsub <vscale x 8 x double> %va, %splat
358  ret <vscale x 8 x double> %vc
359}
360
361define <vscale x 8 x double> @vfsub_fv_nxv8f64(<vscale x 8 x double> %va, double %b) {
362; CHECK-LABEL: vfsub_fv_nxv8f64:
363; CHECK:       # %bb.0:
364; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
365; CHECK-NEXT:    vfrsub.vf v8, v8, fa0
366; CHECK-NEXT:    ret
367  %head = insertelement <vscale x 8 x double> undef, double %b, i32 0
368  %splat = shufflevector <vscale x 8 x double> %head, <vscale x 8 x double> undef, <vscale x 8 x i32> zeroinitializer
369  %vc = fsub <vscale x 8 x double> %splat, %va
370  ret <vscale x 8 x double> %vc
371}
372
373