1 #ifndef CAPSTONE_ARM64_H 2 #define CAPSTONE_ARM64_H 3 4 /* Capstone Disassembly Engine */ 5 /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */ 6 7 #ifdef __cplusplus 8 extern "C" { 9 #endif 10 11 #include "platform.h" 12 13 #ifdef _MSC_VER 14 #pragma warning(disable:4201) 15 #endif 16 17 /// ARM64 shift type 18 typedef enum arm64_shifter { 19 ARM64_SFT_INVALID = 0, 20 ARM64_SFT_LSL = 1, 21 ARM64_SFT_MSL = 2, 22 ARM64_SFT_LSR = 3, 23 ARM64_SFT_ASR = 4, 24 ARM64_SFT_ROR = 5, 25 } arm64_shifter; 26 27 /// ARM64 extender type 28 typedef enum arm64_extender { 29 ARM64_EXT_INVALID = 0, 30 ARM64_EXT_UXTB = 1, 31 ARM64_EXT_UXTH = 2, 32 ARM64_EXT_UXTW = 3, 33 ARM64_EXT_UXTX = 4, 34 ARM64_EXT_SXTB = 5, 35 ARM64_EXT_SXTH = 6, 36 ARM64_EXT_SXTW = 7, 37 ARM64_EXT_SXTX = 8, 38 } arm64_extender; 39 40 /// ARM64 condition code 41 typedef enum arm64_cc { 42 ARM64_CC_INVALID = 0, 43 ARM64_CC_EQ = 1, ///< Equal 44 ARM64_CC_NE = 2, ///< Not equal: Not equal, or unordered 45 ARM64_CC_HS = 3, ///< Unsigned higher or same: >, ==, or unordered 46 ARM64_CC_LO = 4, ///< Unsigned lower or same: Less than 47 ARM64_CC_MI = 5, ///< Minus, negative: Less than 48 ARM64_CC_PL = 6, ///< Plus, positive or zero: >, ==, or unordered 49 ARM64_CC_VS = 7, ///< Overflow: Unordered 50 ARM64_CC_VC = 8, ///< No overflow: Ordered 51 ARM64_CC_HI = 9, ///< Unsigned higher: Greater than, or unordered 52 ARM64_CC_LS = 10, ///< Unsigned lower or same: Less than or equal 53 ARM64_CC_GE = 11, ///< Greater than or equal: Greater than or equal 54 ARM64_CC_LT = 12, ///< Less than: Less than, or unordered 55 ARM64_CC_GT = 13, ///< Signed greater than: Greater than 56 ARM64_CC_LE = 14, ///< Signed less than or equal: <, ==, or unordered 57 ARM64_CC_AL = 15, ///< Always (unconditional): Always (unconditional) 58 ARM64_CC_NV = 16, ///< Always (unconditional): Always (unconditional) 59 //< Note the NV exists purely to disassemble 0b1111. Execution is "always". 60 } arm64_cc; 61 62 /// System registers 63 typedef enum arm64_sysreg { 64 // System registers for MRS 65 ARM64_SYSREG_INVALID = 0, 66 67 ARM64_SYSREG_MDCCSR_EL0 = 0x9808, 68 ARM64_SYSREG_DBGDTRRX_EL0 = 0x9828, 69 ARM64_SYSREG_MDRAR_EL1 = 0x8080, 70 ARM64_SYSREG_OSLSR_EL1 = 0x808C, 71 ARM64_SYSREG_DBGAUTHSTATUS_EL1 = 0x83F6, 72 ARM64_SYSREG_PMCEID0_EL0 = 0xDCE6, 73 ARM64_SYSREG_PMCEID1_EL0 = 0xDCE7, 74 ARM64_SYSREG_MIDR_EL1 = 0xC000, 75 ARM64_SYSREG_CCSIDR_EL1 = 0xC800, 76 ARM64_SYSREG_CCSIDR2_EL1 = 0xC802, 77 ARM64_SYSREG_CLIDR_EL1 = 0xC801, 78 ARM64_SYSREG_CTR_EL0 = 0xD801, 79 ARM64_SYSREG_MPIDR_EL1 = 0xC005, 80 ARM64_SYSREG_REVIDR_EL1 = 0xC006, 81 ARM64_SYSREG_AIDR_EL1 = 0xC807, 82 ARM64_SYSREG_DCZID_EL0 = 0xD807, 83 ARM64_SYSREG_ID_PFR0_EL1 = 0xC008, 84 ARM64_SYSREG_ID_PFR1_EL1 = 0xC009, 85 ARM64_SYSREG_ID_DFR0_EL1 = 0xC00A, 86 ARM64_SYSREG_ID_AFR0_EL1 = 0xC00B, 87 ARM64_SYSREG_ID_MMFR0_EL1 = 0xC00C, 88 ARM64_SYSREG_ID_MMFR1_EL1 = 0xC00D, 89 ARM64_SYSREG_ID_MMFR2_EL1 = 0xC00E, 90 ARM64_SYSREG_ID_MMFR3_EL1 = 0xC00F, 91 ARM64_SYSREG_ID_ISAR0_EL1 = 0xC010, 92 ARM64_SYSREG_ID_ISAR1_EL1 = 0xC011, 93 ARM64_SYSREG_ID_ISAR2_EL1 = 0xC012, 94 ARM64_SYSREG_ID_ISAR3_EL1 = 0xC013, 95 ARM64_SYSREG_ID_ISAR4_EL1 = 0xC014, 96 ARM64_SYSREG_ID_ISAR5_EL1 = 0xC015, 97 ARM64_SYSREG_ID_ISAR6_EL1 = 0xC017, 98 ARM64_SYSREG_ID_AA64PFR0_EL1 = 0xC020, 99 ARM64_SYSREG_ID_AA64PFR1_EL1 = 0xC021, 100 ARM64_SYSREG_ID_AA64DFR0_EL1 = 0xC028, 101 ARM64_SYSREG_ID_AA64DFR1_EL1 = 0xC029, 102 ARM64_SYSREG_ID_AA64AFR0_EL1 = 0xC02C, 103 ARM64_SYSREG_ID_AA64AFR1_EL1 = 0xC02D, 104 ARM64_SYSREG_ID_AA64ISAR0_EL1 = 0xC030, 105 ARM64_SYSREG_ID_AA64ISAR1_EL1 = 0xC031, 106 ARM64_SYSREG_ID_AA64MMFR0_EL1 = 0xC038, 107 ARM64_SYSREG_ID_AA64MMFR1_EL1 = 0xC039, 108 ARM64_SYSREG_ID_AA64MMFR2_EL1 = 0xC03A, 109 ARM64_SYSREG_MVFR0_EL1 = 0xC018, 110 ARM64_SYSREG_MVFR1_EL1 = 0xC019, 111 ARM64_SYSREG_MVFR2_EL1 = 0xC01A, 112 ARM64_SYSREG_RVBAR_EL1 = 0xC601, 113 ARM64_SYSREG_RVBAR_EL2 = 0xE601, 114 ARM64_SYSREG_RVBAR_EL3 = 0xF601, 115 ARM64_SYSREG_ISR_EL1 = 0xC608, 116 ARM64_SYSREG_CNTPCT_EL0 = 0xDF01, 117 ARM64_SYSREG_CNTVCT_EL0 = 0xDF02, 118 ARM64_SYSREG_ID_MMFR4_EL1 = 0xC016, 119 ARM64_SYSREG_TRCSTATR = 0x8818, 120 ARM64_SYSREG_TRCIDR8 = 0x8806, 121 ARM64_SYSREG_TRCIDR9 = 0x880E, 122 ARM64_SYSREG_TRCIDR10 = 0x8816, 123 ARM64_SYSREG_TRCIDR11 = 0x881E, 124 ARM64_SYSREG_TRCIDR12 = 0x8826, 125 ARM64_SYSREG_TRCIDR13 = 0x882E, 126 ARM64_SYSREG_TRCIDR0 = 0x8847, 127 ARM64_SYSREG_TRCIDR1 = 0x884F, 128 ARM64_SYSREG_TRCIDR2 = 0x8857, 129 ARM64_SYSREG_TRCIDR3 = 0x885F, 130 ARM64_SYSREG_TRCIDR4 = 0x8867, 131 ARM64_SYSREG_TRCIDR5 = 0x886F, 132 ARM64_SYSREG_TRCIDR6 = 0x8877, 133 ARM64_SYSREG_TRCIDR7 = 0x887F, 134 ARM64_SYSREG_TRCOSLSR = 0x888C, 135 ARM64_SYSREG_TRCPDSR = 0x88AC, 136 ARM64_SYSREG_TRCDEVAFF0 = 0x8BD6, 137 ARM64_SYSREG_TRCDEVAFF1 = 0x8BDE, 138 ARM64_SYSREG_TRCLSR = 0x8BEE, 139 ARM64_SYSREG_TRCAUTHSTATUS = 0x8BF6, 140 ARM64_SYSREG_TRCDEVARCH = 0x8BFE, 141 ARM64_SYSREG_TRCDEVID = 0x8B97, 142 ARM64_SYSREG_TRCDEVTYPE = 0x8B9F, 143 ARM64_SYSREG_TRCPIDR4 = 0x8BA7, 144 ARM64_SYSREG_TRCPIDR5 = 0x8BAF, 145 ARM64_SYSREG_TRCPIDR6 = 0x8BB7, 146 ARM64_SYSREG_TRCPIDR7 = 0x8BBF, 147 ARM64_SYSREG_TRCPIDR0 = 0x8BC7, 148 ARM64_SYSREG_TRCPIDR1 = 0x8BCF, 149 ARM64_SYSREG_TRCPIDR2 = 0x8BD7, 150 ARM64_SYSREG_TRCPIDR3 = 0x8BDF, 151 ARM64_SYSREG_TRCCIDR0 = 0x8BE7, 152 ARM64_SYSREG_TRCCIDR1 = 0x8BEF, 153 ARM64_SYSREG_TRCCIDR2 = 0x8BF7, 154 ARM64_SYSREG_TRCCIDR3 = 0x8BFF, 155 ARM64_SYSREG_ICC_IAR1_EL1 = 0xC660, 156 ARM64_SYSREG_ICC_IAR0_EL1 = 0xC640, 157 ARM64_SYSREG_ICC_HPPIR1_EL1 = 0xC662, 158 ARM64_SYSREG_ICC_HPPIR0_EL1 = 0xC642, 159 ARM64_SYSREG_ICC_RPR_EL1 = 0xC65B, 160 ARM64_SYSREG_ICH_VTR_EL2 = 0xE659, 161 ARM64_SYSREG_ICH_EISR_EL2 = 0xE65B, 162 ARM64_SYSREG_ICH_ELRSR_EL2 = 0xE65D, 163 ARM64_SYSREG_ID_AA64ZFR0_EL1 = 0xC024, 164 ARM64_SYSREG_LORID_EL1 = 0xC527, 165 ARM64_SYSREG_ERRIDR_EL1 = 0xC298, 166 ARM64_SYSREG_ERXFR_EL1 = 0xC2A0, 167 ARM64_SYSREG_DBGDTRTX_EL0 = 0x9828, 168 ARM64_SYSREG_OSLAR_EL1 = 0x8084, 169 ARM64_SYSREG_PMSWINC_EL0 = 0xDCE4, 170 ARM64_SYSREG_TRCOSLAR = 0x8884, 171 ARM64_SYSREG_TRCLAR = 0x8BE6, 172 ARM64_SYSREG_ICC_EOIR1_EL1 = 0xC661, 173 ARM64_SYSREG_ICC_EOIR0_EL1 = 0xC641, 174 ARM64_SYSREG_ICC_DIR_EL1 = 0xC659, 175 ARM64_SYSREG_ICC_SGI1R_EL1 = 0xC65D, 176 ARM64_SYSREG_ICC_ASGI1R_EL1 = 0xC65E, 177 ARM64_SYSREG_ICC_SGI0R_EL1 = 0xC65F, 178 ARM64_SYSREG_OSDTRRX_EL1 = 0x8002, 179 ARM64_SYSREG_OSDTRTX_EL1 = 0x801A, 180 ARM64_SYSREG_TEECR32_EL1 = 0x9000, 181 ARM64_SYSREG_MDCCINT_EL1 = 0x8010, 182 ARM64_SYSREG_MDSCR_EL1 = 0x8012, 183 ARM64_SYSREG_DBGDTR_EL0 = 0x9820, 184 ARM64_SYSREG_OSECCR_EL1 = 0x8032, 185 ARM64_SYSREG_DBGVCR32_EL2 = 0xA038, 186 ARM64_SYSREG_DBGBVR0_EL1 = 0x8004, 187 ARM64_SYSREG_DBGBVR1_EL1 = 0x800C, 188 ARM64_SYSREG_DBGBVR2_EL1 = 0x8014, 189 ARM64_SYSREG_DBGBVR3_EL1 = 0x801C, 190 ARM64_SYSREG_DBGBVR4_EL1 = 0x8024, 191 ARM64_SYSREG_DBGBVR5_EL1 = 0x802C, 192 ARM64_SYSREG_DBGBVR6_EL1 = 0x8034, 193 ARM64_SYSREG_DBGBVR7_EL1 = 0x803C, 194 ARM64_SYSREG_DBGBVR8_EL1 = 0x8044, 195 ARM64_SYSREG_DBGBVR9_EL1 = 0x804C, 196 ARM64_SYSREG_DBGBVR10_EL1 = 0x8054, 197 ARM64_SYSREG_DBGBVR11_EL1 = 0x805C, 198 ARM64_SYSREG_DBGBVR12_EL1 = 0x8064, 199 ARM64_SYSREG_DBGBVR13_EL1 = 0x806C, 200 ARM64_SYSREG_DBGBVR14_EL1 = 0x8074, 201 ARM64_SYSREG_DBGBVR15_EL1 = 0x807C, 202 ARM64_SYSREG_DBGBCR0_EL1 = 0x8005, 203 ARM64_SYSREG_DBGBCR1_EL1 = 0x800D, 204 ARM64_SYSREG_DBGBCR2_EL1 = 0x8015, 205 ARM64_SYSREG_DBGBCR3_EL1 = 0x801D, 206 ARM64_SYSREG_DBGBCR4_EL1 = 0x8025, 207 ARM64_SYSREG_DBGBCR5_EL1 = 0x802D, 208 ARM64_SYSREG_DBGBCR6_EL1 = 0x8035, 209 ARM64_SYSREG_DBGBCR7_EL1 = 0x803D, 210 ARM64_SYSREG_DBGBCR8_EL1 = 0x8045, 211 ARM64_SYSREG_DBGBCR9_EL1 = 0x804D, 212 ARM64_SYSREG_DBGBCR10_EL1 = 0x8055, 213 ARM64_SYSREG_DBGBCR11_EL1 = 0x805D, 214 ARM64_SYSREG_DBGBCR12_EL1 = 0x8065, 215 ARM64_SYSREG_DBGBCR13_EL1 = 0x806D, 216 ARM64_SYSREG_DBGBCR14_EL1 = 0x8075, 217 ARM64_SYSREG_DBGBCR15_EL1 = 0x807D, 218 ARM64_SYSREG_DBGWVR0_EL1 = 0x8006, 219 ARM64_SYSREG_DBGWVR1_EL1 = 0x800E, 220 ARM64_SYSREG_DBGWVR2_EL1 = 0x8016, 221 ARM64_SYSREG_DBGWVR3_EL1 = 0x801E, 222 ARM64_SYSREG_DBGWVR4_EL1 = 0x8026, 223 ARM64_SYSREG_DBGWVR5_EL1 = 0x802E, 224 ARM64_SYSREG_DBGWVR6_EL1 = 0x8036, 225 ARM64_SYSREG_DBGWVR7_EL1 = 0x803E, 226 ARM64_SYSREG_DBGWVR8_EL1 = 0x8046, 227 ARM64_SYSREG_DBGWVR9_EL1 = 0x804E, 228 ARM64_SYSREG_DBGWVR10_EL1 = 0x8056, 229 ARM64_SYSREG_DBGWVR11_EL1 = 0x805E, 230 ARM64_SYSREG_DBGWVR12_EL1 = 0x8066, 231 ARM64_SYSREG_DBGWVR13_EL1 = 0x806E, 232 ARM64_SYSREG_DBGWVR14_EL1 = 0x8076, 233 ARM64_SYSREG_DBGWVR15_EL1 = 0x807E, 234 ARM64_SYSREG_DBGWCR0_EL1 = 0x8007, 235 ARM64_SYSREG_DBGWCR1_EL1 = 0x800F, 236 ARM64_SYSREG_DBGWCR2_EL1 = 0x8017, 237 ARM64_SYSREG_DBGWCR3_EL1 = 0x801F, 238 ARM64_SYSREG_DBGWCR4_EL1 = 0x8027, 239 ARM64_SYSREG_DBGWCR5_EL1 = 0x802F, 240 ARM64_SYSREG_DBGWCR6_EL1 = 0x8037, 241 ARM64_SYSREG_DBGWCR7_EL1 = 0x803F, 242 ARM64_SYSREG_DBGWCR8_EL1 = 0x8047, 243 ARM64_SYSREG_DBGWCR9_EL1 = 0x804F, 244 ARM64_SYSREG_DBGWCR10_EL1 = 0x8057, 245 ARM64_SYSREG_DBGWCR11_EL1 = 0x805F, 246 ARM64_SYSREG_DBGWCR12_EL1 = 0x8067, 247 ARM64_SYSREG_DBGWCR13_EL1 = 0x806F, 248 ARM64_SYSREG_DBGWCR14_EL1 = 0x8077, 249 ARM64_SYSREG_DBGWCR15_EL1 = 0x807F, 250 ARM64_SYSREG_TEEHBR32_EL1 = 0x9080, 251 ARM64_SYSREG_OSDLR_EL1 = 0x809C, 252 ARM64_SYSREG_DBGPRCR_EL1 = 0x80A4, 253 ARM64_SYSREG_DBGCLAIMSET_EL1 = 0x83C6, 254 ARM64_SYSREG_DBGCLAIMCLR_EL1 = 0x83CE, 255 ARM64_SYSREG_CSSELR_EL1 = 0xD000, 256 ARM64_SYSREG_VPIDR_EL2 = 0xE000, 257 ARM64_SYSREG_VMPIDR_EL2 = 0xE005, 258 ARM64_SYSREG_CPACR_EL1 = 0xC082, 259 ARM64_SYSREG_SCTLR_EL1 = 0xC080, 260 ARM64_SYSREG_SCTLR_EL2 = 0xE080, 261 ARM64_SYSREG_SCTLR_EL3 = 0xF080, 262 ARM64_SYSREG_ACTLR_EL1 = 0xC081, 263 ARM64_SYSREG_ACTLR_EL2 = 0xE081, 264 ARM64_SYSREG_ACTLR_EL3 = 0xF081, 265 ARM64_SYSREG_HCR_EL2 = 0xE088, 266 ARM64_SYSREG_SCR_EL3 = 0xF088, 267 ARM64_SYSREG_MDCR_EL2 = 0xE089, 268 ARM64_SYSREG_SDER32_EL3 = 0xF089, 269 ARM64_SYSREG_CPTR_EL2 = 0xE08A, 270 ARM64_SYSREG_CPTR_EL3 = 0xF08A, 271 ARM64_SYSREG_HSTR_EL2 = 0xE08B, 272 ARM64_SYSREG_HACR_EL2 = 0xE08F, 273 ARM64_SYSREG_MDCR_EL3 = 0xF099, 274 ARM64_SYSREG_TTBR0_EL1 = 0xC100, 275 ARM64_SYSREG_TTBR0_EL2 = 0xE100, 276 ARM64_SYSREG_TTBR0_EL3 = 0xF100, 277 ARM64_SYSREG_TTBR1_EL1 = 0xC101, 278 ARM64_SYSREG_TCR_EL1 = 0xC102, 279 ARM64_SYSREG_TCR_EL2 = 0xE102, 280 ARM64_SYSREG_TCR_EL3 = 0xF102, 281 ARM64_SYSREG_VTTBR_EL2 = 0xE108, 282 ARM64_SYSREG_VTCR_EL2 = 0xE10A, 283 ARM64_SYSREG_DACR32_EL2 = 0xE180, 284 ARM64_SYSREG_SPSR_EL1 = 0xC200, 285 ARM64_SYSREG_SPSR_EL2 = 0xE200, 286 ARM64_SYSREG_SPSR_EL3 = 0xF200, 287 ARM64_SYSREG_ELR_EL1 = 0xC201, 288 ARM64_SYSREG_ELR_EL2 = 0xE201, 289 ARM64_SYSREG_ELR_EL3 = 0xF201, 290 ARM64_SYSREG_SP_EL0 = 0xC208, 291 ARM64_SYSREG_SP_EL1 = 0xE208, 292 ARM64_SYSREG_SP_EL2 = 0xF208, 293 ARM64_SYSREG_SPSEL = 0xC210, 294 ARM64_SYSREG_NZCV = 0xDA10, 295 ARM64_SYSREG_DAIF = 0xDA11, 296 ARM64_SYSREG_CURRENTEL = 0xC212, 297 ARM64_SYSREG_SPSR_IRQ = 0xE218, 298 ARM64_SYSREG_SPSR_ABT = 0xE219, 299 ARM64_SYSREG_SPSR_UND = 0xE21A, 300 ARM64_SYSREG_SPSR_FIQ = 0xE21B, 301 ARM64_SYSREG_FPCR = 0xDA20, 302 ARM64_SYSREG_FPSR = 0xDA21, 303 ARM64_SYSREG_DSPSR_EL0 = 0xDA28, 304 ARM64_SYSREG_DLR_EL0 = 0xDA29, 305 ARM64_SYSREG_IFSR32_EL2 = 0xE281, 306 ARM64_SYSREG_AFSR0_EL1 = 0xC288, 307 ARM64_SYSREG_AFSR0_EL2 = 0xE288, 308 ARM64_SYSREG_AFSR0_EL3 = 0xF288, 309 ARM64_SYSREG_AFSR1_EL1 = 0xC289, 310 ARM64_SYSREG_AFSR1_EL2 = 0xE289, 311 ARM64_SYSREG_AFSR1_EL3 = 0xF289, 312 ARM64_SYSREG_ESR_EL1 = 0xC290, 313 ARM64_SYSREG_ESR_EL2 = 0xE290, 314 ARM64_SYSREG_ESR_EL3 = 0xF290, 315 ARM64_SYSREG_FPEXC32_EL2 = 0xE298, 316 ARM64_SYSREG_FAR_EL1 = 0xC300, 317 ARM64_SYSREG_FAR_EL2 = 0xE300, 318 ARM64_SYSREG_FAR_EL3 = 0xF300, 319 ARM64_SYSREG_HPFAR_EL2 = 0xE304, 320 ARM64_SYSREG_PAR_EL1 = 0xC3A0, 321 ARM64_SYSREG_PMCR_EL0 = 0xDCE0, 322 ARM64_SYSREG_PMCNTENSET_EL0 = 0xDCE1, 323 ARM64_SYSREG_PMCNTENCLR_EL0 = 0xDCE2, 324 ARM64_SYSREG_PMOVSCLR_EL0 = 0xDCE3, 325 ARM64_SYSREG_PMSELR_EL0 = 0xDCE5, 326 ARM64_SYSREG_PMCCNTR_EL0 = 0xDCE8, 327 ARM64_SYSREG_PMXEVTYPER_EL0 = 0xDCE9, 328 ARM64_SYSREG_PMXEVCNTR_EL0 = 0xDCEA, 329 ARM64_SYSREG_PMUSERENR_EL0 = 0xDCF0, 330 ARM64_SYSREG_PMINTENSET_EL1 = 0xC4F1, 331 ARM64_SYSREG_PMINTENCLR_EL1 = 0xC4F2, 332 ARM64_SYSREG_PMOVSSET_EL0 = 0xDCF3, 333 ARM64_SYSREG_MAIR_EL1 = 0xC510, 334 ARM64_SYSREG_MAIR_EL2 = 0xE510, 335 ARM64_SYSREG_MAIR_EL3 = 0xF510, 336 ARM64_SYSREG_AMAIR_EL1 = 0xC518, 337 ARM64_SYSREG_AMAIR_EL2 = 0xE518, 338 ARM64_SYSREG_AMAIR_EL3 = 0xF518, 339 ARM64_SYSREG_VBAR_EL1 = 0xC600, 340 ARM64_SYSREG_VBAR_EL2 = 0xE600, 341 ARM64_SYSREG_VBAR_EL3 = 0xF600, 342 ARM64_SYSREG_RMR_EL1 = 0xC602, 343 ARM64_SYSREG_RMR_EL2 = 0xE602, 344 ARM64_SYSREG_RMR_EL3 = 0xF602, 345 ARM64_SYSREG_CONTEXTIDR_EL1 = 0xC681, 346 ARM64_SYSREG_TPIDR_EL0 = 0xDE82, 347 ARM64_SYSREG_TPIDR_EL2 = 0xE682, 348 ARM64_SYSREG_TPIDR_EL3 = 0xF682, 349 ARM64_SYSREG_TPIDRRO_EL0 = 0xDE83, 350 ARM64_SYSREG_TPIDR_EL1 = 0xC684, 351 ARM64_SYSREG_CNTFRQ_EL0 = 0xDF00, 352 ARM64_SYSREG_CNTVOFF_EL2 = 0xE703, 353 ARM64_SYSREG_CNTKCTL_EL1 = 0xC708, 354 ARM64_SYSREG_CNTHCTL_EL2 = 0xE708, 355 ARM64_SYSREG_CNTP_TVAL_EL0 = 0xDF10, 356 ARM64_SYSREG_CNTHP_TVAL_EL2 = 0xE710, 357 ARM64_SYSREG_CNTPS_TVAL_EL1 = 0xFF10, 358 ARM64_SYSREG_CNTP_CTL_EL0 = 0xDF11, 359 ARM64_SYSREG_CNTHP_CTL_EL2 = 0xE711, 360 ARM64_SYSREG_CNTPS_CTL_EL1 = 0xFF11, 361 ARM64_SYSREG_CNTP_CVAL_EL0 = 0xDF12, 362 ARM64_SYSREG_CNTHP_CVAL_EL2 = 0xE712, 363 ARM64_SYSREG_CNTPS_CVAL_EL1 = 0xFF12, 364 ARM64_SYSREG_CNTV_TVAL_EL0 = 0xDF18, 365 ARM64_SYSREG_CNTV_CTL_EL0 = 0xDF19, 366 ARM64_SYSREG_CNTV_CVAL_EL0 = 0xDF1A, 367 ARM64_SYSREG_PMEVCNTR0_EL0 = 0xDF40, 368 ARM64_SYSREG_PMEVCNTR1_EL0 = 0xDF41, 369 ARM64_SYSREG_PMEVCNTR2_EL0 = 0xDF42, 370 ARM64_SYSREG_PMEVCNTR3_EL0 = 0xDF43, 371 ARM64_SYSREG_PMEVCNTR4_EL0 = 0xDF44, 372 ARM64_SYSREG_PMEVCNTR5_EL0 = 0xDF45, 373 ARM64_SYSREG_PMEVCNTR6_EL0 = 0xDF46, 374 ARM64_SYSREG_PMEVCNTR7_EL0 = 0xDF47, 375 ARM64_SYSREG_PMEVCNTR8_EL0 = 0xDF48, 376 ARM64_SYSREG_PMEVCNTR9_EL0 = 0xDF49, 377 ARM64_SYSREG_PMEVCNTR10_EL0 = 0xDF4A, 378 ARM64_SYSREG_PMEVCNTR11_EL0 = 0xDF4B, 379 ARM64_SYSREG_PMEVCNTR12_EL0 = 0xDF4C, 380 ARM64_SYSREG_PMEVCNTR13_EL0 = 0xDF4D, 381 ARM64_SYSREG_PMEVCNTR14_EL0 = 0xDF4E, 382 ARM64_SYSREG_PMEVCNTR15_EL0 = 0xDF4F, 383 ARM64_SYSREG_PMEVCNTR16_EL0 = 0xDF50, 384 ARM64_SYSREG_PMEVCNTR17_EL0 = 0xDF51, 385 ARM64_SYSREG_PMEVCNTR18_EL0 = 0xDF52, 386 ARM64_SYSREG_PMEVCNTR19_EL0 = 0xDF53, 387 ARM64_SYSREG_PMEVCNTR20_EL0 = 0xDF54, 388 ARM64_SYSREG_PMEVCNTR21_EL0 = 0xDF55, 389 ARM64_SYSREG_PMEVCNTR22_EL0 = 0xDF56, 390 ARM64_SYSREG_PMEVCNTR23_EL0 = 0xDF57, 391 ARM64_SYSREG_PMEVCNTR24_EL0 = 0xDF58, 392 ARM64_SYSREG_PMEVCNTR25_EL0 = 0xDF59, 393 ARM64_SYSREG_PMEVCNTR26_EL0 = 0xDF5A, 394 ARM64_SYSREG_PMEVCNTR27_EL0 = 0xDF5B, 395 ARM64_SYSREG_PMEVCNTR28_EL0 = 0xDF5C, 396 ARM64_SYSREG_PMEVCNTR29_EL0 = 0xDF5D, 397 ARM64_SYSREG_PMEVCNTR30_EL0 = 0xDF5E, 398 ARM64_SYSREG_PMCCFILTR_EL0 = 0xDF7F, 399 ARM64_SYSREG_PMEVTYPER0_EL0 = 0xDF60, 400 ARM64_SYSREG_PMEVTYPER1_EL0 = 0xDF61, 401 ARM64_SYSREG_PMEVTYPER2_EL0 = 0xDF62, 402 ARM64_SYSREG_PMEVTYPER3_EL0 = 0xDF63, 403 ARM64_SYSREG_PMEVTYPER4_EL0 = 0xDF64, 404 ARM64_SYSREG_PMEVTYPER5_EL0 = 0xDF65, 405 ARM64_SYSREG_PMEVTYPER6_EL0 = 0xDF66, 406 ARM64_SYSREG_PMEVTYPER7_EL0 = 0xDF67, 407 ARM64_SYSREG_PMEVTYPER8_EL0 = 0xDF68, 408 ARM64_SYSREG_PMEVTYPER9_EL0 = 0xDF69, 409 ARM64_SYSREG_PMEVTYPER10_EL0 = 0xDF6A, 410 ARM64_SYSREG_PMEVTYPER11_EL0 = 0xDF6B, 411 ARM64_SYSREG_PMEVTYPER12_EL0 = 0xDF6C, 412 ARM64_SYSREG_PMEVTYPER13_EL0 = 0xDF6D, 413 ARM64_SYSREG_PMEVTYPER14_EL0 = 0xDF6E, 414 ARM64_SYSREG_PMEVTYPER15_EL0 = 0xDF6F, 415 ARM64_SYSREG_PMEVTYPER16_EL0 = 0xDF70, 416 ARM64_SYSREG_PMEVTYPER17_EL0 = 0xDF71, 417 ARM64_SYSREG_PMEVTYPER18_EL0 = 0xDF72, 418 ARM64_SYSREG_PMEVTYPER19_EL0 = 0xDF73, 419 ARM64_SYSREG_PMEVTYPER20_EL0 = 0xDF74, 420 ARM64_SYSREG_PMEVTYPER21_EL0 = 0xDF75, 421 ARM64_SYSREG_PMEVTYPER22_EL0 = 0xDF76, 422 ARM64_SYSREG_PMEVTYPER23_EL0 = 0xDF77, 423 ARM64_SYSREG_PMEVTYPER24_EL0 = 0xDF78, 424 ARM64_SYSREG_PMEVTYPER25_EL0 = 0xDF79, 425 ARM64_SYSREG_PMEVTYPER26_EL0 = 0xDF7A, 426 ARM64_SYSREG_PMEVTYPER27_EL0 = 0xDF7B, 427 ARM64_SYSREG_PMEVTYPER28_EL0 = 0xDF7C, 428 ARM64_SYSREG_PMEVTYPER29_EL0 = 0xDF7D, 429 ARM64_SYSREG_PMEVTYPER30_EL0 = 0xDF7E, 430 ARM64_SYSREG_TRCPRGCTLR = 0x8808, 431 ARM64_SYSREG_TRCPROCSELR = 0x8810, 432 ARM64_SYSREG_TRCCONFIGR = 0x8820, 433 ARM64_SYSREG_TRCAUXCTLR = 0x8830, 434 ARM64_SYSREG_TRCEVENTCTL0R = 0x8840, 435 ARM64_SYSREG_TRCEVENTCTL1R = 0x8848, 436 ARM64_SYSREG_TRCSTALLCTLR = 0x8858, 437 ARM64_SYSREG_TRCTSCTLR = 0x8860, 438 ARM64_SYSREG_TRCSYNCPR = 0x8868, 439 ARM64_SYSREG_TRCCCCTLR = 0x8870, 440 ARM64_SYSREG_TRCBBCTLR = 0x8878, 441 ARM64_SYSREG_TRCTRACEIDR = 0x8801, 442 ARM64_SYSREG_TRCQCTLR = 0x8809, 443 ARM64_SYSREG_TRCVICTLR = 0x8802, 444 ARM64_SYSREG_TRCVIIECTLR = 0x880A, 445 ARM64_SYSREG_TRCVISSCTLR = 0x8812, 446 ARM64_SYSREG_TRCVIPCSSCTLR = 0x881A, 447 ARM64_SYSREG_TRCVDCTLR = 0x8842, 448 ARM64_SYSREG_TRCVDSACCTLR = 0x884A, 449 ARM64_SYSREG_TRCVDARCCTLR = 0x8852, 450 ARM64_SYSREG_TRCSEQEVR0 = 0x8804, 451 ARM64_SYSREG_TRCSEQEVR1 = 0x880C, 452 ARM64_SYSREG_TRCSEQEVR2 = 0x8814, 453 ARM64_SYSREG_TRCSEQRSTEVR = 0x8834, 454 ARM64_SYSREG_TRCSEQSTR = 0x883C, 455 ARM64_SYSREG_TRCEXTINSELR = 0x8844, 456 ARM64_SYSREG_TRCCNTRLDVR0 = 0x8805, 457 ARM64_SYSREG_TRCCNTRLDVR1 = 0x880D, 458 ARM64_SYSREG_TRCCNTRLDVR2 = 0x8815, 459 ARM64_SYSREG_TRCCNTRLDVR3 = 0x881D, 460 ARM64_SYSREG_TRCCNTCTLR0 = 0x8825, 461 ARM64_SYSREG_TRCCNTCTLR1 = 0x882D, 462 ARM64_SYSREG_TRCCNTCTLR2 = 0x8835, 463 ARM64_SYSREG_TRCCNTCTLR3 = 0x883D, 464 ARM64_SYSREG_TRCCNTVR0 = 0x8845, 465 ARM64_SYSREG_TRCCNTVR1 = 0x884D, 466 ARM64_SYSREG_TRCCNTVR2 = 0x8855, 467 ARM64_SYSREG_TRCCNTVR3 = 0x885D, 468 ARM64_SYSREG_TRCIMSPEC0 = 0x8807, 469 ARM64_SYSREG_TRCIMSPEC1 = 0x880F, 470 ARM64_SYSREG_TRCIMSPEC2 = 0x8817, 471 ARM64_SYSREG_TRCIMSPEC3 = 0x881F, 472 ARM64_SYSREG_TRCIMSPEC4 = 0x8827, 473 ARM64_SYSREG_TRCIMSPEC5 = 0x882F, 474 ARM64_SYSREG_TRCIMSPEC6 = 0x8837, 475 ARM64_SYSREG_TRCIMSPEC7 = 0x883F, 476 ARM64_SYSREG_TRCRSCTLR2 = 0x8890, 477 ARM64_SYSREG_TRCRSCTLR3 = 0x8898, 478 ARM64_SYSREG_TRCRSCTLR4 = 0x88A0, 479 ARM64_SYSREG_TRCRSCTLR5 = 0x88A8, 480 ARM64_SYSREG_TRCRSCTLR6 = 0x88B0, 481 ARM64_SYSREG_TRCRSCTLR7 = 0x88B8, 482 ARM64_SYSREG_TRCRSCTLR8 = 0x88C0, 483 ARM64_SYSREG_TRCRSCTLR9 = 0x88C8, 484 ARM64_SYSREG_TRCRSCTLR10 = 0x88D0, 485 ARM64_SYSREG_TRCRSCTLR11 = 0x88D8, 486 ARM64_SYSREG_TRCRSCTLR12 = 0x88E0, 487 ARM64_SYSREG_TRCRSCTLR13 = 0x88E8, 488 ARM64_SYSREG_TRCRSCTLR14 = 0x88F0, 489 ARM64_SYSREG_TRCRSCTLR15 = 0x88F8, 490 ARM64_SYSREG_TRCRSCTLR16 = 0x8881, 491 ARM64_SYSREG_TRCRSCTLR17 = 0x8889, 492 ARM64_SYSREG_TRCRSCTLR18 = 0x8891, 493 ARM64_SYSREG_TRCRSCTLR19 = 0x8899, 494 ARM64_SYSREG_TRCRSCTLR20 = 0x88A1, 495 ARM64_SYSREG_TRCRSCTLR21 = 0x88A9, 496 ARM64_SYSREG_TRCRSCTLR22 = 0x88B1, 497 ARM64_SYSREG_TRCRSCTLR23 = 0x88B9, 498 ARM64_SYSREG_TRCRSCTLR24 = 0x88C1, 499 ARM64_SYSREG_TRCRSCTLR25 = 0x88C9, 500 ARM64_SYSREG_TRCRSCTLR26 = 0x88D1, 501 ARM64_SYSREG_TRCRSCTLR27 = 0x88D9, 502 ARM64_SYSREG_TRCRSCTLR28 = 0x88E1, 503 ARM64_SYSREG_TRCRSCTLR29 = 0x88E9, 504 ARM64_SYSREG_TRCRSCTLR30 = 0x88F1, 505 ARM64_SYSREG_TRCRSCTLR31 = 0x88F9, 506 ARM64_SYSREG_TRCSSCCR0 = 0x8882, 507 ARM64_SYSREG_TRCSSCCR1 = 0x888A, 508 ARM64_SYSREG_TRCSSCCR2 = 0x8892, 509 ARM64_SYSREG_TRCSSCCR3 = 0x889A, 510 ARM64_SYSREG_TRCSSCCR4 = 0x88A2, 511 ARM64_SYSREG_TRCSSCCR5 = 0x88AA, 512 ARM64_SYSREG_TRCSSCCR6 = 0x88B2, 513 ARM64_SYSREG_TRCSSCCR7 = 0x88BA, 514 ARM64_SYSREG_TRCSSCSR0 = 0x88C2, 515 ARM64_SYSREG_TRCSSCSR1 = 0x88CA, 516 ARM64_SYSREG_TRCSSCSR2 = 0x88D2, 517 ARM64_SYSREG_TRCSSCSR3 = 0x88DA, 518 ARM64_SYSREG_TRCSSCSR4 = 0x88E2, 519 ARM64_SYSREG_TRCSSCSR5 = 0x88EA, 520 ARM64_SYSREG_TRCSSCSR6 = 0x88F2, 521 ARM64_SYSREG_TRCSSCSR7 = 0x88FA, 522 ARM64_SYSREG_TRCSSPCICR0 = 0x8883, 523 ARM64_SYSREG_TRCSSPCICR1 = 0x888B, 524 ARM64_SYSREG_TRCSSPCICR2 = 0x8893, 525 ARM64_SYSREG_TRCSSPCICR3 = 0x889B, 526 ARM64_SYSREG_TRCSSPCICR4 = 0x88A3, 527 ARM64_SYSREG_TRCSSPCICR5 = 0x88AB, 528 ARM64_SYSREG_TRCSSPCICR6 = 0x88B3, 529 ARM64_SYSREG_TRCSSPCICR7 = 0x88BB, 530 ARM64_SYSREG_TRCPDCR = 0x88A4, 531 ARM64_SYSREG_TRCACVR0 = 0x8900, 532 ARM64_SYSREG_TRCACVR1 = 0x8910, 533 ARM64_SYSREG_TRCACVR2 = 0x8920, 534 ARM64_SYSREG_TRCACVR3 = 0x8930, 535 ARM64_SYSREG_TRCACVR4 = 0x8940, 536 ARM64_SYSREG_TRCACVR5 = 0x8950, 537 ARM64_SYSREG_TRCACVR6 = 0x8960, 538 ARM64_SYSREG_TRCACVR7 = 0x8970, 539 ARM64_SYSREG_TRCACVR8 = 0x8901, 540 ARM64_SYSREG_TRCACVR9 = 0x8911, 541 ARM64_SYSREG_TRCACVR10 = 0x8921, 542 ARM64_SYSREG_TRCACVR11 = 0x8931, 543 ARM64_SYSREG_TRCACVR12 = 0x8941, 544 ARM64_SYSREG_TRCACVR13 = 0x8951, 545 ARM64_SYSREG_TRCACVR14 = 0x8961, 546 ARM64_SYSREG_TRCACVR15 = 0x8971, 547 ARM64_SYSREG_TRCACATR0 = 0x8902, 548 ARM64_SYSREG_TRCACATR1 = 0x8912, 549 ARM64_SYSREG_TRCACATR2 = 0x8922, 550 ARM64_SYSREG_TRCACATR3 = 0x8932, 551 ARM64_SYSREG_TRCACATR4 = 0x8942, 552 ARM64_SYSREG_TRCACATR5 = 0x8952, 553 ARM64_SYSREG_TRCACATR6 = 0x8962, 554 ARM64_SYSREG_TRCACATR7 = 0x8972, 555 ARM64_SYSREG_TRCACATR8 = 0x8903, 556 ARM64_SYSREG_TRCACATR9 = 0x8913, 557 ARM64_SYSREG_TRCACATR10 = 0x8923, 558 ARM64_SYSREG_TRCACATR11 = 0x8933, 559 ARM64_SYSREG_TRCACATR12 = 0x8943, 560 ARM64_SYSREG_TRCACATR13 = 0x8953, 561 ARM64_SYSREG_TRCACATR14 = 0x8963, 562 ARM64_SYSREG_TRCACATR15 = 0x8973, 563 ARM64_SYSREG_TRCDVCVR0 = 0x8904, 564 ARM64_SYSREG_TRCDVCVR1 = 0x8924, 565 ARM64_SYSREG_TRCDVCVR2 = 0x8944, 566 ARM64_SYSREG_TRCDVCVR3 = 0x8964, 567 ARM64_SYSREG_TRCDVCVR4 = 0x8905, 568 ARM64_SYSREG_TRCDVCVR5 = 0x8925, 569 ARM64_SYSREG_TRCDVCVR6 = 0x8945, 570 ARM64_SYSREG_TRCDVCVR7 = 0x8965, 571 ARM64_SYSREG_TRCDVCMR0 = 0x8906, 572 ARM64_SYSREG_TRCDVCMR1 = 0x8926, 573 ARM64_SYSREG_TRCDVCMR2 = 0x8946, 574 ARM64_SYSREG_TRCDVCMR3 = 0x8966, 575 ARM64_SYSREG_TRCDVCMR4 = 0x8907, 576 ARM64_SYSREG_TRCDVCMR5 = 0x8927, 577 ARM64_SYSREG_TRCDVCMR6 = 0x8947, 578 ARM64_SYSREG_TRCDVCMR7 = 0x8967, 579 ARM64_SYSREG_TRCCIDCVR0 = 0x8980, 580 ARM64_SYSREG_TRCCIDCVR1 = 0x8990, 581 ARM64_SYSREG_TRCCIDCVR2 = 0x89A0, 582 ARM64_SYSREG_TRCCIDCVR3 = 0x89B0, 583 ARM64_SYSREG_TRCCIDCVR4 = 0x89C0, 584 ARM64_SYSREG_TRCCIDCVR5 = 0x89D0, 585 ARM64_SYSREG_TRCCIDCVR6 = 0x89E0, 586 ARM64_SYSREG_TRCCIDCVR7 = 0x89F0, 587 ARM64_SYSREG_TRCVMIDCVR0 = 0x8981, 588 ARM64_SYSREG_TRCVMIDCVR1 = 0x8991, 589 ARM64_SYSREG_TRCVMIDCVR2 = 0x89A1, 590 ARM64_SYSREG_TRCVMIDCVR3 = 0x89B1, 591 ARM64_SYSREG_TRCVMIDCVR4 = 0x89C1, 592 ARM64_SYSREG_TRCVMIDCVR5 = 0x89D1, 593 ARM64_SYSREG_TRCVMIDCVR6 = 0x89E1, 594 ARM64_SYSREG_TRCVMIDCVR7 = 0x89F1, 595 ARM64_SYSREG_TRCCIDCCTLR0 = 0x8982, 596 ARM64_SYSREG_TRCCIDCCTLR1 = 0x898A, 597 ARM64_SYSREG_TRCVMIDCCTLR0 = 0x8992, 598 ARM64_SYSREG_TRCVMIDCCTLR1 = 0x899A, 599 ARM64_SYSREG_TRCITCTRL = 0x8B84, 600 ARM64_SYSREG_TRCCLAIMSET = 0x8BC6, 601 ARM64_SYSREG_TRCCLAIMCLR = 0x8BCE, 602 ARM64_SYSREG_ICC_BPR1_EL1 = 0xC663, 603 ARM64_SYSREG_ICC_BPR0_EL1 = 0xC643, 604 ARM64_SYSREG_ICC_PMR_EL1 = 0xC230, 605 ARM64_SYSREG_ICC_CTLR_EL1 = 0xC664, 606 ARM64_SYSREG_ICC_CTLR_EL3 = 0xF664, 607 ARM64_SYSREG_ICC_SRE_EL1 = 0xC665, 608 ARM64_SYSREG_ICC_SRE_EL2 = 0xE64D, 609 ARM64_SYSREG_ICC_SRE_EL3 = 0xF665, 610 ARM64_SYSREG_ICC_IGRPEN0_EL1 = 0xC666, 611 ARM64_SYSREG_ICC_IGRPEN1_EL1 = 0xC667, 612 ARM64_SYSREG_ICC_IGRPEN1_EL3 = 0xF667, 613 ARM64_SYSREG_ICC_SEIEN_EL1 = 0xC668, 614 ARM64_SYSREG_ICC_AP0R0_EL1 = 0xC644, 615 ARM64_SYSREG_ICC_AP0R1_EL1 = 0xC645, 616 ARM64_SYSREG_ICC_AP0R2_EL1 = 0xC646, 617 ARM64_SYSREG_ICC_AP0R3_EL1 = 0xC647, 618 ARM64_SYSREG_ICC_AP1R0_EL1 = 0xC648, 619 ARM64_SYSREG_ICC_AP1R1_EL1 = 0xC649, 620 ARM64_SYSREG_ICC_AP1R2_EL1 = 0xC64A, 621 ARM64_SYSREG_ICC_AP1R3_EL1 = 0xC64B, 622 ARM64_SYSREG_ICH_AP0R0_EL2 = 0xE640, 623 ARM64_SYSREG_ICH_AP0R1_EL2 = 0xE641, 624 ARM64_SYSREG_ICH_AP0R2_EL2 = 0xE642, 625 ARM64_SYSREG_ICH_AP0R3_EL2 = 0xE643, 626 ARM64_SYSREG_ICH_AP1R0_EL2 = 0xE648, 627 ARM64_SYSREG_ICH_AP1R1_EL2 = 0xE649, 628 ARM64_SYSREG_ICH_AP1R2_EL2 = 0xE64A, 629 ARM64_SYSREG_ICH_AP1R3_EL2 = 0xE64B, 630 ARM64_SYSREG_ICH_HCR_EL2 = 0xE658, 631 ARM64_SYSREG_ICH_MISR_EL2 = 0xE65A, 632 ARM64_SYSREG_ICH_VMCR_EL2 = 0xE65F, 633 ARM64_SYSREG_ICH_VSEIR_EL2 = 0xE64C, 634 ARM64_SYSREG_ICH_LR0_EL2 = 0xE660, 635 ARM64_SYSREG_ICH_LR1_EL2 = 0xE661, 636 ARM64_SYSREG_ICH_LR2_EL2 = 0xE662, 637 ARM64_SYSREG_ICH_LR3_EL2 = 0xE663, 638 ARM64_SYSREG_ICH_LR4_EL2 = 0xE664, 639 ARM64_SYSREG_ICH_LR5_EL2 = 0xE665, 640 ARM64_SYSREG_ICH_LR6_EL2 = 0xE666, 641 ARM64_SYSREG_ICH_LR7_EL2 = 0xE667, 642 ARM64_SYSREG_ICH_LR8_EL2 = 0xE668, 643 ARM64_SYSREG_ICH_LR9_EL2 = 0xE669, 644 ARM64_SYSREG_ICH_LR10_EL2 = 0xE66A, 645 ARM64_SYSREG_ICH_LR11_EL2 = 0xE66B, 646 ARM64_SYSREG_ICH_LR12_EL2 = 0xE66C, 647 ARM64_SYSREG_ICH_LR13_EL2 = 0xE66D, 648 ARM64_SYSREG_ICH_LR14_EL2 = 0xE66E, 649 ARM64_SYSREG_ICH_LR15_EL2 = 0xE66F, 650 ARM64_SYSREG_PAN = 0xC213, 651 ARM64_SYSREG_LORSA_EL1 = 0xC520, 652 ARM64_SYSREG_LOREA_EL1 = 0xC521, 653 ARM64_SYSREG_LORN_EL1 = 0xC522, 654 ARM64_SYSREG_LORC_EL1 = 0xC523, 655 ARM64_SYSREG_TTBR1_EL2 = 0xE101, 656 ARM64_SYSREG_CONTEXTIDR_EL2 = 0xE681, 657 ARM64_SYSREG_CNTHV_TVAL_EL2 = 0xE718, 658 ARM64_SYSREG_CNTHV_CVAL_EL2 = 0xE71A, 659 ARM64_SYSREG_CNTHV_CTL_EL2 = 0xE719, 660 ARM64_SYSREG_SCTLR_EL12 = 0xE880, 661 ARM64_SYSREG_CPACR_EL12 = 0xE882, 662 ARM64_SYSREG_TTBR0_EL12 = 0xE900, 663 ARM64_SYSREG_TTBR1_EL12 = 0xE901, 664 ARM64_SYSREG_TCR_EL12 = 0xE902, 665 ARM64_SYSREG_AFSR0_EL12 = 0xEA88, 666 ARM64_SYSREG_AFSR1_EL12 = 0xEA89, 667 ARM64_SYSREG_ESR_EL12 = 0xEA90, 668 ARM64_SYSREG_FAR_EL12 = 0xEB00, 669 ARM64_SYSREG_MAIR_EL12 = 0xED10, 670 ARM64_SYSREG_AMAIR_EL12 = 0xED18, 671 ARM64_SYSREG_VBAR_EL12 = 0xEE00, 672 ARM64_SYSREG_CONTEXTIDR_EL12 = 0xEE81, 673 ARM64_SYSREG_CNTKCTL_EL12 = 0xEF08, 674 ARM64_SYSREG_CNTP_TVAL_EL02 = 0xEF10, 675 ARM64_SYSREG_CNTP_CTL_EL02 = 0xEF11, 676 ARM64_SYSREG_CNTP_CVAL_EL02 = 0xEF12, 677 ARM64_SYSREG_CNTV_TVAL_EL02 = 0xEF18, 678 ARM64_SYSREG_CNTV_CTL_EL02 = 0xEF19, 679 ARM64_SYSREG_CNTV_CVAL_EL02 = 0xEF1A, 680 ARM64_SYSREG_SPSR_EL12 = 0xEA00, 681 ARM64_SYSREG_ELR_EL12 = 0xEA01, 682 ARM64_SYSREG_UAO = 0xC214, 683 ARM64_SYSREG_PMBLIMITR_EL1 = 0xC4D0, 684 ARM64_SYSREG_PMBPTR_EL1 = 0xC4D1, 685 ARM64_SYSREG_PMBSR_EL1 = 0xC4D3, 686 ARM64_SYSREG_PMBIDR_EL1 = 0xC4D7, 687 ARM64_SYSREG_PMSCR_EL2 = 0xE4C8, 688 ARM64_SYSREG_PMSCR_EL12 = 0xECC8, 689 ARM64_SYSREG_PMSCR_EL1 = 0xC4C8, 690 ARM64_SYSREG_PMSICR_EL1 = 0xC4CA, 691 ARM64_SYSREG_PMSIRR_EL1 = 0xC4CB, 692 ARM64_SYSREG_PMSFCR_EL1 = 0xC4CC, 693 ARM64_SYSREG_PMSEVFR_EL1 = 0xC4CD, 694 ARM64_SYSREG_PMSLATFR_EL1 = 0xC4CE, 695 ARM64_SYSREG_PMSIDR_EL1 = 0xC4CF, 696 ARM64_SYSREG_ERRSELR_EL1 = 0xC299, 697 ARM64_SYSREG_ERXCTLR_EL1 = 0xC2A1, 698 ARM64_SYSREG_ERXSTATUS_EL1 = 0xC2A2, 699 ARM64_SYSREG_ERXADDR_EL1 = 0xC2A3, 700 ARM64_SYSREG_ERXMISC0_EL1 = 0xC2A8, 701 ARM64_SYSREG_ERXMISC1_EL1 = 0xC2A9, 702 ARM64_SYSREG_DISR_EL1 = 0xC609, 703 ARM64_SYSREG_VDISR_EL2 = 0xE609, 704 ARM64_SYSREG_VSESR_EL2 = 0xE293, 705 ARM64_SYSREG_APIAKEYLO_EL1 = 0xC108, 706 ARM64_SYSREG_APIAKEYHI_EL1 = 0xC109, 707 ARM64_SYSREG_APIBKEYLO_EL1 = 0xC10A, 708 ARM64_SYSREG_APIBKEYHI_EL1 = 0xC10B, 709 ARM64_SYSREG_APDAKEYLO_EL1 = 0xC110, 710 ARM64_SYSREG_APDAKEYHI_EL1 = 0xC111, 711 ARM64_SYSREG_APDBKEYLO_EL1 = 0xC112, 712 ARM64_SYSREG_APDBKEYHI_EL1 = 0xC113, 713 ARM64_SYSREG_APGAKEYLO_EL1 = 0xC118, 714 ARM64_SYSREG_APGAKEYHI_EL1 = 0xC119, 715 ARM64_SYSREG_VSTCR_EL2 = 0xE132, 716 ARM64_SYSREG_VSTTBR_EL2 = 0xE130, 717 ARM64_SYSREG_CNTHVS_TVAL_EL2 = 0xE720, 718 ARM64_SYSREG_CNTHVS_CVAL_EL2 = 0xE722, 719 ARM64_SYSREG_CNTHVS_CTL_EL2 = 0xE721, 720 ARM64_SYSREG_CNTHPS_TVAL_EL2 = 0xE728, 721 ARM64_SYSREG_CNTHPS_CVAL_EL2 = 0xE72A, 722 ARM64_SYSREG_CNTHPS_CTL_EL2 = 0xE729, 723 ARM64_SYSREG_SDER32_EL2 = 0xE099, 724 ARM64_SYSREG_ERXPFGCTL_EL1 = 0xC2A5, 725 ARM64_SYSREG_ERXPFGCDN_EL1 = 0xC2A6, 726 ARM64_SYSREG_ERXTS_EL1 = 0xC2AF, 727 ARM64_SYSREG_ERXMISC2_EL1 = 0xC2AA, 728 ARM64_SYSREG_ERXMISC3_EL1 = 0xC2AB, 729 ARM64_SYSREG_ERXPFGF_EL1 = 0xC2A4, 730 ARM64_SYSREG_MPAM0_EL1 = 0xC529, 731 ARM64_SYSREG_MPAM1_EL1 = 0xC528, 732 ARM64_SYSREG_MPAM2_EL2 = 0xE528, 733 ARM64_SYSREG_MPAM3_EL3 = 0xF528, 734 ARM64_SYSREG_MPAM1_EL12 = 0xED28, 735 ARM64_SYSREG_MPAMHCR_EL2 = 0xE520, 736 ARM64_SYSREG_MPAMVPMV_EL2 = 0xE521, 737 ARM64_SYSREG_MPAMVPM0_EL2 = 0xE530, 738 ARM64_SYSREG_MPAMVPM1_EL2 = 0xE531, 739 ARM64_SYSREG_MPAMVPM2_EL2 = 0xE532, 740 ARM64_SYSREG_MPAMVPM3_EL2 = 0xE533, 741 ARM64_SYSREG_MPAMVPM4_EL2 = 0xE534, 742 ARM64_SYSREG_MPAMVPM5_EL2 = 0xE535, 743 ARM64_SYSREG_MPAMVPM6_EL2 = 0xE536, 744 ARM64_SYSREG_MPAMVPM7_EL2 = 0xE537, 745 ARM64_SYSREG_MPAMIDR_EL1 = 0xC524, 746 ARM64_SYSREG_AMCR_EL0 = 0xDE90, 747 ARM64_SYSREG_AMCFGR_EL0 = 0xDE91, 748 ARM64_SYSREG_AMCGCR_EL0 = 0xDE92, 749 ARM64_SYSREG_AMUSERENR_EL0 = 0xDE93, 750 ARM64_SYSREG_AMCNTENCLR0_EL0 = 0xDE94, 751 ARM64_SYSREG_AMCNTENSET0_EL0 = 0xDE95, 752 ARM64_SYSREG_AMEVCNTR00_EL0 = 0xDEA0, 753 ARM64_SYSREG_AMEVCNTR01_EL0 = 0xDEA1, 754 ARM64_SYSREG_AMEVCNTR02_EL0 = 0xDEA2, 755 ARM64_SYSREG_AMEVCNTR03_EL0 = 0xDEA3, 756 ARM64_SYSREG_AMEVTYPER00_EL0 = 0xDEB0, 757 ARM64_SYSREG_AMEVTYPER01_EL0 = 0xDEB1, 758 ARM64_SYSREG_AMEVTYPER02_EL0 = 0xDEB2, 759 ARM64_SYSREG_AMEVTYPER03_EL0 = 0xDEB3, 760 ARM64_SYSREG_AMCNTENCLR1_EL0 = 0xDE98, 761 ARM64_SYSREG_AMCNTENSET1_EL0 = 0xDE99, 762 ARM64_SYSREG_AMEVCNTR10_EL0 = 0xDEE0, 763 ARM64_SYSREG_AMEVCNTR11_EL0 = 0xDEE1, 764 ARM64_SYSREG_AMEVCNTR12_EL0 = 0xDEE2, 765 ARM64_SYSREG_AMEVCNTR13_EL0 = 0xDEE3, 766 ARM64_SYSREG_AMEVCNTR14_EL0 = 0xDEE4, 767 ARM64_SYSREG_AMEVCNTR15_EL0 = 0xDEE5, 768 ARM64_SYSREG_AMEVCNTR16_EL0 = 0xDEE6, 769 ARM64_SYSREG_AMEVCNTR17_EL0 = 0xDEE7, 770 ARM64_SYSREG_AMEVCNTR18_EL0 = 0xDEE8, 771 ARM64_SYSREG_AMEVCNTR19_EL0 = 0xDEE9, 772 ARM64_SYSREG_AMEVCNTR110_EL0 = 0xDEEA, 773 ARM64_SYSREG_AMEVCNTR111_EL0 = 0xDEEB, 774 ARM64_SYSREG_AMEVCNTR112_EL0 = 0xDEEC, 775 ARM64_SYSREG_AMEVCNTR113_EL0 = 0xDEED, 776 ARM64_SYSREG_AMEVCNTR114_EL0 = 0xDEEE, 777 ARM64_SYSREG_AMEVCNTR115_EL0 = 0xDEEF, 778 ARM64_SYSREG_AMEVTYPER10_EL0 = 0xDEF0, 779 ARM64_SYSREG_AMEVTYPER11_EL0 = 0xDEF1, 780 ARM64_SYSREG_AMEVTYPER12_EL0 = 0xDEF2, 781 ARM64_SYSREG_AMEVTYPER13_EL0 = 0xDEF3, 782 ARM64_SYSREG_AMEVTYPER14_EL0 = 0xDEF4, 783 ARM64_SYSREG_AMEVTYPER15_EL0 = 0xDEF5, 784 ARM64_SYSREG_AMEVTYPER16_EL0 = 0xDEF6, 785 ARM64_SYSREG_AMEVTYPER17_EL0 = 0xDEF7, 786 ARM64_SYSREG_AMEVTYPER18_EL0 = 0xDEF8, 787 ARM64_SYSREG_AMEVTYPER19_EL0 = 0xDEF9, 788 ARM64_SYSREG_AMEVTYPER110_EL0 = 0xDEFA, 789 ARM64_SYSREG_AMEVTYPER111_EL0 = 0xDEFB, 790 ARM64_SYSREG_AMEVTYPER112_EL0 = 0xDEFC, 791 ARM64_SYSREG_AMEVTYPER113_EL0 = 0xDEFD, 792 ARM64_SYSREG_AMEVTYPER114_EL0 = 0xDEFE, 793 ARM64_SYSREG_AMEVTYPER115_EL0 = 0xDEFF, 794 ARM64_SYSREG_TRFCR_EL1 = 0xC091, 795 ARM64_SYSREG_TRFCR_EL2 = 0xE091, 796 ARM64_SYSREG_TRFCR_EL12 = 0xE891, 797 ARM64_SYSREG_DIT = 0xDA15, 798 ARM64_SYSREG_VNCR_EL2 = 0xE110, 799 ARM64_SYSREG_ZCR_EL1 = 0xC090, 800 ARM64_SYSREG_ZCR_EL2 = 0xE090, 801 ARM64_SYSREG_ZCR_EL3 = 0xF090, 802 ARM64_SYSREG_ZCR_EL12 = 0xE890, 803 ARM64_SYSREG_CPM_IOACC_CTL_EL3 = 0xFF90, 804 } arm64_sysreg; 805 806 /// System PState Field (MSR instruction) 807 typedef enum arm64_pstate { 808 ARM64_PSTATE_INVALID = 0, 809 ARM64_PSTATE_SPSEL = 0x05, 810 ARM64_PSTATE_DAIFSET = 0x1e, 811 ARM64_PSTATE_DAIFCLR = 0x1f, 812 ARM64_PSTATE_PAN = 0x4, 813 ARM64_PSTATE_UAO = 0x3, 814 ARM64_PSTATE_DIT = 0x1a, 815 } arm64_pstate; 816 817 /// Vector arrangement specifier (for FloatingPoint/Advanced SIMD insn) 818 typedef enum arm64_vas { 819 ARM64_VAS_INVALID = 0, 820 ARM64_VAS_16B, 821 ARM64_VAS_8B, 822 ARM64_VAS_4B, 823 ARM64_VAS_1B, 824 ARM64_VAS_8H, 825 ARM64_VAS_4H, 826 ARM64_VAS_2H, 827 ARM64_VAS_1H, 828 ARM64_VAS_4S, 829 ARM64_VAS_2S, 830 ARM64_VAS_1S, 831 ARM64_VAS_2D, 832 ARM64_VAS_1D, 833 ARM64_VAS_1Q, 834 } arm64_vas; 835 836 /// Memory barrier operands 837 typedef enum arm64_barrier_op { 838 ARM64_BARRIER_INVALID = 0, 839 ARM64_BARRIER_OSHLD = 0x1, 840 ARM64_BARRIER_OSHST = 0x2, 841 ARM64_BARRIER_OSH = 0x3, 842 ARM64_BARRIER_NSHLD = 0x5, 843 ARM64_BARRIER_NSHST = 0x6, 844 ARM64_BARRIER_NSH = 0x7, 845 ARM64_BARRIER_ISHLD = 0x9, 846 ARM64_BARRIER_ISHST = 0xa, 847 ARM64_BARRIER_ISH = 0xb, 848 ARM64_BARRIER_LD = 0xd, 849 ARM64_BARRIER_ST = 0xe, 850 ARM64_BARRIER_SY = 0xf 851 } arm64_barrier_op; 852 853 /// Operand type for instruction's operands 854 typedef enum arm64_op_type { 855 ARM64_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized). 856 ARM64_OP_REG, ///< = CS_OP_REG (Register operand). 857 ARM64_OP_IMM, ///< = CS_OP_IMM (Immediate operand). 858 ARM64_OP_MEM, ///< = CS_OP_MEM (Memory operand). 859 ARM64_OP_FP, ///< = CS_OP_FP (Floating-Point operand). 860 ARM64_OP_CIMM = 64, ///< C-Immediate 861 ARM64_OP_REG_MRS, ///< MRS register operand. 862 ARM64_OP_REG_MSR, ///< MSR register operand. 863 ARM64_OP_PSTATE, ///< PState operand. 864 ARM64_OP_SYS, ///< SYS operand for IC/DC/AT/TLBI instructions. 865 ARM64_OP_PREFETCH, ///< Prefetch operand (PRFM). 866 ARM64_OP_BARRIER, ///< Memory barrier operand (ISB/DMB/DSB instructions). 867 } arm64_op_type; 868 869 /// TLBI operations 870 typedef enum arm64_tlbi_op { 871 ARM64_TLBI_INVALID = 0, 872 873 ARM64_TLBI_IPAS2E1IS, 874 ARM64_TLBI_IPAS2LE1IS, 875 ARM64_TLBI_VMALLE1IS, 876 ARM64_TLBI_ALLE2IS, 877 ARM64_TLBI_ALLE3IS, 878 ARM64_TLBI_VAE1IS, 879 ARM64_TLBI_VAE2IS, 880 ARM64_TLBI_VAE3IS, 881 ARM64_TLBI_ASIDE1IS, 882 ARM64_TLBI_VAAE1IS, 883 ARM64_TLBI_ALLE1IS, 884 ARM64_TLBI_VALE1IS, 885 ARM64_TLBI_VALE2IS, 886 ARM64_TLBI_VALE3IS, 887 ARM64_TLBI_VMALLS12E1IS, 888 ARM64_TLBI_VAALE1IS, 889 ARM64_TLBI_IPAS2E1, 890 ARM64_TLBI_IPAS2LE1, 891 ARM64_TLBI_VMALLE1, 892 ARM64_TLBI_ALLE2, 893 ARM64_TLBI_ALLE3, 894 ARM64_TLBI_VAE1, 895 ARM64_TLBI_VAE2, 896 ARM64_TLBI_VAE3, 897 ARM64_TLBI_ASIDE1, 898 ARM64_TLBI_VAAE1, 899 ARM64_TLBI_ALLE1, 900 ARM64_TLBI_VALE1, 901 ARM64_TLBI_VALE2, 902 ARM64_TLBI_VALE3, 903 ARM64_TLBI_VMALLS12E1, 904 ARM64_TLBI_VAALE1, 905 ARM64_TLBI_VMALLE1OS, 906 ARM64_TLBI_VAE1OS, 907 ARM64_TLBI_ASIDE1OS, 908 ARM64_TLBI_VAAE1OS, 909 ARM64_TLBI_VALE1OS, 910 ARM64_TLBI_VAALE1OS, 911 ARM64_TLBI_IPAS2E1OS, 912 ARM64_TLBI_IPAS2LE1OS, 913 ARM64_TLBI_VAE2OS, 914 ARM64_TLBI_VALE2OS, 915 ARM64_TLBI_VMALLS12E1OS, 916 ARM64_TLBI_VAE3OS, 917 ARM64_TLBI_VALE3OS, 918 ARM64_TLBI_ALLE2OS, 919 ARM64_TLBI_ALLE1OS, 920 ARM64_TLBI_ALLE3OS, 921 ARM64_TLBI_RVAE1, 922 ARM64_TLBI_RVAAE1, 923 ARM64_TLBI_RVALE1, 924 ARM64_TLBI_RVAALE1, 925 ARM64_TLBI_RVAE1IS, 926 ARM64_TLBI_RVAAE1IS, 927 ARM64_TLBI_RVALE1IS, 928 ARM64_TLBI_RVAALE1IS, 929 ARM64_TLBI_RVAE1OS, 930 ARM64_TLBI_RVAAE1OS, 931 ARM64_TLBI_RVALE1OS, 932 ARM64_TLBI_RVAALE1OS, 933 ARM64_TLBI_RIPAS2E1IS, 934 ARM64_TLBI_RIPAS2LE1IS, 935 ARM64_TLBI_RIPAS2E1, 936 ARM64_TLBI_RIPAS2LE1, 937 ARM64_TLBI_RIPAS2E1OS, 938 ARM64_TLBI_RIPAS2LE1OS, 939 ARM64_TLBI_RVAE2, 940 ARM64_TLBI_RVALE2, 941 ARM64_TLBI_RVAE2IS, 942 ARM64_TLBI_RVALE2IS, 943 ARM64_TLBI_RVAE2OS, 944 ARM64_TLBI_RVALE2OS, 945 ARM64_TLBI_RVAE3, 946 ARM64_TLBI_RVALE3, 947 ARM64_TLBI_RVAE3IS, 948 ARM64_TLBI_RVALE3IS, 949 ARM64_TLBI_RVAE3OS, 950 ARM64_TLBI_RVALE3OS, 951 } arm64_tlbi_op; 952 953 /// AT operations 954 typedef enum arm64_at_op { 955 ARM64_AT_S1E1R, 956 ARM64_AT_S1E2R, 957 ARM64_AT_S1E3R, 958 ARM64_AT_S1E1W, 959 ARM64_AT_S1E2W, 960 ARM64_AT_S1E3W, 961 ARM64_AT_S1E0R, 962 ARM64_AT_S1E0W, 963 ARM64_AT_S12E1R, 964 ARM64_AT_S12E1W, 965 ARM64_AT_S12E0R, 966 ARM64_AT_S12E0W, 967 ARM64_AT_S1E1RP, 968 ARM64_AT_S1E1WP, 969 } arm64_at_op; 970 971 /// DC operations 972 typedef enum arm64_dc_op { 973 ARM64_DC_INVALID = 0, 974 ARM64_DC_ZVA, 975 ARM64_DC_IVAC, 976 ARM64_DC_ISW, 977 ARM64_DC_CVAC, 978 ARM64_DC_CSW, 979 ARM64_DC_CVAU, 980 ARM64_DC_CIVAC, 981 ARM64_DC_CISW, 982 ARM64_DC_CVAP, 983 } arm64_dc_op; 984 985 /// IC operations 986 typedef enum arm64_ic_op { 987 ARM64_IC_INVALID = 0, 988 ARM64_IC_IALLUIS, 989 ARM64_IC_IALLU, 990 ARM64_IC_IVAU, 991 } arm64_ic_op; 992 993 /// Prefetch operations (PRFM) 994 typedef enum arm64_prefetch_op { 995 ARM64_PRFM_INVALID = 0, 996 ARM64_PRFM_PLDL1KEEP = 0x00 + 1, 997 ARM64_PRFM_PLDL1STRM = 0x01 + 1, 998 ARM64_PRFM_PLDL2KEEP = 0x02 + 1, 999 ARM64_PRFM_PLDL2STRM = 0x03 + 1, 1000 ARM64_PRFM_PLDL3KEEP = 0x04 + 1, 1001 ARM64_PRFM_PLDL3STRM = 0x05 + 1, 1002 ARM64_PRFM_PLIL1KEEP = 0x08 + 1, 1003 ARM64_PRFM_PLIL1STRM = 0x09 + 1, 1004 ARM64_PRFM_PLIL2KEEP = 0x0a + 1, 1005 ARM64_PRFM_PLIL2STRM = 0x0b + 1, 1006 ARM64_PRFM_PLIL3KEEP = 0x0c + 1, 1007 ARM64_PRFM_PLIL3STRM = 0x0d + 1, 1008 ARM64_PRFM_PSTL1KEEP = 0x10 + 1, 1009 ARM64_PRFM_PSTL1STRM = 0x11 + 1, 1010 ARM64_PRFM_PSTL2KEEP = 0x12 + 1, 1011 ARM64_PRFM_PSTL2STRM = 0x13 + 1, 1012 ARM64_PRFM_PSTL3KEEP = 0x14 + 1, 1013 ARM64_PRFM_PSTL3STRM = 0x15 + 1, 1014 } arm64_prefetch_op; 1015 1016 /// ARM64 registers 1017 typedef enum arm64_reg { 1018 ARM64_REG_INVALID = 0, 1019 1020 ARM64_REG_FFR = 1, 1021 ARM64_REG_FP = 2, 1022 ARM64_REG_LR = 3, 1023 ARM64_REG_NZCV = 4, 1024 ARM64_REG_SP = 5, 1025 ARM64_REG_WSP = 6, 1026 ARM64_REG_WZR = 7, 1027 ARM64_REG_XZR = 8, 1028 ARM64_REG_B0 = 9, 1029 ARM64_REG_B1 = 10, 1030 ARM64_REG_B2 = 11, 1031 ARM64_REG_B3 = 12, 1032 ARM64_REG_B4 = 13, 1033 ARM64_REG_B5 = 14, 1034 ARM64_REG_B6 = 15, 1035 ARM64_REG_B7 = 16, 1036 ARM64_REG_B8 = 17, 1037 ARM64_REG_B9 = 18, 1038 ARM64_REG_B10 = 19, 1039 ARM64_REG_B11 = 20, 1040 ARM64_REG_B12 = 21, 1041 ARM64_REG_B13 = 22, 1042 ARM64_REG_B14 = 23, 1043 ARM64_REG_B15 = 24, 1044 ARM64_REG_B16 = 25, 1045 ARM64_REG_B17 = 26, 1046 ARM64_REG_B18 = 27, 1047 ARM64_REG_B19 = 28, 1048 ARM64_REG_B20 = 29, 1049 ARM64_REG_B21 = 30, 1050 ARM64_REG_B22 = 31, 1051 ARM64_REG_B23 = 32, 1052 ARM64_REG_B24 = 33, 1053 ARM64_REG_B25 = 34, 1054 ARM64_REG_B26 = 35, 1055 ARM64_REG_B27 = 36, 1056 ARM64_REG_B28 = 37, 1057 ARM64_REG_B29 = 38, 1058 ARM64_REG_B30 = 39, 1059 ARM64_REG_B31 = 40, 1060 ARM64_REG_D0 = 41, 1061 ARM64_REG_D1 = 42, 1062 ARM64_REG_D2 = 43, 1063 ARM64_REG_D3 = 44, 1064 ARM64_REG_D4 = 45, 1065 ARM64_REG_D5 = 46, 1066 ARM64_REG_D6 = 47, 1067 ARM64_REG_D7 = 48, 1068 ARM64_REG_D8 = 49, 1069 ARM64_REG_D9 = 50, 1070 ARM64_REG_D10 = 51, 1071 ARM64_REG_D11 = 52, 1072 ARM64_REG_D12 = 53, 1073 ARM64_REG_D13 = 54, 1074 ARM64_REG_D14 = 55, 1075 ARM64_REG_D15 = 56, 1076 ARM64_REG_D16 = 57, 1077 ARM64_REG_D17 = 58, 1078 ARM64_REG_D18 = 59, 1079 ARM64_REG_D19 = 60, 1080 ARM64_REG_D20 = 61, 1081 ARM64_REG_D21 = 62, 1082 ARM64_REG_D22 = 63, 1083 ARM64_REG_D23 = 64, 1084 ARM64_REG_D24 = 65, 1085 ARM64_REG_D25 = 66, 1086 ARM64_REG_D26 = 67, 1087 ARM64_REG_D27 = 68, 1088 ARM64_REG_D28 = 69, 1089 ARM64_REG_D29 = 70, 1090 ARM64_REG_D30 = 71, 1091 ARM64_REG_D31 = 72, 1092 ARM64_REG_H0 = 73, 1093 ARM64_REG_H1 = 74, 1094 ARM64_REG_H2 = 75, 1095 ARM64_REG_H3 = 76, 1096 ARM64_REG_H4 = 77, 1097 ARM64_REG_H5 = 78, 1098 ARM64_REG_H6 = 79, 1099 ARM64_REG_H7 = 80, 1100 ARM64_REG_H8 = 81, 1101 ARM64_REG_H9 = 82, 1102 ARM64_REG_H10 = 83, 1103 ARM64_REG_H11 = 84, 1104 ARM64_REG_H12 = 85, 1105 ARM64_REG_H13 = 86, 1106 ARM64_REG_H14 = 87, 1107 ARM64_REG_H15 = 88, 1108 ARM64_REG_H16 = 89, 1109 ARM64_REG_H17 = 90, 1110 ARM64_REG_H18 = 91, 1111 ARM64_REG_H19 = 92, 1112 ARM64_REG_H20 = 93, 1113 ARM64_REG_H21 = 94, 1114 ARM64_REG_H22 = 95, 1115 ARM64_REG_H23 = 96, 1116 ARM64_REG_H24 = 97, 1117 ARM64_REG_H25 = 98, 1118 ARM64_REG_H26 = 99, 1119 ARM64_REG_H27 = 100, 1120 ARM64_REG_H28 = 101, 1121 ARM64_REG_H29 = 102, 1122 ARM64_REG_H30 = 103, 1123 ARM64_REG_H31 = 104, 1124 ARM64_REG_P0 = 105, 1125 ARM64_REG_P1 = 106, 1126 ARM64_REG_P2 = 107, 1127 ARM64_REG_P3 = 108, 1128 ARM64_REG_P4 = 109, 1129 ARM64_REG_P5 = 110, 1130 ARM64_REG_P6 = 111, 1131 ARM64_REG_P7 = 112, 1132 ARM64_REG_P8 = 113, 1133 ARM64_REG_P9 = 114, 1134 ARM64_REG_P10 = 115, 1135 ARM64_REG_P11 = 116, 1136 ARM64_REG_P12 = 117, 1137 ARM64_REG_P13 = 118, 1138 ARM64_REG_P14 = 119, 1139 ARM64_REG_P15 = 120, 1140 ARM64_REG_Q0 = 121, 1141 ARM64_REG_Q1 = 122, 1142 ARM64_REG_Q2 = 123, 1143 ARM64_REG_Q3 = 124, 1144 ARM64_REG_Q4 = 125, 1145 ARM64_REG_Q5 = 126, 1146 ARM64_REG_Q6 = 127, 1147 ARM64_REG_Q7 = 128, 1148 ARM64_REG_Q8 = 129, 1149 ARM64_REG_Q9 = 130, 1150 ARM64_REG_Q10 = 131, 1151 ARM64_REG_Q11 = 132, 1152 ARM64_REG_Q12 = 133, 1153 ARM64_REG_Q13 = 134, 1154 ARM64_REG_Q14 = 135, 1155 ARM64_REG_Q15 = 136, 1156 ARM64_REG_Q16 = 137, 1157 ARM64_REG_Q17 = 138, 1158 ARM64_REG_Q18 = 139, 1159 ARM64_REG_Q19 = 140, 1160 ARM64_REG_Q20 = 141, 1161 ARM64_REG_Q21 = 142, 1162 ARM64_REG_Q22 = 143, 1163 ARM64_REG_Q23 = 144, 1164 ARM64_REG_Q24 = 145, 1165 ARM64_REG_Q25 = 146, 1166 ARM64_REG_Q26 = 147, 1167 ARM64_REG_Q27 = 148, 1168 ARM64_REG_Q28 = 149, 1169 ARM64_REG_Q29 = 150, 1170 ARM64_REG_Q30 = 151, 1171 ARM64_REG_Q31 = 152, 1172 ARM64_REG_S0 = 153, 1173 ARM64_REG_S1 = 154, 1174 ARM64_REG_S2 = 155, 1175 ARM64_REG_S3 = 156, 1176 ARM64_REG_S4 = 157, 1177 ARM64_REG_S5 = 158, 1178 ARM64_REG_S6 = 159, 1179 ARM64_REG_S7 = 160, 1180 ARM64_REG_S8 = 161, 1181 ARM64_REG_S9 = 162, 1182 ARM64_REG_S10 = 163, 1183 ARM64_REG_S11 = 164, 1184 ARM64_REG_S12 = 165, 1185 ARM64_REG_S13 = 166, 1186 ARM64_REG_S14 = 167, 1187 ARM64_REG_S15 = 168, 1188 ARM64_REG_S16 = 169, 1189 ARM64_REG_S17 = 170, 1190 ARM64_REG_S18 = 171, 1191 ARM64_REG_S19 = 172, 1192 ARM64_REG_S20 = 173, 1193 ARM64_REG_S21 = 174, 1194 ARM64_REG_S22 = 175, 1195 ARM64_REG_S23 = 176, 1196 ARM64_REG_S24 = 177, 1197 ARM64_REG_S25 = 178, 1198 ARM64_REG_S26 = 179, 1199 ARM64_REG_S27 = 180, 1200 ARM64_REG_S28 = 181, 1201 ARM64_REG_S29 = 182, 1202 ARM64_REG_S30 = 183, 1203 ARM64_REG_S31 = 184, 1204 ARM64_REG_W0 = 185, 1205 ARM64_REG_W1 = 186, 1206 ARM64_REG_W2 = 187, 1207 ARM64_REG_W3 = 188, 1208 ARM64_REG_W4 = 189, 1209 ARM64_REG_W5 = 190, 1210 ARM64_REG_W6 = 191, 1211 ARM64_REG_W7 = 192, 1212 ARM64_REG_W8 = 193, 1213 ARM64_REG_W9 = 194, 1214 ARM64_REG_W10 = 195, 1215 ARM64_REG_W11 = 196, 1216 ARM64_REG_W12 = 197, 1217 ARM64_REG_W13 = 198, 1218 ARM64_REG_W14 = 199, 1219 ARM64_REG_W15 = 200, 1220 ARM64_REG_W16 = 201, 1221 ARM64_REG_W17 = 202, 1222 ARM64_REG_W18 = 203, 1223 ARM64_REG_W19 = 204, 1224 ARM64_REG_W20 = 205, 1225 ARM64_REG_W21 = 206, 1226 ARM64_REG_W22 = 207, 1227 ARM64_REG_W23 = 208, 1228 ARM64_REG_W24 = 209, 1229 ARM64_REG_W25 = 210, 1230 ARM64_REG_W26 = 211, 1231 ARM64_REG_W27 = 212, 1232 ARM64_REG_W28 = 213, 1233 ARM64_REG_W29 = 214, 1234 ARM64_REG_W30 = 215, 1235 ARM64_REG_X0 = 216, 1236 ARM64_REG_X1 = 217, 1237 ARM64_REG_X2 = 218, 1238 ARM64_REG_X3 = 219, 1239 ARM64_REG_X4 = 220, 1240 ARM64_REG_X5 = 221, 1241 ARM64_REG_X6 = 222, 1242 ARM64_REG_X7 = 223, 1243 ARM64_REG_X8 = 224, 1244 ARM64_REG_X9 = 225, 1245 ARM64_REG_X10 = 226, 1246 ARM64_REG_X11 = 227, 1247 ARM64_REG_X12 = 228, 1248 ARM64_REG_X13 = 229, 1249 ARM64_REG_X14 = 230, 1250 ARM64_REG_X15 = 231, 1251 ARM64_REG_X16 = 232, 1252 ARM64_REG_X17 = 233, 1253 ARM64_REG_X18 = 234, 1254 ARM64_REG_X19 = 235, 1255 ARM64_REG_X20 = 236, 1256 ARM64_REG_X21 = 237, 1257 ARM64_REG_X22 = 238, 1258 ARM64_REG_X23 = 239, 1259 ARM64_REG_X24 = 240, 1260 ARM64_REG_X25 = 241, 1261 ARM64_REG_X26 = 242, 1262 ARM64_REG_X27 = 243, 1263 ARM64_REG_X28 = 244, 1264 ARM64_REG_Z0 = 245, 1265 ARM64_REG_Z1 = 246, 1266 ARM64_REG_Z2 = 247, 1267 ARM64_REG_Z3 = 248, 1268 ARM64_REG_Z4 = 249, 1269 ARM64_REG_Z5 = 250, 1270 ARM64_REG_Z6 = 251, 1271 ARM64_REG_Z7 = 252, 1272 ARM64_REG_Z8 = 253, 1273 ARM64_REG_Z9 = 254, 1274 ARM64_REG_Z10 = 255, 1275 ARM64_REG_Z11 = 256, 1276 ARM64_REG_Z12 = 257, 1277 ARM64_REG_Z13 = 258, 1278 ARM64_REG_Z14 = 259, 1279 ARM64_REG_Z15 = 260, 1280 ARM64_REG_Z16 = 261, 1281 ARM64_REG_Z17 = 262, 1282 ARM64_REG_Z18 = 263, 1283 ARM64_REG_Z19 = 264, 1284 ARM64_REG_Z20 = 265, 1285 ARM64_REG_Z21 = 266, 1286 ARM64_REG_Z22 = 267, 1287 ARM64_REG_Z23 = 268, 1288 ARM64_REG_Z24 = 269, 1289 ARM64_REG_Z25 = 270, 1290 ARM64_REG_Z26 = 271, 1291 ARM64_REG_Z27 = 272, 1292 ARM64_REG_Z28 = 273, 1293 ARM64_REG_Z29 = 274, 1294 ARM64_REG_Z30 = 275, 1295 ARM64_REG_Z31 = 276, 1296 1297 ARM64_REG_V0, 1298 ARM64_REG_V1, 1299 ARM64_REG_V2, 1300 ARM64_REG_V3, 1301 ARM64_REG_V4, 1302 ARM64_REG_V5, 1303 ARM64_REG_V6, 1304 ARM64_REG_V7, 1305 ARM64_REG_V8, 1306 ARM64_REG_V9, 1307 ARM64_REG_V10, 1308 ARM64_REG_V11, 1309 ARM64_REG_V12, 1310 ARM64_REG_V13, 1311 ARM64_REG_V14, 1312 ARM64_REG_V15, 1313 ARM64_REG_V16, 1314 ARM64_REG_V17, 1315 ARM64_REG_V18, 1316 ARM64_REG_V19, 1317 ARM64_REG_V20, 1318 ARM64_REG_V21, 1319 ARM64_REG_V22, 1320 ARM64_REG_V23, 1321 ARM64_REG_V24, 1322 ARM64_REG_V25, 1323 ARM64_REG_V26, 1324 ARM64_REG_V27, 1325 ARM64_REG_V28, 1326 ARM64_REG_V29, 1327 ARM64_REG_V30, 1328 ARM64_REG_V31, 1329 1330 ARM64_REG_ENDING, // <-- mark the end of the list of registers 1331 1332 // alias registers 1333 ARM64_REG_IP0 = ARM64_REG_X16, 1334 ARM64_REG_IP1 = ARM64_REG_X17, 1335 ARM64_REG_X29 = ARM64_REG_FP, 1336 ARM64_REG_X30 = ARM64_REG_LR, 1337 } arm64_reg; 1338 1339 /// Instruction's operand referring to memory 1340 /// This is associated with ARM64_OP_MEM operand type above 1341 typedef struct arm64_op_mem { 1342 arm64_reg base; ///< base register 1343 arm64_reg index; ///< index register 1344 int32_t disp; ///< displacement/offset value 1345 } arm64_op_mem; 1346 1347 /// Instruction operand 1348 typedef struct cs_arm64_op { 1349 int vector_index; ///< Vector Index for some vector operands (or -1 if irrelevant) 1350 arm64_vas vas; ///< Vector Arrangement Specifier 1351 struct { 1352 arm64_shifter type; ///< shifter type of this operand 1353 unsigned int value; ///< shifter value of this operand 1354 } shift; 1355 arm64_extender ext; ///< extender type of this operand 1356 arm64_op_type type; ///< operand type 1357 union { 1358 arm64_reg reg; ///< register value for REG operand 1359 int64_t imm; ///< immediate value, or index for C-IMM or IMM operand 1360 double fp; ///< floating point value for FP operand 1361 arm64_op_mem mem; ///< base/index/scale/disp value for MEM operand 1362 arm64_pstate pstate; ///< PState field of MSR instruction. 1363 unsigned int sys; ///< IC/DC/AT/TLBI operation (see arm64_ic_op, arm64_dc_op, arm64_at_op, arm64_tlbi_op) 1364 arm64_prefetch_op prefetch; ///< PRFM operation. 1365 arm64_barrier_op barrier; ///< Memory barrier operation (ISB/DMB/DSB instructions). 1366 }; 1367 1368 /// How is this operand accessed? (READ, WRITE or READ|WRITE) 1369 /// This field is combined of cs_ac_type. 1370 /// NOTE: this field is irrelevant if engine is compiled in DIET mode. 1371 uint8_t access; 1372 } cs_arm64_op; 1373 1374 /// Instruction structure 1375 typedef struct cs_arm64 { 1376 arm64_cc cc; ///< conditional code for this insn 1377 bool update_flags; ///< does this insn update flags? 1378 bool writeback; ///< does this insn request writeback? 'True' means 'yes' 1379 1380 /// Number of operands of this instruction, 1381 /// or 0 when instruction has no operand. 1382 uint8_t op_count; 1383 1384 cs_arm64_op operands[8]; ///< operands for this instruction. 1385 } cs_arm64; 1386 1387 /// ARM64 instruction 1388 typedef enum arm64_insn { 1389 ARM64_INS_INVALID = 0, 1390 1391 ARM64_INS_ABS, 1392 ARM64_INS_ADC, 1393 ARM64_INS_ADCS, 1394 ARM64_INS_ADD, 1395 ARM64_INS_ADDHN, 1396 ARM64_INS_ADDHN2, 1397 ARM64_INS_ADDP, 1398 ARM64_INS_ADDPL, 1399 ARM64_INS_ADDS, 1400 ARM64_INS_ADDV, 1401 ARM64_INS_ADDVL, 1402 ARM64_INS_ADR, 1403 ARM64_INS_ADRP, 1404 ARM64_INS_AESD, 1405 ARM64_INS_AESE, 1406 ARM64_INS_AESIMC, 1407 ARM64_INS_AESMC, 1408 ARM64_INS_AND, 1409 ARM64_INS_ANDS, 1410 ARM64_INS_ANDV, 1411 ARM64_INS_ASR, 1412 ARM64_INS_ASRD, 1413 ARM64_INS_ASRR, 1414 ARM64_INS_ASRV, 1415 ARM64_INS_AUTDA, 1416 ARM64_INS_AUTDB, 1417 ARM64_INS_AUTDZA, 1418 ARM64_INS_AUTDZB, 1419 ARM64_INS_AUTIA, 1420 ARM64_INS_AUTIA1716, 1421 ARM64_INS_AUTIASP, 1422 ARM64_INS_AUTIAZ, 1423 ARM64_INS_AUTIB, 1424 ARM64_INS_AUTIB1716, 1425 ARM64_INS_AUTIBSP, 1426 ARM64_INS_AUTIBZ, 1427 ARM64_INS_AUTIZA, 1428 ARM64_INS_AUTIZB, 1429 ARM64_INS_B, 1430 ARM64_INS_BCAX, 1431 ARM64_INS_BFM, 1432 ARM64_INS_BIC, 1433 ARM64_INS_BICS, 1434 ARM64_INS_BIF, 1435 ARM64_INS_BIT, 1436 ARM64_INS_BL, 1437 ARM64_INS_BLR, 1438 ARM64_INS_BLRAA, 1439 ARM64_INS_BLRAAZ, 1440 ARM64_INS_BLRAB, 1441 ARM64_INS_BLRABZ, 1442 ARM64_INS_BR, 1443 ARM64_INS_BRAA, 1444 ARM64_INS_BRAAZ, 1445 ARM64_INS_BRAB, 1446 ARM64_INS_BRABZ, 1447 ARM64_INS_BRK, 1448 ARM64_INS_BRKA, 1449 ARM64_INS_BRKAS, 1450 ARM64_INS_BRKB, 1451 ARM64_INS_BRKBS, 1452 ARM64_INS_BRKN, 1453 ARM64_INS_BRKNS, 1454 ARM64_INS_BRKPA, 1455 ARM64_INS_BRKPAS, 1456 ARM64_INS_BRKPB, 1457 ARM64_INS_BRKPBS, 1458 ARM64_INS_BSL, 1459 ARM64_INS_CAS, 1460 ARM64_INS_CASA, 1461 ARM64_INS_CASAB, 1462 ARM64_INS_CASAH, 1463 ARM64_INS_CASAL, 1464 ARM64_INS_CASALB, 1465 ARM64_INS_CASALH, 1466 ARM64_INS_CASB, 1467 ARM64_INS_CASH, 1468 ARM64_INS_CASL, 1469 ARM64_INS_CASLB, 1470 ARM64_INS_CASLH, 1471 ARM64_INS_CASP, 1472 ARM64_INS_CASPA, 1473 ARM64_INS_CASPAL, 1474 ARM64_INS_CASPL, 1475 ARM64_INS_CBNZ, 1476 ARM64_INS_CBZ, 1477 ARM64_INS_CCMN, 1478 ARM64_INS_CCMP, 1479 ARM64_INS_CFINV, 1480 ARM64_INS_CINC, 1481 ARM64_INS_CINV, 1482 ARM64_INS_CLASTA, 1483 ARM64_INS_CLASTB, 1484 ARM64_INS_CLREX, 1485 ARM64_INS_CLS, 1486 ARM64_INS_CLZ, 1487 ARM64_INS_CMEQ, 1488 ARM64_INS_CMGE, 1489 ARM64_INS_CMGT, 1490 ARM64_INS_CMHI, 1491 ARM64_INS_CMHS, 1492 ARM64_INS_CMLE, 1493 ARM64_INS_CMLO, 1494 ARM64_INS_CMLS, 1495 ARM64_INS_CMLT, 1496 ARM64_INS_CMN, 1497 ARM64_INS_CMP, 1498 ARM64_INS_CMPEQ, 1499 ARM64_INS_CMPGE, 1500 ARM64_INS_CMPGT, 1501 ARM64_INS_CMPHI, 1502 ARM64_INS_CMPHS, 1503 ARM64_INS_CMPLE, 1504 ARM64_INS_CMPLO, 1505 ARM64_INS_CMPLS, 1506 ARM64_INS_CMPLT, 1507 ARM64_INS_CMPNE, 1508 ARM64_INS_CMTST, 1509 ARM64_INS_CNEG, 1510 ARM64_INS_CNOT, 1511 ARM64_INS_CNT, 1512 ARM64_INS_CNTB, 1513 ARM64_INS_CNTD, 1514 ARM64_INS_CNTH, 1515 ARM64_INS_CNTP, 1516 ARM64_INS_CNTW, 1517 ARM64_INS_COMPACT, 1518 ARM64_INS_CPY, 1519 ARM64_INS_CRC32B, 1520 ARM64_INS_CRC32CB, 1521 ARM64_INS_CRC32CH, 1522 ARM64_INS_CRC32CW, 1523 ARM64_INS_CRC32CX, 1524 ARM64_INS_CRC32H, 1525 ARM64_INS_CRC32W, 1526 ARM64_INS_CRC32X, 1527 ARM64_INS_CSDB, 1528 ARM64_INS_CSEL, 1529 ARM64_INS_CSET, 1530 ARM64_INS_CSETM, 1531 ARM64_INS_CSINC, 1532 ARM64_INS_CSINV, 1533 ARM64_INS_CSNEG, 1534 ARM64_INS_CTERMEQ, 1535 ARM64_INS_CTERMNE, 1536 ARM64_INS_DCPS1, 1537 ARM64_INS_DCPS2, 1538 ARM64_INS_DCPS3, 1539 ARM64_INS_DECB, 1540 ARM64_INS_DECD, 1541 ARM64_INS_DECH, 1542 ARM64_INS_DECP, 1543 ARM64_INS_DECW, 1544 ARM64_INS_DMB, 1545 ARM64_INS_DRPS, 1546 ARM64_INS_DSB, 1547 ARM64_INS_DUP, 1548 ARM64_INS_DUPM, 1549 ARM64_INS_EON, 1550 ARM64_INS_EOR, 1551 ARM64_INS_EOR3, 1552 ARM64_INS_EORS, 1553 ARM64_INS_EORV, 1554 ARM64_INS_ERET, 1555 ARM64_INS_ERETAA, 1556 ARM64_INS_ERETAB, 1557 ARM64_INS_ESB, 1558 ARM64_INS_EXT, 1559 ARM64_INS_EXTR, 1560 ARM64_INS_FABD, 1561 ARM64_INS_FABS, 1562 ARM64_INS_FACGE, 1563 ARM64_INS_FACGT, 1564 ARM64_INS_FACLE, 1565 ARM64_INS_FACLT, 1566 ARM64_INS_FADD, 1567 ARM64_INS_FADDA, 1568 ARM64_INS_FADDP, 1569 ARM64_INS_FADDV, 1570 ARM64_INS_FCADD, 1571 ARM64_INS_FCCMP, 1572 ARM64_INS_FCCMPE, 1573 ARM64_INS_FCMEQ, 1574 ARM64_INS_FCMGE, 1575 ARM64_INS_FCMGT, 1576 ARM64_INS_FCMLA, 1577 ARM64_INS_FCMLE, 1578 ARM64_INS_FCMLT, 1579 ARM64_INS_FCMNE, 1580 ARM64_INS_FCMP, 1581 ARM64_INS_FCMPE, 1582 ARM64_INS_FCMUO, 1583 ARM64_INS_FCPY, 1584 ARM64_INS_FCSEL, 1585 ARM64_INS_FCVT, 1586 ARM64_INS_FCVTAS, 1587 ARM64_INS_FCVTAU, 1588 ARM64_INS_FCVTL, 1589 ARM64_INS_FCVTL2, 1590 ARM64_INS_FCVTMS, 1591 ARM64_INS_FCVTMU, 1592 ARM64_INS_FCVTN, 1593 ARM64_INS_FCVTN2, 1594 ARM64_INS_FCVTNS, 1595 ARM64_INS_FCVTNU, 1596 ARM64_INS_FCVTPS, 1597 ARM64_INS_FCVTPU, 1598 ARM64_INS_FCVTXN, 1599 ARM64_INS_FCVTXN2, 1600 ARM64_INS_FCVTZS, 1601 ARM64_INS_FCVTZU, 1602 ARM64_INS_FDIV, 1603 ARM64_INS_FDIVR, 1604 ARM64_INS_FDUP, 1605 ARM64_INS_FEXPA, 1606 ARM64_INS_FJCVTZS, 1607 ARM64_INS_FMAD, 1608 ARM64_INS_FMADD, 1609 ARM64_INS_FMAX, 1610 ARM64_INS_FMAXNM, 1611 ARM64_INS_FMAXNMP, 1612 ARM64_INS_FMAXNMV, 1613 ARM64_INS_FMAXP, 1614 ARM64_INS_FMAXV, 1615 ARM64_INS_FMIN, 1616 ARM64_INS_FMINNM, 1617 ARM64_INS_FMINNMP, 1618 ARM64_INS_FMINNMV, 1619 ARM64_INS_FMINP, 1620 ARM64_INS_FMINV, 1621 ARM64_INS_FMLA, 1622 ARM64_INS_FMLS, 1623 ARM64_INS_FMOV, 1624 ARM64_INS_FMSB, 1625 ARM64_INS_FMSUB, 1626 ARM64_INS_FMUL, 1627 ARM64_INS_FMULX, 1628 ARM64_INS_FNEG, 1629 ARM64_INS_FNMAD, 1630 ARM64_INS_FNMADD, 1631 ARM64_INS_FNMLA, 1632 ARM64_INS_FNMLS, 1633 ARM64_INS_FNMSB, 1634 ARM64_INS_FNMSUB, 1635 ARM64_INS_FNMUL, 1636 ARM64_INS_FRECPE, 1637 ARM64_INS_FRECPS, 1638 ARM64_INS_FRECPX, 1639 ARM64_INS_FRINTA, 1640 ARM64_INS_FRINTI, 1641 ARM64_INS_FRINTM, 1642 ARM64_INS_FRINTN, 1643 ARM64_INS_FRINTP, 1644 ARM64_INS_FRINTX, 1645 ARM64_INS_FRINTZ, 1646 ARM64_INS_FRSQRTE, 1647 ARM64_INS_FRSQRTS, 1648 ARM64_INS_FSCALE, 1649 ARM64_INS_FSQRT, 1650 ARM64_INS_FSUB, 1651 ARM64_INS_FSUBR, 1652 ARM64_INS_FTMAD, 1653 ARM64_INS_FTSMUL, 1654 ARM64_INS_FTSSEL, 1655 ARM64_INS_HINT, 1656 ARM64_INS_HLT, 1657 ARM64_INS_HVC, 1658 ARM64_INS_INCB, 1659 ARM64_INS_INCD, 1660 ARM64_INS_INCH, 1661 ARM64_INS_INCP, 1662 ARM64_INS_INCW, 1663 ARM64_INS_INDEX, 1664 ARM64_INS_INS, 1665 ARM64_INS_INSR, 1666 ARM64_INS_ISB, 1667 ARM64_INS_LASTA, 1668 ARM64_INS_LASTB, 1669 ARM64_INS_LD1, 1670 ARM64_INS_LD1B, 1671 ARM64_INS_LD1D, 1672 ARM64_INS_LD1H, 1673 ARM64_INS_LD1R, 1674 ARM64_INS_LD1RB, 1675 ARM64_INS_LD1RD, 1676 ARM64_INS_LD1RH, 1677 ARM64_INS_LD1RQB, 1678 ARM64_INS_LD1RQD, 1679 ARM64_INS_LD1RQH, 1680 ARM64_INS_LD1RQW, 1681 ARM64_INS_LD1RSB, 1682 ARM64_INS_LD1RSH, 1683 ARM64_INS_LD1RSW, 1684 ARM64_INS_LD1RW, 1685 ARM64_INS_LD1SB, 1686 ARM64_INS_LD1SH, 1687 ARM64_INS_LD1SW, 1688 ARM64_INS_LD1W, 1689 ARM64_INS_LD2, 1690 ARM64_INS_LD2B, 1691 ARM64_INS_LD2D, 1692 ARM64_INS_LD2H, 1693 ARM64_INS_LD2R, 1694 ARM64_INS_LD2W, 1695 ARM64_INS_LD3, 1696 ARM64_INS_LD3B, 1697 ARM64_INS_LD3D, 1698 ARM64_INS_LD3H, 1699 ARM64_INS_LD3R, 1700 ARM64_INS_LD3W, 1701 ARM64_INS_LD4, 1702 ARM64_INS_LD4B, 1703 ARM64_INS_LD4D, 1704 ARM64_INS_LD4H, 1705 ARM64_INS_LD4R, 1706 ARM64_INS_LD4W, 1707 ARM64_INS_LDADD, 1708 ARM64_INS_LDADDA, 1709 ARM64_INS_LDADDAB, 1710 ARM64_INS_LDADDAH, 1711 ARM64_INS_LDADDAL, 1712 ARM64_INS_LDADDALB, 1713 ARM64_INS_LDADDALH, 1714 ARM64_INS_LDADDB, 1715 ARM64_INS_LDADDH, 1716 ARM64_INS_LDADDL, 1717 ARM64_INS_LDADDLB, 1718 ARM64_INS_LDADDLH, 1719 ARM64_INS_LDAPR, 1720 ARM64_INS_LDAPRB, 1721 ARM64_INS_LDAPRH, 1722 ARM64_INS_LDAPUR, 1723 ARM64_INS_LDAPURB, 1724 ARM64_INS_LDAPURH, 1725 ARM64_INS_LDAPURSB, 1726 ARM64_INS_LDAPURSH, 1727 ARM64_INS_LDAPURSW, 1728 ARM64_INS_LDAR, 1729 ARM64_INS_LDARB, 1730 ARM64_INS_LDARH, 1731 ARM64_INS_LDAXP, 1732 ARM64_INS_LDAXR, 1733 ARM64_INS_LDAXRB, 1734 ARM64_INS_LDAXRH, 1735 ARM64_INS_LDCLR, 1736 ARM64_INS_LDCLRA, 1737 ARM64_INS_LDCLRAB, 1738 ARM64_INS_LDCLRAH, 1739 ARM64_INS_LDCLRAL, 1740 ARM64_INS_LDCLRALB, 1741 ARM64_INS_LDCLRALH, 1742 ARM64_INS_LDCLRB, 1743 ARM64_INS_LDCLRH, 1744 ARM64_INS_LDCLRL, 1745 ARM64_INS_LDCLRLB, 1746 ARM64_INS_LDCLRLH, 1747 ARM64_INS_LDEOR, 1748 ARM64_INS_LDEORA, 1749 ARM64_INS_LDEORAB, 1750 ARM64_INS_LDEORAH, 1751 ARM64_INS_LDEORAL, 1752 ARM64_INS_LDEORALB, 1753 ARM64_INS_LDEORALH, 1754 ARM64_INS_LDEORB, 1755 ARM64_INS_LDEORH, 1756 ARM64_INS_LDEORL, 1757 ARM64_INS_LDEORLB, 1758 ARM64_INS_LDEORLH, 1759 ARM64_INS_LDFF1B, 1760 ARM64_INS_LDFF1D, 1761 ARM64_INS_LDFF1H, 1762 ARM64_INS_LDFF1SB, 1763 ARM64_INS_LDFF1SH, 1764 ARM64_INS_LDFF1SW, 1765 ARM64_INS_LDFF1W, 1766 ARM64_INS_LDLAR, 1767 ARM64_INS_LDLARB, 1768 ARM64_INS_LDLARH, 1769 ARM64_INS_LDNF1B, 1770 ARM64_INS_LDNF1D, 1771 ARM64_INS_LDNF1H, 1772 ARM64_INS_LDNF1SB, 1773 ARM64_INS_LDNF1SH, 1774 ARM64_INS_LDNF1SW, 1775 ARM64_INS_LDNF1W, 1776 ARM64_INS_LDNP, 1777 ARM64_INS_LDNT1B, 1778 ARM64_INS_LDNT1D, 1779 ARM64_INS_LDNT1H, 1780 ARM64_INS_LDNT1W, 1781 ARM64_INS_LDP, 1782 ARM64_INS_LDPSW, 1783 ARM64_INS_LDR, 1784 ARM64_INS_LDRAA, 1785 ARM64_INS_LDRAB, 1786 ARM64_INS_LDRB, 1787 ARM64_INS_LDRH, 1788 ARM64_INS_LDRSB, 1789 ARM64_INS_LDRSH, 1790 ARM64_INS_LDRSW, 1791 ARM64_INS_LDSET, 1792 ARM64_INS_LDSETA, 1793 ARM64_INS_LDSETAB, 1794 ARM64_INS_LDSETAH, 1795 ARM64_INS_LDSETAL, 1796 ARM64_INS_LDSETALB, 1797 ARM64_INS_LDSETALH, 1798 ARM64_INS_LDSETB, 1799 ARM64_INS_LDSETH, 1800 ARM64_INS_LDSETL, 1801 ARM64_INS_LDSETLB, 1802 ARM64_INS_LDSETLH, 1803 ARM64_INS_LDSMAX, 1804 ARM64_INS_LDSMAXA, 1805 ARM64_INS_LDSMAXAB, 1806 ARM64_INS_LDSMAXAH, 1807 ARM64_INS_LDSMAXAL, 1808 ARM64_INS_LDSMAXALB, 1809 ARM64_INS_LDSMAXALH, 1810 ARM64_INS_LDSMAXB, 1811 ARM64_INS_LDSMAXH, 1812 ARM64_INS_LDSMAXL, 1813 ARM64_INS_LDSMAXLB, 1814 ARM64_INS_LDSMAXLH, 1815 ARM64_INS_LDSMIN, 1816 ARM64_INS_LDSMINA, 1817 ARM64_INS_LDSMINAB, 1818 ARM64_INS_LDSMINAH, 1819 ARM64_INS_LDSMINAL, 1820 ARM64_INS_LDSMINALB, 1821 ARM64_INS_LDSMINALH, 1822 ARM64_INS_LDSMINB, 1823 ARM64_INS_LDSMINH, 1824 ARM64_INS_LDSMINL, 1825 ARM64_INS_LDSMINLB, 1826 ARM64_INS_LDSMINLH, 1827 ARM64_INS_LDTR, 1828 ARM64_INS_LDTRB, 1829 ARM64_INS_LDTRH, 1830 ARM64_INS_LDTRSB, 1831 ARM64_INS_LDTRSH, 1832 ARM64_INS_LDTRSW, 1833 ARM64_INS_LDUMAX, 1834 ARM64_INS_LDUMAXA, 1835 ARM64_INS_LDUMAXAB, 1836 ARM64_INS_LDUMAXAH, 1837 ARM64_INS_LDUMAXAL, 1838 ARM64_INS_LDUMAXALB, 1839 ARM64_INS_LDUMAXALH, 1840 ARM64_INS_LDUMAXB, 1841 ARM64_INS_LDUMAXH, 1842 ARM64_INS_LDUMAXL, 1843 ARM64_INS_LDUMAXLB, 1844 ARM64_INS_LDUMAXLH, 1845 ARM64_INS_LDUMIN, 1846 ARM64_INS_LDUMINA, 1847 ARM64_INS_LDUMINAB, 1848 ARM64_INS_LDUMINAH, 1849 ARM64_INS_LDUMINAL, 1850 ARM64_INS_LDUMINALB, 1851 ARM64_INS_LDUMINALH, 1852 ARM64_INS_LDUMINB, 1853 ARM64_INS_LDUMINH, 1854 ARM64_INS_LDUMINL, 1855 ARM64_INS_LDUMINLB, 1856 ARM64_INS_LDUMINLH, 1857 ARM64_INS_LDUR, 1858 ARM64_INS_LDURB, 1859 ARM64_INS_LDURH, 1860 ARM64_INS_LDURSB, 1861 ARM64_INS_LDURSH, 1862 ARM64_INS_LDURSW, 1863 ARM64_INS_LDXP, 1864 ARM64_INS_LDXR, 1865 ARM64_INS_LDXRB, 1866 ARM64_INS_LDXRH, 1867 ARM64_INS_LSL, 1868 ARM64_INS_LSLR, 1869 ARM64_INS_LSLV, 1870 ARM64_INS_LSR, 1871 ARM64_INS_LSRR, 1872 ARM64_INS_LSRV, 1873 ARM64_INS_MAD, 1874 ARM64_INS_MADD, 1875 ARM64_INS_MLA, 1876 ARM64_INS_MLS, 1877 ARM64_INS_MNEG, 1878 ARM64_INS_MOV, 1879 ARM64_INS_MOVI, 1880 ARM64_INS_MOVK, 1881 ARM64_INS_MOVN, 1882 ARM64_INS_MOVPRFX, 1883 ARM64_INS_MOVS, 1884 ARM64_INS_MOVZ, 1885 ARM64_INS_MRS, 1886 ARM64_INS_MSB, 1887 ARM64_INS_MSR, 1888 ARM64_INS_MSUB, 1889 ARM64_INS_MUL, 1890 ARM64_INS_MVN, 1891 ARM64_INS_MVNI, 1892 ARM64_INS_NAND, 1893 ARM64_INS_NANDS, 1894 ARM64_INS_NEG, 1895 ARM64_INS_NEGS, 1896 ARM64_INS_NGC, 1897 ARM64_INS_NGCS, 1898 ARM64_INS_NOP, 1899 ARM64_INS_NOR, 1900 ARM64_INS_NORS, 1901 ARM64_INS_NOT, 1902 ARM64_INS_NOTS, 1903 ARM64_INS_ORN, 1904 ARM64_INS_ORNS, 1905 ARM64_INS_ORR, 1906 ARM64_INS_ORRS, 1907 ARM64_INS_ORV, 1908 ARM64_INS_PACDA, 1909 ARM64_INS_PACDB, 1910 ARM64_INS_PACDZA, 1911 ARM64_INS_PACDZB, 1912 ARM64_INS_PACGA, 1913 ARM64_INS_PACIA, 1914 ARM64_INS_PACIA1716, 1915 ARM64_INS_PACIASP, 1916 ARM64_INS_PACIAZ, 1917 ARM64_INS_PACIB, 1918 ARM64_INS_PACIB1716, 1919 ARM64_INS_PACIBSP, 1920 ARM64_INS_PACIBZ, 1921 ARM64_INS_PACIZA, 1922 ARM64_INS_PACIZB, 1923 ARM64_INS_PFALSE, 1924 ARM64_INS_PFIRST, 1925 ARM64_INS_PMUL, 1926 ARM64_INS_PMULL, 1927 ARM64_INS_PMULL2, 1928 ARM64_INS_PNEXT, 1929 ARM64_INS_PRFB, 1930 ARM64_INS_PRFD, 1931 ARM64_INS_PRFH, 1932 ARM64_INS_PRFM, 1933 ARM64_INS_PRFUM, 1934 ARM64_INS_PRFW, 1935 ARM64_INS_PSB, 1936 ARM64_INS_PTEST, 1937 ARM64_INS_PTRUE, 1938 ARM64_INS_PTRUES, 1939 ARM64_INS_PUNPKHI, 1940 ARM64_INS_PUNPKLO, 1941 ARM64_INS_RADDHN, 1942 ARM64_INS_RADDHN2, 1943 ARM64_INS_RAX1, 1944 ARM64_INS_RBIT, 1945 ARM64_INS_RDFFR, 1946 ARM64_INS_RDFFRS, 1947 ARM64_INS_RDVL, 1948 ARM64_INS_RET, 1949 ARM64_INS_RETAA, 1950 ARM64_INS_RETAB, 1951 ARM64_INS_REV, 1952 ARM64_INS_REV16, 1953 ARM64_INS_REV32, 1954 ARM64_INS_REV64, 1955 ARM64_INS_REVB, 1956 ARM64_INS_REVH, 1957 ARM64_INS_REVW, 1958 ARM64_INS_RMIF, 1959 ARM64_INS_ROR, 1960 ARM64_INS_RORV, 1961 ARM64_INS_RSHRN, 1962 ARM64_INS_RSHRN2, 1963 ARM64_INS_RSUBHN, 1964 ARM64_INS_RSUBHN2, 1965 ARM64_INS_SABA, 1966 ARM64_INS_SABAL, 1967 ARM64_INS_SABAL2, 1968 ARM64_INS_SABD, 1969 ARM64_INS_SABDL, 1970 ARM64_INS_SABDL2, 1971 ARM64_INS_SADALP, 1972 ARM64_INS_SADDL, 1973 ARM64_INS_SADDL2, 1974 ARM64_INS_SADDLP, 1975 ARM64_INS_SADDLV, 1976 ARM64_INS_SADDV, 1977 ARM64_INS_SADDW, 1978 ARM64_INS_SADDW2, 1979 ARM64_INS_SBC, 1980 ARM64_INS_SBCS, 1981 ARM64_INS_SBFM, 1982 ARM64_INS_SCVTF, 1983 ARM64_INS_SDIV, 1984 ARM64_INS_SDIVR, 1985 ARM64_INS_SDOT, 1986 ARM64_INS_SEL, 1987 ARM64_INS_SETF16, 1988 ARM64_INS_SETF8, 1989 ARM64_INS_SETFFR, 1990 ARM64_INS_SEV, 1991 ARM64_INS_SEVL, 1992 ARM64_INS_SHA1C, 1993 ARM64_INS_SHA1H, 1994 ARM64_INS_SHA1M, 1995 ARM64_INS_SHA1P, 1996 ARM64_INS_SHA1SU0, 1997 ARM64_INS_SHA1SU1, 1998 ARM64_INS_SHA256H, 1999 ARM64_INS_SHA256H2, 2000 ARM64_INS_SHA256SU0, 2001 ARM64_INS_SHA256SU1, 2002 ARM64_INS_SHA512H, 2003 ARM64_INS_SHA512H2, 2004 ARM64_INS_SHA512SU0, 2005 ARM64_INS_SHA512SU1, 2006 ARM64_INS_SHADD, 2007 ARM64_INS_SHL, 2008 ARM64_INS_SHLL, 2009 ARM64_INS_SHLL2, 2010 ARM64_INS_SHRN, 2011 ARM64_INS_SHRN2, 2012 ARM64_INS_SHSUB, 2013 ARM64_INS_SLI, 2014 ARM64_INS_SM3PARTW1, 2015 ARM64_INS_SM3PARTW2, 2016 ARM64_INS_SM3SS1, 2017 ARM64_INS_SM3TT1A, 2018 ARM64_INS_SM3TT1B, 2019 ARM64_INS_SM3TT2A, 2020 ARM64_INS_SM3TT2B, 2021 ARM64_INS_SM4E, 2022 ARM64_INS_SM4EKEY, 2023 ARM64_INS_SMADDL, 2024 ARM64_INS_SMAX, 2025 ARM64_INS_SMAXP, 2026 ARM64_INS_SMAXV, 2027 ARM64_INS_SMC, 2028 ARM64_INS_SMIN, 2029 ARM64_INS_SMINP, 2030 ARM64_INS_SMINV, 2031 ARM64_INS_SMLAL, 2032 ARM64_INS_SMLAL2, 2033 ARM64_INS_SMLSL, 2034 ARM64_INS_SMLSL2, 2035 ARM64_INS_SMNEGL, 2036 ARM64_INS_SMOV, 2037 ARM64_INS_SMSUBL, 2038 ARM64_INS_SMULH, 2039 ARM64_INS_SMULL, 2040 ARM64_INS_SMULL2, 2041 ARM64_INS_SPLICE, 2042 ARM64_INS_SQABS, 2043 ARM64_INS_SQADD, 2044 ARM64_INS_SQDECB, 2045 ARM64_INS_SQDECD, 2046 ARM64_INS_SQDECH, 2047 ARM64_INS_SQDECP, 2048 ARM64_INS_SQDECW, 2049 ARM64_INS_SQDMLAL, 2050 ARM64_INS_SQDMLAL2, 2051 ARM64_INS_SQDMLSL, 2052 ARM64_INS_SQDMLSL2, 2053 ARM64_INS_SQDMULH, 2054 ARM64_INS_SQDMULL, 2055 ARM64_INS_SQDMULL2, 2056 ARM64_INS_SQINCB, 2057 ARM64_INS_SQINCD, 2058 ARM64_INS_SQINCH, 2059 ARM64_INS_SQINCP, 2060 ARM64_INS_SQINCW, 2061 ARM64_INS_SQNEG, 2062 ARM64_INS_SQRDMLAH, 2063 ARM64_INS_SQRDMLSH, 2064 ARM64_INS_SQRDMULH, 2065 ARM64_INS_SQRSHL, 2066 ARM64_INS_SQRSHRN, 2067 ARM64_INS_SQRSHRN2, 2068 ARM64_INS_SQRSHRUN, 2069 ARM64_INS_SQRSHRUN2, 2070 ARM64_INS_SQSHL, 2071 ARM64_INS_SQSHLU, 2072 ARM64_INS_SQSHRN, 2073 ARM64_INS_SQSHRN2, 2074 ARM64_INS_SQSHRUN, 2075 ARM64_INS_SQSHRUN2, 2076 ARM64_INS_SQSUB, 2077 ARM64_INS_SQXTN, 2078 ARM64_INS_SQXTN2, 2079 ARM64_INS_SQXTUN, 2080 ARM64_INS_SQXTUN2, 2081 ARM64_INS_SRHADD, 2082 ARM64_INS_SRI, 2083 ARM64_INS_SRSHL, 2084 ARM64_INS_SRSHR, 2085 ARM64_INS_SRSRA, 2086 ARM64_INS_SSHL, 2087 ARM64_INS_SSHLL, 2088 ARM64_INS_SSHLL2, 2089 ARM64_INS_SSHR, 2090 ARM64_INS_SSRA, 2091 ARM64_INS_SSUBL, 2092 ARM64_INS_SSUBL2, 2093 ARM64_INS_SSUBW, 2094 ARM64_INS_SSUBW2, 2095 ARM64_INS_ST1, 2096 ARM64_INS_ST1B, 2097 ARM64_INS_ST1D, 2098 ARM64_INS_ST1H, 2099 ARM64_INS_ST1W, 2100 ARM64_INS_ST2, 2101 ARM64_INS_ST2B, 2102 ARM64_INS_ST2D, 2103 ARM64_INS_ST2H, 2104 ARM64_INS_ST2W, 2105 ARM64_INS_ST3, 2106 ARM64_INS_ST3B, 2107 ARM64_INS_ST3D, 2108 ARM64_INS_ST3H, 2109 ARM64_INS_ST3W, 2110 ARM64_INS_ST4, 2111 ARM64_INS_ST4B, 2112 ARM64_INS_ST4D, 2113 ARM64_INS_ST4H, 2114 ARM64_INS_ST4W, 2115 ARM64_INS_STADD, 2116 ARM64_INS_STADDB, 2117 ARM64_INS_STADDH, 2118 ARM64_INS_STADDL, 2119 ARM64_INS_STADDLB, 2120 ARM64_INS_STADDLH, 2121 ARM64_INS_STCLR, 2122 ARM64_INS_STCLRB, 2123 ARM64_INS_STCLRH, 2124 ARM64_INS_STCLRL, 2125 ARM64_INS_STCLRLB, 2126 ARM64_INS_STCLRLH, 2127 ARM64_INS_STEOR, 2128 ARM64_INS_STEORB, 2129 ARM64_INS_STEORH, 2130 ARM64_INS_STEORL, 2131 ARM64_INS_STEORLB, 2132 ARM64_INS_STEORLH, 2133 ARM64_INS_STLLR, 2134 ARM64_INS_STLLRB, 2135 ARM64_INS_STLLRH, 2136 ARM64_INS_STLR, 2137 ARM64_INS_STLRB, 2138 ARM64_INS_STLRH, 2139 ARM64_INS_STLUR, 2140 ARM64_INS_STLURB, 2141 ARM64_INS_STLURH, 2142 ARM64_INS_STLXP, 2143 ARM64_INS_STLXR, 2144 ARM64_INS_STLXRB, 2145 ARM64_INS_STLXRH, 2146 ARM64_INS_STNP, 2147 ARM64_INS_STNT1B, 2148 ARM64_INS_STNT1D, 2149 ARM64_INS_STNT1H, 2150 ARM64_INS_STNT1W, 2151 ARM64_INS_STP, 2152 ARM64_INS_STR, 2153 ARM64_INS_STRB, 2154 ARM64_INS_STRH, 2155 ARM64_INS_STSET, 2156 ARM64_INS_STSETB, 2157 ARM64_INS_STSETH, 2158 ARM64_INS_STSETL, 2159 ARM64_INS_STSETLB, 2160 ARM64_INS_STSETLH, 2161 ARM64_INS_STSMAX, 2162 ARM64_INS_STSMAXB, 2163 ARM64_INS_STSMAXH, 2164 ARM64_INS_STSMAXL, 2165 ARM64_INS_STSMAXLB, 2166 ARM64_INS_STSMAXLH, 2167 ARM64_INS_STSMIN, 2168 ARM64_INS_STSMINB, 2169 ARM64_INS_STSMINH, 2170 ARM64_INS_STSMINL, 2171 ARM64_INS_STSMINLB, 2172 ARM64_INS_STSMINLH, 2173 ARM64_INS_STTR, 2174 ARM64_INS_STTRB, 2175 ARM64_INS_STTRH, 2176 ARM64_INS_STUMAX, 2177 ARM64_INS_STUMAXB, 2178 ARM64_INS_STUMAXH, 2179 ARM64_INS_STUMAXL, 2180 ARM64_INS_STUMAXLB, 2181 ARM64_INS_STUMAXLH, 2182 ARM64_INS_STUMIN, 2183 ARM64_INS_STUMINB, 2184 ARM64_INS_STUMINH, 2185 ARM64_INS_STUMINL, 2186 ARM64_INS_STUMINLB, 2187 ARM64_INS_STUMINLH, 2188 ARM64_INS_STUR, 2189 ARM64_INS_STURB, 2190 ARM64_INS_STURH, 2191 ARM64_INS_STXP, 2192 ARM64_INS_STXR, 2193 ARM64_INS_STXRB, 2194 ARM64_INS_STXRH, 2195 ARM64_INS_SUB, 2196 ARM64_INS_SUBHN, 2197 ARM64_INS_SUBHN2, 2198 ARM64_INS_SUBR, 2199 ARM64_INS_SUBS, 2200 ARM64_INS_SUNPKHI, 2201 ARM64_INS_SUNPKLO, 2202 ARM64_INS_SUQADD, 2203 ARM64_INS_SVC, 2204 ARM64_INS_SWP, 2205 ARM64_INS_SWPA, 2206 ARM64_INS_SWPAB, 2207 ARM64_INS_SWPAH, 2208 ARM64_INS_SWPAL, 2209 ARM64_INS_SWPALB, 2210 ARM64_INS_SWPALH, 2211 ARM64_INS_SWPB, 2212 ARM64_INS_SWPH, 2213 ARM64_INS_SWPL, 2214 ARM64_INS_SWPLB, 2215 ARM64_INS_SWPLH, 2216 ARM64_INS_SXTB, 2217 ARM64_INS_SXTH, 2218 ARM64_INS_SXTL, 2219 ARM64_INS_SXTL2, 2220 ARM64_INS_SXTW, 2221 ARM64_INS_SYS, 2222 ARM64_INS_SYSL, 2223 ARM64_INS_TBL, 2224 ARM64_INS_TBNZ, 2225 ARM64_INS_TBX, 2226 ARM64_INS_TBZ, 2227 ARM64_INS_TRN1, 2228 ARM64_INS_TRN2, 2229 ARM64_INS_TSB, 2230 ARM64_INS_TST, 2231 ARM64_INS_UABA, 2232 ARM64_INS_UABAL, 2233 ARM64_INS_UABAL2, 2234 ARM64_INS_UABD, 2235 ARM64_INS_UABDL, 2236 ARM64_INS_UABDL2, 2237 ARM64_INS_UADALP, 2238 ARM64_INS_UADDL, 2239 ARM64_INS_UADDL2, 2240 ARM64_INS_UADDLP, 2241 ARM64_INS_UADDLV, 2242 ARM64_INS_UADDV, 2243 ARM64_INS_UADDW, 2244 ARM64_INS_UADDW2, 2245 ARM64_INS_UBFM, 2246 ARM64_INS_UCVTF, 2247 ARM64_INS_UDIV, 2248 ARM64_INS_UDIVR, 2249 ARM64_INS_UDOT, 2250 ARM64_INS_UHADD, 2251 ARM64_INS_UHSUB, 2252 ARM64_INS_UMADDL, 2253 ARM64_INS_UMAX, 2254 ARM64_INS_UMAXP, 2255 ARM64_INS_UMAXV, 2256 ARM64_INS_UMIN, 2257 ARM64_INS_UMINP, 2258 ARM64_INS_UMINV, 2259 ARM64_INS_UMLAL, 2260 ARM64_INS_UMLAL2, 2261 ARM64_INS_UMLSL, 2262 ARM64_INS_UMLSL2, 2263 ARM64_INS_UMNEGL, 2264 ARM64_INS_UMOV, 2265 ARM64_INS_UMSUBL, 2266 ARM64_INS_UMULH, 2267 ARM64_INS_UMULL, 2268 ARM64_INS_UMULL2, 2269 ARM64_INS_UQADD, 2270 ARM64_INS_UQDECB, 2271 ARM64_INS_UQDECD, 2272 ARM64_INS_UQDECH, 2273 ARM64_INS_UQDECP, 2274 ARM64_INS_UQDECW, 2275 ARM64_INS_UQINCB, 2276 ARM64_INS_UQINCD, 2277 ARM64_INS_UQINCH, 2278 ARM64_INS_UQINCP, 2279 ARM64_INS_UQINCW, 2280 ARM64_INS_UQRSHL, 2281 ARM64_INS_UQRSHRN, 2282 ARM64_INS_UQRSHRN2, 2283 ARM64_INS_UQSHL, 2284 ARM64_INS_UQSHRN, 2285 ARM64_INS_UQSHRN2, 2286 ARM64_INS_UQSUB, 2287 ARM64_INS_UQXTN, 2288 ARM64_INS_UQXTN2, 2289 ARM64_INS_URECPE, 2290 ARM64_INS_URHADD, 2291 ARM64_INS_URSHL, 2292 ARM64_INS_URSHR, 2293 ARM64_INS_URSQRTE, 2294 ARM64_INS_URSRA, 2295 ARM64_INS_USHL, 2296 ARM64_INS_USHLL, 2297 ARM64_INS_USHLL2, 2298 ARM64_INS_USHR, 2299 ARM64_INS_USQADD, 2300 ARM64_INS_USRA, 2301 ARM64_INS_USUBL, 2302 ARM64_INS_USUBL2, 2303 ARM64_INS_USUBW, 2304 ARM64_INS_USUBW2, 2305 ARM64_INS_UUNPKHI, 2306 ARM64_INS_UUNPKLO, 2307 ARM64_INS_UXTB, 2308 ARM64_INS_UXTH, 2309 ARM64_INS_UXTL, 2310 ARM64_INS_UXTL2, 2311 ARM64_INS_UXTW, 2312 ARM64_INS_UZP1, 2313 ARM64_INS_UZP2, 2314 ARM64_INS_WFE, 2315 ARM64_INS_WFI, 2316 ARM64_INS_WHILELE, 2317 ARM64_INS_WHILELO, 2318 ARM64_INS_WHILELS, 2319 ARM64_INS_WHILELT, 2320 ARM64_INS_WRFFR, 2321 ARM64_INS_XAR, 2322 ARM64_INS_XPACD, 2323 ARM64_INS_XPACI, 2324 ARM64_INS_XPACLRI, 2325 ARM64_INS_XTN, 2326 ARM64_INS_XTN2, 2327 ARM64_INS_YIELD, 2328 ARM64_INS_ZIP1, 2329 ARM64_INS_ZIP2, 2330 2331 // alias insn 2332 ARM64_INS_SBFIZ, 2333 ARM64_INS_UBFIZ, 2334 ARM64_INS_SBFX, 2335 ARM64_INS_UBFX, 2336 ARM64_INS_BFI, 2337 ARM64_INS_BFXIL, 2338 ARM64_INS_IC, 2339 ARM64_INS_DC, 2340 ARM64_INS_AT, 2341 ARM64_INS_TLBI, 2342 2343 ARM64_INS_ENDING, // <-- mark the end of the list of insn 2344 } arm64_insn; 2345 2346 /// Group of ARM64 instructions 2347 typedef enum arm64_insn_group { 2348 ARM64_GRP_INVALID = 0, ///< = CS_GRP_INVALID 2349 2350 // Generic groups 2351 // all jump instructions (conditional+direct+indirect jumps) 2352 ARM64_GRP_JUMP, ///< = CS_GRP_JUMP 2353 ARM64_GRP_CALL, 2354 ARM64_GRP_RET, 2355 ARM64_GRP_INT, 2356 ARM64_GRP_PRIVILEGE = 6, ///< = CS_GRP_PRIVILEGE 2357 ARM64_GRP_BRANCH_RELATIVE, ///< = CS_GRP_BRANCH_RELATIVE 2358 ARM64_GRP_PAC, 2359 2360 // Architecture-specific groups 2361 ARM64_GRP_CRYPTO = 128, 2362 ARM64_GRP_FPARMV8, 2363 ARM64_GRP_NEON, 2364 ARM64_GRP_CRC, 2365 ARM64_GRP_AES, 2366 ARM64_GRP_DOTPROD, 2367 ARM64_GRP_FULLFP16, 2368 ARM64_GRP_LSE, 2369 ARM64_GRP_RCPC, 2370 ARM64_GRP_RDM, 2371 ARM64_GRP_SHA2, 2372 ARM64_GRP_SHA3, 2373 ARM64_GRP_SM4, 2374 ARM64_GRP_SVE, 2375 ARM64_GRP_V8_1A, 2376 ARM64_GRP_V8_3A, 2377 ARM64_GRP_V8_4A, 2378 2379 ARM64_GRP_ENDING, // <-- mark the end of the list of groups 2380 } arm64_insn_group; 2381 2382 #ifdef __cplusplus 2383 } 2384 #endif 2385 2386 #endif 2387