1 /* Definitions of target machine for GNU compiler. 2 Matsushita MN10300 series 3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 4 Free Software Foundation, Inc. 5 Contributed by Jeff Law (law@cygnus.com). 6 7 This file is part of GCC. 8 9 GCC is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 2, or (at your option) 12 any later version. 13 14 GCC is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with GCC; see the file COPYING. If not, write to 21 the Free Software Foundation, 59 Temple Place - Suite 330, 22 Boston, MA 02111-1307, USA. */ 23 24 25 #undef ASM_SPEC 26 #undef LIB_SPEC 27 #undef ENDFILE_SPEC 28 #undef LINK_SPEC 29 #define LINK_SPEC "%{mrelax:--relax}" 30 #undef STARTFILE_SPEC 31 #define STARTFILE_SPEC "%{!mno-crt0:%{!shared:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}" 32 33 /* Names to predefine in the preprocessor for this target machine. */ 34 35 #define TARGET_CPU_CPP_BUILTINS() \ 36 do \ 37 { \ 38 builtin_define ("__mn10300__"); \ 39 builtin_define ("__MN10300__"); \ 40 } \ 41 while (0) 42 43 #define CPP_SPEC "%{mam33:-D__AM33__} %{mam33-2:-D__AM33__=2 -D__AM33_2__}" 44 45 /* Run-time compilation parameters selecting different hardware subsets. */ 46 47 extern int target_flags; 48 49 extern GTY(()) int mn10300_unspec_int_label_counter; 50 51 /* Macros used in the machine description to test the flags. */ 52 53 /* Macro to define tables used to set the flags. 54 This is a list in braces of pairs in braces, 55 each pair being { "NAME", VALUE } 56 where VALUE is the bits to set or minus the bits to clear. 57 An empty string NAME is used to identify the default VALUE. */ 58 59 /* Generate code to work around mul/mulq bugs on the mn10300. */ 60 #define TARGET_MULT_BUG (target_flags & 0x1) 61 62 /* Generate code for the AM33 processor. */ 63 #define TARGET_AM33 (target_flags & 0x2) 64 65 /* Generate code for the AM33/2.0 processor. */ 66 #define TARGET_AM33_2 (target_flags & 0x4) 67 68 #define TARGET_SWITCHES \ 69 {{ "mult-bug", 0x1, N_("Work around hardware multiply bug")}, \ 70 { "no-mult-bug", -0x1, N_("Do not work around hardware multiply bug")},\ 71 { "am33", 0x2, N_("Target the AM33 processor")}, \ 72 { "am33", -(0x1), ""},\ 73 { "no-am33", -0x2, ""}, \ 74 { "no-crt0", 0, N_("No default crt0.o") }, \ 75 { "am33-2", 0x6, N_("Target the AM33/2.0 processor")}, \ 76 { "am33-2", -(0x1), ""},\ 77 { "no-am33-2", -0x4, ""}, \ 78 { "relax", 0, N_("Enable linker relaxations") }, \ 79 { "", TARGET_DEFAULT, NULL}} 80 81 #ifndef TARGET_DEFAULT 82 #define TARGET_DEFAULT 0x1 83 #endif 84 85 /* Print subsidiary information on the compiler version in use. */ 86 87 #define TARGET_VERSION fprintf (stderr, " (MN10300)"); 88 89 90 /* Target machine storage layout */ 91 92 /* Define this if most significant bit is lowest numbered 93 in instructions that operate on numbered bit-fields. 94 This is not true on the Matsushita MN1003. */ 95 #define BITS_BIG_ENDIAN 0 96 97 /* Define this if most significant byte of a word is the lowest numbered. */ 98 /* This is not true on the Matsushita MN10300. */ 99 #define BYTES_BIG_ENDIAN 0 100 101 /* Define this if most significant word of a multiword number is lowest 102 numbered. 103 This is not true on the Matsushita MN10300. */ 104 #define WORDS_BIG_ENDIAN 0 105 106 /* Width of a word, in units (bytes). */ 107 #define UNITS_PER_WORD 4 108 109 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 110 #define PARM_BOUNDARY 32 111 112 /* The stack goes in 32 bit lumps. */ 113 #define STACK_BOUNDARY 32 114 115 /* Allocation boundary (in *bits*) for the code of a function. 116 8 is the minimum boundary; it's unclear if bigger alignments 117 would improve performance. */ 118 #define FUNCTION_BOUNDARY 8 119 120 /* No data type wants to be aligned rounder than this. */ 121 #define BIGGEST_ALIGNMENT 32 122 123 /* Alignment of field after `int : 0' in a structure. */ 124 #define EMPTY_FIELD_BOUNDARY 32 125 126 /* Define this if move instructions will actually fail to work 127 when given unaligned data. */ 128 #define STRICT_ALIGNMENT 1 129 130 /* Define this as 1 if `char' should by default be signed; else as 0. */ 131 #define DEFAULT_SIGNED_CHAR 0 132 133 /* Standard register usage. */ 134 135 /* Number of actual hardware registers. 136 The hardware registers are assigned numbers for the compiler 137 from 0 to just below FIRST_PSEUDO_REGISTER. 138 139 All registers that the compiler knows about must be given numbers, 140 even those that are not normally considered general registers. */ 141 142 #define FIRST_PSEUDO_REGISTER 50 143 144 /* Specify machine-specific register numbers. */ 145 #define FIRST_DATA_REGNUM 0 146 #define LAST_DATA_REGNUM 3 147 #define FIRST_ADDRESS_REGNUM 4 148 #define LAST_ADDRESS_REGNUM 8 149 #define FIRST_EXTENDED_REGNUM 10 150 #define LAST_EXTENDED_REGNUM 17 151 #define FIRST_FP_REGNUM 18 152 #define LAST_FP_REGNUM 49 153 154 /* Specify the registers used for certain standard purposes. 155 The values of these macros are register numbers. */ 156 157 /* Register to use for pushing function arguments. */ 158 #define STACK_POINTER_REGNUM (LAST_ADDRESS_REGNUM+1) 159 160 /* Base register for access to local variables of the function. */ 161 #define FRAME_POINTER_REGNUM (LAST_ADDRESS_REGNUM-1) 162 163 /* Base register for access to arguments of the function. This 164 is a fake register and will be eliminated into either the frame 165 pointer or stack pointer. */ 166 #define ARG_POINTER_REGNUM LAST_ADDRESS_REGNUM 167 168 /* Register in which static-chain is passed to a function. */ 169 #define STATIC_CHAIN_REGNUM (FIRST_ADDRESS_REGNUM+1) 170 171 /* 1 for registers that have pervasive standard uses 172 and are not available for the register allocator. */ 173 174 #define FIXED_REGISTERS \ 175 { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 \ 176 , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \ 177 , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \ 178 } 179 180 /* 1 for registers not available across function calls. 181 These must include the FIXED_REGISTERS and also any 182 registers that can be used without being saved. 183 The latter must include the registers where values are returned 184 and the register where structure-value addresses are passed. 185 Aside from that, you can include as many other registers as you 186 like. */ 187 188 #define CALL_USED_REGISTERS \ 189 { 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 \ 190 , 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \ 191 , 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \ 192 } 193 194 #define REG_ALLOC_ORDER \ 195 { 0, 1, 4, 5, 2, 3, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 8, 9 \ 196 , 42, 43, 44, 45, 46, 47, 48, 49, 34, 35, 36, 37, 38, 39, 40, 41 \ 197 , 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33 \ 198 } 199 200 #define CONDITIONAL_REGISTER_USAGE \ 201 { \ 202 unsigned int i; \ 203 \ 204 if (!TARGET_AM33) \ 205 { \ 206 for (i = FIRST_EXTENDED_REGNUM; \ 207 i <= LAST_EXTENDED_REGNUM; i++) \ 208 fixed_regs[i] = call_used_regs[i] = 1; \ 209 } \ 210 if (!TARGET_AM33_2) \ 211 { \ 212 for (i = FIRST_FP_REGNUM; \ 213 i <= LAST_FP_REGNUM; \ 214 i++) \ 215 fixed_regs[i] = call_used_regs[i] = 1; \ 216 } \ 217 if (flag_pic) \ 218 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ 219 } 220 221 /* Return number of consecutive hard regs needed starting at reg REGNO 222 to hold something of mode MODE. 223 224 This is ordinarily the length in words of a value of mode MODE 225 but can be less for certain modes in special long registers. */ 226 227 #define HARD_REGNO_NREGS(REGNO, MODE) \ 228 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 229 230 /* Value is 1 if hard register REGNO can hold a value of machine-mode 231 MODE. */ 232 233 #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 234 ((REGNO_REG_CLASS (REGNO) == DATA_REGS \ 235 || (TARGET_AM33 && REGNO_REG_CLASS (REGNO) == ADDRESS_REGS) \ 236 || REGNO_REG_CLASS (REGNO) == EXTENDED_REGS) \ 237 ? ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) <= 4 \ 238 : ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) == 4) 239 240 /* Value is 1 if it is a good idea to tie two pseudo registers 241 when one has mode MODE1 and one has mode MODE2. 242 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 243 for any hard reg, then this must be 0 for correct output. */ 244 #define MODES_TIEABLE_P(MODE1, MODE2) \ 245 (TARGET_AM33 \ 246 || MODE1 == MODE2 \ 247 || (GET_MODE_SIZE (MODE1) <= 4 && GET_MODE_SIZE (MODE2) <= 4)) 248 249 /* 4 data, and effectively 3 address registers is small as far as I'm 250 concerned. */ 251 #define SMALL_REGISTER_CLASSES 1 252 253 /* Define the classes of registers for register constraints in the 254 machine description. Also define ranges of constants. 255 256 One of the classes must always be named ALL_REGS and include all hard regs. 257 If there is more than one class, another class must be named NO_REGS 258 and contain no registers. 259 260 The name GENERAL_REGS must be the name of a class (or an alias for 261 another name such as ALL_REGS). This is the class of registers 262 that is allowed by "g" or "r" in a register constraint. 263 Also, registers outside this class are allocated only when 264 instructions express preferences for them. 265 266 The classes must be numbered in nondecreasing order; that is, 267 a larger-numbered class must never be contained completely 268 in a smaller-numbered class. 269 270 For any two classes, it is very desirable that there be another 271 class that represents their union. */ 272 273 enum reg_class { 274 NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS, 275 DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, 276 EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, 277 SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, 278 FP_REGS, FP_ACC_REGS, 279 GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES 280 }; 281 282 #define N_REG_CLASSES (int) LIM_REG_CLASSES 283 284 /* Give names of register classes as strings for dump file. */ 285 286 #define REG_CLASS_NAMES \ 287 { "NO_REGS", "DATA_REGS", "ADDRESS_REGS", \ 288 "SP_REGS", "DATA_OR_ADDRESS_REGS", "SP_OR_ADDRESS_REGS", \ 289 "EXTENDED_REGS", \ 290 "DATA_OR_EXTENDED_REGS", "ADDRESS_OR_EXTENDED_REGS", \ 291 "SP_OR_EXTENDED_REGS", "SP_OR_ADDRESS_OR_EXTENDED_REGS", \ 292 "FP_REGS", "FP_ACC_REGS", \ 293 "GENERAL_REGS", "ALL_REGS", "LIM_REGS" } 294 295 /* Define which registers fit in which classes. 296 This is an initializer for a vector of HARD_REG_SET 297 of length N_REG_CLASSES. */ 298 299 #define REG_CLASS_CONTENTS \ 300 { { 0, 0 }, /* No regs */ \ 301 { 0x0000f, 0 }, /* DATA_REGS */ \ 302 { 0x001f0, 0 }, /* ADDRESS_REGS */ \ 303 { 0x00200, 0 }, /* SP_REGS */ \ 304 { 0x001ff, 0 }, /* DATA_OR_ADDRESS_REGS */\ 305 { 0x003f0, 0 }, /* SP_OR_ADDRESS_REGS */\ 306 { 0x3fc00, 0 }, /* EXTENDED_REGS */ \ 307 { 0x3fc0f, 0 }, /* DATA_OR_EXTENDED_REGS */ \ 308 { 0x3fdf0, 0 }, /* ADDRESS_OR_EXTENDED_REGS */ \ 309 { 0x3fe00, 0 }, /* SP_OR_EXTENDED_REGS */ \ 310 { 0x3fff0, 0 }, /* SP_OR_ADDRESS_OR_EXTENDED_REGS */ \ 311 { 0xfffc0000, 0x3ffff }, /* FP_REGS */ \ 312 { 0x03fc0000, 0 }, /* FP_ACC_REGS */ \ 313 { 0x3fdff, 0 }, /* GENERAL_REGS */ \ 314 { 0xffffffff, 0x3ffff } /* ALL_REGS */ \ 315 } 316 317 /* The same information, inverted: 318 Return the class number of the smallest class containing 319 reg number REGNO. This could be a conditional expression 320 or could index an array. */ 321 322 #define REGNO_REG_CLASS(REGNO) \ 323 ((REGNO) <= LAST_DATA_REGNUM ? DATA_REGS : \ 324 (REGNO) <= LAST_ADDRESS_REGNUM ? ADDRESS_REGS : \ 325 (REGNO) == STACK_POINTER_REGNUM ? SP_REGS : \ 326 (REGNO) <= LAST_EXTENDED_REGNUM ? EXTENDED_REGS : \ 327 (REGNO) <= LAST_FP_REGNUM ? FP_REGS : \ 328 NO_REGS) 329 330 /* The class value for index registers, and the one for base regs. */ 331 #define INDEX_REG_CLASS DATA_OR_EXTENDED_REGS 332 #define BASE_REG_CLASS SP_OR_ADDRESS_REGS 333 334 /* Get reg_class from a letter such as appears in the machine description. */ 335 336 #define REG_CLASS_FROM_LETTER(C) \ 337 ((C) == 'd' ? DATA_REGS : \ 338 (C) == 'a' ? ADDRESS_REGS : \ 339 (C) == 'y' ? SP_REGS : \ 340 ! TARGET_AM33 ? NO_REGS : \ 341 (C) == 'x' ? EXTENDED_REGS : \ 342 ! TARGET_AM33_2 ? NO_REGS : \ 343 (C) == 'f' ? FP_REGS : \ 344 (C) == 'A' ? FP_ACC_REGS : \ 345 NO_REGS) 346 347 /* Macros to check register numbers against specific register classes. */ 348 349 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 350 and check its validity for a certain class. 351 We have two alternate definitions for each of them. 352 The usual definition accepts all pseudo regs; the other rejects 353 them unless they have been allocated suitable hard regs. 354 The symbol REG_OK_STRICT causes the latter definition to be used. 355 356 Most source files want to accept pseudo regs in the hope that 357 they will get allocated to the class that the insn wants them to be in. 358 Source files for reload pass need to be strict. 359 After reload, it makes no difference, since pseudo regs have 360 been eliminated by then. */ 361 362 /* These assume that REGNO is a hard or pseudo reg number. 363 They give nonzero only if REGNO is a hard reg of the suitable class 364 or a pseudo reg currently allocated to a suitable hard reg. 365 Since they use reg_renumber, they are safe only once reg_renumber 366 has been allocated, which happens in local-alloc.c. */ 367 368 #ifndef REG_OK_STRICT 369 # define REGNO_IN_RANGE_P(regno,min,max) \ 370 (IN_RANGE ((regno), (min), (max)) || (regno) >= FIRST_PSEUDO_REGISTER) 371 #else 372 # define REGNO_IN_RANGE_P(regno,min,max) \ 373 (IN_RANGE ((regno), (min), (max)) \ 374 || (reg_renumber \ 375 && reg_renumber[(regno)] >= (min) && reg_renumber[(regno)] <= (max))) 376 #endif 377 378 #define REGNO_DATA_P(regno) \ 379 REGNO_IN_RANGE_P ((regno), FIRST_DATA_REGNUM, LAST_DATA_REGNUM) 380 #define REGNO_ADDRESS_P(regno) \ 381 REGNO_IN_RANGE_P ((regno), FIRST_ADDRESS_REGNUM, LAST_ADDRESS_REGNUM) 382 #define REGNO_SP_P(regno) \ 383 REGNO_IN_RANGE_P ((regno), STACK_POINTER_REGNUM, STACK_POINTER_REGNUM) 384 #define REGNO_EXTENDED_P(regno) \ 385 REGNO_IN_RANGE_P ((regno), FIRST_EXTENDED_REGNUM, LAST_EXTENDED_REGNUM) 386 #define REGNO_AM33_P(regno) \ 387 (REGNO_DATA_P ((regno)) || REGNO_ADDRESS_P ((regno)) \ 388 || REGNO_EXTENDED_P ((regno))) 389 #define REGNO_FP_P(regno) \ 390 REGNO_IN_RANGE_P ((regno), FIRST_FP_REGNUM, LAST_FP_REGNUM) 391 392 #define REGNO_OK_FOR_BASE_P(regno) \ 393 (REGNO_SP_P ((regno)) \ 394 || REGNO_ADDRESS_P ((regno)) || REGNO_EXTENDED_P ((regno))) 395 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 396 397 #define REGNO_OK_FOR_BIT_BASE_P(regno) \ 398 (REGNO_SP_P ((regno)) || REGNO_ADDRESS_P ((regno))) 399 #define REG_OK_FOR_BIT_BASE_P(X) REGNO_OK_FOR_BIT_BASE_P (REGNO (X)) 400 401 #define REGNO_OK_FOR_INDEX_P(regno) \ 402 (REGNO_DATA_P ((regno)) || REGNO_EXTENDED_P ((regno))) 403 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 404 405 /* Given an rtx X being reloaded into a reg required to be 406 in class CLASS, return the class of reg to actually use. 407 In general this is just CLASS; but on some machines 408 in some cases it is preferable to use a more restrictive class. */ 409 410 #define PREFERRED_RELOAD_CLASS(X,CLASS) \ 411 ((X) == stack_pointer_rtx && (CLASS) != SP_REGS \ 412 ? ADDRESS_OR_EXTENDED_REGS \ 413 : (GET_CODE (X) == MEM \ 414 || (GET_CODE (X) == REG \ 415 && REGNO (X) >= FIRST_PSEUDO_REGISTER) \ 416 || (GET_CODE (X) == SUBREG \ 417 && GET_CODE (SUBREG_REG (X)) == REG \ 418 && REGNO (SUBREG_REG (X)) >= FIRST_PSEUDO_REGISTER) \ 419 ? LIMIT_RELOAD_CLASS (GET_MODE (X), CLASS) \ 420 : (CLASS))) 421 422 #define PREFERRED_OUTPUT_RELOAD_CLASS(X,CLASS) \ 423 (X == stack_pointer_rtx && CLASS != SP_REGS \ 424 ? ADDRESS_OR_EXTENDED_REGS : CLASS) 425 426 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \ 427 (!TARGET_AM33 && (MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS) 428 429 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ 430 secondary_reload_class(CLASS,MODE,IN) 431 432 /* Return the maximum number of consecutive registers 433 needed to represent mode MODE in a register of class CLASS. */ 434 435 #define CLASS_MAX_NREGS(CLASS, MODE) \ 436 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 437 438 /* A class that contains registers which the compiler must always 439 access in a mode that is the same size as the mode in which it 440 loaded the register. */ 441 #define CLASS_CANNOT_CHANGE_SIZE FP_REGS 442 443 /* The letters I, J, K, L, M, N, O, P in a register constraint string 444 can be used to stand for particular ranges of immediate operands. 445 This macro defines what the ranges are. 446 C is the letter, and VALUE is a constant value. 447 Return 1 if VALUE is in the range specified by C. */ 448 449 #define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100) 450 #define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000) 451 452 #define CONST_OK_FOR_I(VALUE) ((VALUE) == 0) 453 #define CONST_OK_FOR_J(VALUE) ((VALUE) == 1) 454 #define CONST_OK_FOR_K(VALUE) ((VALUE) == 2) 455 #define CONST_OK_FOR_L(VALUE) ((VALUE) == 4) 456 #define CONST_OK_FOR_M(VALUE) ((VALUE) == 3) 457 #define CONST_OK_FOR_N(VALUE) ((VALUE) == 255 || (VALUE) == 65535) 458 459 #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 460 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \ 461 (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \ 462 (C) == 'K' ? CONST_OK_FOR_K (VALUE) : \ 463 (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \ 464 (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \ 465 (C) == 'N' ? CONST_OK_FOR_N (VALUE) : 0) 466 467 468 /* Similar, but for floating constants, and defining letters G and H. 469 Here VALUE is the CONST_DOUBLE rtx itself. 470 471 `G' is a floating-point zero. */ 472 473 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 474 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \ 475 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) : 0) 476 477 478 /* Stack layout; function entry, exit and calling. */ 479 480 /* Define this if pushing a word on the stack 481 makes the stack pointer a smaller address. */ 482 483 #define STACK_GROWS_DOWNWARD 484 485 /* Define this if the nominal address of the stack frame 486 is at the high-address end of the local variables; 487 that is, each additional local variable allocated 488 goes at a more negative offset in the frame. */ 489 490 #define FRAME_GROWS_DOWNWARD 491 492 /* Offset within stack frame to start allocating local variables at. 493 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 494 first local allocated. Otherwise, it is the offset to the BEGINNING 495 of the first local allocated. */ 496 497 #define STARTING_FRAME_OFFSET 0 498 499 /* Offset of first parameter from the argument pointer register value. */ 500 /* Is equal to the size of the saved fp + pc, even if an fp isn't 501 saved since the value is used before we know. */ 502 503 #define FIRST_PARM_OFFSET(FNDECL) 4 504 505 #define ELIMINABLE_REGS \ 506 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 507 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 508 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} 509 510 #define CAN_ELIMINATE(FROM, TO) 1 511 512 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 513 OFFSET = initial_offset (FROM, TO) 514 515 /* We can debug without frame pointers on the mn10300, so eliminate 516 them whenever possible. */ 517 #define FRAME_POINTER_REQUIRED 0 518 #define CAN_DEBUG_WITHOUT_FP 519 520 /* A guess for the MN10300. */ 521 #define PROMOTE_PROTOTYPES 1 522 523 /* Value is the number of bytes of arguments automatically 524 popped when returning from a subroutine call. 525 FUNDECL is the declaration node of the function (as a tree), 526 FUNTYPE is the data type of the function (as a tree), 527 or for a library call it is an identifier node for the subroutine name. 528 SIZE is the number of bytes of arguments passed on the stack. */ 529 530 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 531 532 /* We use d0/d1 for passing parameters, so allocate 8 bytes of space 533 for a register flushback area. */ 534 #define REG_PARM_STACK_SPACE(DECL) 8 535 #define OUTGOING_REG_PARM_STACK_SPACE 536 #define ACCUMULATE_OUTGOING_ARGS 1 537 538 /* So we can allocate space for return pointers once for the function 539 instead of around every call. */ 540 #define STACK_POINTER_OFFSET 4 541 542 /* 1 if N is a possible register number for function argument passing. 543 On the MN10300, no registers are used in this way. */ 544 545 #define FUNCTION_ARG_REGNO_P(N) ((N) <= 1) 546 547 548 /* Define a data type for recording info about an argument list 549 during the scan of that argument list. This data type should 550 hold all necessary information about the function itself 551 and about the args processed so far, enough to enable macros 552 such as FUNCTION_ARG to determine where the next arg should go. 553 554 On the MN10300, this is a single integer, which is a number of bytes 555 of arguments scanned so far. */ 556 557 #define CUMULATIVE_ARGS struct cum_arg 558 struct cum_arg {int nbytes; }; 559 560 /* Initialize a variable CUM of type CUMULATIVE_ARGS 561 for a call to a function whose data type is FNTYPE. 562 For a library call, FNTYPE is 0. 563 564 On the MN10300, the offset starts at 0. */ 565 566 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ 567 ((CUM).nbytes = 0) 568 569 /* Update the data in CUM to advance over an argument 570 of mode MODE and data type TYPE. 571 (TYPE is null for libcalls where that information may not be available.) */ 572 573 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 574 ((CUM).nbytes += ((MODE) != BLKmode \ 575 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \ 576 : (int_size_in_bytes (TYPE) + 3) & ~3)) 577 578 /* Define where to put the arguments to a function. 579 Value is zero to push the argument on the stack, 580 or a hard register in which to store the argument. 581 582 MODE is the argument's machine mode. 583 TYPE is the data type of the argument (as a tree). 584 This is null for libcalls where that information may 585 not be available. 586 CUM is a variable of type CUMULATIVE_ARGS which gives info about 587 the preceding args and about the function being called. 588 NAMED is nonzero if this argument is a named parameter 589 (otherwise it is an extra parameter matching an ellipsis). */ 590 591 /* On the MN10300 all args are pushed. */ 592 593 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 594 function_arg (&CUM, MODE, TYPE, NAMED) 595 596 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 597 function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) 598 599 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ 600 ((TYPE) && int_size_in_bytes (TYPE) > 8) 601 602 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \ 603 ((TYPE) && int_size_in_bytes (TYPE) > 8) 604 605 /* Define how to find the value returned by a function. 606 VALTYPE is the data type of the value (as a tree). 607 If the precise function being called is known, FUNC is its FUNCTION_DECL; 608 otherwise, FUNC is 0. */ 609 610 #define FUNCTION_VALUE(VALTYPE, FUNC) \ 611 gen_rtx_REG (TYPE_MODE (VALTYPE), POINTER_TYPE_P (VALTYPE) \ 612 ? FIRST_ADDRESS_REGNUM : FIRST_DATA_REGNUM) 613 614 /* Define how to find the value returned by a library function 615 assuming the value has mode MODE. */ 616 617 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_DATA_REGNUM) 618 619 /* 1 if N is a possible register number for a function value. */ 620 621 #define FUNCTION_VALUE_REGNO_P(N) \ 622 ((N) == FIRST_DATA_REGNUM || (N) == FIRST_ADDRESS_REGNUM) 623 624 /* Return values > 8 bytes in length in memory. */ 625 #define DEFAULT_PCC_STRUCT_RETURN 0 626 #define RETURN_IN_MEMORY(TYPE) \ 627 (int_size_in_bytes (TYPE) > 8 || TYPE_MODE (TYPE) == BLKmode) 628 629 /* Register in which address to store a structure value 630 is passed to a function. On the MN10300 it's passed as 631 the first parameter. */ 632 633 #define STRUCT_VALUE 0 634 635 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 636 the stack pointer does not matter. The value is tested only in 637 functions that have frame pointers. 638 No definition is equivalent to always zero. */ 639 640 #define EXIT_IGNORE_STACK 1 641 642 /* Output assembler code to FILE to increment profiler label # LABELNO 643 for profiling a function entry. */ 644 645 #define FUNCTION_PROFILER(FILE, LABELNO) ; 646 647 #define TRAMPOLINE_TEMPLATE(FILE) \ 648 do { \ 649 fprintf (FILE, "\tadd -4,sp\n"); \ 650 fprintf (FILE, "\t.long 0x0004fffa\n"); \ 651 fprintf (FILE, "\tmov (0,sp),a0\n"); \ 652 fprintf (FILE, "\tadd 4,sp\n"); \ 653 fprintf (FILE, "\tmov (13,a0),a1\n"); \ 654 fprintf (FILE, "\tmov (17,a0),a0\n"); \ 655 fprintf (FILE, "\tjmp (a0)\n"); \ 656 fprintf (FILE, "\t.long 0\n"); \ 657 fprintf (FILE, "\t.long 0\n"); \ 658 } while (0) 659 660 /* Length in units of the trampoline for entering a nested function. */ 661 662 #define TRAMPOLINE_SIZE 0x1b 663 664 #define TRAMPOLINE_ALIGNMENT 32 665 666 /* Emit RTL insns to initialize the variable parts of a trampoline. 667 FNADDR is an RTX for the address of the function's pure code. 668 CXT is an RTX for the static chain value for the function. */ 669 670 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 671 { \ 672 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x14)), \ 673 (CXT)); \ 674 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x18)), \ 675 (FNADDR)); \ 676 } 677 /* A C expression whose value is RTL representing the value of the return 678 address for the frame COUNT steps up from the current frame. 679 680 On the mn10300, the return address is not at a constant location 681 due to the frame layout. Luckily, it is at a constant offset from 682 the argument pointer, so we define RETURN_ADDR_RTX to return a 683 MEM using arg_pointer_rtx. Reload will replace arg_pointer_rtx 684 with a reference to the stack/frame pointer + an appropriate offset. */ 685 686 #define RETURN_ADDR_RTX(COUNT, FRAME) \ 687 ((COUNT == 0) \ 688 ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \ 689 : (rtx) 0) 690 691 /* Emit code for a call to builtin_saveregs. We must emit USE insns which 692 reference the 2 integer arg registers. 693 Ordinarily they are not call used registers, but they are for 694 _builtin_saveregs, so we must make this explicit. */ 695 696 #define EXPAND_BUILTIN_SAVEREGS() mn10300_builtin_saveregs () 697 698 /* Implement `va_start' for varargs and stdarg. */ 699 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \ 700 mn10300_va_start (valist, nextarg) 701 702 /* Implement `va_arg'. */ 703 #define EXPAND_BUILTIN_VA_ARG(valist, type) \ 704 mn10300_va_arg (valist, type) 705 706 /* Addressing modes, and classification of registers for them. */ 707 708 709 /* 1 if X is an rtx for a constant that is a valid address. */ 710 711 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) 712 713 /* Extra constraints. */ 714 715 #define OK_FOR_Q(OP) \ 716 (GET_CODE (OP) == MEM && ! CONSTANT_ADDRESS_P (XEXP (OP, 0))) 717 718 #define OK_FOR_R(OP) \ 719 (GET_CODE (OP) == MEM \ 720 && GET_MODE (OP) == QImode \ 721 && (CONSTANT_ADDRESS_P (XEXP (OP, 0)) \ 722 || (GET_CODE (XEXP (OP, 0)) == REG \ 723 && REG_OK_FOR_BIT_BASE_P (XEXP (OP, 0)) \ 724 && XEXP (OP, 0) != stack_pointer_rtx) \ 725 || (GET_CODE (XEXP (OP, 0)) == PLUS \ 726 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \ 727 && REG_OK_FOR_BIT_BASE_P (XEXP (XEXP (OP, 0), 0)) \ 728 && XEXP (XEXP (OP, 0), 0) != stack_pointer_rtx \ 729 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == CONST_INT \ 730 && INT_8_BITS (INTVAL (XEXP (XEXP (OP, 0), 1)))))) 731 732 #define OK_FOR_T(OP) \ 733 (GET_CODE (OP) == MEM \ 734 && GET_MODE (OP) == QImode \ 735 && (GET_CODE (XEXP (OP, 0)) == REG \ 736 && REG_OK_FOR_BIT_BASE_P (XEXP (OP, 0)) \ 737 && XEXP (OP, 0) != stack_pointer_rtx)) 738 739 #define EXTRA_CONSTRAINT(OP, C) \ 740 ((C) == 'R' ? OK_FOR_R (OP) \ 741 : (C) == 'Q' ? OK_FOR_Q (OP) \ 742 : (C) == 'S' && flag_pic \ 743 ? GET_CODE (OP) == UNSPEC && (XINT (OP, 1) == UNSPEC_PLT \ 744 || XINT (OP, 1) == UNSPEC_PIC) \ 745 : (C) == 'S' ? GET_CODE (OP) == SYMBOL_REF \ 746 : (C) == 'T' ? OK_FOR_T (OP) \ 747 : 0) 748 749 /* Maximum number of registers that can appear in a valid memory address. */ 750 751 #define MAX_REGS_PER_ADDRESS 2 752 753 754 #define HAVE_POST_INCREMENT (TARGET_AM33) 755 756 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 757 that is a valid memory address for an instruction. 758 The MODE argument is the machine mode for the MEM expression 759 that wants to use this address. 760 761 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, 762 except for CONSTANT_ADDRESS_P which is actually 763 machine-independent. 764 765 On the mn10300, the value in the address register must be 766 in the same memory space/segment as the effective address. 767 768 This is problematical for reload since it does not understand 769 that base+index != index+base in a memory reference. 770 771 Note it is still possible to use reg+reg addressing modes, 772 it's just much more difficult. For a discussion of a possible 773 workaround and solution, see the comments in pa.c before the 774 function record_unscaled_index_insn_codes. */ 775 776 /* Accept either REG or SUBREG where a register is valid. */ 777 778 #define RTX_OK_FOR_BASE_P(X) \ 779 ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \ 780 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \ 781 && REG_OK_FOR_BASE_P (SUBREG_REG (X)))) 782 783 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 784 { \ 785 if (CONSTANT_ADDRESS_P (X) \ 786 && (! flag_pic || legitimate_pic_operand_p (X))) \ 787 goto ADDR; \ 788 if (RTX_OK_FOR_BASE_P (X)) \ 789 goto ADDR; \ 790 if (TARGET_AM33 \ 791 && GET_CODE (X) == POST_INC \ 792 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \ 793 && (MODE == SImode || MODE == SFmode || MODE == HImode))\ 794 goto ADDR; \ 795 if (GET_CODE (X) == PLUS) \ 796 { \ 797 rtx base = 0, index = 0; \ 798 if (REG_P (XEXP (X, 0)) \ 799 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \ 800 base = XEXP (X, 0), index = XEXP (X, 1); \ 801 if (REG_P (XEXP (X, 1)) \ 802 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \ 803 base = XEXP (X, 1), index = XEXP (X, 0); \ 804 if (base != 0 && index != 0) \ 805 { \ 806 if (GET_CODE (index) == CONST_INT) \ 807 goto ADDR; \ 808 if (GET_CODE (index) == CONST) \ 809 goto ADDR; \ 810 } \ 811 } \ 812 } 813 814 815 /* Try machine-dependent ways of modifying an illegitimate address 816 to be legitimate. If we find one, return the new, valid address. 817 This macro is used in only one place: `memory_address' in explow.c. 818 819 OLDX is the address as it was before break_out_memory_refs was called. 820 In some cases it is useful to look at this to decide what needs to be done. 821 822 MODE and WIN are passed so that this macro can use 823 GO_IF_LEGITIMATE_ADDRESS. 824 825 It is always safe for this macro to do nothing. It exists to recognize 826 opportunities to optimize the output. */ 827 828 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ 829 { rtx orig_x = (X); \ 830 (X) = legitimize_address (X, OLDX, MODE); \ 831 if ((X) != orig_x && memory_address_p (MODE, X)) \ 832 goto WIN; } 833 834 /* Go to LABEL if ADDR (a legitimate address expression) 835 has an effect that depends on the machine mode it is used for. */ 836 837 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ 838 if (GET_CODE (ADDR) == POST_INC) \ 839 goto LABEL 840 841 /* Nonzero if the constant value X is a legitimate general operand. 842 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 843 844 #define LEGITIMATE_CONSTANT_P(X) 1 845 846 /* Zero if this needs fixing up to become PIC. */ 847 848 #define LEGITIMATE_PIC_OPERAND_P(X) (legitimate_pic_operand_p (X)) 849 850 /* Register to hold the addressing base for 851 position independent code access to data items. */ 852 #define PIC_OFFSET_TABLE_REGNUM PIC_REG 853 854 /* The name of the pseudo-symbol representing the Global Offset Table. */ 855 #define GOT_SYMBOL_NAME "*_GLOBAL_OFFSET_TABLE_" 856 857 #define SYMBOLIC_CONST_P(X) \ 858 ((GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF) \ 859 && ! LEGITIMATE_PIC_OPERAND_P (X)) 860 861 /* Non-global SYMBOL_REFs have SYMBOL_REF_FLAG enabled. */ 862 #define MN10300_GLOBAL_P(X) (! SYMBOL_REF_FLAG (X)) 863 864 /* Recognize machine-specific patterns that may appear within 865 constants. Used for PIC-specific UNSPECs. */ 866 #define OUTPUT_ADDR_CONST_EXTRA(STREAM, X, FAIL) \ 867 do \ 868 if (GET_CODE (X) == UNSPEC && XVECLEN ((X), 0) == 1) \ 869 { \ 870 switch (XINT ((X), 1)) \ 871 { \ 872 case UNSPEC_INT_LABEL: \ 873 asm_fprintf ((STREAM), ".%LLIL%d", \ 874 INTVAL (XVECEXP ((X), 0, 0))); \ 875 break; \ 876 case UNSPEC_PIC: \ 877 /* GLOBAL_OFFSET_TABLE or local symbols, no suffix. */ \ 878 output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \ 879 break; \ 880 case UNSPEC_GOT: \ 881 output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \ 882 fputs ("@GOT", (STREAM)); \ 883 break; \ 884 case UNSPEC_GOTOFF: \ 885 output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \ 886 fputs ("@GOTOFF", (STREAM)); \ 887 break; \ 888 case UNSPEC_PLT: \ 889 output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \ 890 fputs ("@PLT", (STREAM)); \ 891 break; \ 892 default: \ 893 goto FAIL; \ 894 } \ 895 break; \ 896 } \ 897 else \ 898 goto FAIL; \ 899 while (0) 900 901 /* Tell final.c how to eliminate redundant test instructions. */ 902 903 /* Here we define machine-dependent flags and fields in cc_status 904 (see `conditions.h'). No extra ones are needed for the VAX. */ 905 906 /* Store in cc_status the expressions 907 that the condition codes will describe 908 after execution of an instruction whose pattern is EXP. 909 Do not alter them if the instruction would not alter the cc's. */ 910 911 #define CC_OVERFLOW_UNUSABLE 0x200 912 #define CC_NO_CARRY CC_NO_OVERFLOW 913 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN) 914 915 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ 916 ((CLASS1 == CLASS2 && (CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS)) ? 2 :\ 917 ((CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS) && \ 918 (CLASS2 == ADDRESS_REGS || CLASS2 == DATA_REGS)) ? 4 : \ 919 (CLASS1 == SP_REGS && CLASS2 == ADDRESS_REGS) ? 2 : \ 920 (CLASS1 == ADDRESS_REGS && CLASS2 == SP_REGS) ? 4 : \ 921 ! TARGET_AM33 ? 6 : \ 922 (CLASS1 == SP_REGS || CLASS2 == SP_REGS) ? 6 : \ 923 (CLASS1 == CLASS2 && CLASS1 == EXTENDED_REGS) ? 6 : \ 924 (CLASS1 == FP_REGS || CLASS2 == FP_REGS) ? 6 : \ 925 (CLASS1 == EXTENDED_REGS || CLASS2 == EXTENDED_REGS) ? 4 : \ 926 4) 927 928 /* Nonzero if access to memory by bytes or half words is no faster 929 than accessing full words. */ 930 #define SLOW_BYTE_ACCESS 1 931 932 /* Dispatch tables on the mn10300 are extremely expensive in terms of code 933 and readonly data size. So we crank up the case threshold value to 934 encourage a series of if/else comparisons to implement many small switch 935 statements. In theory, this value could be increased much more if we 936 were solely optimizing for space, but we keep it "reasonable" to avoid 937 serious code efficiency lossage. */ 938 #define CASE_VALUES_THRESHOLD 6 939 940 #define NO_FUNCTION_CSE 941 942 /* According expr.c, a value of around 6 should minimize code size, and 943 for the MN10300 series, that's our primary concern. */ 944 #define MOVE_RATIO 6 945 946 #define TEXT_SECTION_ASM_OP "\t.section .text" 947 #define DATA_SECTION_ASM_OP "\t.section .data" 948 #define BSS_SECTION_ASM_OP "\t.section .bss" 949 950 #define ASM_COMMENT_START "#" 951 952 /* Output to assembler file text saying following lines 953 may contain character constants, extra white space, comments, etc. */ 954 955 #define ASM_APP_ON "#APP\n" 956 957 /* Output to assembler file text saying following lines 958 no longer contain unusual constructs. */ 959 960 #define ASM_APP_OFF "#NO_APP\n" 961 962 /* This says how to output the assembler to define a global 963 uninitialized but not common symbol. 964 Try to use asm_output_bss to implement this macro. */ 965 966 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ 967 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN)) 968 969 /* Globalizing directive for a label. */ 970 #define GLOBAL_ASM_OP "\t.global " 971 972 /* This is how to output a reference to a user-level label named NAME. 973 `assemble_name' uses this. */ 974 975 #undef ASM_OUTPUT_LABELREF 976 #define ASM_OUTPUT_LABELREF(FILE, NAME) \ 977 fprintf (FILE, "_%s", (*targetm.strip_name_encoding) (NAME)) 978 979 #define ASM_PN_FORMAT "%s___%lu" 980 981 /* This is how we tell the assembler that two symbols have the same value. */ 982 983 #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \ 984 do { assemble_name(FILE, NAME1); \ 985 fputs(" = ", FILE); \ 986 assemble_name(FILE, NAME2); \ 987 fputc('\n', FILE); } while (0) 988 989 990 /* How to refer to registers in assembler output. 991 This sequence is indexed by compiler's hard-register-number (see above). */ 992 993 #define REGISTER_NAMES \ 994 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", "ap", "sp", \ 995 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7" \ 996 , "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7" \ 997 , "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15" \ 998 , "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23" \ 999 , "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" \ 1000 } 1001 1002 #define ADDITIONAL_REGISTER_NAMES \ 1003 { {"r8", 4}, {"r9", 5}, {"r10", 6}, {"r11", 7}, \ 1004 {"r12", 0}, {"r13", 1}, {"r14", 2}, {"r15", 3}, \ 1005 {"e0", 10}, {"e1", 11}, {"e2", 12}, {"e3", 13}, \ 1006 {"e4", 14}, {"e5", 15}, {"e6", 16}, {"e7", 17} \ 1007 , {"fd0", 18}, {"fd2", 20}, {"fd4", 22}, {"fd6", 24} \ 1008 , {"fd8", 26}, {"fd10", 28}, {"fd12", 30}, {"fd14", 32} \ 1009 , {"fd16", 34}, {"fd18", 36}, {"fd20", 38}, {"fd22", 40} \ 1010 , {"fd24", 42}, {"fd26", 44}, {"fd28", 46}, {"fd30", 48} \ 1011 } 1012 1013 /* Print an instruction operand X on file FILE. 1014 look in mn10300.c for details */ 1015 1016 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE,X,CODE) 1017 1018 /* Print a memory operand whose address is X, on file FILE. 1019 This uses a function in output-vax.c. */ 1020 1021 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) 1022 1023 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) 1024 #define ASM_OUTPUT_REG_POP(FILE,REGNO) 1025 1026 /* This is how to output an element of a case-vector that is absolute. */ 1027 1028 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1029 fprintf (FILE, "\t%s .L%d\n", ".long", VALUE) 1030 1031 /* This is how to output an element of a case-vector that is relative. */ 1032 1033 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 1034 fprintf (FILE, "\t%s .L%d-.L%d\n", ".long", VALUE, REL) 1035 1036 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ 1037 if ((LOG) != 0) \ 1038 fprintf (FILE, "\t.align %d\n", (LOG)) 1039 1040 /* We don't have to worry about dbx compatibility for the mn10300. */ 1041 #define DEFAULT_GDB_EXTENSIONS 1 1042 1043 /* Use dwarf2 debugging info by default. */ 1044 #undef PREFERRED_DEBUGGING_TYPE 1045 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG 1046 1047 #define DWARF2_ASM_LINE_DEBUG_INFO 1 1048 1049 /* GDB always assumes the current function's frame begins at the value 1050 of the stack pointer upon entry to the current function. Accessing 1051 local variables and parameters passed on the stack is done using the 1052 base of the frame + an offset provided by GCC. 1053 1054 For functions which have frame pointers this method works fine; 1055 the (frame pointer) == (stack pointer at function entry) and GCC provides 1056 an offset relative to the frame pointer. 1057 1058 This loses for functions without a frame pointer; GCC provides an offset 1059 which is relative to the stack pointer after adjusting for the function's 1060 frame size. GDB would prefer the offset to be relative to the value of 1061 the stack pointer at the function's entry. Yuk! */ 1062 #define DEBUGGER_AUTO_OFFSET(X) \ 1063 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \ 1064 + (frame_pointer_needed \ 1065 ? 0 : -initial_offset (FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM))) 1066 1067 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \ 1068 ((GET_CODE (X) == PLUS ? OFFSET : 0) \ 1069 + (frame_pointer_needed \ 1070 ? 0 : -initial_offset (ARG_POINTER_REGNUM, STACK_POINTER_REGNUM))) 1071 1072 /* Specify the machine mode that this machine uses 1073 for the index in the tablejump instruction. */ 1074 #define CASE_VECTOR_MODE Pmode 1075 1076 /* Define if operations between registers always perform the operation 1077 on the full register even if a narrower mode is specified. */ 1078 #define WORD_REGISTER_OPERATIONS 1079 1080 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 1081 1082 /* This flag, if defined, says the same insns that convert to a signed fixnum 1083 also convert validly to an unsigned one. */ 1084 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC 1085 1086 /* Max number of bytes we can move from memory to memory 1087 in one reasonably fast instruction. */ 1088 #define MOVE_MAX 4 1089 1090 /* Define if shifts truncate the shift count 1091 which implies one can omit a sign-extension or zero-extension 1092 of a shift count. */ 1093 #define SHIFT_COUNT_TRUNCATED 1 1094 1095 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1096 is done just by pretending it is already truncated. */ 1097 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1098 1099 /* Specify the machine mode that pointers have. 1100 After generation of rtl, the compiler makes no further distinction 1101 between pointers and any other objects of this machine mode. */ 1102 #define Pmode SImode 1103 1104 /* A function address in a call instruction 1105 is a byte address (for indexing purposes) 1106 so give the MEM rtx a byte's mode. */ 1107 #define FUNCTION_MODE QImode 1108 1109 /* The assembler op to get a word. */ 1110 1111 #define FILE_ASM_OP "\t.file\n" 1112 1113 #define PREDICATE_CODES \ 1114 {"const_1f_operand", {CONST_INT, CONST_DOUBLE}}, \ 1115 {"const_8bit_operand", {CONST_INT}}, \ 1116 {"call_address_operand", {SYMBOL_REF, REG, UNSPEC}}, 1117 1118 typedef struct mn10300_cc_status_mdep 1119 { 1120 int fpCC; 1121 } 1122 cc_status_mdep; 1123 1124 #define CC_STATUS_MDEP cc_status_mdep 1125 1126 #define CC_STATUS_MDEP_INIT (cc_status.mdep.fpCC = 0) 1127