1 /* Definitions for GCC. Part of the machine description for CRIS.
2 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by Axis Communications. Written by Hans-Peter Nilsson.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 #include "config.h"
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27 #include "rtl.h"
28 #include "regs.h"
29 #include "hard-reg-set.h"
30 #include "real.h"
31 #include "insn-config.h"
32 #include "conditions.h"
33 #include "insn-attr.h"
34 #include "flags.h"
35 #include "tree.h"
36 #include "expr.h"
37 #include "except.h"
38 #include "function.h"
39 #include "toplev.h"
40 #include "recog.h"
41 #include "tm_p.h"
42 #include "debug.h"
43 #include "output.h"
44 #include "target.h"
45 #include "target-def.h"
46 #include "ggc.h"
47 #include "optabs.h"
48
49 /* Usable when we have an amount to add or subtract, and want the
50 optimal size of the insn. */
51 #define ADDITIVE_SIZE_MODIFIER(size) \
52 ((size) <= 63 ? "q" : (size) <= 255 ? "u.b" : (size) <= 65535 ? "u.w" : ".d")
53
54 #define ASSERT_PLT_UNSPEC(x) \
55 do \
56 { \
57 if (XEXP (x, 1) != NULL_RTX \
58 || (GET_CODE (XVECEXP (x, 0, 0)) != SYMBOL_REF \
59 && GET_CODE (XVECEXP (x, 0, 0)) != LABEL_REF)) \
60 abort (); \
61 } while (0)
62
63 #define LOSE_AND_RETURN(msgid, x) \
64 do \
65 { \
66 cris_operand_lossage (msgid, x); \
67 return; \
68 } while (0)
69
70 /* Per-function machine data. */
71 struct machine_function GTY(())
72 {
73 int needs_return_address_on_stack;
74 };
75
76 /* This little fix suppresses the 'u' or 's' when '%e' in assembly
77 pattern. */
78 static char cris_output_insn_is_bound = 0;
79
80 /* This one suppresses printing out the "rPIC+" in
81 "rPIC+sym:GOTOFF+offset" when doing PIC. For a PLT symbol, it
82 suppresses outputting it as [rPIC+sym:GOTPLT] and outputs similarly
83 just the "sym:GOTOFF" part. */
84 static int cris_pic_sympart_only = 0;
85
86 /* Fix for reg_overlap_mentioned_p. */
87 static int cris_reg_overlap_mentioned_p (rtx, rtx);
88
89 static void cris_print_base (rtx, FILE *);
90
91 static void cris_print_index (rtx, FILE *);
92
93 static struct machine_function * cris_init_machine_status (void);
94
95 static int cris_initial_frame_pointer_offset (void);
96
97 static int saved_regs_mentioned (rtx);
98
99 static void cris_target_asm_function_prologue (FILE *, HOST_WIDE_INT);
100
101 static void cris_target_asm_function_epilogue (FILE *, HOST_WIDE_INT);
102
103 static void cris_operand_lossage (const char *, rtx);
104
105 static void cris_asm_output_mi_thunk
106 (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
107
108 static void cris_file_start (void);
109 static void cris_init_libfuncs (void);
110
111 static bool cris_rtx_costs (rtx, int, int, int *);
112 static int cris_address_cost (rtx);
113
114 /* The function cris_target_asm_function_epilogue puts the last insn to
115 output here. It always fits; there won't be a symbol operand. Used in
116 delay_slots_for_epilogue and function_epilogue. */
117 static char save_last[80];
118
119 /* This is the argument from the "-max-stack-stackframe=" option. */
120 const char *cris_max_stackframe_str;
121
122 /* This is the argument from the "-march=" option. */
123 const char *cris_cpu_str;
124
125 /* This is the argument from the "-mtune=" option. */
126 const char *cris_tune_str;
127
128 /* This is the argument from the "-melinux-stacksize=" option. */
129 const char *cris_elinux_stacksize_str;
130
131 /* This is the parsed result of the "-max-stack-stackframe=" option. If
132 it (still) is zero, then there was no such option given. */
133 int cris_max_stackframe = 0;
134
135 /* This is the parsed result of the "-march=" option, if given. */
136 int cris_cpu_version = CRIS_DEFAULT_CPU_VERSION;
137
138 #undef TARGET_ASM_ALIGNED_HI_OP
139 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
140 #undef TARGET_ASM_ALIGNED_SI_OP
141 #define TARGET_ASM_ALIGNED_SI_OP "\t.dword\t"
142 #undef TARGET_ASM_ALIGNED_DI_OP
143 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
144
145 /* We need to define these, since the 2byte, 4byte, 8byte op:s are only
146 available in ELF. These "normal" pseudos do not have any alignment
147 constraints or side-effects. */
148 #undef TARGET_ASM_UNALIGNED_HI_OP
149 #define TARGET_ASM_UNALIGNED_HI_OP TARGET_ASM_ALIGNED_HI_OP
150
151 #undef TARGET_ASM_UNALIGNED_SI_OP
152 #define TARGET_ASM_UNALIGNED_SI_OP TARGET_ASM_ALIGNED_SI_OP
153
154 #undef TARGET_ASM_UNALIGNED_DI_OP
155 #define TARGET_ASM_UNALIGNED_DI_OP TARGET_ASM_ALIGNED_DI_OP
156
157 #undef TARGET_ASM_FUNCTION_PROLOGUE
158 #define TARGET_ASM_FUNCTION_PROLOGUE cris_target_asm_function_prologue
159
160 #undef TARGET_ASM_FUNCTION_EPILOGUE
161 #define TARGET_ASM_FUNCTION_EPILOGUE cris_target_asm_function_epilogue
162
163 #undef TARGET_ASM_OUTPUT_MI_THUNK
164 #define TARGET_ASM_OUTPUT_MI_THUNK cris_asm_output_mi_thunk
165 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
166 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
167
168 #undef TARGET_ASM_FILE_START
169 #define TARGET_ASM_FILE_START cris_file_start
170
171 #undef TARGET_INIT_LIBFUNCS
172 #define TARGET_INIT_LIBFUNCS cris_init_libfuncs
173
174 #undef TARGET_RTX_COSTS
175 #define TARGET_RTX_COSTS cris_rtx_costs
176 #undef TARGET_ADDRESS_COST
177 #define TARGET_ADDRESS_COST cris_address_cost
178
179 struct gcc_target targetm = TARGET_INITIALIZER;
180
181 /* Predicate functions. */
182
183 /* This checks a part of an address, the one that is not a plain register
184 for an addressing mode using BDAP.
185 Allowed operands is either:
186 a) a register
187 b) a CONST operand (but not a symbol when generating PIC)
188 c) a [r] or [r+] in SImode, or sign-extend from HI or QI. */
189
190 int
cris_bdap_operand(rtx op,enum machine_mode mode)191 cris_bdap_operand (rtx op, enum machine_mode mode)
192 {
193 register enum rtx_code code = GET_CODE (op);
194
195 if (mode != SImode && (mode != VOIDmode || GET_MODE (op) != VOIDmode))
196 return 0;
197
198 /* Just return whether this is a simple register or constant. */
199 if (register_operand (op, mode)
200 || (CONSTANT_P (op) && !(flag_pic && cris_symbol (op))))
201 return 1;
202
203 /* Is it a [r] or possibly a [r+]? */
204 if (code == MEM)
205 {
206 rtx tem = XEXP (op, 0);
207
208 if (mode == SImode
209 && (register_operand (tem, SImode)
210 || (GET_CODE (tem) == POST_INC
211 && register_operand (XEXP (tem, 0), SImode))))
212 return 1;
213 else
214 return 0;
215 }
216
217 /* Perhaps a sign-extended mem: [r].(b|w) or [r+].(b|w)? */
218 if (code == SIGN_EXTEND)
219 {
220 rtx tem = XEXP (op, 0);
221
222 if (GET_CODE (tem) != MEM)
223 return 0;
224
225 tem = XEXP (tem, 0);
226 if (mode == SImode
227 && (register_operand (tem, SImode)
228 || (GET_CODE (tem) == POST_INC
229 && register_operand (XEXP (tem, 0), SImode))))
230 return 1;
231 else
232 return 0;
233 }
234
235 return 0;
236 }
237
238 /* This is similar to cris_bdap_operand:
239 It checks a part of an address, the one that is not a plain register
240 for an addressing mode using BDAP *or* BIAP.
241 Allowed operands is either:
242 a) a register
243 b) a CONST operand (but not a symbol when generating PIC)
244 c) a mult of (1, 2 or 4) and a register
245 d) a [r] or [r+] in SImode, or sign-extend from HI or QI. */
246
247 int
cris_bdap_biap_operand(rtx op,enum machine_mode mode)248 cris_bdap_biap_operand (rtx op, enum machine_mode mode)
249 {
250 register enum rtx_code code = GET_CODE (op);
251 rtx reg;
252 rtx val;
253
254 /* Check for bdap operand. */
255 if (cris_bdap_operand (op, mode))
256 return 1;
257
258 if (mode != SImode && (mode != VOIDmode || GET_MODE (op) != VOIDmode))
259 return 0;
260
261 /* Check that we're looking at a BIAP operand. */
262 if (code != MULT)
263 return 0;
264
265 /* Canonicalize register and multiplicand. */
266 if (GET_CODE (XEXP (op, 0)) == CONST_INT)
267 {
268 val = XEXP (op, 0);
269 reg = XEXP (op, 1);
270 }
271 else
272 {
273 val = XEXP (op, 1);
274 reg = XEXP (op, 0);
275 }
276
277 /* Check that the operands are correct after canonicalization. */
278 if (! register_operand (reg, SImode) || GET_CODE (val) != CONST_INT)
279 return 0;
280
281 /* Check that the multiplicand has a valid value. */
282 if ((code == MULT
283 && (INTVAL (val) == 1 || INTVAL (val) == 2 || INTVAL (val) == 4)))
284 return 1;
285
286 return 0;
287 }
288
289 /* Check if MODE is same as mode for X, and X is PLUS, MINUS, IOR or
290 AND or UMIN. */
291
292 int
cris_orthogonal_operator(rtx x,enum machine_mode mode)293 cris_orthogonal_operator (rtx x, enum machine_mode mode)
294 {
295 enum rtx_code code = GET_CODE (x);
296
297 if (mode == VOIDmode)
298 mode = GET_MODE (x);
299
300 return (GET_MODE (x) == mode
301 && (code == PLUS || code == MINUS
302 || code == IOR || code == AND || code == UMIN));
303 }
304
305 /* Check if MODE is same as mode for X, and X is PLUS, IOR or AND or
306 UMIN. */
307
308 int
cris_commutative_orth_op(rtx x,enum machine_mode mode)309 cris_commutative_orth_op (rtx x, enum machine_mode mode)
310 {
311 enum rtx_code code = GET_CODE (x);
312
313 if (mode == VOIDmode)
314 mode = GET_MODE (x);
315
316 return (GET_MODE (x) == mode &&
317 (code == PLUS
318 || code == IOR || code == AND || code == UMIN));
319 }
320
321 /* Check if MODE is same as mode for X, and X is PLUS or MINUS or UMIN.
322 By the name, you might think we should include MULT. We don't because
323 it doesn't accept the same addressing modes as the others (ony
324 registers) and there's also the problem of handling TARGET_MUL_BUG. */
325
326 int
cris_operand_extend_operator(rtx x,enum machine_mode mode)327 cris_operand_extend_operator (rtx x, enum machine_mode mode)
328 {
329 enum rtx_code code = GET_CODE (x);
330
331 if (mode == VOIDmode)
332 mode = GET_MODE (x);
333
334 return (GET_MODE (x) == mode
335 && (code == PLUS || code == MINUS || code == UMIN));
336 }
337
338 /* Check if MODE is same as mode for X, and X is PLUS or MINUS. */
339
340 int
cris_additive_operand_extend_operator(rtx x,enum machine_mode mode)341 cris_additive_operand_extend_operator (rtx x, enum machine_mode mode)
342 {
343 enum rtx_code code = GET_CODE (x);
344
345 if (mode == VOIDmode)
346 mode = GET_MODE (x);
347
348 return (GET_MODE (x) == mode
349 && (code == PLUS || code == MINUS));
350 }
351
352 /* Check to see if MODE is same as mode for X, and X is SIGN_EXTEND or
353 ZERO_EXTEND. */
354
355 int
cris_extend_operator(rtx x,enum machine_mode mode)356 cris_extend_operator (rtx x, enum machine_mode mode)
357 {
358 enum rtx_code code = GET_CODE (x);
359
360 if (mode == VOIDmode)
361 mode = GET_MODE (x);
362
363 return
364 (GET_MODE (x) == mode && (code == SIGN_EXTEND || code == ZERO_EXTEND));
365 }
366
367 /* Check to see if MODE is same as mode for X, and X is PLUS or BOUND. */
368
369 int
cris_plus_or_bound_operator(rtx x,enum machine_mode mode)370 cris_plus_or_bound_operator (rtx x, enum machine_mode mode)
371 {
372 enum rtx_code code = GET_CODE (x);
373
374 if (mode == VOIDmode)
375 mode = GET_MODE (x);
376
377 return
378 (GET_MODE (x) == mode && (code == UMIN || code == PLUS));
379 }
380
381 /* Used as an operator to get a handle on a already-known-valid MEM rtx:es
382 (no need to validate the address), where some address expression parts
383 have their own match_operand. */
384
385 int
cris_mem_op(rtx x,enum machine_mode mode)386 cris_mem_op (rtx x, enum machine_mode mode)
387 {
388 if (mode == VOIDmode)
389 mode = GET_MODE (x);
390
391 return GET_MODE (x) == mode && GET_CODE (x) == MEM;
392 }
393
394 /* Since with -fPIC, not all symbols are valid PIC symbols or indeed
395 general_operands, we have to have a predicate that matches it for the
396 "movsi" expander. */
397
398 int
cris_general_operand_or_symbol(rtx op,enum machine_mode mode)399 cris_general_operand_or_symbol (rtx op, enum machine_mode mode)
400 {
401 return general_operand (op, mode)
402 || (CONSTANT_P (op) && cris_symbol (op));
403 }
404
405 /* Since a PIC symbol without a GOT entry is not a general_operand, we
406 have to have a predicate that matches it. We use this in the expanded
407 "movsi" anonymous pattern for PIC symbols. */
408
409 int
cris_general_operand_or_gotless_symbol(rtx op,enum machine_mode mode)410 cris_general_operand_or_gotless_symbol (rtx op, enum machine_mode mode)
411 {
412 return general_operand (op, mode)
413 || (CONSTANT_P (op) && cris_gotless_symbol (op));
414 }
415
416 /* Since a PLT symbol is not a general_operand, we have to have a
417 predicate that matches it when we need it. We use this in the expanded
418 "call" and "call_value" anonymous patterns. */
419
420 int
cris_general_operand_or_plt_symbol(rtx op,enum machine_mode mode)421 cris_general_operand_or_plt_symbol (rtx op, enum machine_mode mode)
422 {
423 return general_operand (op, mode)
424 || (GET_CODE (op) == CONST
425 && GET_CODE (XEXP (op, 0)) == UNSPEC
426 && !TARGET_AVOID_GOTPLT);
427 }
428
429 /* This matches a (MEM (general_operand)) or
430 (MEM (cris_general_operand_or_symbol)). The second one isn't a valid
431 memory_operand, so we need this predicate to recognize call
432 destinations before we change them to a PLT operand (by wrapping in
433 UNSPEC 0). */
434
435 int
cris_mem_call_operand(rtx op,enum machine_mode mode)436 cris_mem_call_operand (rtx op, enum machine_mode mode)
437 {
438 rtx xmem;
439
440 if (GET_CODE (op) != MEM)
441 return 0;
442
443 if (memory_operand (op, mode))
444 return 1;
445
446 xmem = XEXP (op, 0);
447
448 return cris_general_operand_or_symbol (xmem, GET_MODE (op));
449 }
450
451 /* The CONDITIONAL_REGISTER_USAGE worker. */
452
453 void
cris_conditional_register_usage(void)454 cris_conditional_register_usage (void)
455 {
456 /* FIXME: This isn't nice. We should be able to use that register for
457 something else if the PIC table isn't needed. */
458 if (flag_pic)
459 fixed_regs[PIC_OFFSET_TABLE_REGNUM]
460 = call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
461 }
462
463 /* Return current_function_uses_pic_offset_table. For use in cris.md,
464 since some generated files do not include function.h. */
465
466 int
cris_cfun_uses_pic_table(void)467 cris_cfun_uses_pic_table (void)
468 {
469 return current_function_uses_pic_offset_table;
470 }
471
472 /* Given an rtx, return the text string corresponding to the CODE of X.
473 Intended for use in the assembly language output section of a
474 define_insn. */
475
476 const char *
cris_op_str(rtx x)477 cris_op_str (rtx x)
478 {
479 cris_output_insn_is_bound = 0;
480 switch (GET_CODE (x))
481 {
482 case PLUS:
483 return "add";
484 break;
485
486 case MINUS:
487 return "sub";
488 break;
489
490 case MULT:
491 /* This function is for retrieving a part of an instruction name for
492 an operator, for immediate output. If that ever happens for
493 MULT, we need to apply TARGET_MUL_BUG in the caller. Make sure
494 we notice. */
495 abort ();
496 break;
497
498 case DIV:
499 return "div";
500 break;
501
502 case AND:
503 return "and";
504 break;
505
506 case IOR:
507 return "or";
508 break;
509
510 case XOR:
511 return "xor";
512 break;
513
514 case NOT:
515 return "not";
516 break;
517
518 case ASHIFT:
519 return "lsl";
520 break;
521
522 case LSHIFTRT:
523 return "lsr";
524 break;
525
526 case ASHIFTRT:
527 return "asr";
528 break;
529
530 case UMIN:
531 /* Used to control the sign/zero-extend character for the 'e' modifier.
532 BOUND has none. */
533 cris_output_insn_is_bound = 1;
534 return "bound";
535 break;
536
537 default:
538 return "Unknown operator";
539 break;
540 }
541 }
542
543 /* Emit an error message when we're in an asm, and a fatal error for
544 "normal" insns. Formatted output isn't easily implemented, since we
545 use output_operand_lossage to output the actual message and handle the
546 categorization of the error. */
547
548 static void
cris_operand_lossage(const char * msgid,rtx op)549 cris_operand_lossage (const char *msgid, rtx op)
550 {
551 debug_rtx (op);
552 output_operand_lossage ("%s", msgid);
553 }
554
555 /* Print an index part of an address to file. */
556
557 static void
cris_print_index(rtx index,FILE * file)558 cris_print_index (rtx index, FILE *file)
559 {
560 rtx inner = XEXP (index, 0);
561
562 /* Make the index "additive" unless we'll output a negative number, in
563 which case the sign character is free (as in free beer). */
564 if (GET_CODE (index) != CONST_INT || INTVAL (index) >= 0)
565 putc ('+', file);
566
567 if (REG_P (index))
568 fprintf (file, "$%s.b", reg_names[REGNO (index)]);
569 else if (CONSTANT_P (index))
570 cris_output_addr_const (file, index);
571 else if (GET_CODE (index) == MULT)
572 {
573 fprintf (file, "$%s.",
574 reg_names[REGNO (XEXP (index, 0))]);
575
576 putc (INTVAL (XEXP (index, 1)) == 2 ? 'w' : 'd', file);
577 }
578 else if (GET_CODE (index) == SIGN_EXTEND &&
579 GET_CODE (inner) == MEM)
580 {
581 rtx inner_inner = XEXP (inner, 0);
582
583 if (GET_CODE (inner_inner) == POST_INC)
584 {
585 fprintf (file, "[$%s+].",
586 reg_names[REGNO (XEXP (inner_inner, 0))]);
587 putc (GET_MODE (inner) == HImode ? 'w' : 'b', file);
588 }
589 else
590 {
591 fprintf (file, "[$%s].", reg_names[REGNO (inner_inner)]);
592
593 putc (GET_MODE (inner) == HImode ? 'w' : 'b', file);
594 }
595 }
596 else if (GET_CODE (index) == MEM)
597 {
598 if (GET_CODE (inner) == POST_INC)
599 fprintf (file, "[$%s+].d", reg_names[REGNO (XEXP (inner, 0))]);
600 else
601 fprintf (file, "[$%s].d", reg_names[REGNO (inner)]);
602 }
603 else
604 cris_operand_lossage ("unexpected index-type in cris_print_index",
605 index);
606 }
607
608 /* Print a base rtx of an address to file. */
609
610 static void
cris_print_base(rtx base,FILE * file)611 cris_print_base (rtx base, FILE *file)
612 {
613 if (REG_P (base))
614 fprintf (file, "$%s", reg_names[REGNO (base)]);
615 else if (GET_CODE (base) == POST_INC)
616 fprintf (file, "$%s+", reg_names[REGNO (XEXP (base, 0))]);
617 else
618 cris_operand_lossage ("unexpected base-type in cris_print_base",
619 base);
620 }
621
622 /* Usable as a guard in expressions. */
623
624 int
cris_fatal(char * arg)625 cris_fatal (char *arg)
626 {
627 internal_error (arg);
628
629 /* We'll never get here; this is just to appease compilers. */
630 return 0;
631 }
632
633 /* Textual function prologue. */
634
635 static void
cris_target_asm_function_prologue(FILE * file,HOST_WIDE_INT size)636 cris_target_asm_function_prologue (FILE *file, HOST_WIDE_INT size)
637 {
638 int regno;
639
640 /* Shorten the used name for readability. */
641 int cfoa_size = current_function_outgoing_args_size;
642 int last_movem_reg = -1;
643 int doing_dwarf = dwarf2out_do_frame ();
644 int framesize;
645 int faked_args_size = 0;
646 int cfa_write_offset = 0;
647 char *cfa_label = NULL;
648 int return_address_on_stack
649 = regs_ever_live[CRIS_SRP_REGNUM]
650 || cfun->machine->needs_return_address_on_stack != 0;
651
652 /* Don't do anything if no prologues or epilogues are wanted. */
653 if (!TARGET_PROLOGUE_EPILOGUE)
654 return;
655
656 if (size < 0)
657 abort ();
658
659 /* Align the size to what's best for the CPU model. */
660 if (TARGET_STACK_ALIGN)
661 size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1;
662
663 if (current_function_pretend_args_size)
664 {
665 int pretend = current_function_pretend_args_size;
666 for (regno = CRIS_FIRST_ARG_REG + CRIS_MAX_ARGS_IN_REGS - 1;
667 pretend > 0;
668 regno--, pretend -= 4)
669 {
670 fprintf (file, "\tpush $%s\n", reg_names[regno]);
671 faked_args_size += 4;
672 }
673 }
674
675 framesize = faked_args_size;
676
677 if (doing_dwarf)
678 {
679 /* FIXME: Slightly redundant calculation, as we do the same in
680 pieces below. This offset must be the total adjustment of the
681 stack-pointer. We can then def_cfa call at the end of this
682 function with the current implementation of execute_cfa_insn, but
683 that wouldn't really be clean. */
684
685 int cfa_offset
686 = faked_args_size
687 + (return_address_on_stack ? 4 : 0)
688 + (frame_pointer_needed ? 4 : 0);
689
690 int cfa_reg;
691
692 if (frame_pointer_needed)
693 cfa_reg = FRAME_POINTER_REGNUM;
694 else
695 {
696 cfa_reg = STACK_POINTER_REGNUM;
697 cfa_offset += cris_initial_frame_pointer_offset ();
698 }
699
700 cfa_label = dwarf2out_cfi_label ();
701 dwarf2out_def_cfa (cfa_label, cfa_reg, cfa_offset);
702
703 cfa_write_offset = - faked_args_size - 4;
704 }
705
706 /* Save SRP if not a leaf function. */
707 if (return_address_on_stack)
708 {
709 fprintf (file, "\tPush $srp\n");
710 framesize += 4;
711
712 if (doing_dwarf)
713 {
714 dwarf2out_return_save (cfa_label, cfa_write_offset);
715 cfa_write_offset -= 4;
716 }
717 }
718
719 /* Set up frame pointer if needed. */
720 if (frame_pointer_needed)
721 {
722 fprintf (file, "\tpush $%s\n\tmove.d $sp,$%s\n",
723 reg_names[FRAME_POINTER_REGNUM],
724 reg_names[FRAME_POINTER_REGNUM]);
725 framesize += 4;
726
727 if (doing_dwarf)
728 {
729 dwarf2out_reg_save (cfa_label, FRAME_POINTER_REGNUM,
730 cfa_write_offset);
731 cfa_write_offset -= 4;
732 }
733 }
734
735 /* Local vars are located above saved regs. */
736 cfa_write_offset -= size;
737
738 /* Get a contiguous sequence of registers, starting with r0, that need
739 to be saved. */
740 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
741 {
742 if ((((regs_ever_live[regno]
743 && !call_used_regs[regno])
744 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
745 && (current_function_uses_pic_offset_table
746 /* It is saved anyway, if there would be a gap. */
747 || (flag_pic
748 && regs_ever_live[regno + 1]
749 && !call_used_regs[regno + 1]))))
750 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
751 && regno != CRIS_SRP_REGNUM)
752 || (current_function_calls_eh_return
753 && (regno == EH_RETURN_DATA_REGNO (0)
754 || regno == EH_RETURN_DATA_REGNO (1)
755 || regno == EH_RETURN_DATA_REGNO (2)
756 || regno == EH_RETURN_DATA_REGNO (3))))
757 {
758 /* Check if movem may be used for registers so far. */
759 if (regno == last_movem_reg + 1)
760 /* Yes, update next expected register. */
761 last_movem_reg++;
762 else
763 {
764 /* We cannot use movem for all registers. We have to flush
765 any movem:ed registers we got so far. */
766 if (last_movem_reg != -1)
767 {
768 /* It is a win to use a side-effect assignment for
769 64 <= size <= 128. But side-effect on movem was
770 not usable for CRIS v0..3. Also only do it if
771 side-effects insns are allowed. */
772 if ((last_movem_reg + 1) * 4 + size >= 64
773 && (last_movem_reg + 1) * 4 + size <= 128
774 && cris_cpu_version >= CRIS_CPU_SVINTO
775 && TARGET_SIDE_EFFECT_PREFIXES)
776 fprintf (file, "\tmovem $%s,[$sp=$sp-"HOST_WIDE_INT_PRINT_DEC"]\n",
777 reg_names[last_movem_reg],
778 (last_movem_reg + 1) * 4 + size);
779 else
780 {
781 /* Avoid printing multiple subsequent sub:s for sp. */
782 fprintf (file, "\tsub%s "HOST_WIDE_INT_PRINT_DEC",$sp\n",
783 ADDITIVE_SIZE_MODIFIER ((last_movem_reg + 1)
784 * 4 + size),
785 (last_movem_reg + 1) * 4 + size);
786
787 fprintf (file, "\tmovem $%s,[$sp]\n",
788 reg_names[last_movem_reg]);
789 }
790
791 framesize += (last_movem_reg + 1) * 4 + size;
792
793 if (TARGET_PDEBUG)
794 fprintf (file, "; frame "HOST_WIDE_INT_PRINT_DEC
795 ", #regs %d, bytes %d args %d\n",
796 size,
797 last_movem_reg + 1,
798 (last_movem_reg + 1) * 4,
799 current_function_args_size);
800
801 last_movem_reg = -1;
802 size = 0;
803 }
804 else if (size > 0)
805 {
806 /* Local vars on stack, but there are no movem:s.
807 Just allocate space. */
808 fprintf (file, "\tSub%s "HOST_WIDE_INT_PRINT_DEC",$sp\n",
809 ADDITIVE_SIZE_MODIFIER (size),
810 size);
811 framesize += size;
812 size = 0;
813 }
814
815 fprintf (file, "\tPush $%s\n", reg_names[regno]);
816 framesize += 4;
817 }
818
819 if (doing_dwarf)
820 {
821 /* Registers are stored lowest numbered at highest address,
822 which matches the loop order; we just need to update the
823 write-offset. */
824 dwarf2out_reg_save (cfa_label, regno, cfa_write_offset);
825 cfa_write_offset -= 4;
826 }
827 }
828 }
829
830 /* Check after, if we can movem all registers. This is the normal
831 case. */
832 if (last_movem_reg != -1)
833 {
834 /* Side-effect assignment on movem was not supported for CRIS v0..3,
835 and don't do it if we're asked not to.
836
837 The movem is already accounted for, for unwind. */
838
839 if ((last_movem_reg + 1) * 4 + size >= 64
840 && (last_movem_reg + 1) * 4 + size <= 128
841 && cris_cpu_version >= CRIS_CPU_SVINTO
842 && TARGET_SIDE_EFFECT_PREFIXES)
843 fprintf (file, "\tmovem $%s,[$sp=$sp-"HOST_WIDE_INT_PRINT_DEC"]\n",
844 reg_names[last_movem_reg],
845 (last_movem_reg+1) * 4 + size);
846 else
847 {
848 /* Avoid printing multiple subsequent sub:s for sp. FIXME:
849 Clean up the conditional expression. */
850 fprintf (file, "\tsub%s "HOST_WIDE_INT_PRINT_DEC",$sp\n",
851 ADDITIVE_SIZE_MODIFIER ((last_movem_reg + 1) * 4 + size),
852 (last_movem_reg + 1) * 4 + size);
853 /* To be compatible with v0..v3 means we do not use an assignment
854 addressing mode with movem. We normally don't need that
855 anyway. It would only be slightly more efficient for 64..128
856 bytes frame size. */
857 fprintf (file, "\tmovem $%s,[$sp]\n", reg_names[last_movem_reg]);
858 }
859
860 framesize += (last_movem_reg + 1) * 4 + size;
861
862 if (TARGET_PDEBUG)
863 fprintf (file, "; frame "HOST_WIDE_INT_PRINT_DEC
864 ", #regs %d, bytes %d args %d\n",
865 size,
866 last_movem_reg + 1,
867 (last_movem_reg + 1) * 4,
868 current_function_args_size);
869
870 /* We have to put outgoing argument space after regs. */
871 if (cfoa_size)
872 {
873 /* This does not need to be accounted for, for unwind. */
874
875 fprintf (file, "\tSub%s %d,$sp\n",
876 ADDITIVE_SIZE_MODIFIER (cfoa_size),
877 cfoa_size);
878 framesize += cfoa_size;
879 }
880 }
881 else if ((size + cfoa_size) > 0)
882 {
883 /* This does not need to be accounted for, for unwind. */
884
885 /* Local vars on stack, and we could not use movem. Add a sub here. */
886 fprintf (file, "\tSub%s "HOST_WIDE_INT_PRINT_DEC",$sp\n",
887 ADDITIVE_SIZE_MODIFIER (size + cfoa_size),
888 cfoa_size + size);
889 framesize += size + cfoa_size;
890 }
891
892 /* Set up the PIC register. */
893 if (current_function_uses_pic_offset_table)
894 fprintf (file, "\tmove.d $pc,$%s\n\tsub.d .:GOTOFF,$%s\n",
895 reg_names[PIC_OFFSET_TABLE_REGNUM],
896 reg_names[PIC_OFFSET_TABLE_REGNUM]);
897
898 if (TARGET_PDEBUG)
899 fprintf (file,
900 "; parm #%d @ %d; frame " HOST_WIDE_INT_PRINT_DEC
901 ", FP-SP is %d; leaf: %s%s; fp %s, outg: %d arg %d\n",
902 CRIS_MAX_ARGS_IN_REGS + 1, FIRST_PARM_OFFSET (0),
903 get_frame_size (),
904 cris_initial_frame_pointer_offset (),
905 leaf_function_p () ? "yes" : "no",
906 return_address_on_stack ? "no" :"yes",
907 frame_pointer_needed ? "yes" : "no",
908 cfoa_size, current_function_args_size);
909
910 if (cris_max_stackframe && framesize > cris_max_stackframe)
911 warning ("stackframe too big: %d bytes", framesize);
912 }
913
914 /* Return nonzero if there are regs mentioned in the insn that are not all
915 in the call_used regs. This is part of the decision whether an insn
916 can be put in the epilogue. */
917
918 static int
saved_regs_mentioned(rtx x)919 saved_regs_mentioned (rtx x)
920 {
921 int i;
922 const char *fmt;
923 RTX_CODE code;
924
925 /* Mainly stolen from refers_to_regno_p in rtlanal.c. */
926
927 code = GET_CODE (x);
928
929 switch (code)
930 {
931 case REG:
932 i = REGNO (x);
933 return !call_used_regs[i];
934
935 case SUBREG:
936 /* If this is a SUBREG of a hard reg, we can see exactly which
937 registers are being modified. Otherwise, handle normally. */
938 i = REGNO (SUBREG_REG (x));
939 return !call_used_regs[i];
940
941 default:
942 ;
943 }
944
945 fmt = GET_RTX_FORMAT (code);
946 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
947 {
948 if (fmt[i] == 'e')
949 {
950 if (saved_regs_mentioned (XEXP (x, i)))
951 return 1;
952 }
953 else if (fmt[i] == 'E')
954 {
955 int j;
956 for (j = XVECLEN (x, i) - 1; j >=0; j--)
957 if (saved_regs_mentioned (XEXP (x, i)))
958 return 1;
959 }
960 }
961
962 return 0;
963 }
964
965 /* Figure out if the insn may be put in the epilogue. */
966
967 int
cris_eligible_for_epilogue_delay(rtx insn)968 cris_eligible_for_epilogue_delay (rtx insn)
969 {
970 /* First of all, it must be as slottable as for a delayed branch insn. */
971 if (get_attr_slottable (insn) != SLOTTABLE_YES)
972 return 0;
973
974 /* It must not refer to the stack pointer (may be valid for some cases
975 that I can't think of). */
976 if (reg_mentioned_p (stack_pointer_rtx, PATTERN (insn)))
977 return 0;
978
979 /* The frame pointer will be restored in the epilogue, before the
980 "ret", so it can't be referred to. */
981 if (frame_pointer_needed
982 && reg_mentioned_p (frame_pointer_rtx, PATTERN (insn)))
983 return 0;
984
985 /* All saved regs are restored before the delayed insn.
986 This means that we cannot have any instructions that mention the
987 registers that are restored by the epilogue. */
988 if (saved_regs_mentioned (PATTERN (insn)))
989 return 0;
990
991 /* It seems to be ok. */
992 return 1;
993 }
994
995 /* Return the number of delay-slots in the epilogue: return 1 if it
996 contains "ret", else 0. */
997
998 int
cris_delay_slots_for_epilogue(void)999 cris_delay_slots_for_epilogue (void)
1000 {
1001 /* Check if we use a return insn, which we only do for leaf functions.
1002 Else there is no slot to fill. */
1003 if (regs_ever_live[CRIS_SRP_REGNUM]
1004 || cfun->machine->needs_return_address_on_stack != 0)
1005 return 0;
1006
1007 /* By calling function_epilogue with the same parameters as from gcc
1008 we can get info about if the epilogue can fill the delay-slot by itself.
1009 If it is filled from the epilogue, then the corresponding string
1010 is in save_last.
1011 This depends on that the "size" argument to function_epilogue
1012 always is get_frame_size.
1013 FIXME: Kludgy. At least make it a separate function that is not
1014 misnamed or abuses the stream parameter. */
1015 cris_target_asm_function_epilogue (NULL, get_frame_size ());
1016
1017 if (*save_last)
1018 return 1;
1019 return 0;
1020 }
1021
1022 /* Textual function epilogue. When file is NULL, it serves doubly as
1023 a test for whether the epilogue can fill any "ret" delay-slots by
1024 itself by storing the delay insn in save_last. */
1025
1026 static void
cris_target_asm_function_epilogue(FILE * file,HOST_WIDE_INT size)1027 cris_target_asm_function_epilogue (FILE *file, HOST_WIDE_INT size)
1028 {
1029 int regno;
1030 int last_movem_reg = -1;
1031 rtx insn = get_last_insn ();
1032 int argspace_offset = current_function_outgoing_args_size;
1033 int pretend = current_function_pretend_args_size;
1034 int return_address_on_stack
1035 = regs_ever_live[CRIS_SRP_REGNUM]
1036 || cfun->machine->needs_return_address_on_stack != 0;
1037
1038 save_last[0] = 0;
1039
1040 if (file && !TARGET_PROLOGUE_EPILOGUE)
1041 return;
1042
1043 if (TARGET_PDEBUG && file)
1044 fprintf (file, ";;\n");
1045
1046 /* Align byte count of stack frame. */
1047 if (TARGET_STACK_ALIGN)
1048 size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1;
1049
1050 /* If the last insn was a BARRIER, we don't have to write any code,
1051 then all returns were covered by "return" insns. */
1052 if (GET_CODE (insn) == NOTE)
1053 insn = prev_nonnote_insn (insn);
1054 if (insn
1055 && (GET_CODE (insn) == BARRIER
1056 /* We must make sure that the insn really is a "return" and
1057 not a conditional branch. Try to match the return exactly,
1058 and if it doesn't match, assume it is a conditional branch
1059 (and output an epilogue). */
1060 || (GET_CODE (insn) == JUMP_INSN
1061 && GET_CODE (PATTERN (insn)) == RETURN)))
1062 {
1063 if (TARGET_PDEBUG && file)
1064 fprintf (file, ";;;;;\n");
1065 return;
1066 }
1067
1068 /* Check how many saved regs we can movem. They start at r0 and must
1069 be contiguous. */
1070 for (regno = 0;
1071 regno < FIRST_PSEUDO_REGISTER;
1072 regno++)
1073 if ((((regs_ever_live[regno]
1074 && !call_used_regs[regno])
1075 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
1076 && (current_function_uses_pic_offset_table
1077 /* It is saved anyway, if there would be a gap. */
1078 || (flag_pic
1079 && regs_ever_live[regno + 1]
1080 && !call_used_regs[regno + 1]))))
1081 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
1082 && regno != CRIS_SRP_REGNUM)
1083 || (current_function_calls_eh_return
1084 && (regno == EH_RETURN_DATA_REGNO (0)
1085 || regno == EH_RETURN_DATA_REGNO (1)
1086 || regno == EH_RETURN_DATA_REGNO (2)
1087 || regno == EH_RETURN_DATA_REGNO (3))))
1088
1089 {
1090 if (regno == last_movem_reg + 1)
1091 last_movem_reg++;
1092 else
1093 break;
1094 }
1095
1096 for (regno = FIRST_PSEUDO_REGISTER - 1;
1097 regno > last_movem_reg;
1098 regno--)
1099 if ((((regs_ever_live[regno]
1100 && !call_used_regs[regno])
1101 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
1102 && (current_function_uses_pic_offset_table
1103 /* It is saved anyway, if there would be a gap. */
1104 || (flag_pic
1105 && regs_ever_live[regno + 1]
1106 && !call_used_regs[regno + 1]))))
1107 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
1108 && regno != CRIS_SRP_REGNUM)
1109 || (current_function_calls_eh_return
1110 && (regno == EH_RETURN_DATA_REGNO (0)
1111 || regno == EH_RETURN_DATA_REGNO (1)
1112 || regno == EH_RETURN_DATA_REGNO (2)
1113 || regno == EH_RETURN_DATA_REGNO (3))))
1114 {
1115 if (argspace_offset)
1116 {
1117 /* There is an area for outgoing parameters located before
1118 the saved registers. We have to adjust for that. */
1119 if (file)
1120 fprintf (file, "\tAdd%s %d,$sp\n",
1121 ADDITIVE_SIZE_MODIFIER (argspace_offset),
1122 argspace_offset);
1123
1124 /* Make sure we only do this once. */
1125 argspace_offset = 0;
1126 }
1127
1128 /* Flush previous non-movem:ed registers. */
1129 if (*save_last && file)
1130 fprintf (file, save_last);
1131 sprintf (save_last, "\tPop $%s\n", reg_names[regno]);
1132 }
1133
1134 if (last_movem_reg != -1)
1135 {
1136 if (argspace_offset)
1137 {
1138 /* Adjust for the outgoing parameters area, if that's not
1139 handled yet. */
1140 if (*save_last && file)
1141 {
1142 fprintf (file, save_last);
1143 *save_last = 0;
1144 }
1145
1146 if (file)
1147 fprintf (file, "\tAdd%s %d,$sp\n",
1148 ADDITIVE_SIZE_MODIFIER (argspace_offset),
1149 argspace_offset);
1150 argspace_offset = 0;
1151 }
1152 /* Flush previous non-movem:ed registers. */
1153 else if (*save_last && file)
1154 fprintf (file, save_last);
1155 sprintf (save_last, "\tmovem [$sp+],$%s\n", reg_names[last_movem_reg]);
1156 }
1157
1158 /* Restore frame pointer if necessary. */
1159 if (frame_pointer_needed)
1160 {
1161 if (*save_last && file)
1162 fprintf (file, save_last);
1163
1164 if (file)
1165 fprintf (file, "\tmove.d $%s,$sp\n",
1166 reg_names[FRAME_POINTER_REGNUM]);
1167 sprintf (save_last, "\tPop $%s\n",
1168 reg_names[FRAME_POINTER_REGNUM]);
1169 }
1170 else
1171 {
1172 /* If there was no frame-pointer to restore sp from, we must
1173 explicitly deallocate local variables. */
1174
1175 /* Handle space for outgoing parameters that hasn't been handled
1176 yet. */
1177 size += argspace_offset;
1178
1179 if (size)
1180 {
1181 if (*save_last && file)
1182 fprintf (file, save_last);
1183
1184 sprintf (save_last, "\tadd%s "HOST_WIDE_INT_PRINT_DEC",$sp\n",
1185 ADDITIVE_SIZE_MODIFIER (size), size);
1186 }
1187
1188 /* If the size was not in the range for a "quick", we must flush
1189 it here. */
1190 if (size > 63)
1191 {
1192 if (file)
1193 fprintf (file, save_last);
1194 *save_last = 0;
1195 }
1196 }
1197
1198 /* If this function has no pushed register parameters
1199 (stdargs/varargs), and if it is not a leaf function, then we can
1200 just jump-return here. */
1201 if (return_address_on_stack && pretend == 0)
1202 {
1203 if (*save_last && file)
1204 fprintf (file, save_last);
1205 *save_last = 0;
1206
1207 if (file)
1208 {
1209 if (current_function_calls_eh_return)
1210 {
1211 /* The installed EH-return address is in *this* frame, so we
1212 need to pop it before we return. */
1213 fprintf (file, "\tpop $srp\n");
1214 fprintf (file, "\tret\n");
1215 fprintf (file, "\tadd.d $%s,$sp\n", reg_names[CRIS_STACKADJ_REG]);
1216 }
1217 else
1218 fprintf (file, "\tJump [$sp+]\n");
1219
1220 /* Do a sanity check to avoid generating invalid code. */
1221 if (current_function_epilogue_delay_list)
1222 internal_error ("allocated but unused delay list in epilogue");
1223 }
1224 return;
1225 }
1226
1227 /* Rather than add current_function_calls_eh_return conditions
1228 everywhere in the following code (and not be able to test it
1229 thoroughly), assert the assumption that all usage of
1230 __builtin_eh_return are handled above. */
1231 if (current_function_calls_eh_return)
1232 internal_error ("unexpected function type needing stack adjustment for\
1233 __builtin_eh_return");
1234
1235 /* If we pushed some register parameters, then adjust the stack for
1236 them. */
1237 if (pretend)
1238 {
1239 /* Since srp is stored on the way, we need to restore it first. */
1240 if (return_address_on_stack)
1241 {
1242 if (*save_last && file)
1243 fprintf (file, save_last);
1244 *save_last = 0;
1245
1246 if (file)
1247 fprintf (file, "\tpop $srp\n");
1248 }
1249
1250 if (*save_last && file)
1251 fprintf (file, save_last);
1252
1253 sprintf (save_last, "\tadd%s %d,$sp\n",
1254 ADDITIVE_SIZE_MODIFIER (pretend), pretend);
1255 }
1256
1257 /* Here's where we have a delay-slot we need to fill. */
1258 if (file && current_function_epilogue_delay_list)
1259 {
1260 /* If gcc has allocated an insn for the epilogue delay slot, but
1261 things were arranged so we now thought we could do it
1262 ourselves, don't forget to flush that insn. */
1263 if (*save_last)
1264 fprintf (file, save_last);
1265
1266 fprintf (file, "\tRet\n");
1267
1268 /* Output the delay-slot-insn the mandated way. */
1269 final_scan_insn (XEXP (current_function_epilogue_delay_list, 0),
1270 file, 1, -2, 1, NULL);
1271 }
1272 else if (file)
1273 {
1274 fprintf (file, "\tRet\n");
1275
1276 /* If the GCC did not do it, we have to use whatever insn we have,
1277 or a nop. */
1278 if (*save_last)
1279 fprintf (file, save_last);
1280 else
1281 fprintf (file, "\tnOp\n");
1282 }
1283 }
1284
1285 /* The PRINT_OPERAND worker. */
1286
1287 void
cris_print_operand(FILE * file,rtx x,int code)1288 cris_print_operand (FILE *file, rtx x, int code)
1289 {
1290 rtx operand = x;
1291
1292 /* Size-strings corresponding to MULT expressions. */
1293 static const char *const mults[] = { "BAD:0", ".b", ".w", "BAD:3", ".d" };
1294
1295 /* New code entries should just be added to the switch below. If
1296 handling is finished, just return. If handling was just a
1297 modification of the operand, the modified operand should be put in
1298 "operand", and then do a break to let default handling
1299 (zero-modifier) output the operand. */
1300
1301 switch (code)
1302 {
1303 case 'b':
1304 /* Print the unsigned supplied integer as if it was signed
1305 and < 0, i.e print 255 or 65535 as -1, 254, 65534 as -2, etc. */
1306 if (GET_CODE (x) != CONST_INT
1307 || ! CONST_OK_FOR_LETTER_P (INTVAL (x), 'O'))
1308 LOSE_AND_RETURN ("invalid operand for 'b' modifier", x);
1309 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
1310 INTVAL (x)| (INTVAL (x) <= 255 ? ~255 : ~65535));
1311 return;
1312
1313 case 'x':
1314 /* Print assembler code for operator. */
1315 fprintf (file, "%s", cris_op_str (operand));
1316 return;
1317
1318 case 'v':
1319 /* Print the operand without the PIC register. */
1320 if (! flag_pic || ! CONSTANT_P (x) || ! cris_gotless_symbol (x))
1321 LOSE_AND_RETURN ("invalid operand for 'v' modifier", x);
1322 cris_pic_sympart_only++;
1323 cris_output_addr_const (file, x);
1324 cris_pic_sympart_only--;
1325 return;
1326
1327 case 'P':
1328 /* Print the PIC register. Applied to a GOT-less PIC symbol for
1329 sanity. */
1330 if (! flag_pic || ! CONSTANT_P (x) || ! cris_gotless_symbol (x))
1331 LOSE_AND_RETURN ("invalid operand for 'P' modifier", x);
1332 fprintf (file, "$%s", reg_names [PIC_OFFSET_TABLE_REGNUM]);
1333 return;
1334
1335 case 'p':
1336 /* Adjust a power of two to its log2. */
1337 if (GET_CODE (x) != CONST_INT || exact_log2 (INTVAL (x)) < 0 )
1338 LOSE_AND_RETURN ("invalid operand for 'p' modifier", x);
1339 fprintf (file, "%d", exact_log2 (INTVAL (x)));
1340 return;
1341
1342 case 's':
1343 /* For an integer, print 'b' or 'w' if <= 255 or <= 65535
1344 respectively. This modifier also terminates the inhibiting
1345 effects of the 'x' modifier. */
1346 cris_output_insn_is_bound = 0;
1347 if (GET_MODE (x) == VOIDmode && GET_CODE (x) == CONST_INT)
1348 {
1349 if (INTVAL (x) >= 0)
1350 {
1351 if (INTVAL (x) <= 255)
1352 putc ('b', file);
1353 else if (INTVAL (x) <= 65535)
1354 putc ('w', file);
1355 else
1356 putc ('d', file);
1357 }
1358 else
1359 putc ('d', file);
1360 return;
1361 }
1362
1363 /* For a non-integer, print the size of the operand. */
1364 putc ((GET_MODE (x) == SImode || GET_MODE (x) == SFmode)
1365 ? 'd' : GET_MODE (x) == HImode ? 'w'
1366 : GET_MODE (x) == QImode ? 'b'
1367 /* If none of the above, emit an erroneous size letter. */
1368 : 'X',
1369 file);
1370 return;
1371
1372 case 'z':
1373 /* Const_int: print b for -127 <= x <= 255,
1374 w for -32768 <= x <= 65535, else abort. */
1375 if (GET_CODE (x) != CONST_INT
1376 || INTVAL (x) < -32768 || INTVAL (x) > 65535)
1377 LOSE_AND_RETURN ("invalid operand for 'z' modifier", x);
1378 putc (INTVAL (x) >= -128 && INTVAL (x) <= 255 ? 'b' : 'w', file);
1379 return;
1380
1381 case '#':
1382 /* Output a 'nop' if there's nothing for the delay slot.
1383 This method stolen from the sparc files. */
1384 if (dbr_sequence_length () == 0)
1385 fputs ("\n\tnop", file);
1386 return;
1387
1388 case '!':
1389 /* Output directive for alignment padded with "nop" insns.
1390 Optimizing for size, it's plain 4-byte alignment, otherwise we
1391 align the section to a cache-line (32 bytes) and skip at max 2
1392 bytes, i.e. we skip if it's the last insn on a cache-line. The
1393 latter is faster by a small amount (for two test-programs 99.6%
1394 and 99.9%) and larger by a small amount (ditto 100.1% and
1395 100.2%). This is supposed to be the simplest yet performance-
1396 wise least intrusive way to make sure the immediately following
1397 (supposed) muls/mulu insn isn't located at the end of a
1398 cache-line. */
1399 if (TARGET_MUL_BUG)
1400 fputs (optimize_size
1401 ? ".p2alignw 2,0x050f\n\t"
1402 : ".p2alignw 5,0x050f,2\n\t", file);
1403 return;
1404
1405 case 'H':
1406 /* Print high (most significant) part of something. */
1407 switch (GET_CODE (operand))
1408 {
1409 case CONST_INT:
1410 if (HOST_BITS_PER_WIDE_INT == 32)
1411 /* Sign-extension from a normal int to a long long. */
1412 fprintf (file, INTVAL (operand) < 0 ? "-1" : "0");
1413 else
1414 fprintf (file, "0x%x", (unsigned int)(INTVAL (x) >> 31 >> 1));
1415 return;
1416
1417 case CONST_DOUBLE:
1418 /* High part of a long long constant. */
1419 if (GET_MODE (operand) == VOIDmode)
1420 {
1421 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_HIGH (x));
1422 return;
1423 }
1424 else
1425 LOSE_AND_RETURN ("invalid operand for 'H' modifier", x);
1426
1427 case REG:
1428 /* Print reg + 1. Check that there's not an attempt to print
1429 high-parts of registers like stack-pointer or higher. */
1430 if (REGNO (operand) > STACK_POINTER_REGNUM - 2)
1431 LOSE_AND_RETURN ("bad register", operand);
1432 fprintf (file, "$%s", reg_names[REGNO (operand) + 1]);
1433 return;
1434
1435 case MEM:
1436 /* Adjust memory address to high part. */
1437 {
1438 rtx adj_mem = operand;
1439 int size
1440 = GET_MODE_BITSIZE (GET_MODE (operand)) / BITS_PER_UNIT;
1441
1442 /* Adjust so we can use two SImode in DImode.
1443 Calling adj_offsettable_operand will make sure it is an
1444 offsettable address. Don't do this for a postincrement
1445 though; it should remain as it was. */
1446 if (GET_CODE (XEXP (adj_mem, 0)) != POST_INC)
1447 adj_mem
1448 = adjust_address (adj_mem, GET_MODE (adj_mem), size / 2);
1449
1450 output_address (XEXP (adj_mem, 0));
1451 return;
1452 }
1453
1454 default:
1455 LOSE_AND_RETURN ("invalid operand for 'H' modifier", x);
1456 }
1457
1458 case 'L':
1459 /* Strip the MEM expression. */
1460 operand = XEXP (operand, 0);
1461 break;
1462
1463 case 'e':
1464 /* Print 's' if operand is SIGN_EXTEND or 'u' if ZERO_EXTEND unless
1465 cris_output_insn_is_bound is nonzero. */
1466 if (GET_CODE (operand) != SIGN_EXTEND
1467 && GET_CODE (operand) != ZERO_EXTEND
1468 && GET_CODE (operand) != CONST_INT)
1469 LOSE_AND_RETURN ("invalid operand for 'e' modifier", x);
1470
1471 if (cris_output_insn_is_bound)
1472 {
1473 cris_output_insn_is_bound = 0;
1474 return;
1475 }
1476
1477 putc (GET_CODE (operand) == SIGN_EXTEND
1478 || (GET_CODE (operand) == CONST_INT && INTVAL (operand) < 0)
1479 ? 's' : 'u', file);
1480 return;
1481
1482 case 'm':
1483 /* Print the size letter of the inner element. We can do it by
1484 calling ourselves with the 's' modifier. */
1485 if (GET_CODE (operand) != SIGN_EXTEND && GET_CODE (operand) != ZERO_EXTEND)
1486 LOSE_AND_RETURN ("invalid operand for 'm' modifier", x);
1487 cris_print_operand (file, XEXP (operand, 0), 's');
1488 return;
1489
1490 case 'M':
1491 /* Print the least significant part of operand. */
1492 if (GET_CODE (operand) == CONST_DOUBLE)
1493 {
1494 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
1495 return;
1496 }
1497 else if (HOST_BITS_PER_WIDE_INT > 32 && GET_CODE (operand) == CONST_INT)
1498 {
1499 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
1500 INTVAL (x) & ((unsigned int) 0x7fffffff * 2 + 1));
1501 return;
1502 }
1503 /* Otherwise the least significant part equals the normal part,
1504 so handle it normally. */
1505 break;
1506
1507 case 'A':
1508 /* When emitting an add for the high part of a DImode constant, we
1509 want to use addq for 0 and adds.w for -1. */
1510 if (GET_CODE (operand) != CONST_INT)
1511 LOSE_AND_RETURN ("invalid operand for 'A' modifier", x);
1512 fprintf (file, INTVAL (operand) < 0 ? "adds.w" : "addq");
1513 return;
1514
1515 case 'D':
1516 /* When emitting an sub for the high part of a DImode constant, we
1517 want to use subq for 0 and subs.w for -1. */
1518 if (GET_CODE (operand) != CONST_INT)
1519 LOSE_AND_RETURN ("invalid operand for 'D' modifier", x);
1520 fprintf (file, INTVAL (operand) < 0 ? "subs.w" : "subq");
1521 return;
1522
1523 case 'S':
1524 /* Print the operand as the index-part of an address.
1525 Easiest way out is to use cris_print_index. */
1526 cris_print_index (operand, file);
1527 return;
1528
1529 case 'T':
1530 /* Print the size letter for an operand to a MULT, which must be a
1531 const_int with a suitable value. */
1532 if (GET_CODE (operand) != CONST_INT || INTVAL (operand) > 4)
1533 LOSE_AND_RETURN ("invalid operand for 'T' modifier", x);
1534 fprintf (file, "%s", mults[INTVAL (operand)]);
1535 return;
1536
1537 case 0:
1538 /* No code, print as usual. */
1539 break;
1540
1541 default:
1542 LOSE_AND_RETURN ("invalid operand modifier letter", x);
1543 }
1544
1545 /* Print an operand as without a modifier letter. */
1546 switch (GET_CODE (operand))
1547 {
1548 case REG:
1549 if (REGNO (operand) > 15)
1550 internal_error ("internal error: bad register: %d", REGNO (operand));
1551 fprintf (file, "$%s", reg_names[REGNO (operand)]);
1552 return;
1553
1554 case MEM:
1555 output_address (XEXP (operand, 0));
1556 return;
1557
1558 case CONST_DOUBLE:
1559 if (GET_MODE (operand) == VOIDmode)
1560 /* A long long constant. */
1561 output_addr_const (file, operand);
1562 else
1563 {
1564 /* Only single precision is allowed as plain operands the
1565 moment. FIXME: REAL_VALUE_FROM_CONST_DOUBLE isn't
1566 documented. */
1567 REAL_VALUE_TYPE r;
1568 long l;
1569
1570 /* FIXME: Perhaps check overflow of the "single". */
1571 REAL_VALUE_FROM_CONST_DOUBLE (r, operand);
1572 REAL_VALUE_TO_TARGET_SINGLE (r, l);
1573
1574 fprintf (file, "0x%lx", l);
1575 }
1576 return;
1577
1578 case UNSPEC:
1579 ASSERT_PLT_UNSPEC (operand);
1580 /* Fall through. */
1581
1582 case CONST:
1583 cris_output_addr_const (file, operand);
1584 return;
1585
1586 case MULT:
1587 case ASHIFT:
1588 {
1589 /* For a (MULT (reg X) const_int) we output "rX.S". */
1590 int i = GET_CODE (XEXP (operand, 1)) == CONST_INT
1591 ? INTVAL (XEXP (operand, 1)) : INTVAL (XEXP (operand, 0));
1592 rtx reg = GET_CODE (XEXP (operand, 1)) == CONST_INT
1593 ? XEXP (operand, 0) : XEXP (operand, 1);
1594
1595 if (GET_CODE (reg) != REG
1596 || (GET_CODE (XEXP (operand, 0)) != CONST_INT
1597 && GET_CODE (XEXP (operand, 1)) != CONST_INT))
1598 LOSE_AND_RETURN ("unexpected multiplicative operand", x);
1599
1600 cris_print_base (reg, file);
1601 fprintf (file, ".%c",
1602 i == 0 || (i == 1 && GET_CODE (operand) == MULT) ? 'b'
1603 : i == 4 ? 'd'
1604 : (i == 2 && GET_CODE (operand) == MULT) || i == 1 ? 'w'
1605 : 'd');
1606 return;
1607 }
1608
1609 default:
1610 /* No need to handle all strange variants, let output_addr_const
1611 do it for us. */
1612 if (CONSTANT_P (operand))
1613 {
1614 cris_output_addr_const (file, operand);
1615 return;
1616 }
1617
1618 LOSE_AND_RETURN ("unexpected operand", x);
1619 }
1620 }
1621
1622 /* The PRINT_OPERAND_ADDRESS worker. */
1623
1624 void
cris_print_operand_address(FILE * file,rtx x)1625 cris_print_operand_address (FILE *file, rtx x)
1626 {
1627 /* All these were inside MEM:s so output indirection characters. */
1628 putc ('[', file);
1629
1630 if (CONSTANT_ADDRESS_P (x))
1631 cris_output_addr_const (file, x);
1632 else if (BASE_OR_AUTOINCR_P (x))
1633 cris_print_base (x, file);
1634 else if (GET_CODE (x) == PLUS)
1635 {
1636 rtx x1, x2;
1637
1638 x1 = XEXP (x, 0);
1639 x2 = XEXP (x, 1);
1640 if (BASE_P (x1))
1641 {
1642 cris_print_base (x1, file);
1643 cris_print_index (x2, file);
1644 }
1645 else if (BASE_P (x2))
1646 {
1647 cris_print_base (x2, file);
1648 cris_print_index (x1, file);
1649 }
1650 else
1651 LOSE_AND_RETURN ("unrecognized address", x);
1652 }
1653 else if (GET_CODE (x) == MEM)
1654 {
1655 /* A DIP. Output more indirection characters. */
1656 putc ('[', file);
1657 cris_print_base (XEXP (x, 0), file);
1658 putc (']', file);
1659 }
1660 else
1661 LOSE_AND_RETURN ("unrecognized address", x);
1662
1663 putc (']', file);
1664 }
1665
1666 /* The RETURN_ADDR_RTX worker.
1667 We mark that the return address is used, either by EH or
1668 __builtin_return_address, for use by the function prologue and
1669 epilogue. FIXME: This isn't optimal; we just use the mark in the
1670 prologue and epilogue to say that the return address is to be stored
1671 in the stack frame. We could return SRP for leaf-functions and use the
1672 initial-value machinery. */
1673
1674 rtx
cris_return_addr_rtx(int count,rtx frameaddr ATTRIBUTE_UNUSED)1675 cris_return_addr_rtx (int count, rtx frameaddr ATTRIBUTE_UNUSED)
1676 {
1677 cfun->machine->needs_return_address_on_stack = 1;
1678
1679 /* The return-address is stored just above the saved frame-pointer (if
1680 present). Apparently we can't eliminate from the frame-pointer in
1681 that direction, so use the incoming args (maybe pretended) pointer. */
1682 return count == 0
1683 ? gen_rtx_MEM (Pmode, plus_constant (virtual_incoming_args_rtx, -4))
1684 : NULL_RTX;
1685 }
1686
1687 /* This used to be the INITIAL_FRAME_POINTER_OFFSET worker; now only
1688 handles FP -> SP elimination offset. */
1689
1690 static int
cris_initial_frame_pointer_offset(void)1691 cris_initial_frame_pointer_offset (void)
1692 {
1693 int regno;
1694
1695 /* Initial offset is 0 if we don't have a frame pointer. */
1696 int offs = 0;
1697
1698 /* And 4 for each register pushed. */
1699 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1700 if ((((regs_ever_live[regno]
1701 && !call_used_regs[regno])
1702 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
1703 && (current_function_uses_pic_offset_table
1704 /* It is saved anyway, if there would be a gap. */
1705 || (flag_pic
1706 && regs_ever_live[regno + 1]
1707 && !call_used_regs[regno + 1]))))
1708 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
1709 && regno != CRIS_SRP_REGNUM)
1710 || (current_function_calls_eh_return
1711 && (regno == EH_RETURN_DATA_REGNO (0)
1712 || regno == EH_RETURN_DATA_REGNO (1)
1713 || regno == EH_RETURN_DATA_REGNO (2)
1714 || regno == EH_RETURN_DATA_REGNO (3))))
1715 offs += 4;
1716
1717 /* And then, last, we add the locals allocated. */
1718 offs += get_frame_size ();
1719
1720 /* And more; the accumulated args size. */
1721 offs += current_function_outgoing_args_size;
1722
1723 /* Then round it off, in case we use aligned stack. */
1724 if (TARGET_STACK_ALIGN)
1725 offs = TARGET_ALIGN_BY_32 ? (offs + 3) & ~3 : (offs + 1) & ~1;
1726
1727 return offs;
1728 }
1729
1730 /* The INITIAL_ELIMINATION_OFFSET worker.
1731 Calculate the difference between imaginary registers such as frame
1732 pointer and the stack pointer. Used to eliminate the frame pointer
1733 and imaginary arg pointer. */
1734
1735 int
cris_initial_elimination_offset(int fromreg,int toreg)1736 cris_initial_elimination_offset (int fromreg, int toreg)
1737 {
1738 int fp_sp_offset
1739 = cris_initial_frame_pointer_offset ();
1740
1741 /* We should be able to use regs_ever_live and related prologue
1742 information here, or alpha should not as well. */
1743 int return_address_on_stack
1744 = regs_ever_live[CRIS_SRP_REGNUM]
1745 || cfun->machine->needs_return_address_on_stack != 0;
1746
1747 /* Here we act as if the frame-pointer is needed. */
1748 int ap_fp_offset = 4 + (return_address_on_stack ? 4 : 0);
1749
1750 if (fromreg == ARG_POINTER_REGNUM
1751 && toreg == FRAME_POINTER_REGNUM)
1752 return ap_fp_offset;
1753
1754 /* Between the frame pointer and the stack are only "normal" stack
1755 variables and saved registers. */
1756 if (fromreg == FRAME_POINTER_REGNUM
1757 && toreg == STACK_POINTER_REGNUM)
1758 return fp_sp_offset;
1759
1760 /* We need to balance out the frame pointer here. */
1761 if (fromreg == ARG_POINTER_REGNUM
1762 && toreg == STACK_POINTER_REGNUM)
1763 return ap_fp_offset + fp_sp_offset - 4;
1764
1765 abort ();
1766 }
1767
1768 /* This function looks into the pattern to see how this insn affects
1769 condition codes.
1770
1771 Used when to eliminate test insns before a condition-code user,
1772 such as a "scc" insn or a conditional branch. This includes
1773 checking if the entities that cc was updated by, are changed by the
1774 operation.
1775
1776 Currently a jumble of the old peek-inside-the-insn and the newer
1777 check-cc-attribute methods. */
1778
1779 void
cris_notice_update_cc(rtx exp,rtx insn)1780 cris_notice_update_cc (rtx exp, rtx insn)
1781 {
1782 /* Check if user specified "-mcc-init" as a bug-workaround. FIXME:
1783 TARGET_CCINIT does not work; we must set CC_REVERSED as below.
1784 Several testcases will otherwise fail, for example
1785 gcc.c-torture/execute/20000217-1.c -O0 and -O1. */
1786 if (TARGET_CCINIT)
1787 {
1788 CC_STATUS_INIT;
1789 return;
1790 }
1791
1792 /* Slowly, we're converting to using attributes to control the setting
1793 of condition-code status. */
1794 switch (get_attr_cc (insn))
1795 {
1796 case CC_NONE:
1797 /* Even if it is "none", a setting may clobber a previous
1798 cc-value, so check. */
1799 if (GET_CODE (exp) == SET)
1800 {
1801 if (cc_status.value1
1802 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1803 cc_status.value1))
1804 cc_status.value1 = 0;
1805
1806 if (cc_status.value2
1807 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1808 cc_status.value2))
1809 cc_status.value2 = 0;
1810 }
1811 return;
1812
1813 case CC_CLOBBER:
1814 CC_STATUS_INIT;
1815 break;
1816
1817 case CC_NORMAL:
1818 /* Which means, for:
1819 (set (cc0) (...)):
1820 CC is (...).
1821
1822 (set (reg) (...)):
1823 CC is (reg) and (...) - unless (...) is 0, then CC does not change.
1824 CC_NO_OVERFLOW unless (...) is reg or mem.
1825
1826 (set (mem) (...)):
1827 CC does not change.
1828
1829 (set (pc) (...)):
1830 CC does not change.
1831
1832 (parallel
1833 (set (reg1) (mem (bdap/biap)))
1834 (set (reg2) (bdap/biap))):
1835 CC is (reg1) and (mem (reg2))
1836
1837 (parallel
1838 (set (mem (bdap/biap)) (reg1)) [or 0]
1839 (set (reg2) (bdap/biap))):
1840 CC does not change.
1841
1842 (where reg and mem includes strict_low_parts variants thereof)
1843
1844 For all others, assume CC is clobbered.
1845 Note that we do not have to care about setting CC_NO_OVERFLOW,
1846 since the overflow flag is set to 0 (i.e. right) for
1847 instructions where it does not have any sane sense, but where
1848 other flags have meanings. (This includes shifts; the carry is
1849 not set by them).
1850
1851 Note that there are other parallel constructs we could match,
1852 but we don't do that yet. */
1853
1854 if (GET_CODE (exp) == SET)
1855 {
1856 /* FIXME: Check when this happens. It looks like we should
1857 actually do a CC_STATUS_INIT here to be safe. */
1858 if (SET_DEST (exp) == pc_rtx)
1859 return;
1860
1861 /* Record CC0 changes, so we do not have to output multiple
1862 test insns. */
1863 if (SET_DEST (exp) == cc0_rtx)
1864 {
1865 cc_status.value1 = SET_SRC (exp);
1866 cc_status.value2 = 0;
1867
1868 /* Handle flags for the special btstq on one bit. */
1869 if (GET_CODE (SET_SRC (exp)) == ZERO_EXTRACT
1870 && XEXP (SET_SRC (exp), 1) == const1_rtx)
1871 {
1872 if (GET_CODE (XEXP (SET_SRC (exp), 0)) == CONST_INT)
1873 /* Using cmpq. */
1874 cc_status.flags = CC_INVERTED;
1875 else
1876 /* A one-bit btstq. */
1877 cc_status.flags = CC_Z_IN_NOT_N;
1878 }
1879 else
1880 cc_status.flags = 0;
1881
1882 if (GET_CODE (SET_SRC (exp)) == COMPARE)
1883 {
1884 if (!REG_P (XEXP (SET_SRC (exp), 0))
1885 && XEXP (SET_SRC (exp), 1) != const0_rtx)
1886 /* For some reason gcc will not canonicalize compare
1887 operations, reversing the sign by itself if
1888 operands are in wrong order. */
1889 /* (But NOT inverted; eq is still eq.) */
1890 cc_status.flags = CC_REVERSED;
1891
1892 /* This seems to be overlooked by gcc. FIXME: Check again.
1893 FIXME: Is it really safe? */
1894 cc_status.value2
1895 = gen_rtx_MINUS (GET_MODE (SET_SRC (exp)),
1896 XEXP (SET_SRC (exp), 0),
1897 XEXP (SET_SRC (exp), 1));
1898 }
1899 return;
1900 }
1901 else if (REG_P (SET_DEST (exp))
1902 || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART
1903 && REG_P (XEXP (SET_DEST (exp), 0))))
1904 {
1905 /* A register is set; normally CC is set to show that no
1906 test insn is needed. Catch the exceptions. */
1907
1908 /* If not to cc0, then no "set"s in non-natural mode give
1909 ok cc0... */
1910 if (GET_MODE_SIZE (GET_MODE (SET_DEST (exp))) > UNITS_PER_WORD
1911 || GET_MODE_CLASS (GET_MODE (SET_DEST (exp))) == MODE_FLOAT)
1912 {
1913 /* ... except add:s and sub:s in DImode. */
1914 if (GET_MODE (SET_DEST (exp)) == DImode
1915 && (GET_CODE (SET_SRC (exp)) == PLUS
1916 || GET_CODE (SET_SRC (exp)) == MINUS))
1917 {
1918 cc_status.flags = 0;
1919 cc_status.value1 = SET_DEST (exp);
1920 cc_status.value2 = SET_SRC (exp);
1921
1922 if (cris_reg_overlap_mentioned_p (cc_status.value1,
1923 cc_status.value2))
1924 cc_status.value2 = 0;
1925
1926 /* Add and sub may set V, which gets us
1927 unoptimizable results in "gt" and "le" condition
1928 codes. */
1929 cc_status.flags |= CC_NO_OVERFLOW;
1930
1931 return;
1932 }
1933 }
1934 else if (SET_SRC (exp) == const0_rtx)
1935 {
1936 /* There's no CC0 change when clearing a register or
1937 memory. Just check for overlap. */
1938 if ((cc_status.value1
1939 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1940 cc_status.value1)))
1941 cc_status.value1 = 0;
1942
1943 if ((cc_status.value2
1944 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1945 cc_status.value2)))
1946 cc_status.value2 = 0;
1947
1948 return;
1949 }
1950 else
1951 {
1952 cc_status.flags = 0;
1953 cc_status.value1 = SET_DEST (exp);
1954 cc_status.value2 = SET_SRC (exp);
1955
1956 if (cris_reg_overlap_mentioned_p (cc_status.value1,
1957 cc_status.value2))
1958 cc_status.value2 = 0;
1959
1960 /* Some operations may set V, which gets us
1961 unoptimizable results in "gt" and "le" condition
1962 codes. */
1963 if (GET_CODE (SET_SRC (exp)) == PLUS
1964 || GET_CODE (SET_SRC (exp)) == MINUS
1965 || GET_CODE (SET_SRC (exp)) == NEG)
1966 cc_status.flags |= CC_NO_OVERFLOW;
1967
1968 return;
1969 }
1970 }
1971 else if (GET_CODE (SET_DEST (exp)) == MEM
1972 || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART
1973 && GET_CODE (XEXP (SET_DEST (exp), 0)) == MEM))
1974 {
1975 /* When SET to MEM, then CC is not changed (except for
1976 overlap). */
1977 if ((cc_status.value1
1978 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1979 cc_status.value1)))
1980 cc_status.value1 = 0;
1981
1982 if ((cc_status.value2
1983 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1984 cc_status.value2)))
1985 cc_status.value2 = 0;
1986
1987 return;
1988 }
1989 }
1990 else if (GET_CODE (exp) == PARALLEL)
1991 {
1992 if (GET_CODE (XVECEXP (exp, 0, 0)) == SET
1993 && GET_CODE (XVECEXP (exp, 0, 1)) == SET
1994 && REG_P (XEXP (XVECEXP (exp, 0, 1), 0)))
1995 {
1996 if (REG_P (XEXP (XVECEXP (exp, 0, 0), 0))
1997 && GET_CODE (XEXP (XVECEXP (exp, 0, 0), 1)) == MEM)
1998 {
1999 /* For "move.S [rx=ry+o],rz", say CC reflects
2000 value1=rz and value2=[rx] */
2001 cc_status.value1 = XEXP (XVECEXP (exp, 0, 0), 0);
2002 cc_status.value2
2003 = replace_equiv_address (XEXP (XVECEXP (exp, 0, 0), 1),
2004 XEXP (XVECEXP (exp, 0, 1), 0));
2005 cc_status.flags = 0;
2006
2007 /* Huh? A side-effect cannot change the destination
2008 register. */
2009 if (cris_reg_overlap_mentioned_p (cc_status.value1,
2010 cc_status.value2))
2011 internal_error ("internal error: sideeffect-insn affecting main effect");
2012 return;
2013 }
2014 else if ((REG_P (XEXP (XVECEXP (exp, 0, 0), 1))
2015 || XEXP (XVECEXP (exp, 0, 0), 1) == const0_rtx)
2016 && GET_CODE (XEXP (XVECEXP (exp, 0, 0), 0)) == MEM)
2017 {
2018 /* For "move.S rz,[rx=ry+o]" and "clear.S [rx=ry+o]",
2019 say flags are not changed, except for overlap. */
2020 if (cc_status.value1
2021 && cris_reg_overlap_mentioned_p (XEXP
2022 (XVECEXP
2023 (exp, 0, 0), 0),
2024 cc_status.value1))
2025 cc_status.value1 = 0;
2026
2027 if (cc_status.value1
2028 && cris_reg_overlap_mentioned_p (XEXP
2029 (XVECEXP
2030 (exp, 0, 1), 0),
2031 cc_status.value1))
2032 cc_status.value1 = 0;
2033
2034 if (cc_status.value2
2035 && cris_reg_overlap_mentioned_p (XEXP
2036 (XVECEXP
2037 (exp, 0, 0), 0),
2038 cc_status.value2))
2039 cc_status.value2 = 0;
2040
2041 if (cc_status.value2
2042 && cris_reg_overlap_mentioned_p (XEXP
2043 (XVECEXP
2044 (exp, 0, 1), 0),
2045 cc_status.value2))
2046 cc_status.value2 = 0;
2047
2048 return;
2049 }
2050 }
2051 }
2052 break;
2053
2054 default:
2055 /* Unknown cc_attr value. */
2056 abort ();
2057 }
2058
2059 CC_STATUS_INIT;
2060 }
2061
2062 /* Return != 0 if the return sequence for the current function is short,
2063 like "ret" or "jump [sp+]". Prior to reloading, we can't tell how
2064 many registers must be saved, so return 0 then. */
2065
2066 int
cris_simple_epilogue(void)2067 cris_simple_epilogue (void)
2068 {
2069 int regno;
2070 int reglimit = STACK_POINTER_REGNUM;
2071 int lastreg = -1;
2072
2073 if (! reload_completed
2074 || frame_pointer_needed
2075 || get_frame_size () != 0
2076 || current_function_pretend_args_size
2077 || current_function_args_size
2078 || current_function_outgoing_args_size
2079 || current_function_calls_eh_return
2080
2081 /* If we're not supposed to emit prologue and epilogue, we must
2082 not emit return-type instructions. */
2083 || !TARGET_PROLOGUE_EPILOGUE)
2084 return 0;
2085
2086 /* We allow a "movem [sp+],rN" to sit in front if the "jump [sp+]" or
2087 in the delay-slot of the "ret". */
2088 for (regno = 0; regno < reglimit; regno++)
2089 if ((regs_ever_live[regno] && ! call_used_regs[regno])
2090 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
2091 && (current_function_uses_pic_offset_table
2092 /* It is saved anyway, if there would be a gap. */
2093 || (flag_pic
2094 && regs_ever_live[regno + 1]
2095 && !call_used_regs[regno + 1]))))
2096 {
2097 if (lastreg != regno - 1)
2098 return 0;
2099 lastreg = regno;
2100 }
2101
2102 return 1;
2103 }
2104
2105 /* Compute a (partial) cost for rtx X. Return true if the complete
2106 cost has been computed, and false if subexpressions should be
2107 scanned. In either case, *TOTAL contains the cost result. */
2108
2109 static bool
cris_rtx_costs(rtx x,int code,int outer_code,int * total)2110 cris_rtx_costs (rtx x, int code, int outer_code, int *total)
2111 {
2112 switch (code)
2113 {
2114 case CONST_INT:
2115 {
2116 HOST_WIDE_INT val = INTVAL (x);
2117 if (val == 0)
2118 *total = 0;
2119 else if (val < 32 && val >= -32)
2120 *total = 1;
2121 /* Eight or 16 bits are a word and cycle more expensive. */
2122 else if (val <= 32767 && val >= -32768)
2123 *total = 2;
2124 /* A 32 bit constant (or very seldom, unsigned 16 bits) costs
2125 another word. FIXME: This isn't linear to 16 bits. */
2126 else
2127 *total = 4;
2128 return true;
2129 }
2130
2131 case LABEL_REF:
2132 *total = 6;
2133 return true;
2134
2135 case CONST:
2136 case SYMBOL_REF:
2137 /* For PIC, we need a prefix (if it isn't already there),
2138 and the PIC register. For a global PIC symbol, we also
2139 need a read of the GOT. */
2140 if (flag_pic)
2141 {
2142 if (cris_got_symbol (x))
2143 *total = 2 + 4 + 6;
2144 else
2145 *total = 2 + 6;
2146 }
2147 else
2148 *total = 6;
2149 return true;
2150
2151 case CONST_DOUBLE:
2152 if (x != CONST0_RTX (GET_MODE (x) == VOIDmode ? DImode : GET_MODE (x)))
2153 *total = 12;
2154 else
2155 /* Make 0.0 cheap, else test-insns will not be used. */
2156 *total = 0;
2157 return true;
2158
2159 case MULT:
2160 /* Identify values that are no powers of two. Powers of 2 are
2161 taken care of already and those values should not be changed. */
2162 if (GET_CODE (XEXP (x, 1)) != CONST_INT
2163 || exact_log2 (INTVAL (XEXP (x, 1)) < 0))
2164 {
2165 /* If we have a multiply insn, then the cost is between
2166 1 and 2 "fast" instructions. */
2167 if (TARGET_HAS_MUL_INSNS)
2168 {
2169 *total = COSTS_N_INSNS (1) + COSTS_N_INSNS (1) / 2;
2170 return true;
2171 }
2172
2173 /* Estimate as 4 + 4 * #ofbits. */
2174 *total = COSTS_N_INSNS (132);
2175 return true;
2176 }
2177 return false;
2178
2179 case UDIV:
2180 case MOD:
2181 case UMOD:
2182 case DIV:
2183 if (GET_CODE (XEXP (x, 1)) != CONST_INT
2184 || exact_log2 (INTVAL (XEXP (x, 1)) < 0))
2185 {
2186 /* Estimate this as 4 + 8 * #of bits. */
2187 *total = COSTS_N_INSNS (260);
2188 return true;
2189 }
2190 return false;
2191
2192 case AND:
2193 if (GET_CODE (XEXP (x, 1)) == CONST_INT
2194 /* Two constants may actually happen before optimization. */
2195 && GET_CODE (XEXP (x, 0)) != CONST_INT
2196 && !CONST_OK_FOR_LETTER_P (INTVAL (XEXP (x, 1)), 'I'))
2197 {
2198 *total = (rtx_cost (XEXP (x, 0), outer_code) + 2
2199 + 2 * GET_MODE_NUNITS (GET_MODE (XEXP (x, 0))));
2200 return true;
2201 }
2202 return false;
2203
2204 case ZERO_EXTEND: case SIGN_EXTEND:
2205 *total = rtx_cost (XEXP (x, 0), outer_code);
2206 return true;
2207
2208 default:
2209 return false;
2210 }
2211 }
2212
2213 /* The ADDRESS_COST worker. */
2214
2215 static int
cris_address_cost(rtx x)2216 cris_address_cost (rtx x)
2217 {
2218 /* The metric to use for the cost-macros is unclear.
2219 The metric used here is (the number of cycles needed) / 2,
2220 where we consider equal a cycle for a word of code and a cycle to
2221 read memory. */
2222
2223 /* The cheapest addressing modes get 0, since nothing extra is needed. */
2224 if (BASE_OR_AUTOINCR_P (x))
2225 return 0;
2226
2227 /* An indirect mem must be a DIP. This means two bytes extra for code,
2228 and 4 bytes extra for memory read, i.e. (2 + 4) / 2. */
2229 if (GET_CODE (x) == MEM)
2230 return (2 + 4) / 2;
2231
2232 /* Assume (2 + 4) / 2 for a single constant; a dword, since it needs
2233 an extra DIP prefix and 4 bytes of constant in most cases.
2234 For PIC and a symbol with a GOT entry, we double the cost since we
2235 add a [rPIC+...] offset. A GOT-less symbol uses a BDAP prefix
2236 equivalent to the DIP prefix for non-PIC, hence the same cost. */
2237 if (CONSTANT_P (x))
2238 return flag_pic && cris_got_symbol (x) ? 2 * (2 + 4) / 2 : (2 + 4) / 2;
2239
2240 /* Handle BIAP and BDAP prefixes. */
2241 if (GET_CODE (x) == PLUS)
2242 {
2243 rtx tem1 = XEXP (x, 0);
2244 rtx tem2 = XEXP (x, 1);
2245
2246 /* A BIAP is 2 extra bytes for the prefix insn, nothing more. We
2247 recognize the typical MULT which is always in tem1 because of
2248 insn canonicalization. */
2249 if ((GET_CODE (tem1) == MULT && BIAP_INDEX_P (tem1))
2250 || REG_P (tem1))
2251 return 2 / 2;
2252
2253 /* A BDAP (quick) is 2 extra bytes. Any constant operand to the
2254 PLUS is always found in tem2. */
2255 if (GET_CODE (tem2) == CONST_INT
2256 && INTVAL (tem2) < 128 && INTVAL (tem2) >= -128)
2257 return 2 / 2;
2258
2259 /* A BDAP -32768 .. 32767 is like BDAP quick, but with 2 extra
2260 bytes. */
2261 if (GET_CODE (tem2) == CONST_INT
2262 && CONST_OK_FOR_LETTER_P (INTVAL (tem2), 'L'))
2263 return (2 + 2) / 2;
2264
2265 /* A BDAP with some other constant is 2 bytes extra. */
2266 if (CONSTANT_P (tem2))
2267 return (2 + 2 + 2) / 2;
2268
2269 /* BDAP with something indirect should have a higher cost than
2270 BIAP with register. FIXME: Should it cost like a MEM or more? */
2271 /* Don't need to check it, it's the only one left.
2272 FIXME: There was a REG test missing, perhaps there are others.
2273 Think more. */
2274 return (2 + 2 + 2) / 2;
2275 }
2276
2277 /* What else? Return a high cost. It matters only for valid
2278 addressing modes. */
2279 return 10;
2280 }
2281
2282 /* Check various objections to the side-effect. Used in the test-part
2283 of an anonymous insn describing an insn with a possible side-effect.
2284 Returns nonzero if the implied side-effect is ok.
2285
2286 code : PLUS or MULT
2287 ops : An array of rtx:es. lreg, rreg, rval,
2288 The variables multop and other_op are indexes into this,
2289 or -1 if they are not applicable.
2290 lreg : The register that gets assigned in the side-effect.
2291 rreg : One register in the side-effect expression
2292 rval : The other register, or an int.
2293 multop : An integer to multiply rval with.
2294 other_op : One of the entities of the main effect,
2295 whose mode we must consider. */
2296
2297 int
cris_side_effect_mode_ok(enum rtx_code code,rtx * ops,int lreg,int rreg,int rval,int multop,int other_op)2298 cris_side_effect_mode_ok (enum rtx_code code, rtx *ops,
2299 int lreg, int rreg, int rval,
2300 int multop, int other_op)
2301 {
2302 /* Find what value to multiply with, for rx =ry + rz * n. */
2303 int mult = multop < 0 ? 1 : INTVAL (ops[multop]);
2304
2305 rtx reg_rtx = ops[rreg];
2306 rtx val_rtx = ops[rval];
2307
2308 /* The operands may be swapped. Canonicalize them in reg_rtx and
2309 val_rtx, where reg_rtx always is a reg (for this constraint to
2310 match). */
2311 if (! BASE_P (reg_rtx))
2312 reg_rtx = val_rtx, val_rtx = ops[rreg];
2313
2314 /* Don't forget to check that reg_rtx really is a reg. If it isn't,
2315 we have no business. */
2316 if (! BASE_P (reg_rtx))
2317 return 0;
2318
2319 /* Don't do this when -mno-split. */
2320 if (!TARGET_SIDE_EFFECT_PREFIXES)
2321 return 0;
2322
2323 /* The mult expression may be hidden in lreg. FIXME: Add more
2324 commentary about that. */
2325 if (GET_CODE (val_rtx) == MULT)
2326 {
2327 mult = INTVAL (XEXP (val_rtx, 1));
2328 val_rtx = XEXP (val_rtx, 0);
2329 code = MULT;
2330 }
2331
2332 /* First check the "other operand". */
2333 if (other_op >= 0)
2334 {
2335 if (GET_MODE_SIZE (GET_MODE (ops[other_op])) > UNITS_PER_WORD)
2336 return 0;
2337
2338 /* Check if the lvalue register is the same as the "other
2339 operand". If so, the result is undefined and we shouldn't do
2340 this. FIXME: Check again. */
2341 if ((BASE_P (ops[lreg])
2342 && BASE_P (ops[other_op])
2343 && REGNO (ops[lreg]) == REGNO (ops[other_op]))
2344 || rtx_equal_p (ops[other_op], ops[lreg]))
2345 return 0;
2346 }
2347
2348 /* Do not accept frame_pointer_rtx as any operand. */
2349 if (ops[lreg] == frame_pointer_rtx || ops[rreg] == frame_pointer_rtx
2350 || ops[rval] == frame_pointer_rtx
2351 || (other_op >= 0 && ops[other_op] == frame_pointer_rtx))
2352 return 0;
2353
2354 if (code == PLUS
2355 && ! BASE_P (val_rtx))
2356 {
2357
2358 /* Do not allow rx = rx + n if a normal add or sub with same size
2359 would do. */
2360 if (rtx_equal_p (ops[lreg], reg_rtx)
2361 && GET_CODE (val_rtx) == CONST_INT
2362 && (INTVAL (val_rtx) <= 63 && INTVAL (val_rtx) >= -63))
2363 return 0;
2364
2365 /* Check allowed cases, like [r(+)?].[bwd] and const.
2366 A symbol is not allowed with PIC. */
2367 if (CONSTANT_P (val_rtx))
2368 return flag_pic == 0 || cris_symbol (val_rtx) == 0;
2369
2370 if (GET_CODE (val_rtx) == MEM
2371 && BASE_OR_AUTOINCR_P (XEXP (val_rtx, 0)))
2372 return 1;
2373
2374 if (GET_CODE (val_rtx) == SIGN_EXTEND
2375 && GET_CODE (XEXP (val_rtx, 0)) == MEM
2376 && BASE_OR_AUTOINCR_P (XEXP (XEXP (val_rtx, 0), 0)))
2377 return 1;
2378
2379 /* If we got here, it's not a valid addressing mode. */
2380 return 0;
2381 }
2382 else if (code == MULT
2383 || (code == PLUS && BASE_P (val_rtx)))
2384 {
2385 /* Do not allow rx = rx + ry.S, since it doesn't give better code. */
2386 if (rtx_equal_p (ops[lreg], reg_rtx)
2387 || (mult == 1 && rtx_equal_p (ops[lreg], val_rtx)))
2388 return 0;
2389
2390 /* Do not allow bad multiply-values. */
2391 if (mult != 1 && mult != 2 && mult != 4)
2392 return 0;
2393
2394 /* Only allow r + ... */
2395 if (! BASE_P (reg_rtx))
2396 return 0;
2397
2398 /* If we got here, all seems ok.
2399 (All checks need to be done above). */
2400 return 1;
2401 }
2402
2403 /* If we get here, the caller got its initial tests wrong. */
2404 internal_error ("internal error: cris_side_effect_mode_ok with bad operands");
2405 }
2406
2407 /* The function reg_overlap_mentioned_p in CVS (still as of 2001-05-16)
2408 does not handle the case where the IN operand is strict_low_part; it
2409 does handle it for X. Test-case in Axis-20010516. This function takes
2410 care of that for THIS port. FIXME: strict_low_part is going away
2411 anyway. */
2412
2413 static int
cris_reg_overlap_mentioned_p(rtx x,rtx in)2414 cris_reg_overlap_mentioned_p (rtx x, rtx in)
2415 {
2416 /* The function reg_overlap_mentioned now handles when X is
2417 strict_low_part, but not when IN is a STRICT_LOW_PART. */
2418 if (GET_CODE (in) == STRICT_LOW_PART)
2419 in = XEXP (in, 0);
2420
2421 return reg_overlap_mentioned_p (x, in);
2422 }
2423
2424 /* The TARGET_ASM_NAMED_SECTION worker.
2425 We just dispatch to the functions for ELF and a.out. */
2426
2427 void
cris_target_asm_named_section(const char * name,unsigned int flags)2428 cris_target_asm_named_section (const char *name, unsigned int flags)
2429 {
2430 if (! TARGET_ELF)
2431 default_no_named_section (name, flags);
2432 else
2433 default_elf_asm_named_section (name, flags);
2434 }
2435
2436 /* The LEGITIMATE_PIC_OPERAND_P worker. */
2437
2438 int
cris_legitimate_pic_operand(rtx x)2439 cris_legitimate_pic_operand (rtx x)
2440 {
2441 /* The PIC representation of a symbol with a GOT entry will be (for
2442 example; relocations differ):
2443 sym => [rPIC+sym:GOT]
2444 and for a GOT-less symbol it will be (for example, relocation differ):
2445 sym => rPIC+sym:GOTOFF
2446 so only a symbol with a GOT is by itself a valid operand, and it
2447 can't be a sum of a symbol and an offset. */
2448 return ! cris_symbol (x) || cris_got_symbol (x);
2449 }
2450
2451 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
2452 CONSTANT_P. */
2453
2454 int
cris_symbol(rtx x)2455 cris_symbol (rtx x)
2456 {
2457 switch (GET_CODE (x))
2458 {
2459 case SYMBOL_REF:
2460 case LABEL_REF:
2461 return 1;
2462
2463 case UNSPEC:
2464 /* A PLT reference. */
2465 ASSERT_PLT_UNSPEC (x);
2466 return 1;
2467
2468 case CONST:
2469 return cris_symbol (XEXP (x, 0));
2470
2471 case PLUS:
2472 case MINUS:
2473 return cris_symbol (XEXP (x, 0)) || cris_symbol (XEXP (x, 1));
2474
2475 case CONST_INT:
2476 case CONST_DOUBLE:
2477 case CONSTANT_P_RTX:
2478 return 0;
2479
2480 default:
2481 fatal_insn ("unrecognized supposed constant", x);
2482 }
2483
2484 return 1;
2485 }
2486
2487 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
2488 CONSTANT_P, and the symbol does not need a GOT entry. Also set
2489 current_function_uses_pic_offset_table if we're generating PIC and ever
2490 see something that would need one. */
2491
2492 int
cris_gotless_symbol(rtx x)2493 cris_gotless_symbol (rtx x)
2494 {
2495 #ifdef ENABLE_CHECKING
2496 if (!flag_pic)
2497 abort ();
2498 #endif
2499
2500 switch (GET_CODE (x))
2501 {
2502 case UNSPEC:
2503 ASSERT_PLT_UNSPEC (x);
2504 return 1;
2505
2506 case SYMBOL_REF:
2507 if (cfun != NULL)
2508 current_function_uses_pic_offset_table = 1;
2509 return SYMBOL_REF_LOCAL_P (x);
2510
2511 case LABEL_REF:
2512 /* We don't set current_function_uses_pic_offset_table for
2513 LABEL_REF:s in here, since they are almost always originating
2514 from some branch. The only time it does not come from a label is
2515 when GCC does something like __builtin_setjmp. Then we get the
2516 LABEL_REF from the movsi expander, so we mark it there as a
2517 special case. */
2518 return 1;
2519
2520 case CONST:
2521 return cris_gotless_symbol (XEXP (x, 0));
2522
2523 case PLUS:
2524 case MINUS:
2525 {
2526 int x0 = cris_gotless_symbol (XEXP (x, 0)) != 0;
2527 int x1 = cris_gotless_symbol (XEXP (x, 1)) != 0;
2528
2529 /* One and only one of them must be a local symbol. Neither must
2530 be some other, more general kind of symbol. */
2531 return
2532 (x0 ^ x1)
2533 && ! (x0 == 0 && cris_symbol (XEXP (x, 0)))
2534 && ! (x1 == 0 && cris_symbol (XEXP (x, 1)));
2535 }
2536
2537 case CONST_INT:
2538 case CONST_DOUBLE:
2539 case CONSTANT_P_RTX:
2540 return 0;
2541
2542 default:
2543 fatal_insn ("unrecognized supposed constant", x);
2544 }
2545
2546 return 1;
2547 }
2548
2549 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
2550 CONSTANT_P, and the symbol needs a GOT entry. */
2551
2552 int
cris_got_symbol(rtx x)2553 cris_got_symbol (rtx x)
2554 {
2555 #ifdef ENABLE_CHECKING
2556 if (!flag_pic)
2557 abort ();
2558 #endif
2559
2560 switch (GET_CODE (x))
2561 {
2562 case UNSPEC:
2563 ASSERT_PLT_UNSPEC (x);
2564 return 0;
2565
2566 case SYMBOL_REF:
2567 if (cfun != NULL)
2568 current_function_uses_pic_offset_table = 1;
2569 return ! SYMBOL_REF_LOCAL_P (x);
2570
2571 case CONST:
2572 return cris_got_symbol (XEXP (x, 0));
2573
2574 case LABEL_REF:
2575 /* A LABEL_REF is never visible as a symbol outside the local
2576 function. */
2577 case PLUS:
2578 case MINUS:
2579 /* Nope, can't access the GOT for "symbol + offset". */
2580 return 0;
2581
2582 case CONST_INT:
2583 case CONST_DOUBLE:
2584 case CONSTANT_P_RTX:
2585 return 0;
2586
2587 default:
2588 fatal_insn ("unrecognized supposed constant in cris_global_pic_symbol",
2589 x);
2590 }
2591
2592 return 1;
2593 }
2594
2595 /* The OVERRIDE_OPTIONS worker.
2596 As is the norm, this also parses -mfoo=bar type parameters. */
2597
2598 void
cris_override_options(void)2599 cris_override_options (void)
2600 {
2601 if (cris_max_stackframe_str)
2602 {
2603 cris_max_stackframe = atoi (cris_max_stackframe_str);
2604
2605 /* Do some sanity checking. */
2606 if (cris_max_stackframe < 0 || cris_max_stackframe > 0x20000000)
2607 internal_error ("-max-stackframe=%d is not usable, not between 0 and %d",
2608 cris_max_stackframe, 0x20000000);
2609 }
2610
2611 /* Let "-metrax4" and "-metrax100" change the cpu version. */
2612 if (TARGET_SVINTO && cris_cpu_version < CRIS_CPU_SVINTO)
2613 cris_cpu_version = CRIS_CPU_SVINTO;
2614 else if (TARGET_ETRAX4_ADD && cris_cpu_version < CRIS_CPU_ETRAX4)
2615 cris_cpu_version = CRIS_CPU_ETRAX4;
2616
2617 /* Parse -march=... and its synonym, the deprecated -mcpu=... */
2618 if (cris_cpu_str)
2619 {
2620 cris_cpu_version
2621 = (*cris_cpu_str == 'v' ? atoi (cris_cpu_str + 1) : -1);
2622
2623 if (strcmp ("etrax4", cris_cpu_str) == 0)
2624 cris_cpu_version = 3;
2625
2626 if (strcmp ("svinto", cris_cpu_str) == 0
2627 || strcmp ("etrax100", cris_cpu_str) == 0)
2628 cris_cpu_version = 8;
2629
2630 if (strcmp ("ng", cris_cpu_str) == 0
2631 || strcmp ("etrax100lx", cris_cpu_str) == 0)
2632 cris_cpu_version = 10;
2633
2634 if (cris_cpu_version < 0 || cris_cpu_version > 10)
2635 error ("unknown CRIS version specification in -march= or -mcpu= : %s",
2636 cris_cpu_str);
2637
2638 /* Set the target flags. */
2639 if (cris_cpu_version >= CRIS_CPU_ETRAX4)
2640 target_flags |= TARGET_MASK_ETRAX4_ADD;
2641
2642 /* If this is Svinto or higher, align for 32 bit accesses. */
2643 if (cris_cpu_version >= CRIS_CPU_SVINTO)
2644 target_flags
2645 |= (TARGET_MASK_SVINTO | TARGET_MASK_ALIGN_BY_32
2646 | TARGET_MASK_STACK_ALIGN | TARGET_MASK_CONST_ALIGN
2647 | TARGET_MASK_DATA_ALIGN);
2648
2649 /* Note that we do not add new flags when it can be completely
2650 described with a macro that uses -mcpu=X. So
2651 TARGET_HAS_MUL_INSNS is (cris_cpu_version >= CRIS_CPU_NG). */
2652 }
2653
2654 if (cris_tune_str)
2655 {
2656 int cris_tune
2657 = (*cris_tune_str == 'v' ? atoi (cris_tune_str + 1) : -1);
2658
2659 if (strcmp ("etrax4", cris_tune_str) == 0)
2660 cris_tune = 3;
2661
2662 if (strcmp ("svinto", cris_tune_str) == 0
2663 || strcmp ("etrax100", cris_tune_str) == 0)
2664 cris_tune = 8;
2665
2666 if (strcmp ("ng", cris_tune_str) == 0
2667 || strcmp ("etrax100lx", cris_tune_str) == 0)
2668 cris_tune = 10;
2669
2670 if (cris_tune < 0 || cris_tune > 10)
2671 error ("unknown CRIS cpu version specification in -mtune= : %s",
2672 cris_tune_str);
2673
2674 if (cris_tune >= CRIS_CPU_SVINTO)
2675 /* We have currently nothing more to tune than alignment for
2676 memory accesses. */
2677 target_flags
2678 |= (TARGET_MASK_STACK_ALIGN | TARGET_MASK_CONST_ALIGN
2679 | TARGET_MASK_DATA_ALIGN | TARGET_MASK_ALIGN_BY_32);
2680 }
2681
2682 if (flag_pic)
2683 {
2684 /* Use error rather than warning, so invalid use is easily
2685 detectable. Still change to the values we expect, to avoid
2686 further errors. */
2687 if (! TARGET_LINUX)
2688 {
2689 error ("-fPIC and -fpic are not supported in this configuration");
2690 flag_pic = 0;
2691 }
2692
2693 /* Turn off function CSE. We need to have the addresses reach the
2694 call expanders to get PLT-marked, as they could otherwise be
2695 compared against zero directly or indirectly. After visiting the
2696 call expanders they will then be cse:ed, as the call expanders
2697 force_reg the addresses, effectively forcing flag_no_function_cse
2698 to 0. */
2699 flag_no_function_cse = 1;
2700 }
2701
2702 if ((write_symbols == DWARF_DEBUG
2703 || write_symbols == DWARF2_DEBUG) && ! TARGET_ELF)
2704 {
2705 warning ("that particular -g option is invalid with -maout and -melinux");
2706 write_symbols = DBX_DEBUG;
2707 }
2708
2709 /* Set the per-function-data initializer. */
2710 init_machine_status = cris_init_machine_status;
2711 }
2712
2713 /* The TARGET_ASM_OUTPUT_MI_THUNK worker. */
2714
2715 static void
cris_asm_output_mi_thunk(FILE * stream,tree thunkdecl ATTRIBUTE_UNUSED,HOST_WIDE_INT delta,HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,tree funcdecl)2716 cris_asm_output_mi_thunk (FILE *stream,
2717 tree thunkdecl ATTRIBUTE_UNUSED,
2718 HOST_WIDE_INT delta,
2719 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
2720 tree funcdecl)
2721 {
2722 if (delta > 0)
2723 fprintf (stream, "\tadd%s " HOST_WIDE_INT_PRINT_DEC ",$%s\n",
2724 ADDITIVE_SIZE_MODIFIER (delta), delta,
2725 reg_names[CRIS_FIRST_ARG_REG]);
2726 else if (delta < 0)
2727 fprintf (stream, "\tsub%s " HOST_WIDE_INT_PRINT_DEC ",$%s\n",
2728 ADDITIVE_SIZE_MODIFIER (-delta), -delta,
2729 reg_names[CRIS_FIRST_ARG_REG]);
2730
2731 if (flag_pic)
2732 {
2733 const char *name = XSTR (XEXP (DECL_RTL (funcdecl), 0), 0);
2734
2735 name = (* targetm.strip_name_encoding) (name);
2736 fprintf (stream, "add.d ");
2737 assemble_name (stream, name);
2738 fprintf (stream, "%s,$pc\n", CRIS_PLT_PCOFFSET_SUFFIX);
2739 }
2740 else
2741 {
2742 fprintf (stream, "jump ");
2743 assemble_name (stream, XSTR (XEXP (DECL_RTL (funcdecl), 0), 0));
2744 fprintf (stream, "\n");
2745 }
2746 }
2747
2748 /* Boilerplate emitted at start of file.
2749
2750 NO_APP *only at file start* means faster assembly. It also means
2751 comments are not allowed. In some cases comments will be output
2752 for debugging purposes. Make sure they are allowed then.
2753
2754 We want a .file directive only if TARGET_ELF. */
2755 static void
cris_file_start(void)2756 cris_file_start (void)
2757 {
2758 /* These expressions can vary at run time, so we cannot put
2759 them into TARGET_INITIALIZER. */
2760 targetm.file_start_app_off = !(TARGET_PDEBUG || flag_print_asm_name);
2761 targetm.file_start_file_directive = TARGET_ELF;
2762
2763 default_file_start ();
2764 }
2765
2766 /* Rename the function calls for integer multiply and divide. */
2767 static void
cris_init_libfuncs(void)2768 cris_init_libfuncs (void)
2769 {
2770 set_optab_libfunc (smul_optab, SImode, "__Mul");
2771 set_optab_libfunc (sdiv_optab, SImode, "__Div");
2772 set_optab_libfunc (udiv_optab, SImode, "__Udiv");
2773 set_optab_libfunc (smod_optab, SImode, "__Mod");
2774 set_optab_libfunc (umod_optab, SImode, "__Umod");
2775 }
2776
2777 /* The EXPAND_BUILTIN_VA_ARG worker. This is modified from the
2778 "standard" implementation of va_arg: read the value from the current
2779 address and increment by the size of one or two registers. The
2780 important difference for CRIS is that if the type is
2781 pass-by-reference, then perform an indirection. */
2782
2783 rtx
cris_expand_builtin_va_arg(tree valist,tree type)2784 cris_expand_builtin_va_arg (tree valist, tree type)
2785 {
2786 tree addr_tree, t;
2787 rtx addr;
2788 tree passed_size = size_zero_node;
2789 tree type_size = NULL;
2790 tree size3 = size_int (3);
2791 tree size4 = size_int (4);
2792 tree size8 = size_int (8);
2793 tree rounded_size;
2794
2795 /* Get AP. */
2796 addr_tree = valist;
2797
2798 if (type == error_mark_node
2799 || (type_size = TYPE_SIZE_UNIT (TYPE_MAIN_VARIANT (type))) == NULL
2800 || TREE_OVERFLOW (type_size))
2801 /* Presumably an error; the size isn't computable. A message has
2802 supposedly been emitted elsewhere. */
2803 rounded_size = size_zero_node;
2804 else
2805 rounded_size
2806 = fold (build (MULT_EXPR, sizetype,
2807 fold (build (TRUNC_DIV_EXPR, sizetype,
2808 fold (build (PLUS_EXPR, sizetype,
2809 type_size, size3)),
2810 size4)),
2811 size4));
2812
2813 if (!integer_zerop (rounded_size))
2814 {
2815 /* Check if the type is passed by value or by reference. Values up
2816 to 8 bytes are passed by-value, padded to register-size (4
2817 bytes). Larger values and varying-size types are passed
2818 by reference. */
2819 passed_size
2820 = (!really_constant_p (type_size)
2821 ? size4
2822 : fold (build (COND_EXPR, sizetype,
2823 fold (build (GT_EXPR, sizetype,
2824 rounded_size,
2825 size8)),
2826 size4,
2827 rounded_size)));
2828
2829 addr_tree
2830 = (!really_constant_p (type_size)
2831 ? build1 (INDIRECT_REF, build_pointer_type (type), addr_tree)
2832 : fold (build (COND_EXPR, TREE_TYPE (addr_tree),
2833 fold (build (GT_EXPR, sizetype,
2834 rounded_size,
2835 size8)),
2836 build1 (INDIRECT_REF, build_pointer_type (type),
2837 addr_tree),
2838 addr_tree)));
2839 }
2840
2841 addr = expand_expr (addr_tree, NULL_RTX, Pmode, EXPAND_NORMAL);
2842 addr = copy_to_reg (addr);
2843
2844 if (!integer_zerop (rounded_size))
2845 {
2846 /* Compute new value for AP. */
2847 t = build (MODIFY_EXPR, TREE_TYPE (valist), valist,
2848 build (PLUS_EXPR, TREE_TYPE (valist), valist,
2849 passed_size));
2850 TREE_SIDE_EFFECTS (t) = 1;
2851 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
2852 }
2853
2854 return addr;
2855 }
2856
2857 /* The INIT_EXPANDERS worker sets the per-function-data initializer and
2858 mark functions. */
2859
2860 void
cris_init_expanders(void)2861 cris_init_expanders (void)
2862 {
2863 /* Nothing here at the moment. */
2864 }
2865
2866 /* Zero initialization is OK for all current fields. */
2867
2868 static struct machine_function *
cris_init_machine_status(void)2869 cris_init_machine_status (void)
2870 {
2871 return ggc_alloc_cleared (sizeof (struct machine_function));
2872 }
2873
2874 /* Split a 2 word move (DI or presumably DF) into component parts.
2875 Originally a copy of gen_split_move_double in m32r.c. */
2876
2877 rtx
cris_split_movdx(rtx * operands)2878 cris_split_movdx (rtx *operands)
2879 {
2880 enum machine_mode mode = GET_MODE (operands[0]);
2881 rtx dest = operands[0];
2882 rtx src = operands[1];
2883 rtx val;
2884
2885 /* We used to have to handle (SUBREG (MEM)) here, but that should no
2886 longer happen; after reload there are no SUBREGs any more, and we're
2887 only called after reload. */
2888 if (GET_CODE (dest) == SUBREG || GET_CODE (src) == SUBREG)
2889 abort ();
2890
2891 start_sequence ();
2892 if (GET_CODE (dest) == REG)
2893 {
2894 int dregno = REGNO (dest);
2895
2896 /* Reg-to-reg copy. */
2897 if (GET_CODE (src) == REG)
2898 {
2899 int sregno = REGNO (src);
2900
2901 int reverse = (dregno == sregno + 1);
2902
2903 /* We normally copy the low-numbered register first. However, if
2904 the first register operand 0 is the same as the second register of
2905 operand 1, we must copy in the opposite order. */
2906 emit_insn (gen_rtx_SET (VOIDmode,
2907 operand_subword (dest, reverse, TRUE, mode),
2908 operand_subword (src, reverse, TRUE, mode)));
2909
2910 emit_insn (gen_rtx_SET (VOIDmode,
2911 operand_subword (dest, !reverse, TRUE, mode),
2912 operand_subword (src, !reverse, TRUE, mode)));
2913 }
2914 /* Constant-to-reg copy. */
2915 else if (GET_CODE (src) == CONST_INT || GET_CODE (src) == CONST_DOUBLE)
2916 {
2917 rtx words[2];
2918 split_double (src, &words[0], &words[1]);
2919 emit_insn (gen_rtx_SET (VOIDmode,
2920 operand_subword (dest, 0, TRUE, mode),
2921 words[0]));
2922
2923 emit_insn (gen_rtx_SET (VOIDmode,
2924 operand_subword (dest, 1, TRUE, mode),
2925 words[1]));
2926 }
2927 /* Mem-to-reg copy. */
2928 else if (GET_CODE (src) == MEM)
2929 {
2930 /* If the high-address word is used in the address, we must load it
2931 last. Otherwise, load it first. */
2932 rtx addr = XEXP (src, 0);
2933 int reverse
2934 = (refers_to_regno_p (dregno, dregno + 1, addr, NULL) != 0);
2935
2936 /* The original code imples that we can't do
2937 move.x [rN+],rM move.x [rN],rM+1
2938 when rN is dead, because of REG_NOTES damage. That is
2939 consistent with what I've seen, so don't try it.
2940
2941 We have two different cases here; if the addr is POST_INC,
2942 just pass it through, otherwise add constants. */
2943
2944 if (GET_CODE (addr) == POST_INC)
2945 {
2946 emit_insn (gen_rtx_SET (VOIDmode,
2947 operand_subword (dest, 0, TRUE, mode),
2948 change_address (src, SImode, addr)));
2949 emit_insn (gen_rtx_SET (VOIDmode,
2950 operand_subword (dest, 1, TRUE, mode),
2951 change_address (src, SImode, addr)));
2952 }
2953 else
2954 {
2955 /* Make sure we don't get any other addresses with
2956 embedded postincrements. They should be stopped in
2957 GO_IF_LEGITIMATE_ADDRESS, but we're here for your
2958 safety. */
2959 if (side_effects_p (addr))
2960 fatal_insn ("unexpected side-effects in address", addr);
2961
2962 emit_insn (gen_rtx_SET
2963 (VOIDmode,
2964 operand_subword (dest, reverse, TRUE, mode),
2965 change_address
2966 (src, SImode,
2967 plus_constant (addr,
2968 reverse * UNITS_PER_WORD))));
2969 emit_insn (gen_rtx_SET
2970 (VOIDmode,
2971 operand_subword (dest, ! reverse, TRUE, mode),
2972 change_address
2973 (src, SImode,
2974 plus_constant (addr,
2975 (! reverse) *
2976 UNITS_PER_WORD))));
2977 }
2978 }
2979 else
2980 abort ();
2981 }
2982 /* Reg-to-mem copy or clear mem. */
2983 else if (GET_CODE (dest) == MEM
2984 && (GET_CODE (src) == REG
2985 || src == const0_rtx
2986 || src == CONST0_RTX (DFmode)))
2987 {
2988 rtx addr = XEXP (dest, 0);
2989
2990 if (GET_CODE (addr) == POST_INC)
2991 {
2992 emit_insn (gen_rtx_SET (VOIDmode,
2993 change_address (dest, SImode, addr),
2994 operand_subword (src, 0, TRUE, mode)));
2995 emit_insn (gen_rtx_SET (VOIDmode,
2996 change_address (dest, SImode, addr),
2997 operand_subword (src, 1, TRUE, mode)));
2998 }
2999 else
3000 {
3001 /* Make sure we don't get any other addresses with embedded
3002 postincrements. They should be stopped in
3003 GO_IF_LEGITIMATE_ADDRESS, but we're here for your safety. */
3004 if (side_effects_p (addr))
3005 fatal_insn ("unexpected side-effects in address", addr);
3006
3007 emit_insn (gen_rtx_SET
3008 (VOIDmode,
3009 change_address (dest, SImode, addr),
3010 operand_subword (src, 0, TRUE, mode)));
3011
3012 emit_insn (gen_rtx_SET
3013 (VOIDmode,
3014 change_address (dest, SImode,
3015 plus_constant (addr,
3016 UNITS_PER_WORD)),
3017 operand_subword (src, 1, TRUE, mode)));
3018 }
3019 }
3020
3021 else
3022 abort ();
3023
3024 val = get_insns ();
3025 end_sequence ();
3026 return val;
3027 }
3028
3029 /* This is in essence a copy of output_addr_const altered to output
3030 symbolic operands as PIC.
3031
3032 FIXME: Add hooks similar to ASM_OUTPUT_SYMBOL_REF to get this effect in
3033 the "real" output_addr_const. All we need is one for LABEL_REF (and
3034 one for CODE_LABEL?). */
3035
3036 void
cris_output_addr_const(FILE * file,rtx x)3037 cris_output_addr_const (FILE *file, rtx x)
3038 {
3039 int is_plt = 0;
3040
3041 restart:
3042 switch (GET_CODE (x))
3043 {
3044 case UNSPEC:
3045 ASSERT_PLT_UNSPEC (x);
3046 x = XVECEXP (x, 0, 0);
3047 is_plt = 1;
3048
3049 /* Fall through. */
3050 case SYMBOL_REF:
3051 if (flag_pic)
3052 {
3053 const char *origstr = XSTR (x, 0);
3054 const char *str;
3055
3056 str = (* targetm.strip_name_encoding) (origstr);
3057
3058 if (is_plt)
3059 {
3060 if (cris_pic_sympart_only)
3061 {
3062 assemble_name (file, str);
3063 fprintf (file, ":PLTG");
3064 }
3065 else
3066 {
3067 if (TARGET_AVOID_GOTPLT)
3068 /* We shouldn't get here. */
3069 abort ();
3070
3071 fprintf (file, "[$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3072 assemble_name (file, XSTR (x, 0));
3073
3074 if (flag_pic == 1)
3075 fprintf (file, ":GOTPLT16]");
3076 else
3077 fprintf (file, ":GOTPLT]");
3078 }
3079 }
3080 else if (cris_gotless_symbol (x))
3081 {
3082 if (! cris_pic_sympart_only)
3083 fprintf (file, "$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3084 assemble_name (file, str);
3085 fprintf (file, ":GOTOFF");
3086 }
3087 else if (cris_got_symbol (x))
3088 {
3089 if (cris_pic_sympart_only)
3090 abort ();
3091 fprintf (file, "[$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3092 assemble_name (file, XSTR (x, 0));
3093
3094 if (flag_pic == 1)
3095 fprintf (file, ":GOT16]");
3096 else
3097 fprintf (file, ":GOT]");
3098 }
3099 else
3100 LOSE_AND_RETURN ("unexpected PIC symbol", x);
3101
3102 /* Sanity check. */
3103 if (! current_function_uses_pic_offset_table)
3104 output_operand_lossage ("PIC register isn't set up");
3105 }
3106 else
3107 assemble_name (file, XSTR (x, 0));
3108 break;
3109
3110 case LABEL_REF:
3111 /* If we get one of those here, it should be dressed as PIC. Branch
3112 labels are normally output with the 'l' specifier, which means it
3113 will go directly to output_asm_label and not end up here. */
3114 if (GET_CODE (XEXP (x, 0)) != CODE_LABEL
3115 && (GET_CODE (XEXP (x, 0)) != NOTE
3116 || NOTE_LINE_NUMBER (XEXP (x, 0)) != NOTE_INSN_DELETED_LABEL))
3117 fatal_insn ("unexpected address expression", x);
3118
3119 if (flag_pic)
3120 {
3121 if (cris_gotless_symbol (x))
3122 {
3123 if (! cris_pic_sympart_only)
3124 fprintf (file, "$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3125 cris_output_addr_const (file, XEXP (x, 0));
3126
3127 fprintf (file, ":GOTOFF");
3128 }
3129 else
3130 /* Labels are never marked as global symbols. */
3131 fatal_insn ("unexpected PIC symbol", x);
3132
3133 /* Sanity check. */
3134 if (! current_function_uses_pic_offset_table)
3135 internal_error ("emitting PIC operand, but PIC register isn't set up");
3136 break;
3137 }
3138
3139 output_addr_const (file, x);
3140 break;
3141
3142 case NOTE:
3143 if (NOTE_LINE_NUMBER (x) != NOTE_INSN_DELETED_LABEL)
3144 fatal_insn ("unexpected NOTE as addr_const:", x);
3145 case CODE_LABEL:
3146 case CONST_INT:
3147 case CONST_DOUBLE:
3148 case ZERO_EXTEND:
3149 case SIGN_EXTEND:
3150 output_addr_const (file, x);
3151 break;
3152
3153 case CONST:
3154 /* This used to output parentheses around the expression,
3155 but that does not work on the 386 (either ATT or BSD assembler). */
3156 cris_output_addr_const (file, XEXP (x, 0));
3157 break;
3158
3159 case PLUS:
3160 /* Some assemblers need integer constants to appear last (eg masm). */
3161 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3162 {
3163 cris_output_addr_const (file, XEXP (x, 1));
3164 if (INTVAL (XEXP (x, 0)) >= 0)
3165 fprintf (file, "+");
3166 output_addr_const (file, XEXP (x, 0));
3167 }
3168 else
3169 {
3170 cris_output_addr_const (file, XEXP (x, 0));
3171 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3172 || INTVAL (XEXP (x, 1)) >= 0)
3173 fprintf (file, "+");
3174 cris_output_addr_const (file, XEXP (x, 1));
3175 }
3176 break;
3177
3178 case MINUS:
3179 /* Avoid outputting things like x-x or x+5-x,
3180 since some assemblers can't handle that. */
3181 x = simplify_subtraction (x);
3182 if (GET_CODE (x) != MINUS)
3183 goto restart;
3184
3185 cris_output_addr_const (file, XEXP (x, 0));
3186 fprintf (file, "-");
3187 if ((GET_CODE (XEXP (x, 1)) == CONST_INT
3188 && INTVAL (XEXP (x, 1)) < 0)
3189 || GET_CODE (XEXP (x, 1)) != CONST_INT)
3190 {
3191 fprintf (file, "%s", targetm.asm_out.open_paren);
3192 cris_output_addr_const (file, XEXP (x, 1));
3193 fprintf (file, "%s", targetm.asm_out.close_paren);
3194 }
3195 else
3196 output_addr_const (file, XEXP (x, 1));
3197 break;
3198
3199 default:
3200 LOSE_AND_RETURN ("unexpected address expression", x);
3201 }
3202 }
3203
3204 #if 0
3205 /* Various small functions to replace macros. Only called from a
3206 debugger. They might collide with gcc functions or system functions,
3207 so only emit them when '#if 1' above. */
3208
3209 enum rtx_code Get_code (rtx);
3210
3211 enum rtx_code
3212 Get_code (rtx x)
3213 {
3214 return GET_CODE (x);
3215 }
3216
3217 const char *Get_mode (rtx);
3218
3219 const char *
3220 Get_mode (rtx x)
3221 {
3222 return GET_MODE_NAME (GET_MODE (x));
3223 }
3224
3225 rtx Xexp (rtx, int);
3226
3227 rtx
3228 Xexp (rtx x, int n)
3229 {
3230 return XEXP (x, n);
3231 }
3232
3233 rtx Xvecexp (rtx, int, int);
3234
3235 rtx
3236 Xvecexp (rtx x, int n, int m)
3237 {
3238 return XVECEXP (x, n, m);
3239 }
3240
3241 int Get_rtx_len (rtx);
3242
3243 int
3244 Get_rtx_len (rtx x)
3245 {
3246 return GET_RTX_LENGTH (GET_CODE (x));
3247 }
3248
3249 /* Use upper-case to distinguish from local variables that are sometimes
3250 called next_insn and prev_insn. */
3251
3252 rtx Next_insn (rtx);
3253
3254 rtx
3255 Next_insn (rtx insn)
3256 {
3257 return NEXT_INSN (insn);
3258 }
3259
3260 rtx Prev_insn (rtx);
3261
3262 rtx
3263 Prev_insn (rtx insn)
3264 {
3265 return PREV_INSN (insn);
3266 }
3267 #endif
3268
3269 #include "gt-cris.h"
3270
3271 /*
3272 * Local variables:
3273 * eval: (c-set-style "gnu")
3274 * indent-tabs-mode: t
3275 * End:
3276 */
3277