1 /* Remote debugging interface for M32R/SDI.
2
3 Copyright 2003, 2004 Free Software Foundation, Inc.
4
5 Contributed by Renesas Technology Co.
6 Written by Kei Sakamoto <sakamoto.kei@renesas.com>.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
24
25 #include "defs.h"
26 #include "gdbcmd.h"
27 #include "gdbcore.h"
28 #include "inferior.h"
29 #include "target.h"
30 #include "regcache.h"
31 #include "gdb_string.h"
32 #include <ctype.h>
33 #include <signal.h>
34 #include <netinet/in.h>
35 #include <sys/types.h>
36 #include <sys/time.h>
37 #include <signal.h>
38 #include <time.h>
39
40
41 #include "serial.h"
42
43 /* Descriptor for I/O to remote machine. */
44
45 static struct serial *sdi_desc = NULL;
46
47 #define SDI_TIMEOUT 30
48
49
50 #define SDIPORT 3232
51
52 static char chip_name[64];
53
54 static int step_mode;
55 static unsigned long last_pc_addr = 0xffffffff;
56 static unsigned char last_pc_addr_data[2];
57
58 static int mmu_on = 0;
59
60 static int use_ib_breakpoints = 1;
61
62 #define MAX_BREAKPOINTS 1024
63 static int max_ib_breakpoints;
64 static unsigned long bp_address[MAX_BREAKPOINTS];
65 static unsigned char bp_data[MAX_BREAKPOINTS][4];
66 static const unsigned char ib_bp_entry_enable[] = {
67 0x00, 0x00, 0x00, 0x06
68 };
69 static const unsigned char ib_bp_entry_disable[] = {
70 0x00, 0x00, 0x00, 0x00
71 };
72
73 /* dbt -> nop */
74 static const unsigned char dbt_bp_entry[] = {
75 0x10, 0xe0, 0x70, 0x00
76 };
77
78 #define MAX_ACCESS_BREAKS 4
79 static int max_access_breaks;
80 static unsigned long ab_address[MAX_ACCESS_BREAKS];
81 static unsigned int ab_type[MAX_ACCESS_BREAKS];
82 static unsigned int ab_size[MAX_ACCESS_BREAKS];
83 static CORE_ADDR hit_watchpoint_addr = 0;
84
85 static int interrupted = 0;
86
87 /* Forward data declarations */
88 extern struct target_ops m32r_ops;
89
90
91 /* Commands */
92 #define SDI_OPEN 1
93 #define SDI_CLOSE 2
94 #define SDI_RELEASE 3
95 #define SDI_READ_CPU_REG 4
96 #define SDI_WRITE_CPU_REG 5
97 #define SDI_READ_MEMORY 6
98 #define SDI_WRITE_MEMORY 7
99 #define SDI_EXEC_CPU 8
100 #define SDI_STOP_CPU 9
101 #define SDI_WAIT_FOR_READY 10
102 #define SDI_GET_ATTR 11
103 #define SDI_SET_ATTR 12
104 #define SDI_STATUS 13
105
106 /* Attributes */
107 #define SDI_ATTR_NAME 1
108 #define SDI_ATTR_BRK 2
109 #define SDI_ATTR_ABRK 3
110 #define SDI_ATTR_CACHE 4
111 #define SDI_CACHE_TYPE_M32102 0
112 #define SDI_CACHE_TYPE_CHAOS 1
113 #define SDI_ATTR_MEM_ACCESS 5
114 #define SDI_MEM_ACCESS_DEBUG_DMA 0
115 #define SDI_MEM_ACCESS_MON_CODE 1
116
117 /* Registers */
118 #define SDI_REG_R0 0
119 #define SDI_REG_R1 1
120 #define SDI_REG_R2 2
121 #define SDI_REG_R3 3
122 #define SDI_REG_R4 4
123 #define SDI_REG_R5 5
124 #define SDI_REG_R6 6
125 #define SDI_REG_R7 7
126 #define SDI_REG_R8 8
127 #define SDI_REG_R9 9
128 #define SDI_REG_R10 10
129 #define SDI_REG_R11 11
130 #define SDI_REG_R12 12
131 #define SDI_REG_FP 13
132 #define SDI_REG_LR 14
133 #define SDI_REG_SP 15
134 #define SDI_REG_PSW 16
135 #define SDI_REG_CBR 17
136 #define SDI_REG_SPI 18
137 #define SDI_REG_SPU 19
138 #define SDI_REG_CR4 20
139 #define SDI_REG_EVB 21
140 #define SDI_REG_BPC 22
141 #define SDI_REG_CR7 23
142 #define SDI_REG_BBPSW 24
143 #define SDI_REG_CR9 25
144 #define SDI_REG_CR10 26
145 #define SDI_REG_CR11 27
146 #define SDI_REG_CR12 28
147 #define SDI_REG_WR 29
148 #define SDI_REG_BBPC 30
149 #define SDI_REG_PBP 31
150 #define SDI_REG_ACCH 32
151 #define SDI_REG_ACCL 33
152 #define SDI_REG_ACC1H 34
153 #define SDI_REG_ACC1L 35
154
155
156 /* Low level communication functions */
157
158 /* Check an ack packet from the target */
159 static int
get_ack(void)160 get_ack (void)
161 {
162 int c;
163
164 if (!sdi_desc)
165 return -1;
166
167 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
168
169 if (c < 0)
170 return -1;
171
172 if (c != '+') /* error */
173 return -1;
174
175 return 0;
176 }
177
178 /* Send data to the target and check an ack packet */
179 static int
send_data(void * buf,int len)180 send_data (void *buf, int len)
181 {
182 int ret;
183
184 if (!sdi_desc)
185 return -1;
186
187 if (serial_write (sdi_desc, buf, len) != 0)
188 return -1;
189
190 if (get_ack () == -1)
191 return -1;
192
193 return len;
194 }
195
196 /* Receive data from the target */
197 static int
recv_data(void * buf,int len)198 recv_data (void *buf, int len)
199 {
200 int total = 0;
201 int c;
202
203 if (!sdi_desc)
204 return -1;
205
206 while (total < len)
207 {
208 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
209
210 if (c < 0)
211 return -1;
212
213 ((unsigned char *) buf)[total++] = c;
214 }
215
216 return len;
217 }
218
219 /* Store unsigned long parameter on packet */
220 static void
store_long_parameter(void * buf,long val)221 store_long_parameter (void *buf, long val)
222 {
223 val = htonl (val);
224 memcpy (buf, &val, 4);
225 }
226
227 /* Check if MMU is on */
228 static void
check_mmu_status(void)229 check_mmu_status (void)
230 {
231 unsigned long val;
232 unsigned char buf[2];
233
234 /* Read PC address */
235 buf[0] = SDI_READ_CPU_REG;
236 buf[1] = SDI_REG_BPC;
237 if (send_data (buf, 2) == -1)
238 return;
239 recv_data (&val, 4);
240 val = ntohl (val);
241 if ((val & 0xc0000000) == 0x80000000)
242 {
243 mmu_on = 1;
244 return;
245 }
246
247 /* Read EVB address */
248 buf[0] = SDI_READ_CPU_REG;
249 buf[1] = SDI_REG_EVB;
250 if (send_data (buf, 2) == -1)
251 return;
252 recv_data (&val, 4);
253 val = ntohl (val);
254 if ((val & 0xc0000000) == 0x80000000)
255 {
256 mmu_on = 1;
257 return;
258 }
259
260 mmu_on = 0;
261 }
262
263
264 /* This is called not only when we first attach, but also when the
265 user types "run" after having attached. */
266 static void
m32r_create_inferior(char * execfile,char * args,char ** env,int from_tty)267 m32r_create_inferior (char *execfile, char *args, char **env,
268 int from_tty)
269 {
270 CORE_ADDR entry_pt;
271
272 if (args && *args)
273 error ("Cannot pass arguments to remote STDEBUG process");
274
275 if (execfile == 0 || exec_bfd == 0)
276 error ("No executable file specified");
277
278 if (remote_debug)
279 fprintf_unfiltered (gdb_stdlog, "m32r_create_inferior(%s,%s)\n", execfile,
280 args);
281
282 entry_pt = bfd_get_start_address (exec_bfd);
283
284 /* The "process" (board) is already stopped awaiting our commands, and
285 the program is already downloaded. We just set its PC and go. */
286
287 clear_proceed_status ();
288
289 /* Tell wait_for_inferior that we've started a new process. */
290 init_wait_for_inferior ();
291
292 /* Set up the "saved terminal modes" of the inferior
293 based on what modes we are starting it with. */
294 target_terminal_init ();
295
296 /* Install inferior's terminal modes. */
297 target_terminal_inferior ();
298
299 proceed (entry_pt, TARGET_SIGNAL_DEFAULT, 0);
300 }
301
302 /* Open a connection to a remote debugger.
303 NAME is the filename used for communication. */
304
305 static void
m32r_open(char * args,int from_tty)306 m32r_open (char *args, int from_tty)
307 {
308 struct hostent *host_ent;
309 struct sockaddr_in server_addr;
310 char *port_str, hostname[256];
311 int port;
312 unsigned char buf[2];
313 int i, n;
314 int yes = 1;
315
316 if (remote_debug)
317 fprintf_unfiltered (gdb_stdlog, "m32r_open(%d)\n", from_tty);
318
319 target_preopen (from_tty);
320
321 push_target (&m32r_ops);
322
323 if (args == NULL)
324 sprintf (hostname, "localhost:%d", SDIPORT);
325 else
326 {
327 port_str = strchr (args, ':');
328 if (port_str == NULL)
329 sprintf (hostname, "%s:%d", args, SDIPORT);
330 else
331 strcpy (hostname, args);
332 }
333
334 sdi_desc = serial_open (hostname);
335 if (!sdi_desc)
336 error ("Connection refused\n");
337
338 if (get_ack () == -1)
339 error ("Cannot connect to SDI target\n");
340
341 buf[0] = SDI_OPEN;
342 if (send_data (buf, 1) == -1)
343 error ("Cannot connect to SDI target\n");
344
345 /* Get maximum number of ib breakpoints */
346 buf[0] = SDI_GET_ATTR;
347 buf[1] = SDI_ATTR_BRK;
348 send_data (buf, 2);
349 recv_data (buf, 1);
350 max_ib_breakpoints = buf[0];
351 if (remote_debug)
352 printf_filtered ("Max IB Breakpoints = %d\n", max_ib_breakpoints);
353
354 /* Initialize breakpoints. */
355 for (i = 0; i < MAX_BREAKPOINTS; i++)
356 bp_address[i] = 0xffffffff;
357
358 /* Get maximum number of access breaks. */
359 buf[0] = SDI_GET_ATTR;
360 buf[1] = SDI_ATTR_ABRK;
361 send_data (buf, 2);
362 recv_data (buf, 1);
363 max_access_breaks = buf[0];
364 if (remote_debug)
365 printf_filtered ("Max Access Breaks = %d\n", max_access_breaks);
366
367 /* Initialize access breask. */
368 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
369 ab_address[i] = 0x00000000;
370
371 check_mmu_status ();
372
373 /* Get the name of chip on target board. */
374 buf[0] = SDI_GET_ATTR;
375 buf[1] = SDI_ATTR_NAME;
376 send_data (buf, 2);
377 recv_data (chip_name, 64);
378
379 if (from_tty)
380 printf_filtered ("Remote %s connected to %s\n", target_shortname,
381 chip_name);
382 }
383
384 /* Close out all files and local state before this target loses control. */
385
386 static void
m32r_close(int quitting)387 m32r_close (int quitting)
388 {
389 unsigned char buf[1];
390
391 if (remote_debug)
392 fprintf_unfiltered (gdb_stdlog, "m32r_close(%d)\n", quitting);
393
394 if (sdi_desc)
395 {
396 buf[0] = SDI_CLOSE;
397 send_data (buf, 1);
398 serial_close (sdi_desc);
399 sdi_desc = NULL;
400 }
401
402 inferior_ptid = null_ptid;
403 return;
404 }
405
406 /* Tell the remote machine to resume. */
407
408 static void
m32r_resume(ptid_t ptid,int step,enum target_signal sig)409 m32r_resume (ptid_t ptid, int step, enum target_signal sig)
410 {
411 unsigned long pc_addr, bp_addr, ab_addr;
412 unsigned char buf[13];
413 int i;
414
415 if (remote_debug)
416 {
417 if (step)
418 fprintf_unfiltered (gdb_stdlog, "\nm32r_resume(step)\n");
419 else
420 fprintf_unfiltered (gdb_stdlog, "\nm32r_resume(cont)\n");
421 }
422
423 check_mmu_status ();
424
425 pc_addr = read_pc ();
426 if (remote_debug)
427 fprintf_unfiltered (gdb_stdlog, "pc <= 0x%lx\n", pc_addr);
428
429 /* At pc address there is a parallel instruction with +2 offset,
430 so we have to make it a serial instruction or avoid it. */
431 if (pc_addr == last_pc_addr)
432 {
433 /* Avoid a parallel nop. */
434 if (last_pc_addr_data[0] == 0xf0 && last_pc_addr_data[1] == 0x00)
435 {
436 pc_addr += 2;
437 /* Now we can forget this instruction. */
438 last_pc_addr = 0xffffffff;
439 }
440 /* Clear a parallel bit. */
441 else
442 {
443 buf[0] = SDI_WRITE_MEMORY;
444 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
445 store_long_parameter (buf + 1, pc_addr);
446 else
447 store_long_parameter (buf + 1, pc_addr - 1);
448 store_long_parameter (buf + 5, 1);
449 buf[9] = last_pc_addr_data[0] & 0x7f;
450 send_data (buf, 10);
451 }
452 }
453
454 /* Set PC. */
455 buf[0] = SDI_WRITE_CPU_REG;
456 buf[1] = SDI_REG_BPC;
457 store_long_parameter (buf + 2, pc_addr);
458 send_data (buf, 6);
459
460 /* step mode. */
461 step_mode = step;
462 if (step)
463 {
464 /* Set PBP. */
465 buf[0] = SDI_WRITE_CPU_REG;
466 buf[1] = SDI_REG_PBP;
467 store_long_parameter (buf + 2, pc_addr | 1);
468 send_data (buf, 6);
469 }
470 else
471 {
472 int ib_breakpoints;
473
474 if (use_ib_breakpoints)
475 ib_breakpoints = max_ib_breakpoints;
476 else
477 ib_breakpoints = 0;
478
479 /* Set ib breakpoints. */
480 for (i = 0; i < ib_breakpoints; i++)
481 {
482 bp_addr = bp_address[i];
483 if (bp_addr != 0xffffffff && bp_addr != pc_addr)
484 {
485 /* Set PBP. */
486 buf[0] = SDI_WRITE_MEMORY;
487 store_long_parameter (buf + 1, 0xffff8000 + 4 * i);
488 store_long_parameter (buf + 5, 4);
489 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
490 {
491 buf[9] = ib_bp_entry_enable[0];
492 buf[10] = ib_bp_entry_enable[1];
493 buf[11] = ib_bp_entry_enable[2];
494 buf[12] = ib_bp_entry_enable[3];
495 }
496 else
497 {
498 buf[9] = ib_bp_entry_enable[3];
499 buf[10] = ib_bp_entry_enable[2];
500 buf[11] = ib_bp_entry_enable[1];
501 buf[12] = ib_bp_entry_enable[0];
502 }
503 send_data (buf, 13);
504
505 buf[0] = SDI_WRITE_MEMORY;
506 store_long_parameter (buf + 1, 0xffff8080 + 4 * i);
507 store_long_parameter (buf + 5, 4);
508 store_unsigned_integer (buf + 9, 4, bp_addr);
509 send_data (buf, 13);
510 }
511 }
512
513 /* Set dbt breakpoints. */
514 for (i = ib_breakpoints; i < MAX_BREAKPOINTS; i++)
515 {
516 bp_addr = bp_address[i];
517 if (bp_addr != 0xffffffff && bp_addr != pc_addr)
518 {
519 if (!mmu_on)
520 bp_addr &= 0x7fffffff;
521
522 /* Write DBT instruction. */
523 buf[0] = SDI_WRITE_MEMORY;
524 if ((bp_addr & 2) == 0 && bp_addr != (pc_addr & 0xfffffffc))
525 {
526 store_long_parameter (buf + 1, bp_addr);
527 store_long_parameter (buf + 5, 4);
528 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
529 {
530 buf[9] = dbt_bp_entry[0];
531 buf[10] = dbt_bp_entry[1];
532 buf[11] = dbt_bp_entry[2];
533 buf[12] = dbt_bp_entry[3];
534 }
535 else
536 {
537 buf[9] = dbt_bp_entry[3];
538 buf[10] = dbt_bp_entry[2];
539 buf[11] = dbt_bp_entry[1];
540 buf[12] = dbt_bp_entry[0];
541 }
542 send_data (buf, 13);
543 }
544 else
545 {
546 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
547 store_long_parameter (buf + 1, bp_addr);
548 else if ((bp_addr & 2) == 0)
549 store_long_parameter (buf + 1, bp_addr + 2);
550 else
551 store_long_parameter (buf + 1, bp_addr - 2);
552 store_long_parameter (buf + 5, 2);
553 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
554 {
555 buf[9] = dbt_bp_entry[0];
556 buf[10] = dbt_bp_entry[1];
557 }
558 else
559 {
560 buf[9] = dbt_bp_entry[1];
561 buf[10] = dbt_bp_entry[0];
562 }
563 send_data (buf, 11);
564 }
565 }
566 }
567
568 /* Set access breaks. */
569 for (i = 0; i < max_access_breaks; i++)
570 {
571 ab_addr = ab_address[i];
572 if (ab_addr != 0x00000000)
573 {
574 /* DBC register */
575 buf[0] = SDI_WRITE_MEMORY;
576 store_long_parameter (buf + 1, 0xffff8100 + 4 * i);
577 store_long_parameter (buf + 5, 4);
578 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
579 {
580 buf[9] = 0x00;
581 buf[10] = 0x00;
582 buf[11] = 0x00;
583 switch (ab_type[i])
584 {
585 case 0: /* write watch */
586 buf[12] = 0x86;
587 break;
588 case 1: /* read watch */
589 buf[12] = 0x46;
590 break;
591 case 2: /* access watch */
592 buf[12] = 0x06;
593 break;
594 }
595 }
596 else
597 {
598 switch (ab_type[i])
599 {
600 case 0: /* write watch */
601 buf[9] = 0x86;
602 break;
603 case 1: /* read watch */
604 buf[9] = 0x46;
605 break;
606 case 2: /* access watch */
607 buf[9] = 0x06;
608 break;
609 }
610 buf[10] = 0x00;
611 buf[11] = 0x00;
612 buf[12] = 0x00;
613 }
614 send_data (buf, 13);
615
616 /* DBAH register */
617 buf[0] = SDI_WRITE_MEMORY;
618 store_long_parameter (buf + 1, 0xffff8180 + 4 * i);
619 store_long_parameter (buf + 5, 4);
620 store_unsigned_integer (buf + 9, 4, ab_addr);
621 send_data (buf, 13);
622
623 /* DBAL register */
624 buf[0] = SDI_WRITE_MEMORY;
625 store_long_parameter (buf + 1, 0xffff8200 + 4 * i);
626 store_long_parameter (buf + 5, 4);
627 store_long_parameter (buf + 9, 0xffffffff);
628 send_data (buf, 13);
629
630 /* DBD register */
631 buf[0] = SDI_WRITE_MEMORY;
632 store_long_parameter (buf + 1, 0xffff8280 + 4 * i);
633 store_long_parameter (buf + 5, 4);
634 store_long_parameter (buf + 9, 0x00000000);
635 send_data (buf, 13);
636
637 /* DBDM register */
638 buf[0] = SDI_WRITE_MEMORY;
639 store_long_parameter (buf + 1, 0xffff8300 + 4 * i);
640 store_long_parameter (buf + 5, 4);
641 store_long_parameter (buf + 9, 0x00000000);
642 send_data (buf, 13);
643 }
644 }
645
646 /* Unset PBP. */
647 buf[0] = SDI_WRITE_CPU_REG;
648 buf[1] = SDI_REG_PBP;
649 store_long_parameter (buf + 2, 0x00000000);
650 send_data (buf, 6);
651 }
652
653 buf[0] = SDI_EXEC_CPU;
654 send_data (buf, 1);
655
656 /* Without this, some commands which require an active target (such as kill)
657 won't work. This variable serves (at least) double duty as both the pid
658 of the target process (if it has such), and as a flag indicating that a
659 target is active. These functions should be split out into seperate
660 variables, especially since GDB will someday have a notion of debugging
661 several processes. */
662 inferior_ptid = pid_to_ptid (32);
663
664 return;
665 }
666
667 /* Wait until the remote machine stops, then return,
668 storing status in STATUS just as `wait' would. */
669
670 static void
gdb_cntrl_c(int signo)671 gdb_cntrl_c (int signo)
672 {
673 if (remote_debug)
674 fprintf_unfiltered (gdb_stdlog, "interrupt\n");
675 interrupted = 1;
676 }
677
678 static ptid_t
m32r_wait(ptid_t ptid,struct target_waitstatus * status)679 m32r_wait (ptid_t ptid, struct target_waitstatus *status)
680 {
681 static RETSIGTYPE (*prev_sigint) ();
682 unsigned long bp_addr, pc_addr;
683 long i;
684 unsigned char buf[13];
685 unsigned long val;
686 int ret, c;
687
688 if (remote_debug)
689 fprintf_unfiltered (gdb_stdlog, "m32r_wait()\n");
690
691 status->kind = TARGET_WAITKIND_EXITED;
692 status->value.sig = 0;
693
694 interrupted = 0;
695 prev_sigint = signal (SIGINT, gdb_cntrl_c);
696
697 /* Wait for ready */
698 buf[0] = SDI_WAIT_FOR_READY;
699 if (serial_write (sdi_desc, buf, 1) != 0)
700 error ("Remote connection closed");
701
702 while (1)
703 {
704 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
705 if (c < 0)
706 error ("Remote connection closed");
707
708 if (c == '-') /* error */
709 {
710 status->kind = TARGET_WAITKIND_STOPPED;
711 status->value.sig = TARGET_SIGNAL_HUP;
712 return inferior_ptid;
713 }
714 else if (c == '+') /* stopped */
715 break;
716
717 if (interrupted)
718 ret = serial_write (sdi_desc, "!", 1); /* packet to interrupt */
719 else
720 ret = serial_write (sdi_desc, ".", 1); /* packet to wait */
721 if (ret != 0)
722 error ("Remote connection closed");
723 }
724
725 status->kind = TARGET_WAITKIND_STOPPED;
726 if (interrupted)
727 status->value.sig = TARGET_SIGNAL_INT;
728 else
729 status->value.sig = TARGET_SIGNAL_TRAP;
730
731 interrupted = 0;
732 signal (SIGINT, prev_sigint);
733
734 check_mmu_status ();
735
736 /* Recover parallel bit. */
737 if (last_pc_addr != 0xffffffff)
738 {
739 buf[0] = SDI_WRITE_MEMORY;
740 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
741 store_long_parameter (buf + 1, last_pc_addr);
742 else
743 store_long_parameter (buf + 1, last_pc_addr - 1);
744 store_long_parameter (buf + 5, 1);
745 buf[9] = last_pc_addr_data[0];
746 send_data (buf, 10);
747 last_pc_addr = 0xffffffff;
748 }
749
750 /* Breakpoints are inserted only for "next" command */
751 if (!step_mode)
752 {
753 int ib_breakpoints;
754
755 if (use_ib_breakpoints)
756 ib_breakpoints = max_ib_breakpoints;
757 else
758 ib_breakpoints = 0;
759
760 /* Set back pc by 2 if m32r is stopped with dbt. */
761 buf[0] = SDI_READ_CPU_REG;
762 buf[1] = SDI_REG_BPC;
763 send_data (buf, 2);
764 recv_data (&val, 4);
765 pc_addr = ntohl (val) - 2;
766 for (i = ib_breakpoints; i < MAX_BREAKPOINTS; i++)
767 {
768 if (pc_addr == bp_address[i])
769 {
770 buf[0] = SDI_WRITE_CPU_REG;
771 buf[1] = SDI_REG_BPC;
772 store_long_parameter (buf + 2, pc_addr);
773 send_data (buf, 6);
774
775 /* If there is a parallel instruction with +2 offset at pc
776 address, we have to take care of it later. */
777 if ((pc_addr & 0x2) != 0)
778 {
779 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
780 {
781 if ((bp_data[i][2] & 0x80) != 0)
782 {
783 last_pc_addr = pc_addr;
784 last_pc_addr_data[0] = bp_data[i][2];
785 last_pc_addr_data[1] = bp_data[i][3];
786 }
787 }
788 else
789 {
790 if ((bp_data[i][1] & 0x80) != 0)
791 {
792 last_pc_addr = pc_addr;
793 last_pc_addr_data[0] = bp_data[i][1];
794 last_pc_addr_data[1] = bp_data[i][0];
795 }
796 }
797 }
798 break;
799 }
800 }
801
802 /* Remove ib breakpoints. */
803 for (i = 0; i < ib_breakpoints; i++)
804 {
805 if (bp_address[i] != 0xffffffff)
806 {
807 buf[0] = SDI_WRITE_MEMORY;
808 store_long_parameter (buf + 1, 0xffff8000 + 4 * i);
809 store_long_parameter (buf + 5, 4);
810 buf[9] = ib_bp_entry_disable[0];
811 buf[10] = ib_bp_entry_disable[1];
812 buf[11] = ib_bp_entry_disable[2];
813 buf[12] = ib_bp_entry_disable[3];
814 send_data (buf, 13);
815 }
816 }
817 /* Remove dbt breakpoints. */
818 for (i = ib_breakpoints; i < MAX_BREAKPOINTS; i++)
819 {
820 bp_addr = bp_address[i];
821 if (bp_addr != 0xffffffff)
822 {
823 if (!mmu_on)
824 bp_addr &= 0x7fffffff;
825 buf[0] = SDI_WRITE_MEMORY;
826 store_long_parameter (buf + 1, bp_addr & 0xfffffffc);
827 store_long_parameter (buf + 5, 4);
828 buf[9] = bp_data[i][0];
829 buf[10] = bp_data[i][1];
830 buf[11] = bp_data[i][2];
831 buf[12] = bp_data[i][3];
832 send_data (buf, 13);
833 }
834 }
835
836 /* Remove access breaks. */
837 hit_watchpoint_addr = 0;
838 for (i = 0; i < max_access_breaks; i++)
839 {
840 if (ab_address[i] != 0x00000000)
841 {
842 buf[0] = SDI_READ_MEMORY;
843 store_long_parameter (buf + 1, 0xffff8100 + 4 * i);
844 store_long_parameter (buf + 5, 4);
845 serial_write (sdi_desc, buf, 9);
846 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
847 if (c != '-' && recv_data (buf, 4) != -1)
848 {
849 if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
850 {
851 if ((buf[3] & 0x1) == 0x1)
852 hit_watchpoint_addr = ab_address[i];
853 }
854 else
855 {
856 if ((buf[0] & 0x1) == 0x1)
857 hit_watchpoint_addr = ab_address[i];
858 }
859 }
860
861 buf[0] = SDI_WRITE_MEMORY;
862 store_long_parameter (buf + 1, 0xffff8100 + 4 * i);
863 store_long_parameter (buf + 5, 4);
864 store_long_parameter (buf + 9, 0x00000000);
865 send_data (buf, 13);
866 }
867 }
868
869 if (remote_debug)
870 fprintf_unfiltered (gdb_stdlog, "pc => 0x%lx\n", pc_addr);
871 }
872 else
873 last_pc_addr = 0xffffffff;
874
875 return inferior_ptid;
876 }
877
878 /* Terminate the open connection to the remote debugger.
879 Use this when you want to detach and do something else
880 with your gdb. */
881 static void
m32r_detach(char * args,int from_tty)882 m32r_detach (char *args, int from_tty)
883 {
884 if (remote_debug)
885 fprintf_unfiltered (gdb_stdlog, "m32r_detach(%d)\n", from_tty);
886
887 m32r_resume (inferior_ptid, 0, 0);
888
889 /* calls m32r_close to do the real work */
890 pop_target ();
891 if (from_tty)
892 fprintf_unfiltered (gdb_stdlog, "Ending remote %s debugging\n",
893 target_shortname);
894 }
895
896 /* Return the id of register number REGNO. */
897
898 static int
get_reg_id(int regno)899 get_reg_id (int regno)
900 {
901 switch (regno)
902 {
903 case 20:
904 return SDI_REG_BBPC;
905 case 21:
906 return SDI_REG_BPC;
907 case 22:
908 return SDI_REG_ACCL;
909 case 23:
910 return SDI_REG_ACCH;
911 case 24:
912 return SDI_REG_EVB;
913 }
914
915 return regno;
916 }
917
918 /* Read the remote registers into the block REGS. */
919
920 static void m32r_fetch_register (int);
921
922 static void
m32r_fetch_registers(void)923 m32r_fetch_registers (void)
924 {
925 int regno;
926
927 for (regno = 0; regno < NUM_REGS; regno++)
928 m32r_fetch_register (regno);
929 }
930
931 /* Fetch register REGNO, or all registers if REGNO is -1.
932 Returns errno value. */
933 static void
m32r_fetch_register(int regno)934 m32r_fetch_register (int regno)
935 {
936 unsigned long val, val2, regid;
937 unsigned char buf[2];
938
939 if (regno == -1)
940 m32r_fetch_registers ();
941 else
942 {
943 char buffer[MAX_REGISTER_SIZE];
944
945 regid = get_reg_id (regno);
946 buf[0] = SDI_READ_CPU_REG;
947 buf[1] = regid;
948 send_data (buf, 2);
949 recv_data (&val, 4);
950 val = ntohl (val);
951
952 if (regid == SDI_REG_PSW)
953 {
954 buf[0] = SDI_READ_CPU_REG;
955 buf[1] = SDI_REG_BBPSW;
956 send_data (buf, 2);
957 recv_data (&val2, 4);
958 val2 = ntohl (val2);
959 val = ((0x00c1 & val2) << 8) | ((0xc100 & val) >> 8);
960 }
961
962 if (remote_debug)
963 fprintf_unfiltered (gdb_stdlog, "m32r_fetch_register(%d,0x%08lx)\n",
964 regno, val);
965
966 /* We got the number the register holds, but gdb expects to see a
967 value in the target byte ordering. */
968 store_unsigned_integer (buffer, 4, val);
969 supply_register (regno, buffer);
970 }
971 return;
972 }
973
974 /* Store the remote registers from the contents of the block REGS. */
975
976 static void m32r_store_register (int);
977
978 static void
m32r_store_registers(void)979 m32r_store_registers (void)
980 {
981 int regno;
982
983 for (regno = 0; regno < NUM_REGS; regno++)
984 m32r_store_register (regno);
985
986 registers_changed ();
987 }
988
989 /* Store register REGNO, or all if REGNO == 0.
990 Return errno value. */
991 static void
m32r_store_register(int regno)992 m32r_store_register (int regno)
993 {
994 int regid;
995 ULONGEST regval, tmp;
996 unsigned char buf[6];
997
998 if (regno == -1)
999 m32r_store_registers ();
1000 else
1001 {
1002 regcache_cooked_read_unsigned (current_regcache, regno, ®val);
1003 regid = get_reg_id (regno);
1004
1005 if (regid == SDI_REG_PSW)
1006 {
1007 unsigned long psw, bbpsw;
1008
1009 buf[0] = SDI_READ_CPU_REG;
1010 buf[1] = SDI_REG_PSW;
1011 send_data (buf, 2);
1012 recv_data (&psw, 4);
1013 psw = ntohl (psw);
1014
1015 buf[0] = SDI_READ_CPU_REG;
1016 buf[1] = SDI_REG_BBPSW;
1017 send_data (buf, 2);
1018 recv_data (&bbpsw, 4);
1019 bbpsw = ntohl (bbpsw);
1020
1021 tmp = (0x00c1 & psw) | ((0x00c1 & regval) << 8);
1022 buf[0] = SDI_WRITE_CPU_REG;
1023 buf[1] = SDI_REG_PSW;
1024 store_long_parameter (buf + 2, tmp);
1025 send_data (buf, 6);
1026
1027 tmp = (0x0030 & bbpsw) | ((0xc100 & regval) >> 8);
1028 buf[0] = SDI_WRITE_CPU_REG;
1029 buf[1] = SDI_REG_BBPSW;
1030 store_long_parameter (buf + 2, tmp);
1031 send_data (buf, 6);
1032 }
1033 else
1034 {
1035 buf[0] = SDI_WRITE_CPU_REG;
1036 buf[1] = regid;
1037 store_long_parameter (buf + 2, regval);
1038 send_data (buf, 6);
1039 }
1040
1041 if (remote_debug)
1042 fprintf_unfiltered (gdb_stdlog, "m32r_store_register(%d,0x%08lu)\n",
1043 regno, (unsigned long) regval);
1044 }
1045 }
1046
1047 /* Get ready to modify the registers array. On machines which store
1048 individual registers, this doesn't need to do anything. On machines
1049 which store all the registers in one fell swoop, this makes sure
1050 that registers contains all the registers from the program being
1051 debugged. */
1052
1053 static void
m32r_prepare_to_store(void)1054 m32r_prepare_to_store (void)
1055 {
1056 /* Do nothing, since we can store individual regs */
1057 if (remote_debug)
1058 fprintf_unfiltered (gdb_stdlog, "m32r_prepare_to_store()\n");
1059 }
1060
1061 static void
m32r_files_info(struct target_ops * target)1062 m32r_files_info (struct target_ops *target)
1063 {
1064 char *file = "nothing";
1065
1066 if (exec_bfd)
1067 {
1068 file = bfd_get_filename (exec_bfd);
1069 printf_filtered ("\tAttached to %s running program %s\n",
1070 chip_name, file);
1071 }
1072 }
1073
1074 /* Read/Write memory. */
1075 static int
m32r_xfer_memory(CORE_ADDR memaddr,char * myaddr,int len,int write,struct mem_attrib * attrib,struct target_ops * target)1076 m32r_xfer_memory (CORE_ADDR memaddr, char *myaddr, int len,
1077 int write,
1078 struct mem_attrib *attrib, struct target_ops *target)
1079 {
1080 unsigned long taddr;
1081 unsigned char buf[0x2000];
1082 int ret, c;
1083
1084 taddr = memaddr;
1085
1086 if (!mmu_on)
1087 {
1088 if ((taddr & 0xa0000000) == 0x80000000)
1089 taddr &= 0x7fffffff;
1090 }
1091
1092 if (remote_debug)
1093 {
1094 if (write)
1095 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory(%08lx,%d,write)\n",
1096 memaddr, len);
1097 else
1098 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory(%08lx,%d,read)\n",
1099 memaddr, len);
1100 }
1101
1102 if (write)
1103 {
1104 buf[0] = SDI_WRITE_MEMORY;
1105 store_long_parameter (buf + 1, taddr);
1106 store_long_parameter (buf + 5, len);
1107 if (len < 0x1000)
1108 {
1109 memcpy (buf + 9, myaddr, len);
1110 ret = send_data (buf, len + 9) - 9;
1111 }
1112 else
1113 {
1114 if (serial_write (sdi_desc, buf, 9) != 0)
1115 {
1116 if (remote_debug)
1117 fprintf_unfiltered (gdb_stdlog,
1118 "m32r_xfer_memory() failed\n");
1119 return 0;
1120 }
1121 ret = send_data (myaddr, len);
1122 }
1123 }
1124 else
1125 {
1126 buf[0] = SDI_READ_MEMORY;
1127 store_long_parameter (buf + 1, taddr);
1128 store_long_parameter (buf + 5, len);
1129 if (serial_write (sdi_desc, buf, 9) != 0)
1130 {
1131 if (remote_debug)
1132 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory() failed\n");
1133 return 0;
1134 }
1135
1136 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
1137 if (c < 0 || c == '-')
1138 {
1139 if (remote_debug)
1140 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory() failed\n");
1141 return 0;
1142 }
1143
1144 ret = recv_data (myaddr, len);
1145 }
1146
1147 if (ret <= 0)
1148 {
1149 if (remote_debug)
1150 fprintf_unfiltered (gdb_stdlog, "m32r_xfer_memory() fails\n");
1151 return 0;
1152 }
1153
1154 return ret;
1155 }
1156
1157 static void
m32r_kill(void)1158 m32r_kill (void)
1159 {
1160 if (remote_debug)
1161 fprintf_unfiltered (gdb_stdlog, "m32r_kill()\n");
1162
1163 inferior_ptid = null_ptid;
1164
1165 return;
1166 }
1167
1168 /* Clean up when a program exits.
1169
1170 The program actually lives on in the remote processor's RAM, and may be
1171 run again without a download. Don't leave it full of breakpoint
1172 instructions. */
1173
1174 static void
m32r_mourn_inferior(void)1175 m32r_mourn_inferior (void)
1176 {
1177 if (remote_debug)
1178 fprintf_unfiltered (gdb_stdlog, "m32r_mourn_inferior()\n");
1179
1180 remove_breakpoints ();
1181 generic_mourn_inferior ();
1182 }
1183
1184 static int
m32r_insert_breakpoint(CORE_ADDR addr,char * shadow)1185 m32r_insert_breakpoint (CORE_ADDR addr, char *shadow)
1186 {
1187 int ib_breakpoints;
1188 unsigned char buf[13];
1189 int i, c;
1190
1191 if (remote_debug)
1192 fprintf_unfiltered (gdb_stdlog, "m32r_insert_breakpoint(%08lx,\"%s\")\n",
1193 addr, shadow);
1194
1195 if (use_ib_breakpoints)
1196 ib_breakpoints = max_ib_breakpoints;
1197 else
1198 ib_breakpoints = 0;
1199
1200 for (i = 0; i < MAX_BREAKPOINTS; i++)
1201 {
1202 if (bp_address[i] == 0xffffffff)
1203 {
1204 bp_address[i] = addr;
1205 if (i >= ib_breakpoints)
1206 {
1207 buf[0] = SDI_READ_MEMORY;
1208 if (mmu_on)
1209 store_long_parameter (buf + 1, addr & 0xfffffffc);
1210 else
1211 store_long_parameter (buf + 1, addr & 0x7ffffffc);
1212 store_long_parameter (buf + 5, 4);
1213 serial_write (sdi_desc, buf, 9);
1214 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
1215 if (c != '-')
1216 recv_data (bp_data[i], 4);
1217 }
1218 return 0;
1219 }
1220 }
1221
1222 error ("Too many breakpoints");
1223 return 1;
1224 }
1225
1226 static int
m32r_remove_breakpoint(CORE_ADDR addr,char * shadow)1227 m32r_remove_breakpoint (CORE_ADDR addr, char *shadow)
1228 {
1229 int i;
1230
1231 if (remote_debug)
1232 fprintf_unfiltered (gdb_stdlog, "m32r_remove_breakpoint(%08lx,\"%s\")\n",
1233 addr, shadow);
1234
1235 for (i = 0; i < MAX_BREAKPOINTS; i++)
1236 {
1237 if (bp_address[i] == addr)
1238 {
1239 bp_address[i] = 0xffffffff;
1240 break;
1241 }
1242 }
1243
1244 return 0;
1245 }
1246
1247 static void
m32r_load(char * args,int from_tty)1248 m32r_load (char *args, int from_tty)
1249 {
1250 struct cleanup *old_chain;
1251 asection *section;
1252 bfd *pbfd;
1253 bfd_vma entry;
1254 char *filename;
1255 int quiet;
1256 int nostart;
1257 time_t start_time, end_time; /* Start and end times of download */
1258 unsigned long data_count; /* Number of bytes transferred to memory */
1259 int ret;
1260 static RETSIGTYPE (*prev_sigint) ();
1261
1262 /* for direct tcp connections, we can do a fast binary download */
1263 quiet = 0;
1264 nostart = 0;
1265 filename = NULL;
1266
1267 while (*args != '\000')
1268 {
1269 char *arg;
1270
1271 while (isspace (*args))
1272 args++;
1273
1274 arg = args;
1275
1276 while ((*args != '\000') && !isspace (*args))
1277 args++;
1278
1279 if (*args != '\000')
1280 *args++ = '\000';
1281
1282 if (*arg != '-')
1283 filename = arg;
1284 else if (strncmp (arg, "-quiet", strlen (arg)) == 0)
1285 quiet = 1;
1286 else if (strncmp (arg, "-nostart", strlen (arg)) == 0)
1287 nostart = 1;
1288 else
1289 error ("Unknown option `%s'", arg);
1290 }
1291
1292 if (!filename)
1293 filename = get_exec_file (1);
1294
1295 pbfd = bfd_openr (filename, gnutarget);
1296 if (pbfd == NULL)
1297 {
1298 perror_with_name (filename);
1299 return;
1300 }
1301 old_chain = make_cleanup_bfd_close (pbfd);
1302
1303 if (!bfd_check_format (pbfd, bfd_object))
1304 error ("\"%s\" is not an object file: %s", filename,
1305 bfd_errmsg (bfd_get_error ()));
1306
1307 start_time = time (NULL);
1308 data_count = 0;
1309
1310 interrupted = 0;
1311 prev_sigint = signal (SIGINT, gdb_cntrl_c);
1312
1313 for (section = pbfd->sections; section; section = section->next)
1314 {
1315 if (bfd_get_section_flags (pbfd, section) & SEC_LOAD)
1316 {
1317 bfd_vma section_address;
1318 bfd_size_type section_size;
1319 file_ptr fptr;
1320 int n;
1321
1322 section_address = bfd_section_lma (pbfd, section);
1323 section_size = bfd_get_section_size (section);
1324
1325 if (!mmu_on)
1326 {
1327 if ((section_address & 0xa0000000) == 0x80000000)
1328 section_address &= 0x7fffffff;
1329 }
1330
1331 if (!quiet)
1332 printf_filtered ("[Loading section %s at 0x%lx (%d bytes)]\n",
1333 bfd_get_section_name (pbfd, section),
1334 section_address, (int) section_size);
1335
1336 fptr = 0;
1337
1338 data_count += section_size;
1339
1340 n = 0;
1341 while (section_size > 0)
1342 {
1343 char unsigned buf[0x1000 + 9];
1344 int count;
1345
1346 count = min (section_size, 0x1000);
1347
1348 buf[0] = SDI_WRITE_MEMORY;
1349 store_long_parameter (buf + 1, section_address);
1350 store_long_parameter (buf + 5, count);
1351
1352 bfd_get_section_contents (pbfd, section, buf + 9, fptr, count);
1353 if (send_data (buf, count + 9) <= 0)
1354 error ("Error while downloading %s section.",
1355 bfd_get_section_name (pbfd, section));
1356
1357 if (!quiet)
1358 {
1359 printf_unfiltered (".");
1360 if (n++ > 60)
1361 {
1362 printf_unfiltered ("\n");
1363 n = 0;
1364 }
1365 gdb_flush (gdb_stdout);
1366 }
1367
1368 section_address += count;
1369 fptr += count;
1370 section_size -= count;
1371
1372 if (interrupted)
1373 break;
1374 }
1375
1376 if (!quiet && !interrupted)
1377 {
1378 printf_unfiltered ("done.\n");
1379 gdb_flush (gdb_stdout);
1380 }
1381 }
1382
1383 if (interrupted)
1384 {
1385 printf_unfiltered ("Interrupted.\n");
1386 break;
1387 }
1388 }
1389
1390 interrupted = 0;
1391 signal (SIGINT, prev_sigint);
1392
1393 end_time = time (NULL);
1394
1395 /* Make the PC point at the start address */
1396 if (exec_bfd)
1397 write_pc (bfd_get_start_address (exec_bfd));
1398
1399 inferior_ptid = null_ptid; /* No process now */
1400
1401 /* This is necessary because many things were based on the PC at the time
1402 that we attached to the monitor, which is no longer valid now that we
1403 have loaded new code (and just changed the PC). Another way to do this
1404 might be to call normal_stop, except that the stack may not be valid,
1405 and things would get horribly confused... */
1406
1407 clear_symtab_users ();
1408
1409 if (!nostart)
1410 {
1411 entry = bfd_get_start_address (pbfd);
1412
1413 if (!quiet)
1414 printf_unfiltered ("[Starting %s at 0x%lx]\n", filename, entry);
1415 }
1416
1417 print_transfer_performance (gdb_stdout, data_count, 0,
1418 end_time - start_time);
1419
1420 do_cleanups (old_chain);
1421 }
1422
1423 static void
m32r_stop(void)1424 m32r_stop (void)
1425 {
1426 unsigned char buf[1];
1427
1428 if (remote_debug)
1429 fprintf_unfiltered (gdb_stdlog, "m32r_stop()\n");
1430
1431 buf[0] = SDI_STOP_CPU;
1432 send_data (buf, 1);
1433
1434 return;
1435 }
1436
1437
1438 /* Tell whether this target can support a hardware breakpoint. CNT
1439 is the number of hardware breakpoints already installed. This
1440 implements the TARGET_CAN_USE_HARDWARE_WATCHPOINT macro. */
1441
1442 int
m32r_can_use_hw_watchpoint(int type,int cnt,int othertype)1443 m32r_can_use_hw_watchpoint (int type, int cnt, int othertype)
1444 {
1445 return sdi_desc != NULL && cnt < max_access_breaks;
1446 }
1447
1448 /* Set a data watchpoint. ADDR and LEN should be obvious. TYPE is 0
1449 for a write watchpoint, 1 for a read watchpoint, or 2 for a read/write
1450 watchpoint. */
1451
1452 int
m32r_insert_watchpoint(CORE_ADDR addr,int len,int type)1453 m32r_insert_watchpoint (CORE_ADDR addr, int len, int type)
1454 {
1455 int i;
1456
1457 if (remote_debug)
1458 fprintf_unfiltered (gdb_stdlog, "m32r_insert_watchpoint(%08lx,%d,%d)\n",
1459 addr, len, type);
1460
1461 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
1462 {
1463 if (ab_address[i] == 0x00000000)
1464 {
1465 ab_address[i] = addr;
1466 ab_size[i] = len;
1467 ab_type[i] = type;
1468 return 0;
1469 }
1470 }
1471
1472 error ("Too many watchpoints");
1473 return 1;
1474 }
1475
1476 int
m32r_remove_watchpoint(CORE_ADDR addr,int len,int type)1477 m32r_remove_watchpoint (CORE_ADDR addr, int len, int type)
1478 {
1479 int i;
1480
1481 if (remote_debug)
1482 fprintf_unfiltered (gdb_stdlog, "m32r_remove_watchpoint(%08lx,%d,%d)\n",
1483 addr, len, type);
1484
1485 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
1486 {
1487 if (ab_address[i] == addr)
1488 {
1489 ab_address[i] = 0x00000000;
1490 break;
1491 }
1492 }
1493
1494 return 0;
1495 }
1496
1497 CORE_ADDR
m32r_stopped_data_address(void)1498 m32r_stopped_data_address (void)
1499 {
1500 return hit_watchpoint_addr;
1501 }
1502
1503 int
m32r_stopped_by_watchpoint(void)1504 m32r_stopped_by_watchpoint (void)
1505 {
1506 return (hit_watchpoint_addr != 0x00000000);
1507 }
1508
1509
1510 static void
sdireset_command(char * args,int from_tty)1511 sdireset_command (char *args, int from_tty)
1512 {
1513 unsigned char buf[1];
1514
1515 if (remote_debug)
1516 fprintf_unfiltered (gdb_stdlog, "m32r_sdireset()\n");
1517
1518 buf[0] = SDI_OPEN;
1519 send_data (buf, 1);
1520
1521 inferior_ptid = null_ptid;
1522 }
1523
1524
1525 static void
sdistatus_command(char * args,int from_tty)1526 sdistatus_command (char *args, int from_tty)
1527 {
1528 unsigned char buf[4096];
1529 int i, c;
1530
1531 if (remote_debug)
1532 fprintf_unfiltered (gdb_stdlog, "m32r_sdireset()\n");
1533
1534 if (!sdi_desc)
1535 return;
1536
1537 buf[0] = SDI_STATUS;
1538 send_data (buf, 1);
1539 for (i = 0; i < 4096; i++)
1540 {
1541 c = serial_readchar (sdi_desc, SDI_TIMEOUT);
1542 if (c < 0)
1543 return;
1544 buf[i] = c;
1545 if (c == 0)
1546 break;
1547 }
1548
1549 printf_filtered ("%s", buf);
1550 }
1551
1552
1553 static void
debug_chaos_command(char * args,int from_tty)1554 debug_chaos_command (char *args, int from_tty)
1555 {
1556 unsigned char buf[3];
1557
1558 buf[0] = SDI_SET_ATTR;
1559 buf[1] = SDI_ATTR_CACHE;
1560 buf[2] = SDI_CACHE_TYPE_CHAOS;
1561 send_data (buf, 3);
1562 }
1563
1564
1565 static void
use_debug_dma_command(char * args,int from_tty)1566 use_debug_dma_command (char *args, int from_tty)
1567 {
1568 unsigned char buf[3];
1569
1570 buf[0] = SDI_SET_ATTR;
1571 buf[1] = SDI_ATTR_MEM_ACCESS;
1572 buf[2] = SDI_MEM_ACCESS_DEBUG_DMA;
1573 send_data (buf, 3);
1574 }
1575
1576 static void
use_mon_code_command(char * args,int from_tty)1577 use_mon_code_command (char *args, int from_tty)
1578 {
1579 unsigned char buf[3];
1580
1581 buf[0] = SDI_SET_ATTR;
1582 buf[1] = SDI_ATTR_MEM_ACCESS;
1583 buf[2] = SDI_MEM_ACCESS_MON_CODE;
1584 send_data (buf, 3);
1585 }
1586
1587
1588 static void
use_ib_breakpoints_command(char * args,int from_tty)1589 use_ib_breakpoints_command (char *args, int from_tty)
1590 {
1591 use_ib_breakpoints = 1;
1592 }
1593
1594 static void
use_dbt_breakpoints_command(char * args,int from_tty)1595 use_dbt_breakpoints_command (char *args, int from_tty)
1596 {
1597 use_ib_breakpoints = 0;
1598 }
1599
1600
1601 /* Define the target subroutine names */
1602
1603 struct target_ops m32r_ops;
1604
1605 static void
init_m32r_ops(void)1606 init_m32r_ops (void)
1607 {
1608 m32r_ops.to_shortname = "m32rsdi";
1609 m32r_ops.to_longname = "Remote M32R debugging over SDI interface";
1610 m32r_ops.to_doc = "Use an M32R board using SDI debugging protocol.";
1611 m32r_ops.to_open = m32r_open;
1612 m32r_ops.to_close = m32r_close;
1613 m32r_ops.to_detach = m32r_detach;
1614 m32r_ops.to_resume = m32r_resume;
1615 m32r_ops.to_wait = m32r_wait;
1616 m32r_ops.to_fetch_registers = m32r_fetch_register;
1617 m32r_ops.to_store_registers = m32r_store_register;
1618 m32r_ops.to_prepare_to_store = m32r_prepare_to_store;
1619 m32r_ops.to_xfer_memory = m32r_xfer_memory;
1620 m32r_ops.to_files_info = m32r_files_info;
1621 m32r_ops.to_insert_breakpoint = m32r_insert_breakpoint;
1622 m32r_ops.to_remove_breakpoint = m32r_remove_breakpoint;
1623 m32r_ops.to_can_use_hw_breakpoint = m32r_can_use_hw_watchpoint;
1624 m32r_ops.to_insert_watchpoint = m32r_insert_watchpoint;
1625 m32r_ops.to_remove_watchpoint = m32r_remove_watchpoint;
1626 m32r_ops.to_stopped_by_watchpoint = m32r_stopped_by_watchpoint;
1627 m32r_ops.to_stopped_data_address = m32r_stopped_data_address;
1628 m32r_ops.to_kill = m32r_kill;
1629 m32r_ops.to_load = m32r_load;
1630 m32r_ops.to_create_inferior = m32r_create_inferior;
1631 m32r_ops.to_mourn_inferior = m32r_mourn_inferior;
1632 m32r_ops.to_stop = m32r_stop;
1633 m32r_ops.to_stratum = process_stratum;
1634 m32r_ops.to_has_all_memory = 1;
1635 m32r_ops.to_has_memory = 1;
1636 m32r_ops.to_has_stack = 1;
1637 m32r_ops.to_has_registers = 1;
1638 m32r_ops.to_has_execution = 1;
1639 m32r_ops.to_magic = OPS_MAGIC;
1640 };
1641
1642
1643 extern initialize_file_ftype _initialize_remote_m32r;
1644
1645 void
_initialize_remote_m32r(void)1646 _initialize_remote_m32r (void)
1647 {
1648 int i;
1649
1650 init_m32r_ops ();
1651
1652 /* Initialize breakpoints. */
1653 for (i = 0; i < MAX_BREAKPOINTS; i++)
1654 bp_address[i] = 0xffffffff;
1655
1656 /* Initialize access breaks. */
1657 for (i = 0; i < MAX_ACCESS_BREAKS; i++)
1658 ab_address[i] = 0x00000000;
1659
1660 add_target (&m32r_ops);
1661
1662 add_com ("sdireset", class_obscure, sdireset_command,
1663 "Reset SDI connection.");
1664
1665 add_com ("sdistatus", class_obscure, sdistatus_command,
1666 "Show status of SDI connection.");
1667
1668 add_com ("debug_chaos", class_obscure, debug_chaos_command,
1669 "Debug M32R/Chaos.");
1670
1671 add_com ("use_debug_dma", class_obscure, use_debug_dma_command,
1672 "Use debug DMA mem access.");
1673 add_com ("use_mon_code", class_obscure, use_mon_code_command,
1674 "Use mon code mem access.");
1675
1676 add_com ("use_ib_break", class_obscure, use_ib_breakpoints_command,
1677 "Set breakpoints by IB break.");
1678 add_com ("use_dbt_break", class_obscure, use_dbt_breakpoints_command,
1679 "Set breakpoints by dbt.");
1680 }
1681