1 {
2 Copyright (c) 1998-2002 by Florian Klaempfl and David Zhang
3
4 Generate MIPSEL assembler for type converting nodes
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19
20 ****************************************************************************}
21 unit ncpucnv;
22
23 {$i fpcdefs.inc}
24
25 interface
26
27 uses
28 node, ncnv, ncgcnv, defcmp;
29
30 type
31 tMIPSELtypeconvnode = class(TCgTypeConvNode)
32 protected
33 { procedure second_int_to_int;override; }
34 { procedure second_string_to_string;override; }
35 { procedure second_cstring_to_pchar;override; }
36 { procedure second_string_to_chararray;override; }
37 { procedure second_array_to_pointer;override; }
first_int_to_realnull38 function first_int_to_real: tnode; override;
39 { procedure second_pointer_to_array;override; }
40 { procedure second_chararray_to_string;override; }
41 { procedure second_char_to_string;override; }
42 procedure second_int_to_real; override;
43 { procedure second_real_to_real; override; }
44 { procedure second_cord_to_pointer;override; }
45 { procedure second_proc_to_procvar;override; }
46 { procedure second_bool_to_int;override; }
47 procedure second_int_to_bool; override;
48 { procedure second_load_smallset;override; }
49 { procedure second_ansistring_to_pchar;override; }
50 { procedure second_pchar_to_string;override; }
51 { procedure second_class_to_intf;override; }
52 { procedure second_char_to_char;override; }
53 end;
54
55 implementation
56
57 uses
58 verbose, globtype, globals, systems,
59 symconst, symdef, aasmbase, aasmtai, aasmdata,
60 defutil,
61 cgbase, cgutils, pass_1, pass_2, procinfo,
62 ncon, ncal,
63 ncgutil,
64 cpubase, aasmcpu,
65 tgobj, cgobj,
66 hlcgobj;
67
68
69 {*****************************************************************************
70 FirstTypeConv
71 *****************************************************************************}
72
tmipseltypeconvnode.first_int_to_realnull73 function tmipseltypeconvnode.first_int_to_real: tnode;
74 var
75 fname: string[19];
76 begin
77 { converting a 64bit integer to a float requires a helper }
78 if is_64bitint(left.resultdef) or
79 is_currency(left.resultdef) then
80 begin
81 { hack to avoid double division by 10000, as it's
82 already done by typecheckpass.resultdef_int_to_real }
83 if is_currency(left.resultdef) then
84 left.resultdef := s64inttype;
85 if is_signed(left.resultdef) then
86 fname := 'fpc_int64_to_double'
87 else
88 fname := 'fpc_qword_to_double';
89 result := ccallnode.createintern(fname,ccallparanode.create(
90 left,nil));
91 left:=nil;
92 if (tfloatdef(resultdef).floattype=s32real) then
93 inserttypeconv(result,s32floattype);
94 firstpass(result);
95 exit;
96 end
97 else
98 { other integers are supposed to be 32 bit }
99 begin
100 if is_signed(left.resultdef) then
101 inserttypeconv(left,s32inttype)
102 else
103 begin
104 inserttypeconv(left,u32inttype);
105 if (cs_create_pic in current_settings.moduleswitches) then
106 include(current_procinfo.flags,pi_needs_got);
107 end;
108 firstpass(left);
109 end;
110 result := nil;
111 expectloc:=LOC_FPUREGISTER;
112 end;
113
114
115 {*****************************************************************************
116 SecondTypeConv
117 *****************************************************************************}
118
119 procedure tMIPSELtypeconvnode.second_int_to_real;
120
121 procedure loadsigned(restype: tfloattype);
122 begin
123 location.Register := cg.getfpuregister(current_asmdata.CurrAsmList, tfloat2tcgsize[restype]);
124 if (left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
125 { 32-bit values can be loaded directly }
126 current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_MTC1, left.location.register, location.register))
127 else
128 begin
129 { Load memory in fpu register }
130 hlcg.location_force_mem(current_asmdata.CurrAsmList, left.location, left.resultdef);
131 cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList, OS_F32, OS_F32, left.location.reference, location.Register);
132 tg.ungetiftemp(current_asmdata.CurrAsmList, left.location.reference);
133 end;
134
135 { Convert value in fpu register from integer to float }
136 case restype of
137 s32real:
138 current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVT_S_W, location.Register, location.Register));
139 s64real:
140 current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVT_D_W, location.Register, location.Register));
141 else
142 internalerror(200408011);
143 end;
144 end;
145
146 var
147 href: treference;
148 hregister: tregister;
149 l1, l2: tasmlabel;
150 begin
151 location_reset(location, LOC_FPUREGISTER, def_cgsize(resultdef));
152 if is_signed(left.resultdef) then
153 loadsigned(tfloatdef(resultdef).floattype)
154 else
155 begin
156 current_asmdata.getglobaldatalabel(l1);
157 current_asmdata.getjumplabel(l2);
158 reference_reset_symbol(href, l1, 0, sizeof(aint), []);
159 hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
160
161 { Always load into 64-bit FPU register }
162 loadsigned(s64real);
163 cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_INT, OC_GTE, 0, left.location.register, l2);
164
165 case tfloatdef(resultdef).floattype of
166 { converting dword to s64real first and cut off at the end avoids precision loss }
167 s32real,
168 s64real:
169 begin
170 hregister := cg.getfpuregister(current_asmdata.CurrAsmList, OS_F64);
171 new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata_norel,l1.name,const_align(8));
172 current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l1));
173 current_asmdata.asmlists[al_typedconsts].concat(tai_realconst.create_s64real(4294967296.0));
174
175 cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList, OS_F64, OS_F64, href, hregister);
176 current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ADD_D, location.Register, hregister, location.Register));
177 cg.a_label(current_asmdata.CurrAsmList, l2);
178
179 { cut off if we should convert to single }
180 if tfloatdef(resultdef).floattype = s32real then
181 begin
182 hregister := location.Register;
183 location.Register := cg.getfpuregister(current_asmdata.CurrAsmList, location.size);
184 current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVT_S_D, location.Register, hregister));
185 end;
186 end;
187 else
188 internalerror(200410031);
189 end;
190 end;
191 end;
192
193
194 procedure tMIPSELtypeconvnode.second_int_to_bool;
195 var
196 hreg1, hreg2: tregister;
197 opsize: tcgsize;
198 hlabel: tasmlabel;
199 newsize : tcgsize;
200 href: treference;
201 begin
202 secondpass(left);
203 if codegenerror then
204 exit;
205
206 { Explicit typecasts from any ordinal type to a boolean type }
207 { must not change the ordinal value }
208 if (nf_explicit in flags) and
209 not(left.location.loc in [LOC_FLAGS,LOC_JUMP]) then
210 begin
211 location_copy(location,left.location);
212 newsize:=def_cgsize(resultdef);
213 { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
214 if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
215 ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
216 hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
217 else
218 location.size:=newsize;
219 exit;
220 end;
221
222 location_reset(location, LOC_REGISTER, def_cgsize(resultdef));
223 opsize := def_cgsize(left.resultdef);
224
225 if (left.location.loc in [LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF]) then
226 hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
227
228 case left.location.loc of
229 LOC_CREFERENCE, LOC_REFERENCE, LOC_REGISTER, LOC_CREGISTER:
230 begin
231 if left.location.loc in [LOC_CREFERENCE, LOC_REFERENCE] then
232 begin
233 hreg2 := cg.getintregister(current_asmdata.CurrAsmList, opsize);
234 {$ifndef cpu64bitalu}
235 if left.location.size in [OS_64,OS_S64] then
236 begin
237 cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,left.location.reference,hreg2);
238 hreg1:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
239 href:=left.location.reference;
240 inc(href.offset,4);
241 cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,href,hreg1);
242 cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,hreg1,hreg2,hreg2);
243 end
244 else
245 {$endif not cpu64bitalu}
246 cg.a_load_ref_reg(current_asmdata.CurrAsmList, opsize, opsize, left.location.reference, hreg2);
247 end
248 else
249 begin
250 hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
251 {$ifndef cpu64bitalu}
252 if left.location.size in [OS_64,OS_S64] then
253 begin
254 hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
255 cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reghi,left.location.register64.reglo,hreg2);
256 end
257 else
258 {$endif not cpu64bitalu}
259 cg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.register,hreg2);
260 end;
261 hreg1 := cg.getintregister(current_asmdata.CurrAsmList, opsize);
262 current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SLTU, hreg1, NR_R0, hreg2));
263 end;
264 LOC_JUMP:
265 begin
266 hreg1 := cg.getintregister(current_asmdata.CurrAsmList, OS_INT);
267 current_asmdata.getjumplabel(hlabel);
268 cg.a_label(current_asmdata.CurrAsmList, left.location.truelabel);
269 cg.a_load_const_reg(current_asmdata.CurrAsmList, OS_INT, 1, hreg1);
270 cg.a_jmp_always(current_asmdata.CurrAsmList, hlabel);
271 cg.a_label(current_asmdata.CurrAsmList, left.location.falselabel);
272 cg.a_load_const_reg(current_asmdata.CurrAsmList, OS_INT, 0, hreg1);
273 cg.a_label(current_asmdata.CurrAsmList, hlabel);
274 end;
275 LOC_FLAGS:
276 begin
277 hreg1:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
278 cg.g_flags2reg(current_asmdata.CurrAsmList,OS_INT,left.location.resflags,hreg1);
279 end
280 else
281 internalerror(10062);
282 end;
283 { Now hreg1 is either 0 or 1. For C booleans it must be 0 or -1. }
284 if is_cbool(resultdef) then
285 cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_SINT,hreg1,hreg1);
286
287 {$ifndef cpu64bitalu}
288 if (location.size in [OS_64,OS_S64]) then
289 begin
290 location.register64.reglo:=hreg1;
291 location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
292 if (is_cbool(resultdef)) then
293 { reglo is either 0 or -1 -> reghi has to become the same }
294 cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,location.register64.reglo,location.register64.reghi)
295 else
296 { unsigned }
297 cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
298 end
299 else
300 {$endif not cpu64bitalu}
301 location.Register := hreg1;
302 end;
303
304
305 begin
306 ctypeconvnode := tMIPSELtypeconvnode;
307 end.
308