1 unit PIC16F873A; 2 3 // Define hardware 4 {$SET PIC_MODEL = 'PIC16F873A'} 5 {$SET PIC_MAXFREQ = 20000000} 6 {$SET PIC_NPINS = 28} 7 {$SET PIC_NUMBANKS = 4} 8 {$SET PIC_NUMPAGES = 2} 9 {$SET PIC_MAXFLASH = 4096} 10 11 interface 12 var 13 INDF : byte absolute $0000; 14 TMR0 : byte absolute $0001; 15 PCL : byte absolute $0002; 16 STATUS : byte absolute $0003; 17 STATUS_IRP : bit absolute STATUS.7; 18 STATUS_RP1 : bit absolute STATUS.6; 19 STATUS_RP0 : bit absolute STATUS.5; 20 STATUS_nTO : bit absolute STATUS.4; 21 STATUS_nPD : bit absolute STATUS.3; 22 STATUS_Z : bit absolute STATUS.2; 23 STATUS_DC : bit absolute STATUS.1; 24 STATUS_C : bit absolute STATUS.0; 25 FSR : byte absolute $0004; 26 PORTA : byte absolute $0005; 27 PORTA_RA5 : bit absolute PORTA.5; 28 PORTA_RA4 : bit absolute PORTA.4; 29 PORTA_RA3 : bit absolute PORTA.3; 30 PORTA_RA2 : bit absolute PORTA.2; 31 PORTA_RA1 : bit absolute PORTA.1; 32 PORTA_RA0 : bit absolute PORTA.0; 33 PORTB : byte absolute $0006; 34 PORTB_RB7 : bit absolute PORTB.7; 35 PORTB_RB6 : bit absolute PORTB.6; 36 PORTB_RB5 : bit absolute PORTB.5; 37 PORTB_RB4 : bit absolute PORTB.4; 38 PORTB_RB3 : bit absolute PORTB.3; 39 PORTB_RB2 : bit absolute PORTB.2; 40 PORTB_RB1 : bit absolute PORTB.1; 41 PORTB_RB0 : bit absolute PORTB.0; 42 PORTC : byte absolute $0007; 43 PORTC_RC7 : bit absolute PORTC.7; 44 PORTC_RC6 : bit absolute PORTC.6; 45 PORTC_RC5 : bit absolute PORTC.5; 46 PORTC_RC4 : bit absolute PORTC.4; 47 PORTC_RC3 : bit absolute PORTC.3; 48 PORTC_RC2 : bit absolute PORTC.2; 49 PORTC_RC1 : bit absolute PORTC.1; 50 PORTC_RC0 : bit absolute PORTC.0; 51 PCLATH : byte absolute $000A; 52 PCLATH_PCLATH4 : bit absolute PCLATH.4; 53 PCLATH_PCLATH3 : bit absolute PCLATH.3; 54 PCLATH_PCLATH2 : bit absolute PCLATH.2; 55 PCLATH_PCLATH1 : bit absolute PCLATH.1; 56 PCLATH_PCLATH0 : bit absolute PCLATH.0; 57 INTCON : byte absolute $000B; 58 INTCON_GIE : bit absolute INTCON.7; 59 INTCON_PEIE : bit absolute INTCON.6; 60 INTCON_TMR0IE : bit absolute INTCON.5; 61 INTCON_INTE : bit absolute INTCON.4; 62 INTCON_RBIE : bit absolute INTCON.3; 63 INTCON_TMR0IF : bit absolute INTCON.2; 64 INTCON_INTF : bit absolute INTCON.1; 65 INTCON_RBIF : bit absolute INTCON.0; 66 PIR1 : byte absolute $000C; 67 PIR1_ADIF : bit absolute PIR1.6; 68 PIR1_RCIF : bit absolute PIR1.5; 69 PIR1_TXIF : bit absolute PIR1.4; 70 PIR1_SSPIF : bit absolute PIR1.3; 71 PIR1_CCP1IF : bit absolute PIR1.2; 72 PIR1_TMR2IF : bit absolute PIR1.1; 73 PIR1_TMR1IF : bit absolute PIR1.0; 74 PIR2 : byte absolute $000D; 75 PIR2_CMIF : bit absolute PIR2.6; 76 PIR2_EEIF : bit absolute PIR2.4; 77 PIR2_BCLIF : bit absolute PIR2.3; 78 PIR2_CCP2IF : bit absolute PIR2.0; 79 TMR1L : byte absolute $000E; 80 TMR1H : byte absolute $000F; 81 T1CON : byte absolute $0010; 82 T1CON_T1CKPS1 : bit absolute T1CON.5; 83 T1CON_T1CKPS0 : bit absolute T1CON.4; 84 T1CON_T1OSCEN : bit absolute T1CON.3; 85 T1CON_nT1SYNC : bit absolute T1CON.2; 86 T1CON_TMR1CS : bit absolute T1CON.1; 87 T1CON_TMR1ON : bit absolute T1CON.0; 88 TMR2 : byte absolute $0011; 89 T2CON : byte absolute $0012; 90 T2CON_TOUTPS3 : bit absolute T2CON.6; 91 T2CON_TOUTPS2 : bit absolute T2CON.5; 92 T2CON_TOUTPS1 : bit absolute T2CON.4; 93 T2CON_TOUTPS0 : bit absolute T2CON.3; 94 T2CON_TMR2ON : bit absolute T2CON.2; 95 T2CON_T2CKPS1 : bit absolute T2CON.1; 96 T2CON_T2CKPS0 : bit absolute T2CON.0; 97 SSPBUF : byte absolute $0013; 98 SSPCON : byte absolute $0014; 99 SSPCON_WCOL : bit absolute SSPCON.7; 100 SSPCON_SSPOV : bit absolute SSPCON.6; 101 SSPCON_SSPEN : bit absolute SSPCON.5; 102 SSPCON_CKP : bit absolute SSPCON.4; 103 SSPCON_SSPM3 : bit absolute SSPCON.3; 104 SSPCON_SSPM2 : bit absolute SSPCON.2; 105 SSPCON_SSPM1 : bit absolute SSPCON.1; 106 SSPCON_SSPM0 : bit absolute SSPCON.0; 107 CCPR1L : byte absolute $0015; 108 CCPR1H : byte absolute $0016; 109 CCP1CON : byte absolute $0017; 110 CCP1CON_CCP1X : bit absolute CCP1CON.5; 111 CCP1CON_CCP1Y : bit absolute CCP1CON.4; 112 CCP1CON_CCP1M3 : bit absolute CCP1CON.3; 113 CCP1CON_CCP1M2 : bit absolute CCP1CON.2; 114 CCP1CON_CCP1M1 : bit absolute CCP1CON.1; 115 CCP1CON_CCP1M0 : bit absolute CCP1CON.0; 116 RCSTA : byte absolute $0018; 117 RCSTA_SPEN : bit absolute RCSTA.7; 118 RCSTA_RX9 : bit absolute RCSTA.6; 119 RCSTA_SREN : bit absolute RCSTA.5; 120 RCSTA_CREN : bit absolute RCSTA.4; 121 RCSTA_ADDEN : bit absolute RCSTA.3; 122 RCSTA_FERR : bit absolute RCSTA.2; 123 RCSTA_OERR : bit absolute RCSTA.1; 124 RCSTA_RX9D : bit absolute RCSTA.0; 125 TXREG : byte absolute $0019; 126 RCREG : byte absolute $001A; 127 CCPR2L : byte absolute $001B; 128 CCPR2H : byte absolute $001C; 129 CCP2CON : byte absolute $001D; 130 CCP2CON_CCP2X : bit absolute CCP2CON.5; 131 CCP2CON_CCP2Y : bit absolute CCP2CON.4; 132 CCP2CON_CCP2M3 : bit absolute CCP2CON.3; 133 CCP2CON_CCP2M2 : bit absolute CCP2CON.2; 134 CCP2CON_CCP2M1 : bit absolute CCP2CON.1; 135 CCP2CON_CCP2M0 : bit absolute CCP2CON.0; 136 ADRESH : byte absolute $001E; 137 ADCON0 : byte absolute $001F; 138 ADCON0_ADCS1 : bit absolute ADCON0.7; 139 ADCON0_ADCS0 : bit absolute ADCON0.6; 140 ADCON0_CHS2 : bit absolute ADCON0.5; 141 ADCON0_CHS1 : bit absolute ADCON0.4; 142 ADCON0_CHS0 : bit absolute ADCON0.3; 143 ADCON0_GO_nDONE : bit absolute ADCON0.2; 144 ADCON0_ADON : bit absolute ADCON0.0; 145 OPTION_REG : byte absolute $0081; 146 OPTION_REG_nRBPU : bit absolute OPTION_REG.7; 147 OPTION_REG_INTEDG : bit absolute OPTION_REG.6; 148 OPTION_REG_T0CS : bit absolute OPTION_REG.5; 149 OPTION_REG_T0SE : bit absolute OPTION_REG.4; 150 OPTION_REG_PSA : bit absolute OPTION_REG.3; 151 OPTION_REG_PS2 : bit absolute OPTION_REG.2; 152 OPTION_REG_PS1 : bit absolute OPTION_REG.1; 153 OPTION_REG_PS0 : bit absolute OPTION_REG.0; 154 TRISA : byte absolute $0085; 155 TRISA_TRISA5 : bit absolute TRISA.5; 156 TRISA_TRISA4 : bit absolute TRISA.4; 157 TRISA_TRISA3 : bit absolute TRISA.3; 158 TRISA_TRISA2 : bit absolute TRISA.2; 159 TRISA_TRISA1 : bit absolute TRISA.1; 160 TRISA_TRISA0 : bit absolute TRISA.0; 161 TRISB : byte absolute $0086; 162 TRISB_TRISB7 : bit absolute TRISB.7; 163 TRISB_TRISB6 : bit absolute TRISB.6; 164 TRISB_TRISB5 : bit absolute TRISB.5; 165 TRISB_TRISB4 : bit absolute TRISB.4; 166 TRISB_TRISB3 : bit absolute TRISB.3; 167 TRISB_TRISB2 : bit absolute TRISB.2; 168 TRISB_TRISB1 : bit absolute TRISB.1; 169 TRISB_TRISB0 : bit absolute TRISB.0; 170 TRISC : byte absolute $0087; 171 TRISC_TRISC7 : bit absolute TRISC.7; 172 TRISC_TRISC6 : bit absolute TRISC.6; 173 TRISC_TRISC5 : bit absolute TRISC.5; 174 TRISC_TRISC4 : bit absolute TRISC.4; 175 TRISC_TRISC3 : bit absolute TRISC.3; 176 TRISC_TRISC2 : bit absolute TRISC.2; 177 TRISC_TRISC1 : bit absolute TRISC.1; 178 TRISC_TRISC0 : bit absolute TRISC.0; 179 PIE1 : byte absolute $008C; 180 PIE1_ADIE : bit absolute PIE1.6; 181 PIE1_RCIE : bit absolute PIE1.5; 182 PIE1_TXIE : bit absolute PIE1.4; 183 PIE1_SSPIE : bit absolute PIE1.3; 184 PIE1_CCP1IE : bit absolute PIE1.2; 185 PIE1_TMR2IE : bit absolute PIE1.1; 186 PIE1_TMR1IE : bit absolute PIE1.0; 187 PIE2 : byte absolute $008D; 188 PIE2_CMIE : bit absolute PIE2.6; 189 PIE2_EEIE : bit absolute PIE2.4; 190 PIE2_BCLIE : bit absolute PIE2.3; 191 PIE2_CCP2IE : bit absolute PIE2.0; 192 PCON : byte absolute $008E; 193 PCON_nPOR : bit absolute PCON.1; 194 PCON_nBOR : bit absolute PCON.0; 195 SSPCON2 : byte absolute $0091; 196 SSPCON2_GCEN : bit absolute SSPCON2.7; 197 SSPCON2_ACKSTAT : bit absolute SSPCON2.6; 198 SSPCON2_ACKDT : bit absolute SSPCON2.5; 199 SSPCON2_ACKEN : bit absolute SSPCON2.4; 200 SSPCON2_RCEN : bit absolute SSPCON2.3; 201 SSPCON2_PEN : bit absolute SSPCON2.2; 202 SSPCON2_RSEN : bit absolute SSPCON2.1; 203 SSPCON2_SEN : bit absolute SSPCON2.0; 204 PR2 : byte absolute $0092; 205 SSPADD : byte absolute $0093; 206 SSPSTAT : byte absolute $0094; 207 SSPSTAT_SMP : bit absolute SSPSTAT.7; 208 SSPSTAT_CKE : bit absolute SSPSTAT.6; 209 SSPSTAT_D_nA : bit absolute SSPSTAT.5; 210 SSPSTAT_P : bit absolute SSPSTAT.4; 211 SSPSTAT_S : bit absolute SSPSTAT.3; 212 SSPSTAT_R_nW : bit absolute SSPSTAT.2; 213 SSPSTAT_UA : bit absolute SSPSTAT.1; 214 SSPSTAT_BF : bit absolute SSPSTAT.0; 215 TXSTA : byte absolute $0098; 216 TXSTA_CSRC : bit absolute TXSTA.7; 217 TXSTA_TX9 : bit absolute TXSTA.6; 218 TXSTA_TXEN : bit absolute TXSTA.5; 219 TXSTA_SYNC : bit absolute TXSTA.4; 220 TXSTA_BRGH : bit absolute TXSTA.2; 221 TXSTA_TRMT : bit absolute TXSTA.1; 222 TXSTA_TX9D : bit absolute TXSTA.0; 223 SPBRG : byte absolute $0099; 224 CMCON : byte absolute $009C; 225 CMCON_C2OUT : bit absolute CMCON.7; 226 CMCON_C1OUT : bit absolute CMCON.6; 227 CMCON_C2INV : bit absolute CMCON.5; 228 CMCON_C1INV : bit absolute CMCON.4; 229 CMCON_CIS : bit absolute CMCON.3; 230 CMCON_CM2 : bit absolute CMCON.2; 231 CMCON_CM1 : bit absolute CMCON.1; 232 CMCON_CM0 : bit absolute CMCON.0; 233 CVRCON : byte absolute $009D; 234 CVRCON_CVREN : bit absolute CVRCON.7; 235 CVRCON_CVROE : bit absolute CVRCON.6; 236 CVRCON_CVRR : bit absolute CVRCON.5; 237 CVRCON_CVR3 : bit absolute CVRCON.3; 238 CVRCON_CVR2 : bit absolute CVRCON.2; 239 CVRCON_CVR1 : bit absolute CVRCON.1; 240 CVRCON_CVR0 : bit absolute CVRCON.0; 241 ADRESL : byte absolute $009E; 242 ADCON1 : byte absolute $009F; 243 ADCON1_ADFM : bit absolute ADCON1.7; 244 ADCON1_ADCS2 : bit absolute ADCON1.6; 245 ADCON1_PCFG3 : bit absolute ADCON1.3; 246 ADCON1_PCFG2 : bit absolute ADCON1.2; 247 ADCON1_PCFG1 : bit absolute ADCON1.1; 248 ADCON1_PCFG0 : bit absolute ADCON1.0; 249 EEDATA : byte absolute $010C; 250 EEADR : byte absolute $010D; 251 EEDATH : byte absolute $010E; 252 EEDATH_EEDATH5 : bit absolute EEDATH.5; 253 EEDATH_EEDATH4 : bit absolute EEDATH.4; 254 EEDATH_EEDATH3 : bit absolute EEDATH.3; 255 EEDATH_EEDATH2 : bit absolute EEDATH.2; 256 EEDATH_EEDATH1 : bit absolute EEDATH.1; 257 EEDATH_EEDATH0 : bit absolute EEDATH.0; 258 EEADRH : byte absolute $010F; 259 EEADRH_EEADRH3 : bit absolute EEADRH.3; 260 EEADRH_EEADRH2 : bit absolute EEADRH.2; 261 EEADRH_EEADRH1 : bit absolute EEADRH.1; 262 EEADRH_EEADRH0 : bit absolute EEADRH.0; 263 EECON1 : byte absolute $018C; 264 EECON1_EEPGD : bit absolute EECON1.7; 265 EECON1_WRERR : bit absolute EECON1.3; 266 EECON1_WREN : bit absolute EECON1.2; 267 EECON1_WR : bit absolute EECON1.1; 268 EECON1_RD : bit absolute EECON1.0; 269 EECON2 : byte absolute $018D; 270 271 272 // -- Define RAM state values -- 273 274 {$CLEAR_STATE_RAM} 275 276 {$SET_STATE_RAM '000-000:SFR:ALLMAPPED'} // Banks 0-3 : INDF 277 {$SET_STATE_RAM '001-001:SFR:ALL'} // Bank 0 : TMR0 278 // Bank 1 : OPTION_REG 279 // Bank 2 : TMR0 280 // Bank 3 : OPTION_REG 281 {$SET_STATE_RAM '002-004:SFR:ALLMAPPED'} // Banks 0-3 : PCL, STATUS, FSR 282 {$SET_STATE_RAM '005-005:SFR'} // Bank 0 : PORTA 283 {$SET_STATE_RAM '006-006:SFR:ALL'} // Bank 0 : PORTB 284 // Bank 1 : TRISB 285 // Bank 2 : PORTB 286 // Bank 3 : TRISB 287 {$SET_STATE_RAM '007-007:SFR'} // Bank 0 : PORTC 288 {$SET_STATE_RAM '00A-00B:SFR:ALLMAPPED'} // Banks 0-3 : PCLATH, INTCON 289 {$SET_STATE_RAM '00C-00D:SFR:ALL'} // Bank 0 : PIR1, PIR2 290 // Bank 1 : PIE1, PIE2 291 // Bank 2 : EEDATA, EEADR 292 // Bank 3 : EECON1, EECON2 293 {$SET_STATE_RAM '00E-01F:SFR'} // Bank 0 : TMR1L, TMR1H, T1CON, TMR2, T2CON, SSPBUF, SSPCON, CCPR1L, CCPR1H, CCP1CON, RCSTA, TXREG, RCREG, CCPR2L, CCPR2H, CCP2CON, ADRESH, ADCON0 294 {$SET_STATE_RAM '020-07F:GPR:ALL'} 295 {$SET_STATE_RAM '085-085:SFR'} // Bank 1 : TRISA 296 {$SET_STATE_RAM '087-087:SFR'} // Bank 1 : TRISC 297 {$SET_STATE_RAM '08E-08E:SFR'} // Bank 1 : PCON 298 {$SET_STATE_RAM '091-094:SFR'} // Bank 1 : SSPCON2, PR2, SSPADD, SSPSTAT 299 {$SET_STATE_RAM '098-099:SFR'} // Bank 1 : TXSTA, SPBRG 300 {$SET_STATE_RAM '09C-09F:SFR'} // Bank 1 : CMCON, CVRCON, ADRESL, ADCON1 301 {$SET_STATE_RAM '10E-10F:SFR'} // Bank 2 : EEDATH, EEADRH 302 303 304 // -- Define mapped RAM -- 305 306 {$SET_MAPPED_RAM '101-101:bnk0'} // maps to TMR0 (bank 0) 307 {$SET_MAPPED_RAM '106-106:bnk0'} // maps to PORTB (bank 0) 308 {$SET_MAPPED_RAM '120-17F:bnk0'} // maps to area 020-07F (bank 0) 309 {$SET_MAPPED_RAM '181-181:bnk1'} // maps to OPTION_REG (bank 1) 310 {$SET_MAPPED_RAM '186-186:bnk1'} // maps to TRISB (bank 1) 311 {$SET_MAPPED_RAM '1A0-1FF:bnk1'} // maps to area 0A0-0FF (bank 1) 312 313 314 // -- Un-implemented fields -- 315 316 {$SET_UNIMP_BITS '005:3F'} // PORTA bits 7,6 un-implemented (read as 0) 317 {$SET_UNIMP_BITS '00A:1F'} // PCLATH bits 7,6,5 un-implemented (read as 0) 318 {$SET_UNIMP_BITS '00C:7F'} // PIR1 bit 7 un-implemented (read as 0) 319 {$SET_UNIMP_BITS '00D:59'} // PIR2 bits 7,5,2,1 un-implemented (read as 0) 320 {$SET_UNIMP_BITS '010:3F'} // T1CON bits 7,6 un-implemented (read as 0) 321 {$SET_UNIMP_BITS '012:7F'} // T2CON bit 7 un-implemented (read as 0) 322 {$SET_UNIMP_BITS '017:3F'} // CCP1CON bits 7,6 un-implemented (read as 0) 323 {$SET_UNIMP_BITS '01D:3F'} // CCP2CON bits 7,6 un-implemented (read as 0) 324 {$SET_UNIMP_BITS '01F:FD'} // ADCON0 bit 1 un-implemented (read as 0) 325 {$SET_UNIMP_BITS '085:3F'} // TRISA bits 7,6 un-implemented (read as 0) 326 {$SET_UNIMP_BITS '08C:7F'} // PIE1 bit 7 un-implemented (read as 0) 327 {$SET_UNIMP_BITS '08D:59'} // PIE2 bits 7,5,2,1 un-implemented (read as 0) 328 {$SET_UNIMP_BITS '08E:03'} // PCON bits 7,6,5,4,3,2 un-implemented (read as 0) 329 {$SET_UNIMP_BITS '098:F7'} // TXSTA bit 3 un-implemented (read as 0) 330 {$SET_UNIMP_BITS '09D:EF'} // CVRCON bit 4 un-implemented (read as 0) 331 {$SET_UNIMP_BITS '09F:CF'} // ADCON1 bits 5,4 un-implemented (read as 0) 332 {$SET_UNIMP_BITS '10E:3F'} // EEDATH bits 7,6 un-implemented (read as 0) 333 {$SET_UNIMP_BITS '10F:0F'} // EEADRH bits 7,6,5,4 un-implemented (read as 0) 334 {$SET_UNIMP_BITS '18C:8F'} // EECON1 bits 6,5,4 un-implemented (read as 0) 335 336 337 // -- PIN mapping -- 338 339 // Pin 1 : MCLR/VPP 340 // Pin 2 : RA0/AN0 341 // Pin 3 : RA1/AN1 342 // Pin 4 : RA2/AN2/VREF-/CVREF 343 // Pin 5 : RA3/AN3/VREF+ 344 // Pin 6 : RA4/T0CKI/C1OUT 345 // Pin 7 : RA5/AN4/SS/C2OUT 346 // Pin 8 : VSS 347 // Pin 9 : OSC1/CLKI 348 // Pin 10 : OSC2/CLKO 349 // Pin 11 : RC0/T1OSO/T1CKI 350 // Pin 12 : RC1/T1OSI/CCP2 351 // Pin 13 : RC2/CCP1 352 // Pin 14 : RC3/SCK/SCL 353 // Pin 15 : RC4/SDI/SDA 354 // Pin 16 : RC5/SDO 355 // Pin 17 : RC6/TX/CK 356 // Pin 18 : RC7/RX/DT 357 // Pin 19 : VSS 358 // Pin 20 : VDD 359 // Pin 21 : RB0/INT 360 // Pin 22 : RB1 361 // Pin 23 : RB2 362 // Pin 24 : RB3/PGM 363 // Pin 25 : RB4 364 // Pin 26 : RB5 365 // Pin 27 : RB6/PGC 366 // Pin 28 : RB7/PGD 367 368 369 // -- RAM to PIN mapping -- 370 371 {$MAP_RAM_TO_PIN '005:0-2,1-3,2-4,3-5,4-6,5-7'} // PORTA 372 {$MAP_RAM_TO_PIN '006:0-21,1-22,2-23,3-24,4-25,5-26,6-27,7-28'} // PORTB 373 {$MAP_RAM_TO_PIN '007:0-11,1-12,2-13,3-14,4-15,5-16,6-17,7-18'} // PORTC 374 375 376 // -- Bits Configuration -- 377 378 // FOSC : Oscillator Selection bits 379 {$define _FOSC_EXTRC = $3FFF} // RC oscillator 380 {$define _FOSC_HS = $3FFE} // HS oscillator 381 {$define _FOSC_XT = $3FFD} // XT oscillator 382 {$define _FOSC_LP = $3FFC} // LP oscillator 383 384 // WDTE : Watchdog Timer Enable bit 385 {$define _WDTE_ON = $3FFF} // WDT enabled 386 {$define _WDTE_OFF = $3FFB} // WDT disabled 387 388 // PWRTE : Power-up Timer Enable bit 389 {$define _PWRTE_OFF = $3FFF} // PWRT disabled 390 {$define _PWRTE_ON = $3FF7} // PWRT enabled 391 392 // BOREN : Brown-out Reset Enable bit 393 {$define _BOREN_ON = $3FFF} // BOR enabled 394 {$define _BOREN_OFF = $3FBF} // BOR disabled 395 396 // LVP : Low-Voltage (Single-Supply) In-Circuit Serial Programming Enable bit lownull397 {$define _LVP_ON = $3FFF} // RB3/PGM pin has PGM function; low-voltage programming enabled 398 {$define _LVP_OFF = $3F7F} // RB3 is digital I/O, HV on MCLR must be used for programming 399 400 // CPD : Data EEPROM Memory Code Protection bit 401 {$define _CPD_OFF = $3FFF} // Data EEPROM code protection off 402 {$define _CPD_ON = $3EFF} // Data EEPROM code-protected 403 404 // WRT : Flash Program Memory Write Enable bits 405 {$define _WRT_OFF = $3FFF} // Write protection off; all program memory may be written to by EECON control 406 {$define _WRT_256 = $3DFF} // 0000h to 00FFh write-protected; 0100h to 0FFFh may be written to by EECON control 407 {$define _WRT_1FOURTH = $3BFF} // 0000h to 03FFh write-protected; 0400h to 0FFFh may be written to by EECON control 408 {$define _WRT_HALF = $39FF} // 0000h to 07FFh write-protected; 0800h to 0FFFh may be written to by EECON control 409 410 // DEBUG : In-Circuit Debugger Mode bit 411 {$define _DEBUG_OFF = $3FFF} // In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins 412 {$define _DEBUG_ON = $37FF} // In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger 413 414 // CP : Flash Program Memory Code Protection bit 415 {$define _CP_OFF = $3FFF} // Code protection off 416 {$define _CP_ON = $1FFF} // All program memory code-protected 417 418 implementation 419 end. 420