1 unit PIC16F1575; 2 3 // Define hardware 4 {$SET PIC_MODEL = 'PIC16F1575'} 5 {$SET PIC_MAXFREQ = 32000000} 6 {$SET PIC_NPINS = 14} 7 {$SET PIC_NUMBANKS = 32} 8 {$SET PIC_NUMPAGES = 4} 9 {$SET PIC_MAXFLASH = 8192} 10 11 interface 12 var 13 INDF0 : byte absolute $0000; 14 INDF1 : byte absolute $0001; 15 PCL : byte absolute $0002; 16 STATUS : byte absolute $0003; 17 STATUS_nTO : bit absolute STATUS.4; 18 STATUS_nPD : bit absolute STATUS.3; 19 STATUS_Z : bit absolute STATUS.2; 20 STATUS_DC : bit absolute STATUS.1; 21 STATUS_C : bit absolute STATUS.0; 22 FSR0L : byte absolute $0004; 23 FSR0H : byte absolute $0005; 24 FSR1L : byte absolute $0006; 25 FSR1H : byte absolute $0007; 26 BSR : byte absolute $0008; 27 BSR_BSR4 : bit absolute BSR.4; 28 BSR_BSR3 : bit absolute BSR.3; 29 BSR_BSR2 : bit absolute BSR.2; 30 BSR_BSR1 : bit absolute BSR.1; 31 BSR_BSR0 : bit absolute BSR.0; 32 WREG : byte absolute $0009; 33 PCLATH : byte absolute $000A; 34 PCLATH_PCLATH6 : bit absolute PCLATH.6; 35 PCLATH_PCLATH5 : bit absolute PCLATH.5; 36 PCLATH_PCLATH4 : bit absolute PCLATH.4; 37 PCLATH_PCLATH3 : bit absolute PCLATH.3; 38 PCLATH_PCLATH2 : bit absolute PCLATH.2; 39 PCLATH_PCLATH1 : bit absolute PCLATH.1; 40 PCLATH_PCLATH0 : bit absolute PCLATH.0; 41 INTCON : byte absolute $000B; 42 INTCON_GIE : bit absolute INTCON.7; 43 INTCON_PEIE : bit absolute INTCON.6; 44 INTCON_TMR0IE : bit absolute INTCON.5; 45 INTCON_INTE : bit absolute INTCON.4; 46 INTCON_IOCIE : bit absolute INTCON.3; 47 INTCON_TMR0IF : bit absolute INTCON.2; 48 INTCON_INTF : bit absolute INTCON.1; 49 INTCON_IOCIF : bit absolute INTCON.0; 50 PORTA : byte absolute $000C; 51 PORTA_RA5 : bit absolute PORTA.5; 52 PORTA_RA4 : bit absolute PORTA.4; 53 PORTA_RA3 : bit absolute PORTA.3; 54 PORTA_RA2 : bit absolute PORTA.2; 55 PORTA_RA1 : bit absolute PORTA.1; 56 PORTA_RA0 : bit absolute PORTA.0; 57 PORTC : byte absolute $000E; 58 PORTC_RC5 : bit absolute PORTC.5; 59 PORTC_RC4 : bit absolute PORTC.4; 60 PORTC_RC3 : bit absolute PORTC.3; 61 PORTC_RC2 : bit absolute PORTC.2; 62 PORTC_RC1 : bit absolute PORTC.1; 63 PORTC_RC0 : bit absolute PORTC.0; 64 PIR1 : byte absolute $0011; 65 PIR1_TMR1GIF : bit absolute PIR1.7; 66 PIR1_ADIF : bit absolute PIR1.6; 67 PIR1_RCIF : bit absolute PIR1.5; 68 PIR1_TXIF : bit absolute PIR1.4; 69 PIR1_TMR2IF : bit absolute PIR1.1; 70 PIR1_TMR1IF : bit absolute PIR1.0; 71 PIR2 : byte absolute $0012; 72 PIR2_C2IF : bit absolute PIR2.6; 73 PIR2_C1IF : bit absolute PIR2.5; 74 PIR3 : byte absolute $0013; 75 PIR3_PWM4IF : bit absolute PIR3.7; 76 PIR3_PWM3IF : bit absolute PIR3.6; 77 PIR3_PWM2IF : bit absolute PIR3.5; 78 PIR3_PWM1IF : bit absolute PIR3.4; 79 TMR0 : byte absolute $0015; 80 TMR1L : byte absolute $0016; 81 TMR1H : byte absolute $0017; 82 T1CON : byte absolute $0018; 83 T1CON_TMR1CS1 : bit absolute T1CON.7; 84 T1CON_TMR1CS0 : bit absolute T1CON.6; 85 T1CON_T1CKPS1 : bit absolute T1CON.5; 86 T1CON_T1CKPS0 : bit absolute T1CON.4; 87 T1CON_T1OSCEN : bit absolute T1CON.3; 88 T1CON_nT1SYNC : bit absolute T1CON.2; 89 T1CON_TMR1ON : bit absolute T1CON.0; 90 T1GCON : byte absolute $0019; 91 T1GCON_TMR1GE : bit absolute T1GCON.7; 92 T1GCON_T1GPOL : bit absolute T1GCON.6; 93 T1GCON_T1GTM : bit absolute T1GCON.5; 94 T1GCON_T1GSPM : bit absolute T1GCON.4; 95 T1GCON_T1GGO_nDONE : bit absolute T1GCON.3; 96 T1GCON_T1GVAL : bit absolute T1GCON.2; 97 T1GCON_T1GSS1 : bit absolute T1GCON.1; 98 T1GCON_T1GSS0 : bit absolute T1GCON.0; 99 TMR2 : byte absolute $001A; 100 PR2 : byte absolute $001B; 101 T2CON : byte absolute $001C; 102 T2CON_T2OUTPS3 : bit absolute T2CON.6; 103 T2CON_T2OUTPS2 : bit absolute T2CON.5; 104 T2CON_T2OUTPS1 : bit absolute T2CON.4; 105 T2CON_T2OUTPS0 : bit absolute T2CON.3; 106 T2CON_T2CKPS1 : bit absolute T2CON.1; 107 T2CON_T2CKPS0 : bit absolute T2CON.0; 108 TRISA : byte absolute $008C; 109 TRISA_TRISA5 : bit absolute TRISA.5; 110 TRISA_TRISA4 : bit absolute TRISA.4; 111 TRISA_TRISA3 : bit absolute TRISA.3; 112 TRISA_TRISA2 : bit absolute TRISA.2; 113 TRISA_TRISA1 : bit absolute TRISA.1; 114 TRISA_TRISA0 : bit absolute TRISA.0; 115 TRISC : byte absolute $008E; 116 TRISC_TRISC5 : bit absolute TRISC.5; 117 TRISC_TRISC4 : bit absolute TRISC.4; 118 TRISC_TRISC3 : bit absolute TRISC.3; 119 TRISC_TRISC2 : bit absolute TRISC.2; 120 TRISC_TRISC1 : bit absolute TRISC.1; 121 TRISC_TRISC0 : bit absolute TRISC.0; 122 PIE1 : byte absolute $0091; 123 PIE1_TMR1GIE : bit absolute PIE1.7; 124 PIE1_ADIE : bit absolute PIE1.6; 125 PIE1_RCIE : bit absolute PIE1.5; 126 PIE1_TXIE : bit absolute PIE1.4; 127 PIE1_TMR2IE : bit absolute PIE1.1; 128 PIE1_TMR1IE : bit absolute PIE1.0; 129 PIE2 : byte absolute $0092; 130 PIE2_C2IE : bit absolute PIE2.6; 131 PIE2_C1IE : bit absolute PIE2.5; 132 PIE3 : byte absolute $0093; 133 PIE3_PWM4IE : bit absolute PIE3.7; 134 PIE3_PWM3IE : bit absolute PIE3.6; 135 PIE3_PWM2IE : bit absolute PIE3.5; 136 PIE3_PWM1IE : bit absolute PIE3.4; 137 OPTION_REG : byte absolute $0095; 138 OPTION_REG_nWPUEN : bit absolute OPTION_REG.7; 139 OPTION_REG_INTEDG : bit absolute OPTION_REG.6; 140 OPTION_REG_TMR0CS : bit absolute OPTION_REG.5; 141 OPTION_REG_TMR0SE : bit absolute OPTION_REG.4; 142 OPTION_REG_PSA : bit absolute OPTION_REG.3; 143 OPTION_REG_PS2 : bit absolute OPTION_REG.2; 144 OPTION_REG_PS1 : bit absolute OPTION_REG.1; 145 OPTION_REG_PS0 : bit absolute OPTION_REG.0; 146 PCON : byte absolute $0096; 147 PCON_STKOVF : bit absolute PCON.7; 148 PCON_STKUNF : bit absolute PCON.6; 149 PCON_nRWDT : bit absolute PCON.4; 150 PCON_nRMCLR : bit absolute PCON.3; 151 PCON_nRI : bit absolute PCON.2; 152 PCON_nPOR : bit absolute PCON.1; 153 PCON_nBOR : bit absolute PCON.0; 154 WDTCON : byte absolute $0097; 155 WDTCON_WDTPS4 : bit absolute WDTCON.5; 156 WDTCON_WDTPS3 : bit absolute WDTCON.4; 157 WDTCON_WDTPS2 : bit absolute WDTCON.3; 158 WDTCON_WDTPS1 : bit absolute WDTCON.2; 159 WDTCON_WDTPS0 : bit absolute WDTCON.1; 160 WDTCON_SWDTEN : bit absolute WDTCON.0; 161 OSCTUNE : byte absolute $0098; 162 OSCTUNE_TUN5 : bit absolute OSCTUNE.5; 163 OSCTUNE_TUN4 : bit absolute OSCTUNE.4; 164 OSCTUNE_TUN3 : bit absolute OSCTUNE.3; 165 OSCTUNE_TUN2 : bit absolute OSCTUNE.2; 166 OSCTUNE_TUN1 : bit absolute OSCTUNE.1; 167 OSCTUNE_TUN0 : bit absolute OSCTUNE.0; 168 OSCCON : byte absolute $0099; 169 OSCCON_SPLLEN : bit absolute OSCCON.7; 170 OSCCON_IRCF3 : bit absolute OSCCON.6; 171 OSCCON_IRCF2 : bit absolute OSCCON.5; 172 OSCCON_IRCF1 : bit absolute OSCCON.4; 173 OSCCON_IRCF0 : bit absolute OSCCON.3; 174 OSCCON_SCS1 : bit absolute OSCCON.1; 175 OSCCON_SCS0 : bit absolute OSCCON.0; 176 OSCSTAT : byte absolute $009A; 177 OSCSTAT_PLLR : bit absolute OSCSTAT.6; 178 OSCSTAT_OSTS : bit absolute OSCSTAT.5; 179 OSCSTAT_HFIOFR : bit absolute OSCSTAT.4; 180 OSCSTAT_HFIOFL : bit absolute OSCSTAT.3; 181 OSCSTAT_MFIOFR : bit absolute OSCSTAT.2; 182 OSCSTAT_LFIOFR : bit absolute OSCSTAT.1; 183 OSCSTAT_HFIOFS : bit absolute OSCSTAT.0; 184 ADRESL : byte absolute $009B; 185 ADRESH : byte absolute $009C; 186 ADCON0 : byte absolute $009D; 187 ADCON0_CHS4 : bit absolute ADCON0.6; 188 ADCON0_CHS3 : bit absolute ADCON0.5; 189 ADCON0_CHS2 : bit absolute ADCON0.4; 190 ADCON0_CHS1 : bit absolute ADCON0.3; 191 ADCON0_CHS0 : bit absolute ADCON0.2; 192 ADCON0_GO_nDONE : bit absolute ADCON0.1; 193 ADCON0_ADON : bit absolute ADCON0.0; 194 ADCON1 : byte absolute $009E; 195 ADCON1_ADFM : bit absolute ADCON1.7; 196 ADCON1_ADCS2 : bit absolute ADCON1.6; 197 ADCON1_ADCS1 : bit absolute ADCON1.5; 198 ADCON1_ADCS0 : bit absolute ADCON1.4; 199 ADCON1_ADPREF1 : bit absolute ADCON1.1; 200 ADCON1_ADPREF0 : bit absolute ADCON1.0; 201 ADCON2 : byte absolute $009F; 202 ADCON2_TRIGSEL3 : bit absolute ADCON2.7; 203 ADCON2_TRIGSEL2 : bit absolute ADCON2.6; 204 ADCON2_TRIGSEL1 : bit absolute ADCON2.5; 205 ADCON2_TRIGSEL0 : bit absolute ADCON2.4; 206 LATA : byte absolute $010C; 207 LATA_LATA5 : bit absolute LATA.5; 208 LATA_LATA4 : bit absolute LATA.4; 209 LATA_LATA2 : bit absolute LATA.2; 210 LATA_LATA1 : bit absolute LATA.1; 211 LATA_LATA0 : bit absolute LATA.0; 212 LATC : byte absolute $010E; 213 LATC_LATC5 : bit absolute LATC.5; 214 LATC_LATC4 : bit absolute LATC.4; 215 LATC_LATC3 : bit absolute LATC.3; 216 LATC_LATC2 : bit absolute LATC.2; 217 LATC_LATC1 : bit absolute LATC.1; 218 LATC_LATC0 : bit absolute LATC.0; 219 CM1CON0 : byte absolute $0111; 220 CM1CON0_C1ON : bit absolute CM1CON0.7; 221 CM1CON0_C1OUT : bit absolute CM1CON0.6; 222 CM1CON0_C1OE : bit absolute CM1CON0.5; 223 CM1CON0_C1POL : bit absolute CM1CON0.4; 224 CM1CON0_C1SP : bit absolute CM1CON0.2; 225 CM1CON0_C1HYS : bit absolute CM1CON0.1; 226 CM1CON0_C1SYNC : bit absolute CM1CON0.0; 227 CM1CON1 : byte absolute $0112; 228 CM1CON1_C1INTP : bit absolute CM1CON1.7; 229 CM1CON1_C1INTN : bit absolute CM1CON1.6; 230 CM1CON1_C1PCH1 : bit absolute CM1CON1.5; 231 CM1CON1_C1PCH0 : bit absolute CM1CON1.4; 232 CM1CON1_C1NCH2 : bit absolute CM1CON1.2; 233 CM1CON1_C1NCH1 : bit absolute CM1CON1.1; 234 CM1CON1_C1NCH0 : bit absolute CM1CON1.0; 235 CM2CON0 : byte absolute $0113; 236 CM2CON0_C2ON : bit absolute CM2CON0.7; 237 CM2CON0_C2OUT : bit absolute CM2CON0.6; 238 CM2CON0_C2OE : bit absolute CM2CON0.5; 239 CM2CON0_C2POL : bit absolute CM2CON0.4; 240 CM2CON0_C2SP : bit absolute CM2CON0.2; 241 CM2CON0_C2HYS : bit absolute CM2CON0.1; 242 CM2CON0_C2SYNC : bit absolute CM2CON0.0; 243 CM2CON1 : byte absolute $0114; 244 CM2CON1_C2INTP : bit absolute CM2CON1.7; 245 CM2CON1_C2INTN : bit absolute CM2CON1.6; 246 CM2CON1_C2PCH1 : bit absolute CM2CON1.5; 247 CM2CON1_C2PCH0 : bit absolute CM2CON1.4; 248 CM2CON1_C2NCH2 : bit absolute CM2CON1.2; 249 CM2CON1_C2NCH1 : bit absolute CM2CON1.1; 250 CM2CON1_C2NCH0 : bit absolute CM2CON1.0; 251 CMOUT : byte absolute $0115; 252 CMOUT_MC2OUT : bit absolute CMOUT.1; 253 CMOUT_MC1OUT : bit absolute CMOUT.0; 254 BORCON : byte absolute $0116; 255 BORCON_SBOREN : bit absolute BORCON.7; 256 BORCON_BORFS : bit absolute BORCON.6; 257 BORCON_BORRDY : bit absolute BORCON.0; 258 FVRCON : byte absolute $0117; 259 FVRCON_FVREN : bit absolute FVRCON.7; 260 FVRCON_FVRRDY : bit absolute FVRCON.6; 261 FVRCON_TSEN : bit absolute FVRCON.5; 262 FVRCON_TSRNG : bit absolute FVRCON.4; 263 FVRCON_CDAFVR1 : bit absolute FVRCON.3; 264 FVRCON_CDAFVR0 : bit absolute FVRCON.2; 265 FVRCON_ADFVR1 : bit absolute FVRCON.1; 266 FVRCON_ADFVR0 : bit absolute FVRCON.0; 267 DACCON0 : byte absolute $0118; 268 DACCON0_DACEN : bit absolute DACCON0.7; 269 DACCON0_DACLPS : bit absolute DACCON0.6; 270 DACCON0_DACOE : bit absolute DACCON0.5; 271 DACCON0_DACPSS1 : bit absolute DACCON0.3; 272 DACCON0_DACPSS0 : bit absolute DACCON0.2; 273 DACCON1 : byte absolute $0119; 274 DACCON1_DACR4 : bit absolute DACCON1.4; 275 DACCON1_DACR3 : bit absolute DACCON1.3; 276 DACCON1_DACR2 : bit absolute DACCON1.2; 277 DACCON1_DACR1 : bit absolute DACCON1.1; 278 DACCON1_DACR0 : bit absolute DACCON1.0; 279 ANSELA : byte absolute $018C; 280 ANSELA_ANSA4 : bit absolute ANSELA.4; 281 ANSELA_ANSA2 : bit absolute ANSELA.2; 282 ANSELA_ANSA1 : bit absolute ANSELA.1; 283 ANSELA_ANSA0 : bit absolute ANSELA.0; 284 ANSELC : byte absolute $018E; 285 ANSELC_ANSC3 : bit absolute ANSELC.3; 286 ANSELC_ANSC2 : bit absolute ANSELC.2; 287 ANSELC_ANSC1 : bit absolute ANSELC.1; 288 ANSELC_ANSC0 : bit absolute ANSELC.0; 289 PMADRL : byte absolute $0191; 290 PMADRH : byte absolute $0192; 291 PMADRH_PMADRH6 : bit absolute PMADRH.6; 292 PMADRH_PMADRH5 : bit absolute PMADRH.5; 293 PMADRH_PMADRH4 : bit absolute PMADRH.4; 294 PMADRH_PMADRH3 : bit absolute PMADRH.3; 295 PMADRH_PMADRH2 : bit absolute PMADRH.2; 296 PMADRH_PMADRH1 : bit absolute PMADRH.1; 297 PMADRH_PMADRH0 : bit absolute PMADRH.0; 298 PMDATL : byte absolute $0193; 299 PMDATH : byte absolute $0194; 300 PMDATH_PMDATH5 : bit absolute PMDATH.5; 301 PMDATH_PMDATH4 : bit absolute PMDATH.4; 302 PMDATH_PMDATH3 : bit absolute PMDATH.3; 303 PMDATH_PMDATH2 : bit absolute PMDATH.2; 304 PMDATH_PMDATH1 : bit absolute PMDATH.1; 305 PMDATH_PMDATH0 : bit absolute PMDATH.0; 306 PMCON1 : byte absolute $0195; 307 PMCON1_CFGS : bit absolute PMCON1.6; 308 PMCON1_LWLO : bit absolute PMCON1.5; 309 PMCON1_FREE : bit absolute PMCON1.4; 310 PMCON1_WRERR : bit absolute PMCON1.3; 311 PMCON1_WREN : bit absolute PMCON1.2; 312 PMCON1_WR : bit absolute PMCON1.1; 313 PMCON1_RD : bit absolute PMCON1.0; 314 PMCON2 : byte absolute $0196; 315 VREGCON : byte absolute $0197; 316 VREGCON_VREGPM : bit absolute VREGCON.1; 317 VREGCON_Reserved : bit absolute VREGCON.0; 318 RCREG : byte absolute $0199; 319 TXREG : byte absolute $019A; 320 SPBRGL : byte absolute $019B; 321 SPBRGH : byte absolute $019C; 322 RCSTA : byte absolute $019D; 323 RCSTA_SPEN : bit absolute RCSTA.7; 324 RCSTA_RX9 : bit absolute RCSTA.6; 325 RCSTA_SREN : bit absolute RCSTA.5; 326 RCSTA_CREN : bit absolute RCSTA.4; 327 RCSTA_ADDEN : bit absolute RCSTA.3; 328 RCSTA_FERR : bit absolute RCSTA.2; 329 RCSTA_OERR : bit absolute RCSTA.1; 330 RCSTA_RX9D : bit absolute RCSTA.0; 331 TXSTA : byte absolute $019E; 332 TXSTA_CSRC : bit absolute TXSTA.7; 333 TXSTA_TX9 : bit absolute TXSTA.6; 334 TXSTA_TXEN : bit absolute TXSTA.5; 335 TXSTA_SYNC : bit absolute TXSTA.4; 336 TXSTA_SENDB : bit absolute TXSTA.3; 337 TXSTA_BRGH : bit absolute TXSTA.2; 338 TXSTA_TRMT : bit absolute TXSTA.1; 339 TXSTA_TX9D : bit absolute TXSTA.0; 340 BAUDCON : byte absolute $019F; 341 BAUDCON_ABDOVF : bit absolute BAUDCON.7; 342 BAUDCON_RCIDL : bit absolute BAUDCON.6; 343 BAUDCON_SCKP : bit absolute BAUDCON.4; 344 BAUDCON_BRG16 : bit absolute BAUDCON.3; 345 BAUDCON_WUE : bit absolute BAUDCON.1; 346 BAUDCON_ABDEN : bit absolute BAUDCON.0; 347 WPUA : byte absolute $020C; 348 WPUA_WPUA5 : bit absolute WPUA.5; 349 WPUA_WPUA4 : bit absolute WPUA.4; 350 WPUA_WPUA3 : bit absolute WPUA.3; 351 WPUA_WPUA2 : bit absolute WPUA.2; 352 WPUA_WPUA1 : bit absolute WPUA.1; 353 WPUA_WPUA0 : bit absolute WPUA.0; 354 WPUC : byte absolute $020E; 355 WPUC_WPUC5 : bit absolute WPUC.5; 356 WPUC_WPUC4 : bit absolute WPUC.4; 357 WPUC_WPUC3 : bit absolute WPUC.3; 358 WPUC_WPUC2 : bit absolute WPUC.2; 359 WPUC_WPUC1 : bit absolute WPUC.1; 360 WPUC_WPUC0 : bit absolute WPUC.0; 361 ODCONA : byte absolute $028C; 362 ODCONA_ODA5 : bit absolute ODCONA.5; 363 ODCONA_ODA4 : bit absolute ODCONA.4; 364 ODCONA_ODA2 : bit absolute ODCONA.2; 365 ODCONA_ODA1 : bit absolute ODCONA.1; 366 ODCONA_ODA0 : bit absolute ODCONA.0; 367 ODCONC : byte absolute $028E; 368 ODCONC_ODC5 : bit absolute ODCONC.5; 369 ODCONC_ODC4 : bit absolute ODCONC.4; 370 ODCONC_ODC3 : bit absolute ODCONC.3; 371 ODCONC_ODC2 : bit absolute ODCONC.2; 372 ODCONC_ODC1 : bit absolute ODCONC.1; 373 ODCONC_ODC0 : bit absolute ODCONC.0; 374 SLRCONA : byte absolute $030C; 375 SLRCONA_SLRA5 : bit absolute SLRCONA.5; 376 SLRCONA_SLRA4 : bit absolute SLRCONA.4; 377 SLRCONA_SLRA2 : bit absolute SLRCONA.2; 378 SLRCONA_SLRA1 : bit absolute SLRCONA.1; 379 SLRCONA_SLRA0 : bit absolute SLRCONA.0; 380 SLRCONC : byte absolute $030E; 381 SLRCONC_SLRC5 : bit absolute SLRCONC.5; 382 SLRCONC_SLRC4 : bit absolute SLRCONC.4; 383 SLRCONC_SLRC3 : bit absolute SLRCONC.3; 384 SLRCONC_SLRC2 : bit absolute SLRCONC.2; 385 SLRCONC_SLRC1 : bit absolute SLRCONC.1; 386 SLRCONC_SLRC0 : bit absolute SLRCONC.0; 387 INLVLA : byte absolute $038C; 388 INLVLA_INLVLA5 : bit absolute INLVLA.5; 389 INLVLA_INLVLA4 : bit absolute INLVLA.4; 390 INLVLA_INLVLA3 : bit absolute INLVLA.3; 391 INLVLA_INLVLA2 : bit absolute INLVLA.2; 392 INLVLA_INLVLA1 : bit absolute INLVLA.1; 393 INLVLA_INLVLA0 : bit absolute INLVLA.0; 394 INLVLC : byte absolute $038E; 395 INLVLC_INLVLC5 : bit absolute INLVLC.5; 396 INLVLC_INLVLC4 : bit absolute INLVLC.4; 397 INLVLC_INLVLC3 : bit absolute INLVLC.3; 398 INLVLC_INLVLC2 : bit absolute INLVLC.2; 399 INLVLC_INLVLC1 : bit absolute INLVLC.1; 400 INLVLC_INLVLC0 : bit absolute INLVLC.0; 401 IOCAP : byte absolute $0391; 402 IOCAP_IOCAP5 : bit absolute IOCAP.5; 403 IOCAP_IOCAP4 : bit absolute IOCAP.4; 404 IOCAP_IOCAP3 : bit absolute IOCAP.3; 405 IOCAP_IOCAP2 : bit absolute IOCAP.2; 406 IOCAP_IOCAP1 : bit absolute IOCAP.1; 407 IOCAP_IOCAP0 : bit absolute IOCAP.0; 408 IOCAN : byte absolute $0392; 409 IOCAN_IOCAN5 : bit absolute IOCAN.5; 410 IOCAN_IOCAN4 : bit absolute IOCAN.4; 411 IOCAN_IOCAN3 : bit absolute IOCAN.3; 412 IOCAN_IOCAN2 : bit absolute IOCAN.2; 413 IOCAN_IOCAN1 : bit absolute IOCAN.1; 414 IOCAN_IOCAN0 : bit absolute IOCAN.0; 415 IOCAF : byte absolute $0393; 416 IOCAF_IOCAF5 : bit absolute IOCAF.5; 417 IOCAF_IOCAF4 : bit absolute IOCAF.4; 418 IOCAF_IOCAF3 : bit absolute IOCAF.3; 419 IOCAF_IOCAF2 : bit absolute IOCAF.2; 420 IOCAF_IOCAF1 : bit absolute IOCAF.1; 421 IOCAF_IOCAF0 : bit absolute IOCAF.0; 422 IOCCP : byte absolute $0397; 423 IOCCP_IOCCP5 : bit absolute IOCCP.5; 424 IOCCP_IOCCP4 : bit absolute IOCCP.4; 425 IOCCP_IOCCP3 : bit absolute IOCCP.3; 426 IOCCP_IOCCP2 : bit absolute IOCCP.2; 427 IOCCP_IOCCP1 : bit absolute IOCCP.1; 428 IOCCP_IOCCP0 : bit absolute IOCCP.0; 429 IOCCN : byte absolute $0398; 430 IOCCN_IOCCN5 : bit absolute IOCCN.5; 431 IOCCN_IOCCN4 : bit absolute IOCCN.4; 432 IOCCN_IOCCN3 : bit absolute IOCCN.3; 433 IOCCN_IOCCN2 : bit absolute IOCCN.2; 434 IOCCN_IOCCN1 : bit absolute IOCCN.1; 435 IOCCN_IOCCN0 : bit absolute IOCCN.0; 436 IOCCF : byte absolute $0399; 437 IOCCF_IOCCF5 : bit absolute IOCCF.5; 438 IOCCF_IOCCF4 : bit absolute IOCCF.4; 439 IOCCF_IOCCF3 : bit absolute IOCCF.3; 440 IOCCF_IOCCF2 : bit absolute IOCCF.2; 441 IOCCF_IOCCF1 : bit absolute IOCCF.1; 442 IOCCF_IOCCF0 : bit absolute IOCCF.0; 443 CWG1DBR : byte absolute $0691; 444 CWG1DBR_CWG1DBR5 : bit absolute CWG1DBR.5; 445 CWG1DBR_CWG1DBR4 : bit absolute CWG1DBR.4; 446 CWG1DBR_CWG1DBR3 : bit absolute CWG1DBR.3; 447 CWG1DBR_CWG1DBR2 : bit absolute CWG1DBR.2; 448 CWG1DBR_CWG1DBR1 : bit absolute CWG1DBR.1; 449 CWG1DBR_CWG1DBR0 : bit absolute CWG1DBR.0; 450 CWG1DBF : byte absolute $0692; 451 CWG1DBF_CWG1DBF5 : bit absolute CWG1DBF.5; 452 CWG1DBF_CWG1DBF4 : bit absolute CWG1DBF.4; 453 CWG1DBF_CWG1DBF3 : bit absolute CWG1DBF.3; 454 CWG1DBF_CWG1DBF2 : bit absolute CWG1DBF.2; 455 CWG1DBF_CWG1DBF1 : bit absolute CWG1DBF.1; 456 CWG1DBF_CWG1DBF0 : bit absolute CWG1DBF.0; 457 CWG1CON0 : byte absolute $0693; 458 CWG1CON0_G1EN : bit absolute CWG1CON0.7; 459 CWG1CON0_G1OEB : bit absolute CWG1CON0.6; 460 CWG1CON0_G1OEA : bit absolute CWG1CON0.5; 461 CWG1CON0_G1POLB : bit absolute CWG1CON0.4; 462 CWG1CON0_G1POLA : bit absolute CWG1CON0.3; 463 CWG1CON0_G1CS0 : bit absolute CWG1CON0.0; 464 CWG1CON1 : byte absolute $0694; 465 CWG1CON1_G1ASDLB1 : bit absolute CWG1CON1.7; 466 CWG1CON1_G1ASDLB0 : bit absolute CWG1CON1.6; 467 CWG1CON1_G1ASDLA1 : bit absolute CWG1CON1.5; 468 CWG1CON1_G1ASDLA0 : bit absolute CWG1CON1.4; 469 CWG1CON1_G1IS2 : bit absolute CWG1CON1.2; 470 CWG1CON1_G1IS1 : bit absolute CWG1CON1.1; 471 CWG1CON1_G1IS0 : bit absolute CWG1CON1.0; 472 CWG1CON2 : byte absolute $0695; 473 CWG1CON2_G1ASE : bit absolute CWG1CON2.7; 474 CWG1CON2_G1ARSEN : bit absolute CWG1CON2.6; 475 CWG1CON2_G1ASDSC2 : bit absolute CWG1CON2.3; 476 CWG1CON2_G1ASDSC1 : bit absolute CWG1CON2.2; 477 CWG1CON2_G1ASDSPPS : bit absolute CWG1CON2.1; 478 PWMEN : byte absolute $0D8E; 479 PWMEN_PWM4EN_A : bit absolute PWMEN.3; 480 PWMEN_PWM3EN_A : bit absolute PWMEN.2; 481 PWMEN_PWM2EN_A : bit absolute PWMEN.1; 482 PWMEN_PWM1EN_A : bit absolute PWMEN.0; 483 PWMLD : byte absolute $0D8F; 484 PWMLD_PWM4LDA_A : bit absolute PWMLD.3; 485 PWMLD_PWM3LDA_A : bit absolute PWMLD.2; 486 PWMLD_PWM2LDA_A : bit absolute PWMLD.1; 487 PWMLD_PWM1LDA_A : bit absolute PWMLD.0; 488 PWMOUT : byte absolute $0D90; 489 PWMOUT_PWM4OUT_A : bit absolute PWMOUT.3; 490 PWMOUT_PWM3OUT_A : bit absolute PWMOUT.2; 491 PWMOUT_PWM2OUT_A : bit absolute PWMOUT.1; 492 PWMOUT_PWM1OUT_A : bit absolute PWMOUT.0; 493 PWM1PHL : byte absolute $0D91; 494 PWM1PHH : byte absolute $0D92; 495 PWM1DCL : byte absolute $0D93; 496 PWM1DCH : byte absolute $0D94; 497 PWM1PRL : byte absolute $0D95; 498 PWM1PRH : byte absolute $0D96; 499 PWM1OFL : byte absolute $0D97; 500 PWM1OFH : byte absolute $0D98; 501 PWM1TMRL : byte absolute $0D99; 502 PWM1TMRH : byte absolute $0D9A; 503 PWM1CON : byte absolute $0D9B; 504 PWM1CON_EN : bit absolute PWM1CON.7; 505 PWM1CON_OE : bit absolute PWM1CON.6; 506 PWM1CON_OUT : bit absolute PWM1CON.5; 507 PWM1CON_POL : bit absolute PWM1CON.4; 508 PWM1CON_MODE1 : bit absolute PWM1CON.3; 509 PWM1CON_MODE0 : bit absolute PWM1CON.2; 510 PWM1INTE : byte absolute $0D9C; 511 PWM1INTE_OFIE : bit absolute PWM1INTE.3; 512 PWM1INTE_PHIE : bit absolute PWM1INTE.2; 513 PWM1INTE_DCIE : bit absolute PWM1INTE.1; 514 PWM1INTE_PRIE : bit absolute PWM1INTE.0; 515 PWM1INTF : byte absolute $0D9D; 516 PWM1INTF_OFIF : bit absolute PWM1INTF.3; 517 PWM1INTF_PHIF : bit absolute PWM1INTF.2; 518 PWM1INTF_DCIF : bit absolute PWM1INTF.1; 519 PWM1INTF_PRIF : bit absolute PWM1INTF.0; 520 PWM1CLKCON : byte absolute $0D9E; 521 PWM1CLKCON_CS1 : bit absolute PWM1CLKCON.1; 522 PWM1CLKCON_CS0 : bit absolute PWM1CLKCON.0; 523 PWM1LDCON : byte absolute $0D9F; 524 PWM1LDCON_LDA : bit absolute PWM1LDCON.7; 525 PWM1LDCON_LDT : bit absolute PWM1LDCON.6; 526 PWM1LDCON_LDS1 : bit absolute PWM1LDCON.1; 527 PWM1LDCON_LDS0 : bit absolute PWM1LDCON.0; 528 PWM1OFCON : byte absolute $0DA0; 529 PWM1OFCON_OFM1 : bit absolute PWM1OFCON.6; 530 PWM1OFCON_OFM0 : bit absolute PWM1OFCON.5; 531 PWM1OFCON_OFO : bit absolute PWM1OFCON.4; 532 PWM1OFCON_OFS1 : bit absolute PWM1OFCON.1; 533 PWM1OFCON_OFS0 : bit absolute PWM1OFCON.0; 534 PWM2PHL : byte absolute $0DA1; 535 PWM2PHH : byte absolute $0DA2; 536 PWM2DCL : byte absolute $0DA3; 537 PWM2DCH : byte absolute $0DA4; 538 PWM2PRL : byte absolute $0DA5; 539 PWM2PRH : byte absolute $0DA6; 540 PWM2OFL : byte absolute $0DA7; 541 PWM2OFH : byte absolute $0DA8; 542 PWM2TMRL : byte absolute $0DA9; 543 PWM2TMRH : byte absolute $0DAA; 544 PWM2CON : byte absolute $0DAB; 545 PWM2INTE : byte absolute $0DAC; 546 PWM2INTF : byte absolute $0DAD; 547 PWM2CLKCON : byte absolute $0DAE; 548 PWM2LDCON : byte absolute $0DAF; 549 PWM2OFCON : byte absolute $0DB0; 550 PWM3PHL : byte absolute $0DB1; 551 PWM3PHH : byte absolute $0DB2; 552 PWM3DCL : byte absolute $0DB3; 553 PWM3DCH : byte absolute $0DB4; 554 PWM3PRL : byte absolute $0DB5; 555 PWM3PRH : byte absolute $0DB6; 556 PWM3OFL : byte absolute $0DB7; 557 PWM3OFH : byte absolute $0DB8; 558 PWM3TMRL : byte absolute $0DB9; 559 PWM3TMRH : byte absolute $0DBA; 560 PWM3CON : byte absolute $0DBB; 561 PWM3INTE : byte absolute $0DBC; 562 PWM3INTF : byte absolute $0DBD; 563 PWM3CLKCON : byte absolute $0DBE; 564 PWM3LDCON : byte absolute $0DBF; 565 PWM3OFCON : byte absolute $0DC0; 566 PWM4PHL : byte absolute $0DC1; 567 PWM4PHH : byte absolute $0DC2; 568 PWM4DCL : byte absolute $0DC3; 569 PWM4DCH : byte absolute $0DC4; 570 PWM4PRL : byte absolute $0DC5; 571 PWM4PRH : byte absolute $0DC6; 572 PWM4OFL : byte absolute $0DC7; 573 PWM4OFH : byte absolute $0DC8; 574 PWM4TMRL : byte absolute $0DC9; 575 PWM4TMRH : byte absolute $0DCA; 576 PWM4CON : byte absolute $0DCB; 577 PWM4INTE : byte absolute $0DCC; 578 PWM4INTF : byte absolute $0DCD; 579 PWM4CLKCON : byte absolute $0DCE; 580 PWM4LDCON : byte absolute $0DCF; 581 PWM4OFCON : byte absolute $0DD0; 582 PPSLOCK : byte absolute $0E0F; 583 PPSLOCK_PPSLOCKED : bit absolute PPSLOCK.0; 584 INTPPS : byte absolute $0E10; 585 INTPPS_INTPPS4 : bit absolute INTPPS.4; 586 INTPPS_INTPPS3 : bit absolute INTPPS.3; 587 INTPPS_INTPPS2 : bit absolute INTPPS.2; 588 INTPPS_INTPPS1 : bit absolute INTPPS.1; 589 INTPPS_INTPPS0 : bit absolute INTPPS.0; 590 T0CKIPPS : byte absolute $0E11; 591 T0CKIPPS_T0CKIPPS4 : bit absolute T0CKIPPS.4; 592 T0CKIPPS_T0CKIPPS3 : bit absolute T0CKIPPS.3; 593 T0CKIPPS_T0CKIPPS2 : bit absolute T0CKIPPS.2; 594 T0CKIPPS_T0CKIPPS1 : bit absolute T0CKIPPS.1; 595 T0CKIPPS_T0CKIPPS0 : bit absolute T0CKIPPS.0; 596 T1CKIPPS : byte absolute $0E12; 597 T1CKIPPS_T1CKIPPS4 : bit absolute T1CKIPPS.4; 598 T1CKIPPS_T1CKIPPS3 : bit absolute T1CKIPPS.3; 599 T1CKIPPS_T1CKIPPS2 : bit absolute T1CKIPPS.2; 600 T1CKIPPS_T1CKIPPS1 : bit absolute T1CKIPPS.1; 601 T1CKIPPS_T1CKIPPS0 : bit absolute T1CKIPPS.0; 602 T1GPPS : byte absolute $0E13; 603 T1GPPS_T1GPPS4 : bit absolute T1GPPS.4; 604 T1GPPS_T1GPPS3 : bit absolute T1GPPS.3; 605 T1GPPS_T1GPPS2 : bit absolute T1GPPS.2; 606 T1GPPS_T1GPPS1 : bit absolute T1GPPS.1; 607 T1GPPS_T1GPPS0 : bit absolute T1GPPS.0; 608 CWG1INPPS : byte absolute $0E14; 609 CWG1INPPS_CWG1INPPS4 : bit absolute CWG1INPPS.4; 610 CWG1INPPS_CWG1INPPS3 : bit absolute CWG1INPPS.3; 611 CWG1INPPS_CWG1INPPS2 : bit absolute CWG1INPPS.2; 612 CWG1INPPS_CWG1INPPS1 : bit absolute CWG1INPPS.1; 613 CWG1INPPS_CWG1INPPS0 : bit absolute CWG1INPPS.0; 614 RXPPS : byte absolute $0E15; 615 RXPPS_RXPPS4 : bit absolute RXPPS.4; 616 RXPPS_RXPPS3 : bit absolute RXPPS.3; 617 RXPPS_RXPPS2 : bit absolute RXPPS.2; 618 RXPPS_RXPPS1 : bit absolute RXPPS.1; 619 RXPPS_RXPPS0 : bit absolute RXPPS.0; 620 CKPPS : byte absolute $0E16; 621 CKPPS_CKPPS4 : bit absolute CKPPS.4; 622 CKPPS_CKPPS3 : bit absolute CKPPS.3; 623 CKPPS_CKPPS2 : bit absolute CKPPS.2; 624 CKPPS_CKPPS1 : bit absolute CKPPS.1; 625 CKPPS_CKPPS0 : bit absolute CKPPS.0; 626 ADCACTPPS : byte absolute $0E17; 627 ADCACTPPS_ADCACTPPS4 : bit absolute ADCACTPPS.4; 628 ADCACTPPS_ADCACTPPS3 : bit absolute ADCACTPPS.3; 629 ADCACTPPS_ADCACTPPS2 : bit absolute ADCACTPPS.2; 630 ADCACTPPS_ADCACTPPS1 : bit absolute ADCACTPPS.1; 631 ADCACTPPS_ADCACTPPS0 : bit absolute ADCACTPPS.0; 632 RA0PPS : byte absolute $0E90; 633 RA0PPS_RA0PPS3 : bit absolute RA0PPS.3; 634 RA0PPS_RA0PPS2 : bit absolute RA0PPS.2; 635 RA0PPS_RA0PPS1 : bit absolute RA0PPS.1; 636 RA0PPS_RA0PPS0 : bit absolute RA0PPS.0; 637 RA1PPS : byte absolute $0E91; 638 RA1PPS_RA1PPS3 : bit absolute RA1PPS.3; 639 RA1PPS_RA1PPS2 : bit absolute RA1PPS.2; 640 RA1PPS_RA1PPS1 : bit absolute RA1PPS.1; 641 RA1PPS_RA1PPS0 : bit absolute RA1PPS.0; 642 RA2PPS : byte absolute $0E92; 643 RA2PPS_RA2PPS3 : bit absolute RA2PPS.3; 644 RA2PPS_RA2PPS2 : bit absolute RA2PPS.2; 645 RA2PPS_RA2PPS1 : bit absolute RA2PPS.1; 646 RA2PPS_RA2PPS0 : bit absolute RA2PPS.0; 647 RA4PPS : byte absolute $0E94; 648 RA4PPS_RA4PPS3 : bit absolute RA4PPS.3; 649 RA4PPS_RA4PPS2 : bit absolute RA4PPS.2; 650 RA4PPS_RA4PPS1 : bit absolute RA4PPS.1; 651 RA4PPS_RA4PPS0 : bit absolute RA4PPS.0; 652 RA5PPS : byte absolute $0E95; 653 RA5PPS_RA5PPS3 : bit absolute RA5PPS.3; 654 RA5PPS_RA5PPS2 : bit absolute RA5PPS.2; 655 RA5PPS_RA5PPS1 : bit absolute RA5PPS.1; 656 RA5PPS_RA5PPS0 : bit absolute RA5PPS.0; 657 RC0PPS : byte absolute $0EA0; 658 RC0PPS_RC0PPS3 : bit absolute RC0PPS.3; 659 RC0PPS_RC0PPS2 : bit absolute RC0PPS.2; 660 RC0PPS_RC0PPS1 : bit absolute RC0PPS.1; 661 RC0PPS_RC0PPS0 : bit absolute RC0PPS.0; 662 RC1PPS : byte absolute $0EA1; 663 RC1PPS_RC1PPS3 : bit absolute RC1PPS.3; 664 RC1PPS_RC1PPS2 : bit absolute RC1PPS.2; 665 RC1PPS_RC1PPS1 : bit absolute RC1PPS.1; 666 RC1PPS_RC1PPS0 : bit absolute RC1PPS.0; 667 RC2PPS : byte absolute $0EA2; 668 RC2PPS_RC2PPS3 : bit absolute RC2PPS.3; 669 RC2PPS_RC2PPS2 : bit absolute RC2PPS.2; 670 RC2PPS_RC2PPS1 : bit absolute RC2PPS.1; 671 RC2PPS_RC2PPS0 : bit absolute RC2PPS.0; 672 RC3PPS : byte absolute $0EA3; 673 RC3PPS_RC3PPS3 : bit absolute RC3PPS.3; 674 RC3PPS_RC3PPS2 : bit absolute RC3PPS.2; 675 RC3PPS_RC3PPS1 : bit absolute RC3PPS.1; 676 RC3PPS_RC3PPS0 : bit absolute RC3PPS.0; 677 RC4PPS : byte absolute $0EA4; 678 RC4PPS_RC4PPS3 : bit absolute RC4PPS.3; 679 RC4PPS_RC4PPS2 : bit absolute RC4PPS.2; 680 RC4PPS_RC4PPS1 : bit absolute RC4PPS.1; 681 RC4PPS_RC4PPS0 : bit absolute RC4PPS.0; 682 RC5PPS : byte absolute $0EA5; 683 RC5PPS_RC5PPS3 : bit absolute RC5PPS.3; 684 RC5PPS_RC5PPS2 : bit absolute RC5PPS.2; 685 RC5PPS_RC5PPS1 : bit absolute RC5PPS.1; 686 RC5PPS_RC5PPS0 : bit absolute RC5PPS.0; 687 ICDIO : byte absolute $0F8C; 688 ICDIO_PORT_ICDDAT : bit absolute ICDIO.7; 689 ICDIO_PORT_ICDCLK : bit absolute ICDIO.6; 690 ICDIO_LAT_ICDDAT : bit absolute ICDIO.5; 691 ICDIO_LAT_ICDCLK : bit absolute ICDIO.4; 692 ICDIO_TRIS_ICDDAT : bit absolute ICDIO.3; 693 ICDIO_TRIS_ICDCLK : bit absolute ICDIO.2; 694 ICDIO_ICD_SLRC : bit absolute ICDIO.0; 695 ICDCON0 : byte absolute $0F8D; 696 ICDCON0_INBUG : bit absolute ICDCON0.7; 697 ICDCON0_FREEZ : bit absolute ICDCON0.6; 698 ICDCON0_SSTEP : bit absolute ICDCON0.5; 699 ICDCON0_DBGINEX : bit absolute ICDCON0.3; 700 ICDCON0_RSTVEC : bit absolute ICDCON0.0; 701 ICDSTAT : byte absolute $0F91; 702 ICDSTAT_TRP1HLTF : bit absolute ICDSTAT.7; 703 ICDSTAT_TRP0HLTF : bit absolute ICDSTAT.6; 704 ICDSTAT_USRHLTF : bit absolute ICDSTAT.1; 705 ICDINSTL : byte absolute $0F96; 706 ICDINSTL_DBGIN7 : bit absolute ICDINSTL.7; 707 ICDINSTL_DBGIN6 : bit absolute ICDINSTL.6; 708 ICDINSTL_DBGIN5 : bit absolute ICDINSTL.5; 709 ICDINSTL_DBGIN4 : bit absolute ICDINSTL.4; 710 ICDINSTL_DBGIN3 : bit absolute ICDINSTL.3; 711 ICDINSTL_DBGIN2 : bit absolute ICDINSTL.2; 712 ICDINSTL_DBGIN1 : bit absolute ICDINSTL.1; 713 ICDINSTL_DBGIN0 : bit absolute ICDINSTL.0; 714 ICDINSTH : byte absolute $0F97; 715 ICDINSTH_DBGIN13 : bit absolute ICDINSTH.5; 716 ICDINSTH_DBGIN12 : bit absolute ICDINSTH.4; 717 ICDINSTH_DBGIN11 : bit absolute ICDINSTH.3; 718 ICDINSTH_DBGIN10 : bit absolute ICDINSTH.2; 719 ICDINSTH_DBGIN9 : bit absolute ICDINSTH.1; 720 ICDINSTH_DBGIN8 : bit absolute ICDINSTH.0; 721 ICDBK0CON : byte absolute $0F9C; 722 ICDBK0CON_BKEN : bit absolute ICDBK0CON.7; 723 ICDBK0CON_BKHLT : bit absolute ICDBK0CON.0; 724 ICDBK0L : byte absolute $0F9D; 725 ICDBK0L_BKA7 : bit absolute ICDBK0L.7; 726 ICDBK0L_BKA6 : bit absolute ICDBK0L.6; 727 ICDBK0L_BKA5 : bit absolute ICDBK0L.5; 728 ICDBK0L_BKA4 : bit absolute ICDBK0L.4; 729 ICDBK0L_BKA3 : bit absolute ICDBK0L.3; 730 ICDBK0L_BKA2 : bit absolute ICDBK0L.2; 731 ICDBK0L_BKA1 : bit absolute ICDBK0L.1; 732 ICDBK0L_BKA0 : bit absolute ICDBK0L.0; 733 ICDBK0H : byte absolute $0F9E; 734 ICDBK0H_BKA14 : bit absolute ICDBK0H.6; 735 ICDBK0H_BKA13 : bit absolute ICDBK0H.5; 736 ICDBK0H_BKA12 : bit absolute ICDBK0H.4; 737 ICDBK0H_BKA11 : bit absolute ICDBK0H.3; 738 ICDBK0H_BKA10 : bit absolute ICDBK0H.2; 739 ICDBK0H_BKA9 : bit absolute ICDBK0H.1; 740 ICDBK0H_BKA8 : bit absolute ICDBK0H.0; 741 BSRICDSHAD : byte absolute $0FE3; 742 BSRICDSHAD_BSR_ICDSHAD4 : bit absolute BSRICDSHAD.4; 743 BSRICDSHAD_BSR_ICDSHAD3 : bit absolute BSRICDSHAD.3; 744 BSRICDSHAD_BSR_ICDSHAD2 : bit absolute BSRICDSHAD.2; 745 BSRICDSHAD_BSR_ICDSHAD1 : bit absolute BSRICDSHAD.1; 746 BSRICDSHAD_BSR_ICDSHAD0 : bit absolute BSRICDSHAD.0; 747 STATUS_SHAD : byte absolute $0FE4; 748 STATUS_SHAD_Z_SHAD : bit absolute STATUS_SHAD.2; 749 STATUS_SHAD_DC_SHAD : bit absolute STATUS_SHAD.1; 750 STATUS_SHAD_C_SHAD : bit absolute STATUS_SHAD.0; 751 WREG_SHAD : byte absolute $0FE5; 752 BSR_SHAD : byte absolute $0FE6; 753 BSR_SHAD_BSR_SHAD4 : bit absolute BSR_SHAD.4; 754 BSR_SHAD_BSR_SHAD3 : bit absolute BSR_SHAD.3; 755 BSR_SHAD_BSR_SHAD2 : bit absolute BSR_SHAD.2; 756 BSR_SHAD_BSR_SHAD1 : bit absolute BSR_SHAD.1; 757 BSR_SHAD_BSR_SHAD0 : bit absolute BSR_SHAD.0; 758 PCLATH_SHAD : byte absolute $0FE7; 759 PCLATH_SHAD_PCLATH_SHAD6 : bit absolute PCLATH_SHAD.6; 760 PCLATH_SHAD_PCLATH_SHAD5 : bit absolute PCLATH_SHAD.5; 761 PCLATH_SHAD_PCLATH_SHAD4 : bit absolute PCLATH_SHAD.4; 762 PCLATH_SHAD_PCLATH_SHAD3 : bit absolute PCLATH_SHAD.3; 763 PCLATH_SHAD_PCLATH_SHAD2 : bit absolute PCLATH_SHAD.2; 764 PCLATH_SHAD_PCLATH_SHAD1 : bit absolute PCLATH_SHAD.1; 765 PCLATH_SHAD_PCLATH_SHAD0 : bit absolute PCLATH_SHAD.0; 766 FSR0L_SHAD : byte absolute $0FE8; 767 FSR0H_SHAD : byte absolute $0FE9; 768 FSR1L_SHAD : byte absolute $0FEA; 769 FSR1H_SHAD : byte absolute $0FEB; 770 STKPTR : byte absolute $0FED; 771 STKPTR_STKPTR4 : bit absolute STKPTR.4; 772 STKPTR_STKPTR3 : bit absolute STKPTR.3; 773 STKPTR_STKPTR2 : bit absolute STKPTR.2; 774 STKPTR_STKPTR1 : bit absolute STKPTR.1; 775 STKPTR_STKPTR0 : bit absolute STKPTR.0; 776 TOSL : byte absolute $0FEE; 777 TOSH : byte absolute $0FEF; 778 TOSH_TOSH6 : bit absolute TOSH.6; 779 TOSH_TOSH5 : bit absolute TOSH.5; 780 TOSH_TOSH4 : bit absolute TOSH.4; 781 TOSH_TOSH3 : bit absolute TOSH.3; 782 TOSH_TOSH2 : bit absolute TOSH.2; 783 TOSH_TOSH1 : bit absolute TOSH.1; 784 TOSH_TOSH0 : bit absolute TOSH.0; 785 786 787 // -- Define RAM state values -- 788 789 {$CLEAR_STATE_RAM} 790 791 {$SET_STATE_RAM '000-00B:SFR:ALLMAPPED'} // Banks 0-31 : INDF0, INDF1, PCL, STATUS, FSR0L, FSR0H, FSR1L, FSR1H, BSR, WREG, PCLATH, INTCON 792 {$SET_STATE_RAM '00C-00C:SFR'} // Bank 0 : PORTA 793 {$SET_STATE_RAM '00E-00E:SFR'} // Bank 0 : PORTC 794 {$SET_STATE_RAM '011-013:SFR'} // Bank 0 : PIR1, PIR2, PIR3 795 {$SET_STATE_RAM '015-01C:SFR'} // Bank 0 : TMR0, TMR1L, TMR1H, T1CON, T1GCON, TMR2, PR2, T2CON 796 {$SET_STATE_RAM '020-06F:GPR'} 797 {$SET_STATE_RAM '070-07F:GPR:ALLMAPPED'} 798 {$SET_STATE_RAM '08C-08C:SFR'} // Bank 1 : TRISA 799 {$SET_STATE_RAM '08E-08E:SFR'} // Bank 1 : TRISC 800 {$SET_STATE_RAM '091-093:SFR'} // Bank 1 : PIE1, PIE2, PIE3 801 {$SET_STATE_RAM '095-09F:SFR'} // Bank 1 : OPTION_REG, PCON, WDTCON, OSCTUNE, OSCCON, OSCSTAT, ADRESL, ADRESH, ADCON0, ADCON1, ADCON2 802 {$SET_STATE_RAM '0A0-0EF:GPR'} 803 {$SET_STATE_RAM '10C-10C:SFR'} // Bank 2 : LATA 804 {$SET_STATE_RAM '10E-10E:SFR'} // Bank 2 : LATC 805 {$SET_STATE_RAM '111-119:SFR'} // Bank 2 : CM1CON0, CM1CON1, CM2CON0, CM2CON1, CMOUT, BORCON, FVRCON, DACCON0, DACCON1 806 {$SET_STATE_RAM '120-16F:GPR'} 807 {$SET_STATE_RAM '18C-18C:SFR'} // Bank 3 : ANSELA 808 {$SET_STATE_RAM '18E-18E:SFR'} // Bank 3 : ANSELC 809 {$SET_STATE_RAM '191-197:SFR'} // Bank 3 : PMADRL, PMADRH, PMDATL, PMDATH, PMCON1, PMCON2, VREGCON 810 {$SET_STATE_RAM '199-19F:SFR'} // Bank 3 : RCREG, TXREG, SPBRGL, SPBRGH, RCSTA, TXSTA, BAUDCON 811 {$SET_STATE_RAM '1A0-1EF:GPR'} 812 {$SET_STATE_RAM '20C-20C:SFR'} // Bank 4 : WPUA 813 {$SET_STATE_RAM '20E-20E:SFR'} // Bank 4 : WPUC 814 {$SET_STATE_RAM '220-26F:GPR'} 815 {$SET_STATE_RAM '28C-28C:SFR'} // Bank 5 : ODCONA 816 {$SET_STATE_RAM '28E-28E:SFR'} // Bank 5 : ODCONC 817 {$SET_STATE_RAM '2A0-2EF:GPR'} 818 {$SET_STATE_RAM '30C-30C:SFR'} // Bank 6 : SLRCONA 819 {$SET_STATE_RAM '30E-30E:SFR'} // Bank 6 : SLRCONC 820 {$SET_STATE_RAM '320-36F:GPR'} 821 {$SET_STATE_RAM '38C-38C:SFR'} // Bank 7 : INLVLA 822 {$SET_STATE_RAM '38E-38E:SFR'} // Bank 7 : INLVLC 823 {$SET_STATE_RAM '391-393:SFR'} // Bank 7 : IOCAP, IOCAN, IOCAF 824 {$SET_STATE_RAM '397-399:SFR'} // Bank 7 : IOCCP, IOCCN, IOCCF 825 {$SET_STATE_RAM '3A0-3EF:GPR'} 826 {$SET_STATE_RAM '420-46F:GPR'} 827 {$SET_STATE_RAM '4A0-4EF:GPR'} 828 {$SET_STATE_RAM '520-56F:GPR'} 829 {$SET_STATE_RAM '5A0-5EF:GPR'} 830 {$SET_STATE_RAM '620-63F:GPR'} 831 {$SET_STATE_RAM '691-695:SFR'} // Bank 13 : CWG1DBR, CWG1DBF, CWG1CON0, CWG1CON1, CWG1CON2 832 {$SET_STATE_RAM 'D8E-DD0:SFR'} // Bank 27 : PWMEN, PWMLD, PWMOUT, PWM1PHL, PWM1PHH, PWM1DCL, PWM1DCH, PWM1PRL, PWM1PRH, PWM1OFL, PWM1OFH, PWM1TMRL, PWM1TMRH, PWM1CON, PWM1INTE, PWM1INTF, PWM1CLKCON, PWM1LDCON, PWM1OFCON, PWM2PHL, PWM2PHH, PWM2DCL, PWM2DCH, PWM2PRL, PWM2PRH, PWM2OFL, PWM2OFH, PWM2TMRL, PWM2TMRH, PWM2CON, PWM2INTE, PWM2INTF, PWM2CLKCON, PWM2LDCON, PWM2OFCON, PWM3PHL, PWM3PHH, PWM3DCL, PWM3DCH, PWM3PRL, PWM3PRH, PWM3OFL, PWM3OFH, PWM3TMRL, PWM3TMRH, PWM3CON, PWM3INTE, PWM3INTF, PWM3CLKCON, PWM3LDCON, PWM3OFCON, PWM4PHL, PWM4PHH, PWM4DCL, PWM4DCH, PWM4PRL, PWM4PRH, PWM4OFL, PWM4OFH, PWM4TMRL, PWM4TMRH, PWM4CON, PWM4INTE, PWM4INTF, PWM4CLKCON, PWM4LDCON, PWM4OFCON 833 {$SET_STATE_RAM 'E0F-E17:SFR'} // Bank 28 : PPSLOCK, INTPPS, T0CKIPPS, T1CKIPPS, T1GPPS, CWG1INPPS, RXPPS, CKPPS, ADCACTPPS 834 {$SET_STATE_RAM 'E90-E92:SFR'} // Bank 29 : RA0PPS, RA1PPS, RA2PPS 835 {$SET_STATE_RAM 'E94-E95:SFR'} // Bank 29 : RA4PPS, RA5PPS 836 {$SET_STATE_RAM 'EA0-EA5:SFR'} // Bank 29 : RC0PPS, RC1PPS, RC2PPS, RC3PPS, RC4PPS, RC5PPS 837 {$SET_STATE_RAM 'F8C-F8D:SFR'} // Bank 31 : ICDIO, ICDCON0 838 {$SET_STATE_RAM 'F91-F91:SFR'} // Bank 31 : ICDSTAT 839 {$SET_STATE_RAM 'F96-F97:SFR'} // Bank 31 : ICDINSTL, ICDINSTH 840 {$SET_STATE_RAM 'F9C-F9E:SFR'} // Bank 31 : ICDBK0CON, ICDBK0L, ICDBK0H 841 {$SET_STATE_RAM 'FE3-FEB:SFR'} // Bank 31 : BSRICDSHAD, STATUS_SHAD, WREG_SHAD, BSR_SHAD, PCLATH_SHAD, FSR0L_SHAD, FSR0H_SHAD, FSR1L_SHAD, FSR1H_SHAD 842 {$SET_STATE_RAM 'FED-FEF:SFR'} // Bank 31 : STKPTR, TOSL, TOSH 843 844 845 // -- Define mapped RAM -- 846 847 848 849 850 // -- Un-implemented fields -- 851 852 {$SET_UNIMP_BITS '003:1F'} // STATUS bits 7,6,5 un-implemented (read as 0) 853 {$SET_UNIMP_BITS '008:1F'} // BSR bits 7,6,5 un-implemented (read as 0) 854 {$SET_UNIMP_BITS '00A:7F'} // PCLATH bit 7 un-implemented (read as 0) 855 {$SET_UNIMP_BITS '00C:3F'} // PORTA bits 7,6 un-implemented (read as 0) 856 {$SET_UNIMP_BITS '00E:3F'} // PORTC bits 7,6 un-implemented (read as 0) 857 {$SET_UNIMP_BITS '011:F3'} // PIR1 bits 3,2 un-implemented (read as 0) 858 {$SET_UNIMP_BITS '012:60'} // PIR2 bits 7,4,3,2,1,0 un-implemented (read as 0) 859 {$SET_UNIMP_BITS '013:F0'} // PIR3 bits 3,2,1,0 un-implemented (read as 0) 860 {$SET_UNIMP_BITS '018:FD'} // T1CON bit 1 un-implemented (read as 0) 861 {$SET_UNIMP_BITS '01C:7F'} // T2CON bit 7 un-implemented (read as 0) 862 {$SET_UNIMP_BITS '08C:3F'} // TRISA bits 7,6 un-implemented (read as 0) 863 {$SET_UNIMP_BITS '08E:3F'} // TRISC bits 7,6 un-implemented (read as 0) 864 {$SET_UNIMP_BITS '091:F3'} // PIE1 bits 3,2 un-implemented (read as 0) 865 {$SET_UNIMP_BITS '092:60'} // PIE2 bits 7,4,3,2,1,0 un-implemented (read as 0) 866 {$SET_UNIMP_BITS '093:F0'} // PIE3 bits 3,2,1,0 un-implemented (read as 0) 867 {$SET_UNIMP_BITS '096:DF'} // PCON bit 5 un-implemented (read as 0) 868 {$SET_UNIMP_BITS '097:3F'} // WDTCON bits 7,6 un-implemented (read as 0) 869 {$SET_UNIMP_BITS '098:3F'} // OSCTUNE bits 7,6 un-implemented (read as 0) 870 {$SET_UNIMP_BITS '099:FB'} // OSCCON bit 2 un-implemented (read as 0) 871 {$SET_UNIMP_BITS '09A:7F'} // OSCSTAT bit 7 un-implemented (read as 0) 872 {$SET_UNIMP_BITS '09D:7F'} // ADCON0 bit 7 un-implemented (read as 0) 873 {$SET_UNIMP_BITS '09E:F3'} // ADCON1 bits 3,2 un-implemented (read as 0) 874 {$SET_UNIMP_BITS '09F:F0'} // ADCON2 bits 3,2,1,0 un-implemented (read as 0) 875 {$SET_UNIMP_BITS '10C:37'} // LATA bits 7,6,3 un-implemented (read as 0) 876 {$SET_UNIMP_BITS '10E:3F'} // LATC bits 7,6 un-implemented (read as 0) 877 {$SET_UNIMP_BITS '111:F7'} // CM1CON0 bit 3 un-implemented (read as 0) 878 {$SET_UNIMP_BITS '112:F7'} // CM1CON1 bit 3 un-implemented (read as 0) 879 {$SET_UNIMP_BITS '113:F7'} // CM2CON0 bit 3 un-implemented (read as 0) 880 {$SET_UNIMP_BITS '114:F7'} // CM2CON1 bit 3 un-implemented (read as 0) 881 {$SET_UNIMP_BITS '115:03'} // CMOUT bits 7,6,5,4,3,2 un-implemented (read as 0) 882 {$SET_UNIMP_BITS '116:C1'} // BORCON bits 5,4,3,2,1 un-implemented (read as 0) 883 {$SET_UNIMP_BITS '118:EC'} // DACCON0 bits 4,1,0 un-implemented (read as 0) 884 {$SET_UNIMP_BITS '119:1F'} // DACCON1 bits 7,6,5 un-implemented (read as 0) 885 {$SET_UNIMP_BITS '18C:17'} // ANSELA bits 7,6,5,3 un-implemented (read as 0) 886 {$SET_UNIMP_BITS '18E:0F'} // ANSELC bits 7,6,5,4 un-implemented (read as 0) 887 {$SET_UNIMP_BITS '194:3F'} // PMDATH bits 7,6 un-implemented (read as 0) 888 {$SET_UNIMP_BITS '197:03'} // VREGCON bits 7,6,5,4,3,2 un-implemented (read as 0) 889 {$SET_UNIMP_BITS '19F:DB'} // BAUDCON bits 5,2 un-implemented (read as 0) 890 {$SET_UNIMP_BITS '20C:3F'} // WPUA bits 7,6 un-implemented (read as 0) 891 {$SET_UNIMP_BITS '20E:3F'} // WPUC bits 7,6 un-implemented (read as 0) 892 {$SET_UNIMP_BITS '28C:37'} // ODCONA bits 7,6,3 un-implemented (read as 0) 893 {$SET_UNIMP_BITS '28E:3F'} // ODCONC bits 7,6 un-implemented (read as 0) 894 {$SET_UNIMP_BITS '30C:37'} // SLRCONA bits 7,6,3 un-implemented (read as 0) 895 {$SET_UNIMP_BITS '30E:3F'} // SLRCONC bits 7,6 un-implemented (read as 0) 896 {$SET_UNIMP_BITS '38C:3F'} // INLVLA bits 7,6 un-implemented (read as 0) 897 {$SET_UNIMP_BITS '38E:3F'} // INLVLC bits 7,6 un-implemented (read as 0) 898 {$SET_UNIMP_BITS '391:3F'} // IOCAP bits 7,6 un-implemented (read as 0) 899 {$SET_UNIMP_BITS '392:3F'} // IOCAN bits 7,6 un-implemented (read as 0) 900 {$SET_UNIMP_BITS '393:3F'} // IOCAF bits 7,6 un-implemented (read as 0) 901 {$SET_UNIMP_BITS '397:3F'} // IOCCP bits 7,6 un-implemented (read as 0) 902 {$SET_UNIMP_BITS '398:3F'} // IOCCN bits 7,6 un-implemented (read as 0) 903 {$SET_UNIMP_BITS '399:3F'} // IOCCF bits 7,6 un-implemented (read as 0) 904 {$SET_UNIMP_BITS '691:3F'} // CWG1DBR bits 7,6 un-implemented (read as 0) 905 {$SET_UNIMP_BITS '692:3F'} // CWG1DBF bits 7,6 un-implemented (read as 0) 906 {$SET_UNIMP_BITS '693:F9'} // CWG1CON0 bits 2,1 un-implemented (read as 0) 907 {$SET_UNIMP_BITS '694:F7'} // CWG1CON1 bit 3 un-implemented (read as 0) 908 {$SET_UNIMP_BITS '695:CE'} // CWG1CON2 bits 5,4,0 un-implemented (read as 0) 909 {$SET_UNIMP_BITS 'D8E:0F'} // PWMEN bits 7,6,5,4 un-implemented (read as 0) 910 {$SET_UNIMP_BITS 'D8F:0F'} // PWMLD bits 7,6,5,4 un-implemented (read as 0) 911 {$SET_UNIMP_BITS 'D90:0F'} // PWMOUT bits 7,6,5,4 un-implemented (read as 0) 912 {$SET_UNIMP_BITS 'D9B:FC'} // PWM1CON bits 1,0 un-implemented (read as 0) 913 {$SET_UNIMP_BITS 'D9C:0F'} // PWM1INTE bits 7,6,5,4 un-implemented (read as 0) 914 {$SET_UNIMP_BITS 'D9D:0F'} // PWM1INTF bits 7,6,5,4 un-implemented (read as 0) 915 {$SET_UNIMP_BITS 'D9E:73'} // PWM1CLKCON bits 7,3,2 un-implemented (read as 0) 916 {$SET_UNIMP_BITS 'D9F:C3'} // PWM1LDCON bits 5,4,3,2 un-implemented (read as 0) 917 {$SET_UNIMP_BITS 'DA0:73'} // PWM1OFCON bits 7,3,2 un-implemented (read as 0) 918 {$SET_UNIMP_BITS 'DAB:FC'} // PWM2CON bits 1,0 un-implemented (read as 0) 919 {$SET_UNIMP_BITS 'DAC:0F'} // PWM2INTE bits 7,6,5,4 un-implemented (read as 0) 920 {$SET_UNIMP_BITS 'DAD:0F'} // PWM2INTF bits 7,6,5,4 un-implemented (read as 0) 921 {$SET_UNIMP_BITS 'DAE:73'} // PWM2CLKCON bits 7,3,2 un-implemented (read as 0) 922 {$SET_UNIMP_BITS 'DAF:C3'} // PWM2LDCON bits 5,4,3,2 un-implemented (read as 0) 923 {$SET_UNIMP_BITS 'DB0:73'} // PWM2OFCON bits 7,3,2 un-implemented (read as 0) 924 {$SET_UNIMP_BITS 'DBB:FC'} // PWM3CON bits 1,0 un-implemented (read as 0) 925 {$SET_UNIMP_BITS 'DBC:0F'} // PWM3INTE bits 7,6,5,4 un-implemented (read as 0) 926 {$SET_UNIMP_BITS 'DBD:0F'} // PWM3INTF bits 7,6,5,4 un-implemented (read as 0) 927 {$SET_UNIMP_BITS 'DBE:73'} // PWM3CLKCON bits 7,3,2 un-implemented (read as 0) 928 {$SET_UNIMP_BITS 'DBF:C3'} // PWM3LDCON bits 5,4,3,2 un-implemented (read as 0) 929 {$SET_UNIMP_BITS 'DC0:73'} // PWM3OFCON bits 7,3,2 un-implemented (read as 0) 930 {$SET_UNIMP_BITS 'DCB:FC'} // PWM4CON bits 1,0 un-implemented (read as 0) 931 {$SET_UNIMP_BITS 'DCC:0F'} // PWM4INTE bits 7,6,5,4 un-implemented (read as 0) 932 {$SET_UNIMP_BITS 'DCD:0F'} // PWM4INTF bits 7,6,5,4 un-implemented (read as 0) 933 {$SET_UNIMP_BITS 'DCE:73'} // PWM4CLKCON bits 7,3,2 un-implemented (read as 0) 934 {$SET_UNIMP_BITS 'DCF:C3'} // PWM4LDCON bits 5,4,3,2 un-implemented (read as 0) 935 {$SET_UNIMP_BITS 'DD0:73'} // PWM4OFCON bits 7,3,2 un-implemented (read as 0) 936 {$SET_UNIMP_BITS 'E0F:01'} // PPSLOCK bits 7,6,5,4,3,2,1 un-implemented (read as 0) 937 {$SET_UNIMP_BITS 'E10:1F'} // INTPPS bits 7,6,5 un-implemented (read as 0) 938 {$SET_UNIMP_BITS 'E11:1F'} // T0CKIPPS bits 7,6,5 un-implemented (read as 0) 939 {$SET_UNIMP_BITS 'E12:1F'} // T1CKIPPS bits 7,6,5 un-implemented (read as 0) 940 {$SET_UNIMP_BITS 'E13:1F'} // T1GPPS bits 7,6,5 un-implemented (read as 0) 941 {$SET_UNIMP_BITS 'E14:1F'} // CWG1INPPS bits 7,6,5 un-implemented (read as 0) 942 {$SET_UNIMP_BITS 'E15:1F'} // RXPPS bits 7,6,5 un-implemented (read as 0) 943 {$SET_UNIMP_BITS 'E16:1F'} // CKPPS bits 7,6,5 un-implemented (read as 0) 944 {$SET_UNIMP_BITS 'E17:1F'} // ADCACTPPS bits 7,6,5 un-implemented (read as 0) 945 {$SET_UNIMP_BITS 'E90:0F'} // RA0PPS bits 7,6,5,4 un-implemented (read as 0) 946 {$SET_UNIMP_BITS 'E91:0F'} // RA1PPS bits 7,6,5,4 un-implemented (read as 0) 947 {$SET_UNIMP_BITS 'E92:0F'} // RA2PPS bits 7,6,5,4 un-implemented (read as 0) 948 {$SET_UNIMP_BITS 'E94:0F'} // RA4PPS bits 7,6,5,4 un-implemented (read as 0) 949 {$SET_UNIMP_BITS 'E95:0F'} // RA5PPS bits 7,6,5,4 un-implemented (read as 0) 950 {$SET_UNIMP_BITS 'EA0:0F'} // RC0PPS bits 7,6,5,4 un-implemented (read as 0) 951 {$SET_UNIMP_BITS 'EA1:0F'} // RC1PPS bits 7,6,5,4 un-implemented (read as 0) 952 {$SET_UNIMP_BITS 'EA2:0F'} // RC2PPS bits 7,6,5,4 un-implemented (read as 0) 953 {$SET_UNIMP_BITS 'EA3:0F'} // RC3PPS bits 7,6,5,4 un-implemented (read as 0) 954 {$SET_UNIMP_BITS 'EA4:0F'} // RC4PPS bits 7,6,5,4 un-implemented (read as 0) 955 {$SET_UNIMP_BITS 'EA5:0F'} // RC5PPS bits 7,6,5,4 un-implemented (read as 0) 956 {$SET_UNIMP_BITS 'F8C:FD'} // ICDIO bit 1 un-implemented (read as 0) 957 {$SET_UNIMP_BITS 'F8D:E9'} // ICDCON0 bits 4,2,1 un-implemented (read as 0) 958 {$SET_UNIMP_BITS 'F91:C2'} // ICDSTAT bits 5,4,3,2,0 un-implemented (read as 0) 959 {$SET_UNIMP_BITS 'F97:3F'} // ICDINSTH bits 7,6 un-implemented (read as 0) 960 {$SET_UNIMP_BITS 'F9C:81'} // ICDBK0CON bits 6,5,4,3,2,1 un-implemented (read as 0) 961 {$SET_UNIMP_BITS 'F9E:7F'} // ICDBK0H bit 7 un-implemented (read as 0) 962 {$SET_UNIMP_BITS 'FE3:1F'} // BSRICDSHAD bits 7,6,5 un-implemented (read as 0) 963 {$SET_UNIMP_BITS 'FE4:07'} // STATUS_SHAD bits 7,6,5,4,3 un-implemented (read as 0) 964 {$SET_UNIMP_BITS 'FE6:1F'} // BSR_SHAD bits 7,6,5 un-implemented (read as 0) 965 {$SET_UNIMP_BITS 'FE7:7F'} // PCLATH_SHAD bit 7 un-implemented (read as 0) 966 {$SET_UNIMP_BITS 'FED:1F'} // STKPTR bits 7,6,5 un-implemented (read as 0) 967 {$SET_UNIMP_BITS 'FEF:7F'} // TOSH bit 7 un-implemented (read as 0) 968 969 {$SET_UNIMP_BITS1 '192:80'} // PMADRH bit 7 un-implemented (read as 1) 970 {$SET_UNIMP_BITS1 '195:80'} // PMCON1 bit 7 un-implemented (read as 1) 971 972 973 // -- PIN mapping -- 974 975 // Pin 1 : Vdd 976 // Pin 2 : RA5/IOCA5/CLKIN 977 // Pin 3 : RA4/AN3/IOC4/CLKOUT 978 // Pin 4 : RA3/IOCA3/MCLR_n/ICDMCLR_n/Vpp 979 // Pin 5 : RC5/IOCC5 980 // Pin 6 : RC4/IOCC4 981 // Pin 7 : RC3/AN7/C1IN3-/C2IN3-/IOCC3 982 // Pin 8 : RC2/AN6/C1IN2-/C2IN2-/IOCC2 983 // Pin 9 : RC1/AN5/C1IN1-/C2IN1-/IOCC1 984 // Pin 10 : AN4/C2IN+/IOCC0/RC0 985 // Pin 11 : RA2/AN2/IOCA2 986 // Pin 12 : RA1/AN1/VREF+DAC/VREF+ADC/C1IN0-/C2IN0-/IOCA1/ICSPCLK/ICDCLK 987 // Pin 13 : RA0/AN0/DACOUT/C1IN+/IOCA0/ICSPDAT/ICDDAT 988 // Pin 14 : Vss 989 990 991 // -- RAM to PIN mapping -- 992 993 {$MAP_RAM_TO_PIN '00C:0-13,1-12,2-11,3-4,4-3,5-2'} // PORTA 994 {$MAP_RAM_TO_PIN '00E:0-10,1-9,2-8,3-7,4-6,5-5'} // PORTC 995 996 997 // -- Bits Configuration -- 998 999 // FOSC : Oscillator Selection Bits 1000 {$define _FOSC_ECH = $3FFF} // ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin 1001 {$define _FOSC_ECM = $3FFE} // ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin 1002 {$define _FOSC_ECL = $3FFD} // ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin 1003 {$define _FOSC_INTOSC = $3FFC} // INTOSC oscillator; I/O function on CLKIN pin 1004 1005 // WDTE : Watchdog Timer Enable 1006 {$define _WDTE_ON = $3FFF} // WDT enabled 1007 {$define _WDTE_NSLEEP = $3FF7} // WDT enabled while running and disabled in Sleep 1008 {$define _WDTE_SWDTEN = $3FEF} // WDT controlled by the SWDTEN bit in the WDTCON register 1009 {$define _WDTE_OFF = $3FE7} // WDT disabled 1010 1011 // PWRTE : Power-up Timer Enable 1012 {$define _PWRTE_OFF = $3FFF} // PWRT disabled 1013 {$define _PWRTE_ON = $3FDF} // PWRT enabled 1014 1015 // MCLRE : MCLR Pin Function Select 1016 {$define _MCLRE_ON = $3FFF} // MCLR/VPP pin function is MCLR 1017 {$define _MCLRE_OFF = $3FBF} // MCLR/VPP pin function is digital input 1018 1019 // CP : Flash Program Memory Code Protection 1020 {$define _CP_OFF = $3FFF} // Program memory code protection is disabled 1021 {$define _CP_ON = $3F7F} // Program memory code protection is enabled 1022 1023 // BOREN : Brown-out Reset Enable 1024 {$define _BOREN_ON = $3FFF} // Brown-out Reset enabled 1025 {$define _BOREN_NSLEEP = $3DFF} // Brown-out Reset enabled while running and disabled in Sleep 1026 {$define _BOREN_SBODEN = $3BFF} // Brown-out Reset controlled by the SBOREN bit in the BORCON register 1027 {$define _BOREN_OFF = $39FF} // Brown-out Reset disabled 1028 1029 // CLKOUTEN : Clock Out Enable 1030 {$define _CLKOUTEN_OFF = $3FFF} // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin 1031 {$define _CLKOUTEN_ON = $37FF} // CLKOUT function is enabled on the CLKOUT pin 1032 1033 // WRT : Flash Memory Self-Write Protection 1034 {$define _WRT_OFF = $3FFF} // Write protection off 1035 {$define _WRT_BOOT = $3FFE} // 000h to 1FFh write protected, 200h to FFFh may be modified by EECON control 1036 {$define _WRT_HALF = $3FFD} // 000h to 7FFh write protected, 800h to FFFh may be modified by EECON control 1037 {$define _WRT_ALL = $3FFC} // 000h to FFFh write protected, no addresses may be modified by EECON control 1038 1039 // PPS1WAY : PPSLOCK bit One-Way Set Enable bit 1040 {$define _PPS1WAY_ON = $3FFF} // PPSLOCKED Bit Can Be Cleared & Set Once 1041 {$define _PPS1WAY_OFF = $3FFB} // PPSLOCKED Bit Can Be Cleared & Set Repeatedly 1042 1043 // PLLEN : PLL Enable 1044 {$define _PLLEN_ON = $3FFF} // 4x PLL enabled 1045 {$define _PLLEN_OFF = $3EFF} // 4x PLL disabled 1046 1047 // STVREN : Stack Overflow/Underflow Reset Enable 1048 {$define _STVREN_ON = $3FFF} // Stack Overflow or Underflow will cause a Reset 1049 {$define _STVREN_OFF = $3DFF} // Stack Overflow or Underflow will not cause a Reset 1050 1051 // BORV : Brown-out Reset Voltage Selection 1052 {$define _BORV_LO = $3FFF} // Brown-out Reset Voltage (Vbor), low trip point selected. 1053 {$define _BORV_HI = $3BFF} // Brown-out Reset Voltage (Vbor), high trip point selected. 1054 1055 // LPBOREN : Low Power Brown-out Reset enable bit 1056 {$define _LPBOREN_OFF = $3FFF} // LPBOR is disabled 1057 {$define _LPBOREN_ON = $37FF} // LPBOR is enabled 1058 1059 // LVP : Low-Voltage Programming Enable 1060 {$define _LVP_ON = $3FFF} // Low-voltage programming enabled 1061 {$define _LVP_OFF = $1FFF} // High-voltage on MCLR/VPP must be used for programming 1062 1063 implementation 1064 end. 1065