1 unit PIC16F1704; 2 3 // Define hardware 4 {$SET PIC_MODEL = 'PIC16F1704'} 5 {$SET PIC_MAXFREQ = 32000000} 6 {$SET PIC_NPINS = 14} 7 {$SET PIC_NUMBANKS = 32} 8 {$SET PIC_NUMPAGES = 2} 9 {$SET PIC_MAXFLASH = 4096} 10 11 interface 12 var 13 INDF0 : byte absolute $0000; 14 INDF1 : byte absolute $0001; 15 PCL : byte absolute $0002; 16 STATUS : byte absolute $0003; 17 STATUS_nTO : bit absolute STATUS.4; 18 STATUS_nPD : bit absolute STATUS.3; 19 STATUS_Z : bit absolute STATUS.2; 20 STATUS_DC : bit absolute STATUS.1; 21 STATUS_C : bit absolute STATUS.0; 22 FSR0L : byte absolute $0004; 23 FSR0H : byte absolute $0005; 24 FSR1L : byte absolute $0006; 25 FSR1H : byte absolute $0007; 26 BSR : byte absolute $0008; 27 BSR_BSR4 : bit absolute BSR.4; 28 BSR_BSR3 : bit absolute BSR.3; 29 BSR_BSR2 : bit absolute BSR.2; 30 BSR_BSR1 : bit absolute BSR.1; 31 BSR_BSR0 : bit absolute BSR.0; 32 WREG : byte absolute $0009; 33 PCLATH : byte absolute $000A; 34 PCLATH_PCLATH6 : bit absolute PCLATH.6; 35 PCLATH_PCLATH5 : bit absolute PCLATH.5; 36 PCLATH_PCLATH4 : bit absolute PCLATH.4; 37 PCLATH_PCLATH3 : bit absolute PCLATH.3; 38 PCLATH_PCLATH2 : bit absolute PCLATH.2; 39 PCLATH_PCLATH1 : bit absolute PCLATH.1; 40 PCLATH_PCLATH0 : bit absolute PCLATH.0; 41 INTCON : byte absolute $000B; 42 INTCON_GIE : bit absolute INTCON.7; 43 INTCON_PEIE : bit absolute INTCON.6; 44 INTCON_TMR0IE : bit absolute INTCON.5; 45 INTCON_INTE : bit absolute INTCON.4; 46 INTCON_IOCIE : bit absolute INTCON.3; 47 INTCON_TMR0IF : bit absolute INTCON.2; 48 INTCON_INTF : bit absolute INTCON.1; 49 INTCON_IOCIF : bit absolute INTCON.0; 50 PORTA : byte absolute $000C; 51 PORTA_RA5 : bit absolute PORTA.5; 52 PORTA_RA4 : bit absolute PORTA.4; 53 PORTA_RA3 : bit absolute PORTA.3; 54 PORTA_RA2 : bit absolute PORTA.2; 55 PORTA_RA1 : bit absolute PORTA.1; 56 PORTA_RA0 : bit absolute PORTA.0; 57 PORTC : byte absolute $000E; 58 PORTC_RC5 : bit absolute PORTC.5; 59 PORTC_RC4 : bit absolute PORTC.4; 60 PORTC_RC3 : bit absolute PORTC.3; 61 PORTC_RC2 : bit absolute PORTC.2; 62 PORTC_RC1 : bit absolute PORTC.1; 63 PORTC_RC0 : bit absolute PORTC.0; 64 PIR1 : byte absolute $0011; 65 PIR1_TMR1GIF : bit absolute PIR1.7; 66 PIR1_ADIF : bit absolute PIR1.6; 67 PIR1_RCIF : bit absolute PIR1.5; 68 PIR1_TXIF : bit absolute PIR1.4; 69 PIR1_SSP1IF : bit absolute PIR1.3; 70 PIR1_CCP1IF : bit absolute PIR1.2; 71 PIR1_TMR2IF : bit absolute PIR1.1; 72 PIR1_TMR1IF : bit absolute PIR1.0; 73 PIR2 : byte absolute $0012; 74 PIR2_OSFIF : bit absolute PIR2.7; 75 PIR2_C2IF : bit absolute PIR2.6; 76 PIR2_C1IF : bit absolute PIR2.5; 77 PIR2_BCL1IF : bit absolute PIR2.3; 78 PIR2_TMR6IF : bit absolute PIR2.2; 79 PIR2_TMR4IF : bit absolute PIR2.1; 80 PIR2_CCP2IF : bit absolute PIR2.0; 81 PIR3 : byte absolute $0013; 82 PIR3_COGIF : bit absolute PIR3.5; 83 PIR3_ZCDIF : bit absolute PIR3.4; 84 PIR3_CLC3IF : bit absolute PIR3.2; 85 PIR3_CLC2IF : bit absolute PIR3.1; 86 PIR3_CLC1IF : bit absolute PIR3.0; 87 TMR0 : byte absolute $0015; 88 TMR1L : byte absolute $0016; 89 TMR1H : byte absolute $0017; 90 T1CON : byte absolute $0018; 91 T1CON_TMR1CS1 : bit absolute T1CON.7; 92 T1CON_TMR1CS0 : bit absolute T1CON.6; 93 T1CON_T1CKPS1 : bit absolute T1CON.5; 94 T1CON_T1CKPS0 : bit absolute T1CON.4; 95 T1CON_T1OSCEN : bit absolute T1CON.3; 96 T1CON_nT1SYNC : bit absolute T1CON.2; 97 T1CON_TMR1ON : bit absolute T1CON.0; 98 T1GCON : byte absolute $0019; 99 T1GCON_TMR1GE : bit absolute T1GCON.7; 100 T1GCON_T1GPOL : bit absolute T1GCON.6; 101 T1GCON_T1GTM : bit absolute T1GCON.5; 102 T1GCON_T1GSPM : bit absolute T1GCON.4; 103 T1GCON_T1GGO_nDONE : bit absolute T1GCON.3; 104 T1GCON_T1GVAL : bit absolute T1GCON.2; 105 T1GCON_T1GSS1 : bit absolute T1GCON.1; 106 T1GCON_T1GSS0 : bit absolute T1GCON.0; 107 TMR2 : byte absolute $001A; 108 PR2 : byte absolute $001B; 109 T2CON : byte absolute $001C; 110 T2CON_T2OUTPS3 : bit absolute T2CON.6; 111 T2CON_T2OUTPS2 : bit absolute T2CON.5; 112 T2CON_T2OUTPS1 : bit absolute T2CON.4; 113 T2CON_T2OUTPS0 : bit absolute T2CON.3; 114 T2CON_TMR2ON : bit absolute T2CON.2; 115 T2CON_T2CKPS1 : bit absolute T2CON.1; 116 T2CON_T2CKPS0 : bit absolute T2CON.0; 117 TRISA : byte absolute $008C; 118 TRISA_TRISA5 : bit absolute TRISA.5; 119 TRISA_TRISA4 : bit absolute TRISA.4; 120 TRISA_TRISA2 : bit absolute TRISA.2; 121 TRISA_TRISA1 : bit absolute TRISA.1; 122 TRISA_TRISA0 : bit absolute TRISA.0; 123 TRISC : byte absolute $008E; 124 TRISC_TRISC5 : bit absolute TRISC.5; 125 TRISC_TRISC4 : bit absolute TRISC.4; 126 TRISC_TRISC3 : bit absolute TRISC.3; 127 TRISC_TRISC2 : bit absolute TRISC.2; 128 TRISC_TRISC1 : bit absolute TRISC.1; 129 TRISC_TRISC0 : bit absolute TRISC.0; 130 PIE1 : byte absolute $0091; 131 PIE1_TMR1GIE : bit absolute PIE1.7; 132 PIE1_ADIE : bit absolute PIE1.6; 133 PIE1_RCIE : bit absolute PIE1.5; 134 PIE1_TXIE : bit absolute PIE1.4; 135 PIE1_SSP1IE : bit absolute PIE1.3; 136 PIE1_CCP1IE : bit absolute PIE1.2; 137 PIE1_TMR2IE : bit absolute PIE1.1; 138 PIE1_TMR1IE : bit absolute PIE1.0; 139 PIE2 : byte absolute $0092; 140 PIE2_OSFIE : bit absolute PIE2.7; 141 PIE2_C2IE : bit absolute PIE2.6; 142 PIE2_C1IE : bit absolute PIE2.5; 143 PIE2_BCL1IE : bit absolute PIE2.3; 144 PIE2_TMR6IE : bit absolute PIE2.2; 145 PIE2_TMR4IE : bit absolute PIE2.1; 146 PIE2_CCP2IE : bit absolute PIE2.0; 147 PIE3 : byte absolute $0093; 148 PIE3_COGIE : bit absolute PIE3.5; 149 PIE3_ZCDIE : bit absolute PIE3.4; 150 PIE3_CLC3IE : bit absolute PIE3.2; 151 PIE3_CLC2IE : bit absolute PIE3.1; 152 PIE3_CLC1IE : bit absolute PIE3.0; 153 OPTION_REG : byte absolute $0095; 154 OPTION_REG_nWPUEN : bit absolute OPTION_REG.7; 155 OPTION_REG_INTEDG : bit absolute OPTION_REG.6; 156 OPTION_REG_TMR0CS : bit absolute OPTION_REG.5; 157 OPTION_REG_TMR0SE : bit absolute OPTION_REG.4; 158 OPTION_REG_PSA : bit absolute OPTION_REG.3; 159 OPTION_REG_PS2 : bit absolute OPTION_REG.2; 160 OPTION_REG_PS1 : bit absolute OPTION_REG.1; 161 OPTION_REG_PS0 : bit absolute OPTION_REG.0; 162 PCON : byte absolute $0096; 163 PCON_STKOVF : bit absolute PCON.7; 164 PCON_STKUNF : bit absolute PCON.6; 165 PCON_nRWDT : bit absolute PCON.4; 166 PCON_nRMCLR : bit absolute PCON.3; 167 PCON_nRI : bit absolute PCON.2; 168 PCON_nPOR : bit absolute PCON.1; 169 PCON_nBOR : bit absolute PCON.0; 170 WDTCON : byte absolute $0097; 171 WDTCON_WDTPS4 : bit absolute WDTCON.5; 172 WDTCON_WDTPS3 : bit absolute WDTCON.4; 173 WDTCON_WDTPS2 : bit absolute WDTCON.3; 174 WDTCON_WDTPS1 : bit absolute WDTCON.2; 175 WDTCON_WDTPS0 : bit absolute WDTCON.1; 176 WDTCON_SWDTEN : bit absolute WDTCON.0; 177 OSCTUNE : byte absolute $0098; 178 OSCTUNE_TUN5 : bit absolute OSCTUNE.5; 179 OSCTUNE_TUN4 : bit absolute OSCTUNE.4; 180 OSCTUNE_TUN3 : bit absolute OSCTUNE.3; 181 OSCTUNE_TUN2 : bit absolute OSCTUNE.2; 182 OSCTUNE_TUN1 : bit absolute OSCTUNE.1; 183 OSCTUNE_TUN0 : bit absolute OSCTUNE.0; 184 OSCCON : byte absolute $0099; 185 OSCCON_SPLLEN : bit absolute OSCCON.7; 186 OSCCON_IRCF3 : bit absolute OSCCON.6; 187 OSCCON_IRCF2 : bit absolute OSCCON.5; 188 OSCCON_IRCF1 : bit absolute OSCCON.4; 189 OSCCON_IRCF0 : bit absolute OSCCON.3; 190 OSCCON_SCS1 : bit absolute OSCCON.1; 191 OSCCON_SCS0 : bit absolute OSCCON.0; 192 OSCSTAT : byte absolute $009A; 193 OSCSTAT_SOSCR : bit absolute OSCSTAT.7; 194 OSCSTAT_PLLR : bit absolute OSCSTAT.6; 195 OSCSTAT_OSTS : bit absolute OSCSTAT.5; 196 OSCSTAT_HFIOFR : bit absolute OSCSTAT.4; 197 OSCSTAT_HFIOFL : bit absolute OSCSTAT.3; 198 OSCSTAT_MFIOFR : bit absolute OSCSTAT.2; 199 OSCSTAT_LFIOFR : bit absolute OSCSTAT.1; 200 OSCSTAT_HFIOFS : bit absolute OSCSTAT.0; 201 ADRESL : byte absolute $009B; 202 ADRESH : byte absolute $009C; 203 ADCON0 : byte absolute $009D; 204 ADCON0_CHS4 : bit absolute ADCON0.6; 205 ADCON0_CHS3 : bit absolute ADCON0.5; 206 ADCON0_CHS2 : bit absolute ADCON0.4; 207 ADCON0_CHS1 : bit absolute ADCON0.3; 208 ADCON0_CHS0 : bit absolute ADCON0.2; 209 ADCON0_GO_nDONE : bit absolute ADCON0.1; 210 ADCON0_ADON : bit absolute ADCON0.0; 211 ADCON1 : byte absolute $009E; 212 ADCON1_ADFM : bit absolute ADCON1.7; 213 ADCON1_ADCS2 : bit absolute ADCON1.6; 214 ADCON1_ADCS1 : bit absolute ADCON1.5; 215 ADCON1_ADCS0 : bit absolute ADCON1.4; 216 ADCON1_ADNREF : bit absolute ADCON1.2; 217 ADCON1_ADPREF1 : bit absolute ADCON1.1; 218 ADCON1_ADPREF0 : bit absolute ADCON1.0; 219 ADCON2 : byte absolute $009F; 220 ADCON2_TRIGSEL3 : bit absolute ADCON2.7; 221 ADCON2_TRIGSEL2 : bit absolute ADCON2.6; 222 ADCON2_TRIGSEL1 : bit absolute ADCON2.5; 223 ADCON2_TRIGSEL0 : bit absolute ADCON2.4; 224 LATA : byte absolute $010C; 225 LATA_LATA5 : bit absolute LATA.5; 226 LATA_LATA4 : bit absolute LATA.4; 227 LATA_LATA2 : bit absolute LATA.2; 228 LATA_LATA1 : bit absolute LATA.1; 229 LATA_LATA0 : bit absolute LATA.0; 230 LATC : byte absolute $010E; 231 LATC_LATC5 : bit absolute LATC.5; 232 LATC_LATC4 : bit absolute LATC.4; 233 LATC_LATC3 : bit absolute LATC.3; 234 LATC_LATC2 : bit absolute LATC.2; 235 LATC_LATC1 : bit absolute LATC.1; 236 LATC_LATC0 : bit absolute LATC.0; 237 CM1CON0 : byte absolute $0111; 238 CM1CON0_C1ON : bit absolute CM1CON0.7; 239 CM1CON0_C1OUT : bit absolute CM1CON0.6; 240 CM1CON0_C1POL : bit absolute CM1CON0.4; 241 CM1CON0_C1ZLF : bit absolute CM1CON0.3; 242 CM1CON0_C1SP : bit absolute CM1CON0.2; 243 CM1CON0_C1HYS : bit absolute CM1CON0.1; 244 CM1CON0_C1SYNC : bit absolute CM1CON0.0; 245 CM1CON1 : byte absolute $0112; 246 CM1CON1_C1INTP : bit absolute CM1CON1.7; 247 CM1CON1_C1INTN : bit absolute CM1CON1.6; 248 CM1CON1_C1PCH2 : bit absolute CM1CON1.5; 249 CM1CON1_C1PCH1 : bit absolute CM1CON1.4; 250 CM1CON1_C1PCH0 : bit absolute CM1CON1.3; 251 CM1CON1_C1NCH2 : bit absolute CM1CON1.2; 252 CM1CON1_C1NCH1 : bit absolute CM1CON1.1; 253 CM1CON1_C1NCH0 : bit absolute CM1CON1.0; 254 CM2CON0 : byte absolute $0113; 255 CM2CON0_C2ON : bit absolute CM2CON0.7; 256 CM2CON0_C2OUT : bit absolute CM2CON0.6; 257 CM2CON0_C2POL : bit absolute CM2CON0.4; 258 CM2CON0_C2ZLF : bit absolute CM2CON0.3; 259 CM2CON0_C2SP : bit absolute CM2CON0.2; 260 CM2CON0_C2HYS : bit absolute CM2CON0.1; 261 CM2CON0_C2SYNC : bit absolute CM2CON0.0; 262 CM2CON1 : byte absolute $0114; 263 CM2CON1_C2INTP : bit absolute CM2CON1.7; 264 CM2CON1_C2INTN : bit absolute CM2CON1.6; 265 CM2CON1_C2PCH2 : bit absolute CM2CON1.5; 266 CM2CON1_C2PCH1 : bit absolute CM2CON1.4; 267 CM2CON1_C2PCH0 : bit absolute CM2CON1.3; 268 CM2CON1_C2NCH2 : bit absolute CM2CON1.2; 269 CM2CON1_C2NCH1 : bit absolute CM2CON1.1; 270 CM2CON1_C2NCH0 : bit absolute CM2CON1.0; 271 CMOUT : byte absolute $0115; 272 CMOUT_MC2OUT : bit absolute CMOUT.1; 273 CMOUT_MC1OUT : bit absolute CMOUT.0; 274 BORCON : byte absolute $0116; 275 BORCON_SBOREN : bit absolute BORCON.7; 276 BORCON_BORFS : bit absolute BORCON.6; 277 BORCON_BORRDY : bit absolute BORCON.0; 278 FVRCON : byte absolute $0117; 279 FVRCON_FVREN : bit absolute FVRCON.7; 280 FVRCON_FVRRDY : bit absolute FVRCON.6; 281 FVRCON_TSEN : bit absolute FVRCON.5; 282 FVRCON_TSRNG : bit absolute FVRCON.4; 283 FVRCON_CDAFVR1 : bit absolute FVRCON.3; 284 FVRCON_CDAFVR0 : bit absolute FVRCON.2; 285 FVRCON_ADFVR1 : bit absolute FVRCON.1; 286 FVRCON_ADFVR0 : bit absolute FVRCON.0; 287 DAC1CON0 : byte absolute $0118; 288 DAC1CON0_DAC1EN : bit absolute DAC1CON0.7; 289 DAC1CON0_DAC1OE1 : bit absolute DAC1CON0.5; 290 DAC1CON0_DAC1OE2 : bit absolute DAC1CON0.4; 291 DAC1CON0_DAC1PSS1 : bit absolute DAC1CON0.3; 292 DAC1CON0_DAC1PSS0 : bit absolute DAC1CON0.2; 293 DAC1CON0_DAC1NSS : bit absolute DAC1CON0.0; 294 DAC1CON1 : byte absolute $0119; 295 ZCD1CON : byte absolute $011C; 296 ZCD1CON_ZCD1EN : bit absolute ZCD1CON.7; 297 ZCD1CON_ZCD1OUT : bit absolute ZCD1CON.5; 298 ZCD1CON_ZCD1POL : bit absolute ZCD1CON.4; 299 ZCD1CON_ZCD1INTP : bit absolute ZCD1CON.1; 300 ZCD1CON_ZCD1INTN : bit absolute ZCD1CON.0; 301 ANSELA : byte absolute $018C; 302 ANSELA_ANS5 : bit absolute ANSELA.5; 303 ANSELA_ANSA4 : bit absolute ANSELA.4; 304 ANSELA_ANSA2 : bit absolute ANSELA.2; 305 ANSELA_ANSA1 : bit absolute ANSELA.1; 306 ANSELA_ANSA0 : bit absolute ANSELA.0; 307 ANSELC : byte absolute $018E; 308 ANSELC_ANSC5 : bit absolute ANSELC.5; 309 ANSELC_ANSC4 : bit absolute ANSELC.4; 310 ANSELC_ANSC3 : bit absolute ANSELC.3; 311 ANSELC_ANSC2 : bit absolute ANSELC.2; 312 ANSELC_ANSC1 : bit absolute ANSELC.1; 313 ANSELC_ANSC0 : bit absolute ANSELC.0; 314 PMADRL : byte absolute $0191; 315 PMADRH : byte absolute $0192; 316 PMADRH_PMADRH6 : bit absolute PMADRH.6; 317 PMADRH_PMADRH5 : bit absolute PMADRH.5; 318 PMADRH_PMADRH4 : bit absolute PMADRH.4; 319 PMADRH_PMADRH3 : bit absolute PMADRH.3; 320 PMADRH_PMADRH2 : bit absolute PMADRH.2; 321 PMADRH_PMADRH1 : bit absolute PMADRH.1; 322 PMADRH_PMADRH0 : bit absolute PMADRH.0; 323 PMDATL : byte absolute $0193; 324 PMDATH : byte absolute $0194; 325 PMDATH_PMDATH5 : bit absolute PMDATH.5; 326 PMDATH_PMDATH4 : bit absolute PMDATH.4; 327 PMDATH_PMDATH3 : bit absolute PMDATH.3; 328 PMDATH_PMDATH2 : bit absolute PMDATH.2; 329 PMDATH_PMDATH1 : bit absolute PMDATH.1; 330 PMDATH_PMDATH0 : bit absolute PMDATH.0; 331 PMCON1 : byte absolute $0195; 332 PMCON1_CFGS : bit absolute PMCON1.6; 333 PMCON1_LWLO : bit absolute PMCON1.5; 334 PMCON1_FREE : bit absolute PMCON1.4; 335 PMCON1_WRERR : bit absolute PMCON1.3; 336 PMCON1_WREN : bit absolute PMCON1.2; 337 PMCON1_WR : bit absolute PMCON1.1; 338 PMCON1_RD : bit absolute PMCON1.0; 339 PMCON2 : byte absolute $0196; 340 VREGCON : byte absolute $0197; 341 VREGCON_VREGPM : bit absolute VREGCON.1; 342 VREGCON_Reserved : bit absolute VREGCON.0; 343 RC1REG : byte absolute $0199; 344 TX1REG : byte absolute $019A; 345 SP1BRGL : byte absolute $019B; 346 SP1BRGH : byte absolute $019C; 347 RC1STA : byte absolute $019D; 348 RC1STA_SPEN : bit absolute RC1STA.7; 349 RC1STA_RX9 : bit absolute RC1STA.6; 350 RC1STA_SREN : bit absolute RC1STA.5; 351 RC1STA_CREN : bit absolute RC1STA.4; 352 RC1STA_ADDEN : bit absolute RC1STA.3; 353 RC1STA_FERR : bit absolute RC1STA.2; 354 RC1STA_OERR : bit absolute RC1STA.1; 355 RC1STA_RX9D : bit absolute RC1STA.0; 356 TX1STA : byte absolute $019E; 357 TX1STA_CSRC : bit absolute TX1STA.7; 358 TX1STA_TX9 : bit absolute TX1STA.6; 359 TX1STA_TXEN : bit absolute TX1STA.5; 360 TX1STA_SYNC : bit absolute TX1STA.4; 361 TX1STA_SENDB : bit absolute TX1STA.3; 362 TX1STA_BRGH : bit absolute TX1STA.2; 363 TX1STA_TRMT : bit absolute TX1STA.1; 364 TX1STA_TX9D : bit absolute TX1STA.0; 365 BAUD1CON : byte absolute $019F; 366 BAUD1CON_ABDOVF : bit absolute BAUD1CON.7; 367 BAUD1CON_RCIDL : bit absolute BAUD1CON.6; 368 BAUD1CON_SCKP : bit absolute BAUD1CON.4; 369 BAUD1CON_BRG16 : bit absolute BAUD1CON.3; 370 BAUD1CON_WUE : bit absolute BAUD1CON.1; 371 BAUD1CON_ABDEN : bit absolute BAUD1CON.0; 372 WPUA : byte absolute $020C; 373 WPUA_WPUA5 : bit absolute WPUA.5; 374 WPUA_WPUA4 : bit absolute WPUA.4; 375 WPUA_WPUA3 : bit absolute WPUA.3; 376 WPUA_WPUA2 : bit absolute WPUA.2; 377 WPUA_WPUA1 : bit absolute WPUA.1; 378 WPUA_WPUA0 : bit absolute WPUA.0; 379 WPUC : byte absolute $020E; 380 WPUC_WPUC5 : bit absolute WPUC.5; 381 WPUC_WPUC4 : bit absolute WPUC.4; 382 WPUC_WPUC3 : bit absolute WPUC.3; 383 WPUC_WPUC2 : bit absolute WPUC.2; 384 WPUC_WPUC1 : bit absolute WPUC.1; 385 WPUC_WPUC0 : bit absolute WPUC.0; 386 SSP1BUF : byte absolute $0211; 387 SSP1BUF_SSP1BUF7 : bit absolute SSP1BUF.7; 388 SSP1BUF_SSP1BUF6 : bit absolute SSP1BUF.6; 389 SSP1BUF_SSP1BUF5 : bit absolute SSP1BUF.5; 390 SSP1BUF_SSP1BUF4 : bit absolute SSP1BUF.4; 391 SSP1BUF_SSP1BUF3 : bit absolute SSP1BUF.3; 392 SSP1BUF_SSP1BUF2 : bit absolute SSP1BUF.2; 393 SSP1BUF_SSP1BUF1 : bit absolute SSP1BUF.1; 394 SSP1BUF_SSP1BUF0 : bit absolute SSP1BUF.0; 395 SSP1ADD : byte absolute $0212; 396 SSP1ADD_SSP1ADD7 : bit absolute SSP1ADD.7; 397 SSP1ADD_SSP1ADD6 : bit absolute SSP1ADD.6; 398 SSP1ADD_SSP1ADD5 : bit absolute SSP1ADD.5; 399 SSP1ADD_SSP1ADD4 : bit absolute SSP1ADD.4; 400 SSP1ADD_SSP1ADD3 : bit absolute SSP1ADD.3; 401 SSP1ADD_SSP1ADD2 : bit absolute SSP1ADD.2; 402 SSP1ADD_SSP1ADD1 : bit absolute SSP1ADD.1; 403 SSP1ADD_SSP1ADD0 : bit absolute SSP1ADD.0; 404 SSP1MSK : byte absolute $0213; 405 SSP1MSK_SSP1MSK7 : bit absolute SSP1MSK.7; 406 SSP1MSK_SSP1MSK6 : bit absolute SSP1MSK.6; 407 SSP1MSK_SSP1MSK5 : bit absolute SSP1MSK.5; 408 SSP1MSK_SSP1MSK4 : bit absolute SSP1MSK.4; 409 SSP1MSK_SSP1MSK3 : bit absolute SSP1MSK.3; 410 SSP1MSK_SSP1MSK2 : bit absolute SSP1MSK.2; 411 SSP1MSK_SSP1MSK1 : bit absolute SSP1MSK.1; 412 SSP1MSK_SSP1MSK0 : bit absolute SSP1MSK.0; 413 SSP1STAT : byte absolute $0214; 414 SSP1STAT_SMP : bit absolute SSP1STAT.7; 415 SSP1STAT_CKE : bit absolute SSP1STAT.6; 416 SSP1STAT_D_nA : bit absolute SSP1STAT.5; 417 SSP1STAT_P : bit absolute SSP1STAT.4; 418 SSP1STAT_S : bit absolute SSP1STAT.3; 419 SSP1STAT_R_nW : bit absolute SSP1STAT.2; 420 SSP1STAT_UA : bit absolute SSP1STAT.1; 421 SSP1STAT_BF : bit absolute SSP1STAT.0; 422 SSP1CON1 : byte absolute $0215; 423 SSP1CON1_WCOL : bit absolute SSP1CON1.7; 424 SSP1CON1_SSPOV : bit absolute SSP1CON1.6; 425 SSP1CON1_SSPEN : bit absolute SSP1CON1.5; 426 SSP1CON1_CKP : bit absolute SSP1CON1.4; 427 SSP1CON1_SSPM3 : bit absolute SSP1CON1.3; 428 SSP1CON1_SSPM2 : bit absolute SSP1CON1.2; 429 SSP1CON1_SSPM1 : bit absolute SSP1CON1.1; 430 SSP1CON1_SSPM0 : bit absolute SSP1CON1.0; 431 SSP1CON2 : byte absolute $0216; 432 SSP1CON2_GCEN : bit absolute SSP1CON2.7; 433 SSP1CON2_ACKSTAT : bit absolute SSP1CON2.6; 434 SSP1CON2_ACKDT : bit absolute SSP1CON2.5; 435 SSP1CON2_ACKEN : bit absolute SSP1CON2.4; 436 SSP1CON2_RCEN : bit absolute SSP1CON2.3; 437 SSP1CON2_PEN : bit absolute SSP1CON2.2; 438 SSP1CON2_RSEN : bit absolute SSP1CON2.1; 439 SSP1CON2_SEN : bit absolute SSP1CON2.0; 440 SSP1CON3 : byte absolute $0217; 441 SSP1CON3_ACKTIM : bit absolute SSP1CON3.7; 442 SSP1CON3_PCIE : bit absolute SSP1CON3.6; 443 SSP1CON3_SCIE : bit absolute SSP1CON3.5; 444 SSP1CON3_BOEN : bit absolute SSP1CON3.4; 445 SSP1CON3_SDAHT : bit absolute SSP1CON3.3; 446 SSP1CON3_SBCDE : bit absolute SSP1CON3.2; 447 SSP1CON3_AHEN : bit absolute SSP1CON3.1; 448 SSP1CON3_DHEN : bit absolute SSP1CON3.0; 449 ODCONA : byte absolute $028C; 450 ODCONA_ODA5 : bit absolute ODCONA.5; 451 ODCONA_ODA4 : bit absolute ODCONA.4; 452 ODCONA_ODA2 : bit absolute ODCONA.2; 453 ODCONA_ODA1 : bit absolute ODCONA.1; 454 ODCONA_ODA0 : bit absolute ODCONA.0; 455 ODCONC : byte absolute $028E; 456 ODCONC_ODC5 : bit absolute ODCONC.5; 457 ODCONC_ODC4 : bit absolute ODCONC.4; 458 ODCONC_ODC3 : bit absolute ODCONC.3; 459 ODCONC_ODC2 : bit absolute ODCONC.2; 460 ODCONC_ODC1 : bit absolute ODCONC.1; 461 ODCONC_ODC0 : bit absolute ODCONC.0; 462 CCPR1L : byte absolute $0291; 463 CCPR1H : byte absolute $0292; 464 CCP1CON : byte absolute $0293; 465 CCP1CON_DC1B1 : bit absolute CCP1CON.5; 466 CCP1CON_DC1B0 : bit absolute CCP1CON.4; 467 CCP1CON_CCP1M3 : bit absolute CCP1CON.3; 468 CCP1CON_CCP1M2 : bit absolute CCP1CON.2; 469 CCP1CON_CCP1M1 : bit absolute CCP1CON.1; 470 CCP1CON_CCP1M0 : bit absolute CCP1CON.0; 471 CCPR2L : byte absolute $0298; 472 CCPR2H : byte absolute $0299; 473 CCP2CON : byte absolute $029A; 474 CCP2CON_DC2B1 : bit absolute CCP2CON.5; 475 CCP2CON_DC2B0 : bit absolute CCP2CON.4; 476 CCP2CON_CCP2M3 : bit absolute CCP2CON.3; 477 CCP2CON_CCP2M2 : bit absolute CCP2CON.2; 478 CCP2CON_CCP2M1 : bit absolute CCP2CON.1; 479 CCP2CON_CCP2M0 : bit absolute CCP2CON.0; 480 CCPTMRS : byte absolute $029E; 481 CCPTMRS_P4TSEL1 : bit absolute CCPTMRS.7; 482 CCPTMRS_P4TSEL0 : bit absolute CCPTMRS.6; 483 CCPTMRS_P3TSEL1 : bit absolute CCPTMRS.5; 484 CCPTMRS_P3TSEL0 : bit absolute CCPTMRS.4; 485 CCPTMRS_C2TSEL1 : bit absolute CCPTMRS.3; 486 CCPTMRS_C2TSEL0 : bit absolute CCPTMRS.2; 487 CCPTMRS_C1TSEL1 : bit absolute CCPTMRS.1; 488 CCPTMRS_C1TSEL0 : bit absolute CCPTMRS.0; 489 SLRCONA : byte absolute $030C; 490 SLRCONA_SLRA5 : bit absolute SLRCONA.5; 491 SLRCONA_SLRA4 : bit absolute SLRCONA.4; 492 SLRCONA_SLRA2 : bit absolute SLRCONA.2; 493 SLRCONA_SLRA1 : bit absolute SLRCONA.1; 494 SLRCONA_SLRA0 : bit absolute SLRCONA.0; 495 SLRCONC : byte absolute $030E; 496 SLRCONC_SLRC5 : bit absolute SLRCONC.5; 497 SLRCONC_SLRC4 : bit absolute SLRCONC.4; 498 SLRCONC_SLRC3 : bit absolute SLRCONC.3; 499 SLRCONC_SLRC2 : bit absolute SLRCONC.2; 500 SLRCONC_SLRC1 : bit absolute SLRCONC.1; 501 SLRCONC_SLRC0 : bit absolute SLRCONC.0; 502 INLVLA : byte absolute $038C; 503 INLVLA_INLVLA5 : bit absolute INLVLA.5; 504 INLVLA_INLVLA4 : bit absolute INLVLA.4; 505 INLVLA_INLVLA3 : bit absolute INLVLA.3; 506 INLVLA_INLVLA2 : bit absolute INLVLA.2; 507 INLVLA_INLVLA1 : bit absolute INLVLA.1; 508 INLVLA_INLVLA0 : bit absolute INLVLA.0; 509 INLVLC : byte absolute $038E; 510 INLVLC_INLVLC5 : bit absolute INLVLC.5; 511 INLVLC_INLVLC4 : bit absolute INLVLC.4; 512 INLVLC_INLVLC3 : bit absolute INLVLC.3; 513 INLVLC_INLVLC2 : bit absolute INLVLC.2; 514 INLVLC_INLVLC1 : bit absolute INLVLC.1; 515 INLVLC_INLVLC0 : bit absolute INLVLC.0; 516 IOCAP : byte absolute $0391; 517 IOCAP_IOCAP5 : bit absolute IOCAP.5; 518 IOCAP_IOCAP4 : bit absolute IOCAP.4; 519 IOCAP_IOCAP3 : bit absolute IOCAP.3; 520 IOCAP_IOCAP2 : bit absolute IOCAP.2; 521 IOCAP_IOCAP1 : bit absolute IOCAP.1; 522 IOCAP_IOCAP0 : bit absolute IOCAP.0; 523 IOCAN : byte absolute $0392; 524 IOCAN_IOCAN5 : bit absolute IOCAN.5; 525 IOCAN_IOCAN4 : bit absolute IOCAN.4; 526 IOCAN_IOCAN3 : bit absolute IOCAN.3; 527 IOCAN_IOCAN2 : bit absolute IOCAN.2; 528 IOCAN_IOCAN1 : bit absolute IOCAN.1; 529 IOCAN_IOCAN0 : bit absolute IOCAN.0; 530 IOCAF : byte absolute $0393; 531 IOCAF_IOCAF5 : bit absolute IOCAF.5; 532 IOCAF_IOCAF4 : bit absolute IOCAF.4; 533 IOCAF_IOCAF3 : bit absolute IOCAF.3; 534 IOCAF_IOCAF2 : bit absolute IOCAF.2; 535 IOCAF_IOCAF1 : bit absolute IOCAF.1; 536 IOCAF_IOCAF0 : bit absolute IOCAF.0; 537 IOCCP : byte absolute $0397; 538 IOCCP_IOCCP5 : bit absolute IOCCP.5; 539 IOCCP_IOCCP4 : bit absolute IOCCP.4; 540 IOCCP_IOCCP3 : bit absolute IOCCP.3; 541 IOCCP_IOCCP2 : bit absolute IOCCP.2; 542 IOCCP_IOCCP1 : bit absolute IOCCP.1; 543 IOCCP_IOCCP0 : bit absolute IOCCP.0; 544 IOCCN : byte absolute $0398; 545 IOCCN_IOCCN5 : bit absolute IOCCN.5; 546 IOCCN_IOCCN4 : bit absolute IOCCN.4; 547 IOCCN_IOCCN3 : bit absolute IOCCN.3; 548 IOCCN_IOCCN2 : bit absolute IOCCN.2; 549 IOCCN_IOCCN1 : bit absolute IOCCN.1; 550 IOCCN_IOCCN0 : bit absolute IOCCN.0; 551 IOCCF : byte absolute $0399; 552 IOCCF_IOCCF5 : bit absolute IOCCF.5; 553 IOCCF_IOCCF4 : bit absolute IOCCF.4; 554 IOCCF_IOCCF3 : bit absolute IOCCF.3; 555 IOCCF_IOCCF2 : bit absolute IOCCF.2; 556 IOCCF_IOCCF1 : bit absolute IOCCF.1; 557 IOCCF_IOCCF0 : bit absolute IOCCF.0; 558 TMR4 : byte absolute $0415; 559 PR4 : byte absolute $0416; 560 T4CON : byte absolute $0417; 561 T4CON_T4OUTPS3 : bit absolute T4CON.6; 562 T4CON_T4OUTPS2 : bit absolute T4CON.5; 563 T4CON_T4OUTPS1 : bit absolute T4CON.4; 564 T4CON_T4OUTPS0 : bit absolute T4CON.3; 565 T4CON_TMR4ON : bit absolute T4CON.2; 566 T4CON_T4CKPS1 : bit absolute T4CON.1; 567 T4CON_T4CKPS0 : bit absolute T4CON.0; 568 TMR6 : byte absolute $041C; 569 PR6 : byte absolute $041D; 570 T6CON : byte absolute $041E; 571 T6CON_T6OUTPS3 : bit absolute T6CON.6; 572 T6CON_T6OUTPS2 : bit absolute T6CON.5; 573 T6CON_T6OUTPS1 : bit absolute T6CON.4; 574 T6CON_T6OUTPS0 : bit absolute T6CON.3; 575 T6CON_TMR6ON : bit absolute T6CON.2; 576 T6CON_T6CKPS1 : bit absolute T6CON.1; 577 T6CON_T6CKPS0 : bit absolute T6CON.0; 578 OPA1CON : byte absolute $0511; 579 OPA1CON_OPA1EN : bit absolute OPA1CON.7; 580 OPA1CON_OPA1SP : bit absolute OPA1CON.6; 581 OPA1CON_OPA1UG : bit absolute OPA1CON.4; 582 OPA1CON_OPA1PCH1 : bit absolute OPA1CON.1; 583 OPA1CON_OPA1PCH0 : bit absolute OPA1CON.0; 584 OPA2CON : byte absolute $0515; 585 OPA2CON_OPA2EN : bit absolute OPA2CON.7; 586 OPA2CON_OPA2SP : bit absolute OPA2CON.6; 587 OPA2CON_OPA2UG : bit absolute OPA2CON.4; 588 OPA2CON_OPA2PCH1 : bit absolute OPA2CON.1; 589 OPA2CON_OPA2PCH0 : bit absolute OPA2CON.0; 590 PWM3DCL : byte absolute $0617; 591 PWM3DCL_PWM3DCL1 : bit absolute PWM3DCL.7; 592 PWM3DCL_PWM3DCL0 : bit absolute PWM3DCL.6; 593 PWM3DCH : byte absolute $0618; 594 PWM3CON : byte absolute $0619; 595 PWM3CON_PWM3EN : bit absolute PWM3CON.7; 596 PWM3CON_PWM3OUT : bit absolute PWM3CON.5; 597 PWM3CON_PWM3POL : bit absolute PWM3CON.4; 598 PWM4DCL : byte absolute $061A; 599 PWM4DCL_PWM4DCL1 : bit absolute PWM4DCL.7; 600 PWM4DCL_PWM4DCL0 : bit absolute PWM4DCL.6; 601 PWM4DCH : byte absolute $061B; 602 PWM4CON : byte absolute $061C; 603 PWM4CON_PWM4EN : bit absolute PWM4CON.7; 604 PWM4CON_PWM4OUT : bit absolute PWM4CON.5; 605 PWM4CON_PWM4POL : bit absolute PWM4CON.4; 606 COG1PHR : byte absolute $0691; 607 COG1PHR_G1PHR5 : bit absolute COG1PHR.5; 608 COG1PHR_G1PHR4 : bit absolute COG1PHR.4; 609 COG1PHR_G1PHR3 : bit absolute COG1PHR.3; 610 COG1PHR_G1PHR2 : bit absolute COG1PHR.2; 611 COG1PHR_G1PHR1 : bit absolute COG1PHR.1; 612 COG1PHR_G1PHR0 : bit absolute COG1PHR.0; 613 COG1PHF : byte absolute $0692; 614 COG1PHF_G1PHF5 : bit absolute COG1PHF.5; 615 COG1PHF_G1PHF4 : bit absolute COG1PHF.4; 616 COG1PHF_G1PHF3 : bit absolute COG1PHF.3; 617 COG1PHF_G1PHF2 : bit absolute COG1PHF.2; 618 COG1PHF_G1PHF1 : bit absolute COG1PHF.1; 619 COG1PHF_G1PHF0 : bit absolute COG1PHF.0; 620 COG1BLKR : byte absolute $0693; 621 COG1BLKR_G1BLKR5 : bit absolute COG1BLKR.5; 622 COG1BLKR_G1BLKR4 : bit absolute COG1BLKR.4; 623 COG1BLKR_G1BLKR3 : bit absolute COG1BLKR.3; 624 COG1BLKR_G1BLKR2 : bit absolute COG1BLKR.2; 625 COG1BLKR_G1BLKR1 : bit absolute COG1BLKR.1; 626 COG1BLKR_G1BLKR0 : bit absolute COG1BLKR.0; 627 COG1BLKF : byte absolute $0694; 628 COG1BLKF_G1BLKF5 : bit absolute COG1BLKF.5; 629 COG1BLKF_G1BLKF4 : bit absolute COG1BLKF.4; 630 COG1BLKF_G1BLKF3 : bit absolute COG1BLKF.3; 631 COG1BLKF_G1BLKF2 : bit absolute COG1BLKF.2; 632 COG1BLKF_G1BLKF1 : bit absolute COG1BLKF.1; 633 COG1BLKF_G1BLKF0 : bit absolute COG1BLKF.0; 634 COG1DBR : byte absolute $0695; 635 COG1DBR_G1DBR5 : bit absolute COG1DBR.5; 636 COG1DBR_G1DBR4 : bit absolute COG1DBR.4; 637 COG1DBR_G1DBR3 : bit absolute COG1DBR.3; 638 COG1DBR_G1DBR2 : bit absolute COG1DBR.2; 639 COG1DBR_G1DBR1 : bit absolute COG1DBR.1; 640 COG1DBR_G1DBR0 : bit absolute COG1DBR.0; 641 COG1DBF : byte absolute $0696; 642 COG1DBF_G1DBF5 : bit absolute COG1DBF.5; 643 COG1DBF_G1DBF4 : bit absolute COG1DBF.4; 644 COG1DBF_G1DBF3 : bit absolute COG1DBF.3; 645 COG1DBF_G1DBF2 : bit absolute COG1DBF.2; 646 COG1DBF_G1DBF1 : bit absolute COG1DBF.1; 647 COG1DBF_G1DBF0 : bit absolute COG1DBF.0; 648 COG1CON0 : byte absolute $0697; 649 COG1CON0_G1EN : bit absolute COG1CON0.7; 650 COG1CON0_G1LD : bit absolute COG1CON0.6; 651 COG1CON0_G1CS1 : bit absolute COG1CON0.4; 652 COG1CON0_G1CS0 : bit absolute COG1CON0.3; 653 COG1CON0_G1MD2 : bit absolute COG1CON0.2; 654 COG1CON0_G1MD1 : bit absolute COG1CON0.1; 655 COG1CON0_G1MD0 : bit absolute COG1CON0.0; 656 COG1CON1 : byte absolute $0698; 657 COG1CON1_G1RDBS : bit absolute COG1CON1.7; 658 COG1CON1_G1FDBS : bit absolute COG1CON1.6; 659 COG1CON1_G1POLD : bit absolute COG1CON1.3; 660 COG1CON1_G1POLC : bit absolute COG1CON1.2; 661 COG1CON1_G1POLB : bit absolute COG1CON1.1; 662 COG1CON1_G1POLA : bit absolute COG1CON1.0; 663 COG1RIS : byte absolute $0699; 664 COG1RIS_G1RIS6 : bit absolute COG1RIS.6; 665 COG1RIS_G1RIS5 : bit absolute COG1RIS.5; 666 COG1RIS_G1RIS4 : bit absolute COG1RIS.4; 667 COG1RIS_G1RIS3 : bit absolute COG1RIS.3; 668 COG1RIS_G1RIS2 : bit absolute COG1RIS.2; 669 COG1RIS_G1RIS1 : bit absolute COG1RIS.1; 670 COG1RIS_G1RIS0 : bit absolute COG1RIS.0; 671 COG1RSIM : byte absolute $069A; 672 COG1RSIM_G1RSIM6 : bit absolute COG1RSIM.6; 673 COG1RSIM_G1RSIM5 : bit absolute COG1RSIM.5; 674 COG1RSIM_G1RSIM4 : bit absolute COG1RSIM.4; 675 COG1RSIM_G1RSIM3 : bit absolute COG1RSIM.3; 676 COG1RSIM_G1RSIM2 : bit absolute COG1RSIM.2; 677 COG1RSIM_G1RSIM1 : bit absolute COG1RSIM.1; 678 COG1RSIM_G1RSIM0 : bit absolute COG1RSIM.0; 679 COG1FIS : byte absolute $069B; 680 COG1FIS_G1FIS6 : bit absolute COG1FIS.6; 681 COG1FIS_G1FIS5 : bit absolute COG1FIS.5; 682 COG1FIS_G1FIS4 : bit absolute COG1FIS.4; 683 COG1FIS_G1FIS3 : bit absolute COG1FIS.3; 684 COG1FIS_G1FIS2 : bit absolute COG1FIS.2; 685 COG1FIS_G1FIS1 : bit absolute COG1FIS.1; 686 COG1FIS_G1FIS0 : bit absolute COG1FIS.0; 687 COG1FSIM : byte absolute $069C; 688 COG1FSIM_G1FSIM6 : bit absolute COG1FSIM.6; 689 COG1FSIM_G1FSIM5 : bit absolute COG1FSIM.5; 690 COG1FSIM_G1FSIM4 : bit absolute COG1FSIM.4; 691 COG1FSIM_G1FSIM3 : bit absolute COG1FSIM.3; 692 COG1FSIM_G1FSIM2 : bit absolute COG1FSIM.2; 693 COG1FSIM_G1FSIM1 : bit absolute COG1FSIM.1; 694 COG1FSIM_G1FSIM0 : bit absolute COG1FSIM.0; 695 COG1ASD0 : byte absolute $069D; 696 COG1ASD0_G1ASE : bit absolute COG1ASD0.7; 697 COG1ASD0_G1ARSEN : bit absolute COG1ASD0.6; 698 COG1ASD0_G1ASDBD1 : bit absolute COG1ASD0.5; 699 COG1ASD0_G1ASDBD0 : bit absolute COG1ASD0.4; 700 COG1ASD0_G1ASDAC1 : bit absolute COG1ASD0.3; 701 COG1ASD0_G1ASDAC0 : bit absolute COG1ASD0.2; 702 COG1ASD1 : byte absolute $069E; 703 COG1ASD1_G1AS3E : bit absolute COG1ASD1.3; 704 COG1ASD1_G1AS2E : bit absolute COG1ASD1.2; 705 COG1ASD1_G1AS1E : bit absolute COG1ASD1.1; 706 COG1ASD1_G1AS0E : bit absolute COG1ASD1.0; 707 COG1STR : byte absolute $069F; 708 COG1STR_G1SDATD : bit absolute COG1STR.7; 709 COG1STR_G1SDATC : bit absolute COG1STR.6; 710 COG1STR_G1SDATB : bit absolute COG1STR.5; 711 COG1STR_G1SDATA : bit absolute COG1STR.4; 712 COG1STR_G1STRD : bit absolute COG1STR.3; 713 COG1STR_G1STRC : bit absolute COG1STR.2; 714 COG1STR_G1STRB : bit absolute COG1STR.1; 715 COG1STR_G1STRA : bit absolute COG1STR.0; 716 PPSLOCK : byte absolute $0E0F; 717 PPSLOCK_PPSLOCKED : bit absolute PPSLOCK.0; 718 INTPPS : byte absolute $0E10; 719 INTPPS_INTPPS4 : bit absolute INTPPS.4; 720 INTPPS_INTPPS3 : bit absolute INTPPS.3; 721 INTPPS_INTPPS2 : bit absolute INTPPS.2; 722 INTPPS_INTPPS1 : bit absolute INTPPS.1; 723 INTPPS_INTPPS0 : bit absolute INTPPS.0; 724 T0CKIPPS : byte absolute $0E11; 725 T0CKIPPS_T0CKIPPS4 : bit absolute T0CKIPPS.4; 726 T0CKIPPS_T0CKIPPS3 : bit absolute T0CKIPPS.3; 727 T0CKIPPS_T0CKIPPS2 : bit absolute T0CKIPPS.2; 728 T0CKIPPS_T0CKIPPS1 : bit absolute T0CKIPPS.1; 729 T0CKIPPS_T0CKIPPS0 : bit absolute T0CKIPPS.0; 730 T1CKIPPS : byte absolute $0E12; 731 T1CKIPPS_T1CKIPPS4 : bit absolute T1CKIPPS.4; 732 T1CKIPPS_T1CKIPPS3 : bit absolute T1CKIPPS.3; 733 T1CKIPPS_T1CKIPPS2 : bit absolute T1CKIPPS.2; 734 T1CKIPPS_T1CKIPPS1 : bit absolute T1CKIPPS.1; 735 T1CKIPPS_T1CKIPPS0 : bit absolute T1CKIPPS.0; 736 T1GPPS : byte absolute $0E13; 737 T1GPPS_T1GPPS4 : bit absolute T1GPPS.4; 738 T1GPPS_T1GPPS3 : bit absolute T1GPPS.3; 739 T1GPPS_T1GPPS2 : bit absolute T1GPPS.2; 740 T1GPPS_T1GPPS1 : bit absolute T1GPPS.1; 741 T1GPPS_T1GPPS0 : bit absolute T1GPPS.0; 742 CCP1PPS : byte absolute $0E14; 743 CCP1PPS_CCP1PPS4 : bit absolute CCP1PPS.4; 744 CCP1PPS_CCP1PPS3 : bit absolute CCP1PPS.3; 745 CCP1PPS_CCP1PPS2 : bit absolute CCP1PPS.2; 746 CCP1PPS_CCP1PPS1 : bit absolute CCP1PPS.1; 747 CCP1PPS_CCP1PPS0 : bit absolute CCP1PPS.0; 748 CCP2PPS : byte absolute $0E15; 749 CCP2PPS_CCP2PPS4 : bit absolute CCP2PPS.4; 750 CCP2PPS_CCP2PPS3 : bit absolute CCP2PPS.3; 751 CCP2PPS_CCP2PPS2 : bit absolute CCP2PPS.2; 752 CCP2PPS_CCP2PPS1 : bit absolute CCP2PPS.1; 753 CCP2PPS_CCP2PPS0 : bit absolute CCP2PPS.0; 754 COGINPPS : byte absolute $0E17; 755 COGINPPS_COGINPPS4 : bit absolute COGINPPS.4; 756 COGINPPS_COGINPPS3 : bit absolute COGINPPS.3; 757 COGINPPS_COGINPPS2 : bit absolute COGINPPS.2; 758 COGINPPS_COGINPPS1 : bit absolute COGINPPS.1; 759 COGINPPS_COGINPPS0 : bit absolute COGINPPS.0; 760 SSPCLKPPS : byte absolute $0E20; 761 SSPCLKPPS_SSPCLKPPS4 : bit absolute SSPCLKPPS.4; 762 SSPCLKPPS_SSPCLKPPS3 : bit absolute SSPCLKPPS.3; 763 SSPCLKPPS_SSPCLKPPS2 : bit absolute SSPCLKPPS.2; 764 SSPCLKPPS_SSPCLKPPS1 : bit absolute SSPCLKPPS.1; 765 SSPCLKPPS_SSPCLKPPS0 : bit absolute SSPCLKPPS.0; 766 SSPDATPPS : byte absolute $0E21; 767 SSPDATPPS_SSPDATPPS4 : bit absolute SSPDATPPS.4; 768 SSPDATPPS_SSPDATPPS3 : bit absolute SSPDATPPS.3; 769 SSPDATPPS_SSPDATPPS2 : bit absolute SSPDATPPS.2; 770 SSPDATPPS_SSPDATPPS1 : bit absolute SSPDATPPS.1; 771 SSPDATPPS_SSPDATPPS0 : bit absolute SSPDATPPS.0; 772 SSPSSPPS : byte absolute $0E22; 773 SSPSSPPS_SSPSSPPS4 : bit absolute SSPSSPPS.4; 774 SSPSSPPS_SSPSSPPS3 : bit absolute SSPSSPPS.3; 775 SSPSSPPS_SSPSSPPS2 : bit absolute SSPSSPPS.2; 776 SSPSSPPS_SSPSSPPS1 : bit absolute SSPSSPPS.1; 777 SSPSSPPS_SSPSSPPS0 : bit absolute SSPSSPPS.0; 778 RXPPS : byte absolute $0E24; 779 RXPPS_RXPPS4 : bit absolute RXPPS.4; 780 RXPPS_RXPPS3 : bit absolute RXPPS.3; 781 RXPPS_RXPPS2 : bit absolute RXPPS.2; 782 RXPPS_RXPPS1 : bit absolute RXPPS.1; 783 RXPPS_RXPPS0 : bit absolute RXPPS.0; 784 CKPPS : byte absolute $0E25; 785 CKPPS_CKPPS4 : bit absolute CKPPS.4; 786 CKPPS_CKPPS3 : bit absolute CKPPS.3; 787 CKPPS_CKPPS2 : bit absolute CKPPS.2; 788 CKPPS_CKPPS1 : bit absolute CKPPS.1; 789 CKPPS_CKPPS0 : bit absolute CKPPS.0; 790 CLCIN0PPS : byte absolute $0E28; 791 CLCIN0PPS_CLCIN0PPS4 : bit absolute CLCIN0PPS.4; 792 CLCIN0PPS_CLCIN0PPS3 : bit absolute CLCIN0PPS.3; 793 CLCIN0PPS_CLCIN0PPS2 : bit absolute CLCIN0PPS.2; 794 CLCIN0PPS_CLCIN0PPS1 : bit absolute CLCIN0PPS.1; 795 CLCIN0PPS_CLCIN0PPS0 : bit absolute CLCIN0PPS.0; 796 CLCIN1PPS : byte absolute $0E29; 797 CLCIN1PPS_CLCIN1PPS4 : bit absolute CLCIN1PPS.4; 798 CLCIN1PPS_CLCIN1PPS3 : bit absolute CLCIN1PPS.3; 799 CLCIN1PPS_CLCIN1PPS2 : bit absolute CLCIN1PPS.2; 800 CLCIN1PPS_CLCIN1PPS1 : bit absolute CLCIN1PPS.1; 801 CLCIN1PPS_CLCIN1PPS0 : bit absolute CLCIN1PPS.0; 802 CLCIN2PPS : byte absolute $0E2A; 803 CLCIN2PPS_CLCIN2PPS4 : bit absolute CLCIN2PPS.4; 804 CLCIN2PPS_CLCIN2PPS3 : bit absolute CLCIN2PPS.3; 805 CLCIN2PPS_CLCIN2PPS2 : bit absolute CLCIN2PPS.2; 806 CLCIN2PPS_CLCIN2PPS1 : bit absolute CLCIN2PPS.1; 807 CLCIN2PPS_CLCIN2PPS0 : bit absolute CLCIN2PPS.0; 808 CLCIN3PPS : byte absolute $0E2B; 809 CLCIN3PPS_CLCIN3PPS4 : bit absolute CLCIN3PPS.4; 810 CLCIN3PPS_CLCIN3PPS3 : bit absolute CLCIN3PPS.3; 811 CLCIN3PPS_CLCIN3PPS2 : bit absolute CLCIN3PPS.2; 812 CLCIN3PPS_CLCIN3PPS1 : bit absolute CLCIN3PPS.1; 813 CLCIN3PPS_CLCIN3PPS0 : bit absolute CLCIN3PPS.0; 814 RA0PPS : byte absolute $0E90; 815 RA0PPS_RA0PPS4 : bit absolute RA0PPS.4; 816 RA0PPS_RA0PPS3 : bit absolute RA0PPS.3; 817 RA0PPS_RA0PPS2 : bit absolute RA0PPS.2; 818 RA0PPS_RA0PPS1 : bit absolute RA0PPS.1; 819 RA0PPS_RA0PPS0 : bit absolute RA0PPS.0; 820 RA1PPS : byte absolute $0E91; 821 RA1PPS_RA1PPS4 : bit absolute RA1PPS.4; 822 RA1PPS_RA1PPS3 : bit absolute RA1PPS.3; 823 RA1PPS_RA1PPS2 : bit absolute RA1PPS.2; 824 RA1PPS_RA1PPS1 : bit absolute RA1PPS.1; 825 RA1PPS_RA1PPS0 : bit absolute RA1PPS.0; 826 RA2PPS : byte absolute $0E92; 827 RA2PPS_RA2PPS4 : bit absolute RA2PPS.4; 828 RA2PPS_RA2PPS3 : bit absolute RA2PPS.3; 829 RA2PPS_RA2PPS2 : bit absolute RA2PPS.2; 830 RA2PPS_RA2PPS1 : bit absolute RA2PPS.1; 831 RA2PPS_RA2PPS0 : bit absolute RA2PPS.0; 832 RA4PPS : byte absolute $0E94; 833 RA4PPS_RA4PPS4 : bit absolute RA4PPS.4; 834 RA4PPS_RA4PPS3 : bit absolute RA4PPS.3; 835 RA4PPS_RA4PPS2 : bit absolute RA4PPS.2; 836 RA4PPS_RA4PPS1 : bit absolute RA4PPS.1; 837 RA4PPS_RA4PPS0 : bit absolute RA4PPS.0; 838 RA5PPS : byte absolute $0E95; 839 RA5PPS_RA5PPS4 : bit absolute RA5PPS.4; 840 RA5PPS_RA5PPS3 : bit absolute RA5PPS.3; 841 RA5PPS_RA5PPS2 : bit absolute RA5PPS.2; 842 RA5PPS_RA5PPS1 : bit absolute RA5PPS.1; 843 RA5PPS_RA5PPS0 : bit absolute RA5PPS.0; 844 RC0PPS : byte absolute $0EA0; 845 RC0PPS_RC0PPS4 : bit absolute RC0PPS.4; 846 RC0PPS_RC0PPS3 : bit absolute RC0PPS.3; 847 RC0PPS_RC0PPS2 : bit absolute RC0PPS.2; 848 RC0PPS_RC0PPS1 : bit absolute RC0PPS.1; 849 RC0PPS_RC0PPS0 : bit absolute RC0PPS.0; 850 RC1PPS : byte absolute $0EA1; 851 RC1PPS_RC1PPS4 : bit absolute RC1PPS.4; 852 RC1PPS_RC1PPS3 : bit absolute RC1PPS.3; 853 RC1PPS_RC1PPS2 : bit absolute RC1PPS.2; 854 RC1PPS_RC1PPS1 : bit absolute RC1PPS.1; 855 RC1PPS_RC1PPS0 : bit absolute RC1PPS.0; 856 RC2PPS : byte absolute $0EA2; 857 RC2PPS_RC2PPS4 : bit absolute RC2PPS.4; 858 RC2PPS_RC2PPS3 : bit absolute RC2PPS.3; 859 RC2PPS_RC2PPS2 : bit absolute RC2PPS.2; 860 RC2PPS_RC2PPS1 : bit absolute RC2PPS.1; 861 RC2PPS_RC2PPS0 : bit absolute RC2PPS.0; 862 RC3PPS : byte absolute $0EA3; 863 RC3PPS_RC3PPS4 : bit absolute RC3PPS.4; 864 RC3PPS_RC3PPS3 : bit absolute RC3PPS.3; 865 RC3PPS_RC3PPS2 : bit absolute RC3PPS.2; 866 RC3PPS_RC3PPS1 : bit absolute RC3PPS.1; 867 RC3PPS_RC3PPS0 : bit absolute RC3PPS.0; 868 RC4PPS : byte absolute $0EA4; 869 RC4PPS_RC4PPS4 : bit absolute RC4PPS.4; 870 RC4PPS_RC4PPS3 : bit absolute RC4PPS.3; 871 RC4PPS_RC4PPS2 : bit absolute RC4PPS.2; 872 RC4PPS_RC4PPS1 : bit absolute RC4PPS.1; 873 RC4PPS_RC4PPS0 : bit absolute RC4PPS.0; 874 RC5PPS : byte absolute $0EA5; 875 RC5PPS_RC5PPS4 : bit absolute RC5PPS.4; 876 RC5PPS_RC5PPS3 : bit absolute RC5PPS.3; 877 RC5PPS_RC5PPS2 : bit absolute RC5PPS.2; 878 RC5PPS_RC5PPS1 : bit absolute RC5PPS.1; 879 RC5PPS_RC5PPS0 : bit absolute RC5PPS.0; 880 CLCDATA : byte absolute $0F0F; 881 CLCDATA_MCLC3OUT : bit absolute CLCDATA.2; 882 CLCDATA_MCLC2OUT : bit absolute CLCDATA.1; 883 CLCDATA_MCLC1OUT : bit absolute CLCDATA.0; 884 CLC1CON : byte absolute $0F10; 885 CLC1CON_LC1EN : bit absolute CLC1CON.7; 886 CLC1CON_LC1OUT : bit absolute CLC1CON.5; 887 CLC1CON_LC1INTP : bit absolute CLC1CON.4; 888 CLC1CON_LC1INTN : bit absolute CLC1CON.3; 889 CLC1CON_LC1MODE2 : bit absolute CLC1CON.2; 890 CLC1CON_LC1MODE1 : bit absolute CLC1CON.1; 891 CLC1CON_LC1MODE0 : bit absolute CLC1CON.0; 892 CLC1POL : byte absolute $0F11; 893 CLC1POL_LC1POL : bit absolute CLC1POL.7; 894 CLC1POL_LC1G4POL : bit absolute CLC1POL.3; 895 CLC1POL_LC1G3POL : bit absolute CLC1POL.2; 896 CLC1POL_LC1G2POL : bit absolute CLC1POL.1; 897 CLC1POL_LC1G1POL : bit absolute CLC1POL.0; 898 CLC1SEL0 : byte absolute $0F12; 899 CLC1SEL0_LC1D1S4 : bit absolute CLC1SEL0.4; 900 CLC1SEL0_LC1D1S3 : bit absolute CLC1SEL0.3; 901 CLC1SEL0_LC1D1S2 : bit absolute CLC1SEL0.2; 902 CLC1SEL0_LC1D1S1 : bit absolute CLC1SEL0.1; 903 CLC1SEL0_LC1D1S0 : bit absolute CLC1SEL0.0; 904 CLC1SEL1 : byte absolute $0F13; 905 CLC1SEL1_LC1D2S4 : bit absolute CLC1SEL1.4; 906 CLC1SEL1_LC1D2S3 : bit absolute CLC1SEL1.3; 907 CLC1SEL1_LC1D2S2 : bit absolute CLC1SEL1.2; 908 CLC1SEL1_LC1D2S1 : bit absolute CLC1SEL1.1; 909 CLC1SEL1_LC1D2S0 : bit absolute CLC1SEL1.0; 910 CLC1SEL2 : byte absolute $0F14; 911 CLC1SEL2_LC1D3S4 : bit absolute CLC1SEL2.4; 912 CLC1SEL2_LC1D3S3 : bit absolute CLC1SEL2.3; 913 CLC1SEL2_LC1D3S2 : bit absolute CLC1SEL2.2; 914 CLC1SEL2_LC1D3S1 : bit absolute CLC1SEL2.1; 915 CLC1SEL2_LC1D3S0 : bit absolute CLC1SEL2.0; 916 CLC1SEL3 : byte absolute $0F15; 917 CLC1SEL3_LC1D4S4 : bit absolute CLC1SEL3.4; 918 CLC1SEL3_LC1D4S3 : bit absolute CLC1SEL3.3; 919 CLC1SEL3_LC1D4S2 : bit absolute CLC1SEL3.2; 920 CLC1SEL3_LC1D4S1 : bit absolute CLC1SEL3.1; 921 CLC1SEL3_LC1D4S0 : bit absolute CLC1SEL3.0; 922 CLC1GLS0 : byte absolute $0F16; 923 CLC1GLS0_LC1G1D4T : bit absolute CLC1GLS0.7; 924 CLC1GLS0_LC1G1D4N : bit absolute CLC1GLS0.6; 925 CLC1GLS0_LC1G1D3T : bit absolute CLC1GLS0.5; 926 CLC1GLS0_LC1G1D3N : bit absolute CLC1GLS0.4; 927 CLC1GLS0_LC1G1D2T : bit absolute CLC1GLS0.3; 928 CLC1GLS0_LC1G1D2N : bit absolute CLC1GLS0.2; 929 CLC1GLS0_LC1G1D1T : bit absolute CLC1GLS0.1; 930 CLC1GLS0_LC1G1D1N : bit absolute CLC1GLS0.0; 931 CLC1GLS1 : byte absolute $0F17; 932 CLC1GLS1_LC1G2D4T : bit absolute CLC1GLS1.7; 933 CLC1GLS1_LC1G2D4N : bit absolute CLC1GLS1.6; 934 CLC1GLS1_LC1G2D3T : bit absolute CLC1GLS1.5; 935 CLC1GLS1_LC1G2D3N : bit absolute CLC1GLS1.4; 936 CLC1GLS1_LC1G2D2T : bit absolute CLC1GLS1.3; 937 CLC1GLS1_LC1G2D2N : bit absolute CLC1GLS1.2; 938 CLC1GLS1_LC1G2D1T : bit absolute CLC1GLS1.1; 939 CLC1GLS1_LC1G2D1N : bit absolute CLC1GLS1.0; 940 CLC1GLS2 : byte absolute $0F18; 941 CLC1GLS2_LC1G3D4T : bit absolute CLC1GLS2.7; 942 CLC1GLS2_LC1G3D4N : bit absolute CLC1GLS2.6; 943 CLC1GLS2_LC1G3D3T : bit absolute CLC1GLS2.5; 944 CLC1GLS2_LC1G3D3N : bit absolute CLC1GLS2.4; 945 CLC1GLS2_LC1G3D2T : bit absolute CLC1GLS2.3; 946 CLC1GLS2_LC1G3D2N : bit absolute CLC1GLS2.2; 947 CLC1GLS2_LC1G3D1T : bit absolute CLC1GLS2.1; 948 CLC1GLS2_LC1G3D1N : bit absolute CLC1GLS2.0; 949 CLC1GLS3 : byte absolute $0F19; 950 CLC1GLS3_LC1G4D4T : bit absolute CLC1GLS3.7; 951 CLC1GLS3_LC1G4D4N : bit absolute CLC1GLS3.6; 952 CLC1GLS3_LC1G4D3T : bit absolute CLC1GLS3.5; 953 CLC1GLS3_LC1G4D3N : bit absolute CLC1GLS3.4; 954 CLC1GLS3_LC1G4D2T : bit absolute CLC1GLS3.3; 955 CLC1GLS3_LC1G4D2N : bit absolute CLC1GLS3.2; 956 CLC1GLS3_LC1G4D1T : bit absolute CLC1GLS3.1; 957 CLC1GLS3_LC1G4D1N : bit absolute CLC1GLS3.0; 958 CLC2CON : byte absolute $0F1A; 959 CLC2CON_LC2EN : bit absolute CLC2CON.7; 960 CLC2CON_LC2OUT : bit absolute CLC2CON.5; 961 CLC2CON_LC2INTP : bit absolute CLC2CON.4; 962 CLC2CON_LC2INTN : bit absolute CLC2CON.3; 963 CLC2CON_LC2MODE2 : bit absolute CLC2CON.2; 964 CLC2CON_LC2MODE1 : bit absolute CLC2CON.1; 965 CLC2CON_LC2MODE0 : bit absolute CLC2CON.0; 966 CLC2POL : byte absolute $0F1B; 967 CLC2POL_LC2POL : bit absolute CLC2POL.7; 968 CLC2POL_LC2G4POL : bit absolute CLC2POL.3; 969 CLC2POL_LC2G3POL : bit absolute CLC2POL.2; 970 CLC2POL_LC2G2POL : bit absolute CLC2POL.1; 971 CLC2POL_LC2G1POL : bit absolute CLC2POL.0; 972 CLC2SEL0 : byte absolute $0F1C; 973 CLC2SEL0_LC2D1S4 : bit absolute CLC2SEL0.4; 974 CLC2SEL0_LC2D1S3 : bit absolute CLC2SEL0.3; 975 CLC2SEL0_LC2D1S2 : bit absolute CLC2SEL0.2; 976 CLC2SEL0_LC2D1S1 : bit absolute CLC2SEL0.1; 977 CLC2SEL0_LC2D1S0 : bit absolute CLC2SEL0.0; 978 CLC2SEL1 : byte absolute $0F1D; 979 CLC2SEL1_LC2D2S4 : bit absolute CLC2SEL1.4; 980 CLC2SEL1_LC2D2S3 : bit absolute CLC2SEL1.3; 981 CLC2SEL1_LC2D2S2 : bit absolute CLC2SEL1.2; 982 CLC2SEL1_LC2D2S1 : bit absolute CLC2SEL1.1; 983 CLC2SEL1_LC2D2S0 : bit absolute CLC2SEL1.0; 984 CLC2SEL2 : byte absolute $0F1E; 985 CLC2SEL2_LC2D3S4 : bit absolute CLC2SEL2.4; 986 CLC2SEL2_LC2D3S3 : bit absolute CLC2SEL2.3; 987 CLC2SEL2_LC2D3S2 : bit absolute CLC2SEL2.2; 988 CLC2SEL2_LC2D3S1 : bit absolute CLC2SEL2.1; 989 CLC2SEL2_LC2D3S0 : bit absolute CLC2SEL2.0; 990 CLC2SEL3 : byte absolute $0F1F; 991 CLC2SEL3_LC2D4S4 : bit absolute CLC2SEL3.4; 992 CLC2SEL3_LC2D4S3 : bit absolute CLC2SEL3.3; 993 CLC2SEL3_LC2D4S2 : bit absolute CLC2SEL3.2; 994 CLC2SEL3_LC2D4S1 : bit absolute CLC2SEL3.1; 995 CLC2SEL3_LC2D4S0 : bit absolute CLC2SEL3.0; 996 CLC2GLS0 : byte absolute $0F20; 997 CLC2GLS0_LC2G1D4T : bit absolute CLC2GLS0.7; 998 CLC2GLS0_LC2G1D4N : bit absolute CLC2GLS0.6; 999 CLC2GLS0_LC2G1D3T : bit absolute CLC2GLS0.5; 1000 CLC2GLS0_LC2G1D3N : bit absolute CLC2GLS0.4; 1001 CLC2GLS0_LC2G1D2T : bit absolute CLC2GLS0.3; 1002 CLC2GLS0_LC2G1D2N : bit absolute CLC2GLS0.2; 1003 CLC2GLS0_LC2G1D1T : bit absolute CLC2GLS0.1; 1004 CLC2GLS0_LC2G1D1N : bit absolute CLC2GLS0.0; 1005 CLC2GLS1 : byte absolute $0F21; 1006 CLC2GLS1_LC2G2D4T : bit absolute CLC2GLS1.7; 1007 CLC2GLS1_LC2G2D4N : bit absolute CLC2GLS1.6; 1008 CLC2GLS1_LC2G2D3T : bit absolute CLC2GLS1.5; 1009 CLC2GLS1_LC2G2D3N : bit absolute CLC2GLS1.4; 1010 CLC2GLS1_LC2G2D2T : bit absolute CLC2GLS1.3; 1011 CLC2GLS1_LC2G2D2N : bit absolute CLC2GLS1.2; 1012 CLC2GLS1_LC2G2D1T : bit absolute CLC2GLS1.1; 1013 CLC2GLS1_LC2G2D1N : bit absolute CLC2GLS1.0; 1014 CLC2GLS2 : byte absolute $0F22; 1015 CLC2GLS2_LC2G3D4T : bit absolute CLC2GLS2.7; 1016 CLC2GLS2_LC2G3D4N : bit absolute CLC2GLS2.6; 1017 CLC2GLS2_LC2G3D3T : bit absolute CLC2GLS2.5; 1018 CLC2GLS2_LC2G3D3N : bit absolute CLC2GLS2.4; 1019 CLC2GLS2_LC2G3D2T : bit absolute CLC2GLS2.3; 1020 CLC2GLS2_LC2G3D2N : bit absolute CLC2GLS2.2; 1021 CLC2GLS2_LC2G3D1T : bit absolute CLC2GLS2.1; 1022 CLC2GLS2_LC2G3D1N : bit absolute CLC2GLS2.0; 1023 CLC2GLS3 : byte absolute $0F23; 1024 CLC2GLS3_LC2G4D4T : bit absolute CLC2GLS3.7; 1025 CLC2GLS3_LC2G4D4N : bit absolute CLC2GLS3.6; 1026 CLC2GLS3_LC2G4D3T : bit absolute CLC2GLS3.5; 1027 CLC2GLS3_LC2G4D3N : bit absolute CLC2GLS3.4; 1028 CLC2GLS3_LC2G4D2T : bit absolute CLC2GLS3.3; 1029 CLC2GLS3_LC2G4D2N : bit absolute CLC2GLS3.2; 1030 CLC2GLS3_LC2G4D1T : bit absolute CLC2GLS3.1; 1031 CLC2GLS3_LC2G4D1N : bit absolute CLC2GLS3.0; 1032 CLC3CON : byte absolute $0F24; 1033 CLC3CON_LC3EN : bit absolute CLC3CON.7; 1034 CLC3CON_LC3OUT : bit absolute CLC3CON.5; 1035 CLC3CON_LC3INTP : bit absolute CLC3CON.4; 1036 CLC3CON_LC3INTN : bit absolute CLC3CON.3; 1037 CLC3CON_LC3MODE2 : bit absolute CLC3CON.2; 1038 CLC3CON_LC3MODE1 : bit absolute CLC3CON.1; 1039 CLC3CON_LC3MODE0 : bit absolute CLC3CON.0; 1040 CLC3POL : byte absolute $0F25; 1041 CLC3POL_LC3POL : bit absolute CLC3POL.7; 1042 CLC3POL_LC3G4POL : bit absolute CLC3POL.3; 1043 CLC3POL_LC3G3POL : bit absolute CLC3POL.2; 1044 CLC3POL_LC3G2POL : bit absolute CLC3POL.1; 1045 CLC3POL_LC3G1POL : bit absolute CLC3POL.0; 1046 CLC3SEL0 : byte absolute $0F26; 1047 CLC3SEL0_LC3D1S4 : bit absolute CLC3SEL0.4; 1048 CLC3SEL0_LC3D1S3 : bit absolute CLC3SEL0.3; 1049 CLC3SEL0_LC3D1S2 : bit absolute CLC3SEL0.2; 1050 CLC3SEL0_LC3D1S1 : bit absolute CLC3SEL0.1; 1051 CLC3SEL0_LC3D1S0 : bit absolute CLC3SEL0.0; 1052 CLC3SEL1 : byte absolute $0F27; 1053 CLC3SEL1_LC3D2S4 : bit absolute CLC3SEL1.4; 1054 CLC3SEL1_LC3D2S3 : bit absolute CLC3SEL1.3; 1055 CLC3SEL1_LC3D2S2 : bit absolute CLC3SEL1.2; 1056 CLC3SEL1_LC3D2S1 : bit absolute CLC3SEL1.1; 1057 CLC3SEL1_LC3D2S0 : bit absolute CLC3SEL1.0; 1058 CLC3SEL2 : byte absolute $0F28; 1059 CLC3SEL2_LC3D3S4 : bit absolute CLC3SEL2.4; 1060 CLC3SEL2_LC3D3S3 : bit absolute CLC3SEL2.3; 1061 CLC3SEL2_LC3D3S2 : bit absolute CLC3SEL2.2; 1062 CLC3SEL2_LC3D3S1 : bit absolute CLC3SEL2.1; 1063 CLC3SEL2_LC3D3S0 : bit absolute CLC3SEL2.0; 1064 CLC3SEL3 : byte absolute $0F29; 1065 CLC3SEL3_LC3D4S4 : bit absolute CLC3SEL3.4; 1066 CLC3SEL3_LC3D4S3 : bit absolute CLC3SEL3.3; 1067 CLC3SEL3_LC3D4S2 : bit absolute CLC3SEL3.2; 1068 CLC3SEL3_LC3D4S1 : bit absolute CLC3SEL3.1; 1069 CLC3SEL3_LC3D4S0 : bit absolute CLC3SEL3.0; 1070 CLC3GLS0 : byte absolute $0F2A; 1071 CLC3GLS0_LC3G1D4T : bit absolute CLC3GLS0.7; 1072 CLC3GLS0_LC3G1D4N : bit absolute CLC3GLS0.6; 1073 CLC3GLS0_LC3G1D3T : bit absolute CLC3GLS0.5; 1074 CLC3GLS0_LC3G1D3N : bit absolute CLC3GLS0.4; 1075 CLC3GLS0_LC3G1D2T : bit absolute CLC3GLS0.3; 1076 CLC3GLS0_LC3G1D2N : bit absolute CLC3GLS0.2; 1077 CLC3GLS0_LC3G1D1T : bit absolute CLC3GLS0.1; 1078 CLC3GLS0_LC3G1D1N : bit absolute CLC3GLS0.0; 1079 CLC3GLS1 : byte absolute $0F2B; 1080 CLC3GLS1_LC3G2D4T : bit absolute CLC3GLS1.7; 1081 CLC3GLS1_LC3G2D4N : bit absolute CLC3GLS1.6; 1082 CLC3GLS1_LC3G2D3T : bit absolute CLC3GLS1.5; 1083 CLC3GLS1_LC3G2D3N : bit absolute CLC3GLS1.4; 1084 CLC3GLS1_LC3G2D2T : bit absolute CLC3GLS1.3; 1085 CLC3GLS1_LC3G2D2N : bit absolute CLC3GLS1.2; 1086 CLC3GLS1_LC3G2D1T : bit absolute CLC3GLS1.1; 1087 CLC3GLS1_LC3G2D1N : bit absolute CLC3GLS1.0; 1088 CLC3GLS2 : byte absolute $0F2C; 1089 CLC3GLS2_LC3G3D4T : bit absolute CLC3GLS2.7; 1090 CLC3GLS2_LC3G3D4N : bit absolute CLC3GLS2.6; 1091 CLC3GLS2_LC3G3D3T : bit absolute CLC3GLS2.5; 1092 CLC3GLS2_LC3G3D3N : bit absolute CLC3GLS2.4; 1093 CLC3GLS2_LC3G3D2T : bit absolute CLC3GLS2.3; 1094 CLC3GLS2_LC3G3D2N : bit absolute CLC3GLS2.2; 1095 CLC3GLS2_LC3G3D1T : bit absolute CLC3GLS2.1; 1096 CLC3GLS2_LC3G3D1N : bit absolute CLC3GLS2.0; 1097 CLC3GLS3 : byte absolute $0F2D; 1098 CLC3GLS3_LC3G4D4T : bit absolute CLC3GLS3.7; 1099 CLC3GLS3_LC3G4D4N : bit absolute CLC3GLS3.6; 1100 CLC3GLS3_LC3G4D3T : bit absolute CLC3GLS3.5; 1101 CLC3GLS3_LC3G4D3N : bit absolute CLC3GLS3.4; 1102 CLC3GLS3_LC3G4D2T : bit absolute CLC3GLS3.3; 1103 CLC3GLS3_LC3G4D2N : bit absolute CLC3GLS3.2; 1104 CLC3GLS3_LC3G4D1T : bit absolute CLC3GLS3.1; 1105 CLC3GLS3_LC3G4D1N : bit absolute CLC3GLS3.0; 1106 STATUS_SHAD : byte absolute $0FE4; 1107 STATUS_SHAD_Z_SHAD : bit absolute STATUS_SHAD.2; 1108 STATUS_SHAD_DC_SHAD : bit absolute STATUS_SHAD.1; 1109 STATUS_SHAD_C_SHAD : bit absolute STATUS_SHAD.0; 1110 WREG_SHAD : byte absolute $0FE5; 1111 BSR_SHAD : byte absolute $0FE6; 1112 BSR_SHAD_BSR_SHAD4 : bit absolute BSR_SHAD.4; 1113 BSR_SHAD_BSR_SHAD3 : bit absolute BSR_SHAD.3; 1114 BSR_SHAD_BSR_SHAD2 : bit absolute BSR_SHAD.2; 1115 BSR_SHAD_BSR_SHAD1 : bit absolute BSR_SHAD.1; 1116 BSR_SHAD_BSR_SHAD0 : bit absolute BSR_SHAD.0; 1117 PCLATH_SHAD : byte absolute $0FE7; 1118 PCLATH_SHAD_PCLATH_SHAD6 : bit absolute PCLATH_SHAD.6; 1119 PCLATH_SHAD_PCLATH_SHAD5 : bit absolute PCLATH_SHAD.5; 1120 PCLATH_SHAD_PCLATH_SHAD4 : bit absolute PCLATH_SHAD.4; 1121 PCLATH_SHAD_PCLATH_SHAD3 : bit absolute PCLATH_SHAD.3; 1122 PCLATH_SHAD_PCLATH_SHAD2 : bit absolute PCLATH_SHAD.2; 1123 PCLATH_SHAD_PCLATH_SHAD1 : bit absolute PCLATH_SHAD.1; 1124 PCLATH_SHAD_PCLATH_SHAD0 : bit absolute PCLATH_SHAD.0; 1125 FSR0L_SHAD : byte absolute $0FE8; 1126 FSR0H_SHAD : byte absolute $0FE9; 1127 FSR1L_SHAD : byte absolute $0FEA; 1128 FSR1H_SHAD : byte absolute $0FEB; 1129 STKPTR : byte absolute $0FED; 1130 STKPTR_STKPTR4 : bit absolute STKPTR.4; 1131 STKPTR_STKPTR3 : bit absolute STKPTR.3; 1132 STKPTR_STKPTR2 : bit absolute STKPTR.2; 1133 STKPTR_STKPTR1 : bit absolute STKPTR.1; 1134 STKPTR_STKPTR0 : bit absolute STKPTR.0; 1135 TOSL : byte absolute $0FEE; 1136 TOSH : byte absolute $0FEF; 1137 TOSH_TOSH6 : bit absolute TOSH.6; 1138 TOSH_TOSH5 : bit absolute TOSH.5; 1139 TOSH_TOSH4 : bit absolute TOSH.4; 1140 TOSH_TOSH3 : bit absolute TOSH.3; 1141 TOSH_TOSH2 : bit absolute TOSH.2; 1142 TOSH_TOSH1 : bit absolute TOSH.1; 1143 TOSH_TOSH0 : bit absolute TOSH.0; 1144 1145 1146 // -- Define RAM state values -- 1147 1148 {$CLEAR_STATE_RAM} 1149 1150 {$SET_STATE_RAM '000-00B:SFR:ALLMAPPED'} // Banks 0-31 : INDF0, INDF1, PCL, STATUS, FSR0L, FSR0H, FSR1L, FSR1H, BSR, WREG, PCLATH, INTCON 1151 {$SET_STATE_RAM '00C-00C:SFR'} // Bank 0 : PORTA 1152 {$SET_STATE_RAM '00E-00E:SFR'} // Bank 0 : PORTC 1153 {$SET_STATE_RAM '011-013:SFR'} // Bank 0 : PIR1, PIR2, PIR3 1154 {$SET_STATE_RAM '015-01C:SFR'} // Bank 0 : TMR0, TMR1L, TMR1H, T1CON, T1GCON, TMR2, PR2, T2CON 1155 {$SET_STATE_RAM '020-06F:GPR'} 1156 {$SET_STATE_RAM '070-07F:GPR:ALLMAPPED'} 1157 {$SET_STATE_RAM '08C-08C:SFR'} // Bank 1 : TRISA 1158 {$SET_STATE_RAM '08E-08E:SFR'} // Bank 1 : TRISC 1159 {$SET_STATE_RAM '091-093:SFR'} // Bank 1 : PIE1, PIE2, PIE3 1160 {$SET_STATE_RAM '095-09F:SFR'} // Bank 1 : OPTION_REG, PCON, WDTCON, OSCTUNE, OSCCON, OSCSTAT, ADRESL, ADRESH, ADCON0, ADCON1, ADCON2 1161 {$SET_STATE_RAM '0A0-0EF:GPR'} 1162 {$SET_STATE_RAM '10C-10C:SFR'} // Bank 2 : LATA 1163 {$SET_STATE_RAM '10E-10E:SFR'} // Bank 2 : LATC 1164 {$SET_STATE_RAM '111-119:SFR'} // Bank 2 : CM1CON0, CM1CON1, CM2CON0, CM2CON1, CMOUT, BORCON, FVRCON, DAC1CON0, DAC1CON1 1165 {$SET_STATE_RAM '11C-11C:SFR'} // Bank 2 : ZCD1CON 1166 {$SET_STATE_RAM '120-16F:GPR'} 1167 {$SET_STATE_RAM '18C-18C:SFR'} // Bank 3 : ANSELA 1168 {$SET_STATE_RAM '18E-18E:SFR'} // Bank 3 : ANSELC 1169 {$SET_STATE_RAM '191-197:SFR'} // Bank 3 : PMADRL, PMADRH, PMDATL, PMDATH, PMCON1, PMCON2, VREGCON 1170 {$SET_STATE_RAM '199-19F:SFR'} // Bank 3 : RC1REG, TX1REG, SP1BRGL, SP1BRGH, RC1STA, TX1STA, BAUD1CON 1171 {$SET_STATE_RAM '1A0-1EF:GPR'} 1172 {$SET_STATE_RAM '20C-20C:SFR'} // Bank 4 : WPUA 1173 {$SET_STATE_RAM '20E-20E:SFR'} // Bank 4 : WPUC 1174 {$SET_STATE_RAM '211-217:SFR'} // Bank 4 : SSP1BUF, SSP1ADD, SSP1MSK, SSP1STAT, SSP1CON1, SSP1CON2, SSP1CON3 1175 {$SET_STATE_RAM '220-26F:GPR'} 1176 {$SET_STATE_RAM '28C-28C:SFR'} // Bank 5 : ODCONA 1177 {$SET_STATE_RAM '28E-28E:SFR'} // Bank 5 : ODCONC 1178 {$SET_STATE_RAM '291-293:SFR'} // Bank 5 : CCPR1L, CCPR1H, CCP1CON 1179 {$SET_STATE_RAM '298-29A:SFR'} // Bank 5 : CCPR2L, CCPR2H, CCP2CON 1180 {$SET_STATE_RAM '29E-29E:SFR'} // Bank 5 : CCPTMRS 1181 {$SET_STATE_RAM '2A0-2EF:GPR'} 1182 {$SET_STATE_RAM '30C-30C:SFR'} // Bank 6 : SLRCONA 1183 {$SET_STATE_RAM '30E-30E:SFR'} // Bank 6 : SLRCONC 1184 {$SET_STATE_RAM '320-32F:GPR'} 1185 {$SET_STATE_RAM '38C-38C:SFR'} // Bank 7 : INLVLA 1186 {$SET_STATE_RAM '38E-38E:SFR'} // Bank 7 : INLVLC 1187 {$SET_STATE_RAM '391-393:SFR'} // Bank 7 : IOCAP, IOCAN, IOCAF 1188 {$SET_STATE_RAM '397-399:SFR'} // Bank 7 : IOCCP, IOCCN, IOCCF 1189 {$SET_STATE_RAM '415-417:SFR'} // Bank 8 : TMR4, PR4, T4CON 1190 {$SET_STATE_RAM '41C-41E:SFR'} // Bank 8 : TMR6, PR6, T6CON 1191 {$SET_STATE_RAM '511-511:SFR'} // Bank 10 : OPA1CON 1192 {$SET_STATE_RAM '515-515:SFR'} // Bank 10 : OPA2CON 1193 {$SET_STATE_RAM '617-61C:SFR'} // Bank 12 : PWM3DCL, PWM3DCH, PWM3CON, PWM4DCL, PWM4DCH, PWM4CON 1194 {$SET_STATE_RAM '691-69F:SFR'} // Bank 13 : COG1PHR, COG1PHF, COG1BLKR, COG1BLKF, COG1DBR, COG1DBF, COG1CON0, COG1CON1, COG1RIS, COG1RSIM, COG1FIS, COG1FSIM, COG1ASD0, COG1ASD1, COG1STR 1195 {$SET_STATE_RAM 'E0F-E15:SFR'} // Bank 28 : PPSLOCK, INTPPS, T0CKIPPS, T1CKIPPS, T1GPPS, CCP1PPS, CCP2PPS 1196 {$SET_STATE_RAM 'E17-E17:SFR'} // Bank 28 : COGINPPS 1197 {$SET_STATE_RAM 'E20-E22:SFR'} // Bank 28 : SSPCLKPPS, SSPDATPPS, SSPSSPPS 1198 {$SET_STATE_RAM 'E24-E25:SFR'} // Bank 28 : RXPPS, CKPPS 1199 {$SET_STATE_RAM 'E28-E2B:SFR'} // Bank 28 : CLCIN0PPS, CLCIN1PPS, CLCIN2PPS, CLCIN3PPS 1200 {$SET_STATE_RAM 'E90-E92:SFR'} // Bank 29 : RA0PPS, RA1PPS, RA2PPS 1201 {$SET_STATE_RAM 'E94-E95:SFR'} // Bank 29 : RA4PPS, RA5PPS 1202 {$SET_STATE_RAM 'EA0-EA5:SFR'} // Bank 29 : RC0PPS, RC1PPS, RC2PPS, RC3PPS, RC4PPS, RC5PPS 1203 {$SET_STATE_RAM 'F0F-F2D:SFR'} // Bank 30 : CLCDATA, CLC1CON, CLC1POL, CLC1SEL0, CLC1SEL1, CLC1SEL2, CLC1SEL3, CLC1GLS0, CLC1GLS1, CLC1GLS2, CLC1GLS3, CLC2CON, CLC2POL, CLC2SEL0, CLC2SEL1, CLC2SEL2, CLC2SEL3, CLC2GLS0, CLC2GLS1, CLC2GLS2, CLC2GLS3, CLC3CON, CLC3POL, CLC3SEL0, CLC3SEL1, CLC3SEL2, CLC3SEL3, CLC3GLS0, CLC3GLS1, CLC3GLS2, CLC3GLS3 1204 {$SET_STATE_RAM 'FE4-FEB:SFR'} // Bank 31 : STATUS_SHAD, WREG_SHAD, BSR_SHAD, PCLATH_SHAD, FSR0L_SHAD, FSR0H_SHAD, FSR1L_SHAD, FSR1H_SHAD 1205 {$SET_STATE_RAM 'FED-FEF:SFR'} // Bank 31 : STKPTR, TOSL, TOSH 1206 1207 1208 // -- Define mapped RAM -- 1209 1210 1211 1212 1213 // -- Un-implemented fields -- 1214 1215 {$SET_UNIMP_BITS '003:1F'} // STATUS bits 7,6,5 un-implemented (read as 0) 1216 {$SET_UNIMP_BITS '008:1F'} // BSR bits 7,6,5 un-implemented (read as 0) 1217 {$SET_UNIMP_BITS '00A:7F'} // PCLATH bit 7 un-implemented (read as 0) 1218 {$SET_UNIMP_BITS '00C:3F'} // PORTA bits 7,6 un-implemented (read as 0) 1219 {$SET_UNIMP_BITS '00E:3F'} // PORTC bits 7,6 un-implemented (read as 0) 1220 {$SET_UNIMP_BITS '012:EF'} // PIR2 bit 4 un-implemented (read as 0) 1221 {$SET_UNIMP_BITS '013:37'} // PIR3 bits 7,6,3 un-implemented (read as 0) 1222 {$SET_UNIMP_BITS '018:FD'} // T1CON bit 1 un-implemented (read as 0) 1223 {$SET_UNIMP_BITS '01C:7F'} // T2CON bit 7 un-implemented (read as 0) 1224 {$SET_UNIMP_BITS '08C:3F'} // TRISA bits 7,6 un-implemented (read as 0) 1225 {$SET_UNIMP_BITS '08E:3F'} // TRISC bits 7,6 un-implemented (read as 0) 1226 {$SET_UNIMP_BITS '092:EF'} // PIE2 bit 4 un-implemented (read as 0) 1227 {$SET_UNIMP_BITS '093:37'} // PIE3 bits 7,6,3 un-implemented (read as 0) 1228 {$SET_UNIMP_BITS '096:DF'} // PCON bit 5 un-implemented (read as 0) 1229 {$SET_UNIMP_BITS '097:3F'} // WDTCON bits 7,6 un-implemented (read as 0) 1230 {$SET_UNIMP_BITS '098:3F'} // OSCTUNE bits 7,6 un-implemented (read as 0) 1231 {$SET_UNIMP_BITS '099:FB'} // OSCCON bit 2 un-implemented (read as 0) 1232 {$SET_UNIMP_BITS '09D:7F'} // ADCON0 bit 7 un-implemented (read as 0) 1233 {$SET_UNIMP_BITS '09E:F7'} // ADCON1 bit 3 un-implemented (read as 0) 1234 {$SET_UNIMP_BITS '09F:F0'} // ADCON2 bits 3,2,1,0 un-implemented (read as 0) 1235 {$SET_UNIMP_BITS '10C:37'} // LATA bits 7,6,3 un-implemented (read as 0) 1236 {$SET_UNIMP_BITS '10E:3F'} // LATC bits 7,6 un-implemented (read as 0) 1237 {$SET_UNIMP_BITS '111:DF'} // CM1CON0 bit 5 un-implemented (read as 0) 1238 {$SET_UNIMP_BITS '113:DF'} // CM2CON0 bit 5 un-implemented (read as 0) 1239 {$SET_UNIMP_BITS '115:03'} // CMOUT bits 7,6,5,4,3,2 un-implemented (read as 0) 1240 {$SET_UNIMP_BITS '116:C1'} // BORCON bits 5,4,3,2,1 un-implemented (read as 0) 1241 {$SET_UNIMP_BITS '118:BD'} // DAC1CON0 bits 6,1 un-implemented (read as 0) 1242 {$SET_UNIMP_BITS '11C:B3'} // ZCD1CON bits 6,3,2 un-implemented (read as 0) 1243 {$SET_UNIMP_BITS '18C:37'} // ANSELA bits 7,6,3 un-implemented (read as 0) 1244 {$SET_UNIMP_BITS '18E:3F'} // ANSELC bits 7,6 un-implemented (read as 0) 1245 {$SET_UNIMP_BITS '194:3F'} // PMDATH bits 7,6 un-implemented (read as 0) 1246 {$SET_UNIMP_BITS '195:7F'} // PMCON1 bit 7 un-implemented (read as 0) 1247 {$SET_UNIMP_BITS '197:03'} // VREGCON bits 7,6,5,4,3,2 un-implemented (read as 0) 1248 {$SET_UNIMP_BITS '19F:DB'} // BAUD1CON bits 5,2 un-implemented (read as 0) 1249 {$SET_UNIMP_BITS '20C:3F'} // WPUA bits 7,6 un-implemented (read as 0) 1250 {$SET_UNIMP_BITS '20E:3F'} // WPUC bits 7,6 un-implemented (read as 0) 1251 {$SET_UNIMP_BITS '28C:37'} // ODCONA bits 7,6,3 un-implemented (read as 0) 1252 {$SET_UNIMP_BITS '28E:3F'} // ODCONC bits 7,6 un-implemented (read as 0) 1253 {$SET_UNIMP_BITS '293:3F'} // CCP1CON bits 7,6 un-implemented (read as 0) 1254 {$SET_UNIMP_BITS '29A:3F'} // CCP2CON bits 7,6 un-implemented (read as 0) 1255 {$SET_UNIMP_BITS '30C:37'} // SLRCONA bits 7,6,3 un-implemented (read as 0) 1256 {$SET_UNIMP_BITS '30E:3F'} // SLRCONC bits 7,6 un-implemented (read as 0) 1257 {$SET_UNIMP_BITS '38C:3F'} // INLVLA bits 7,6 un-implemented (read as 0) 1258 {$SET_UNIMP_BITS '38E:3F'} // INLVLC bits 7,6 un-implemented (read as 0) 1259 {$SET_UNIMP_BITS '391:3F'} // IOCAP bits 7,6 un-implemented (read as 0) 1260 {$SET_UNIMP_BITS '392:3F'} // IOCAN bits 7,6 un-implemented (read as 0) 1261 {$SET_UNIMP_BITS '393:3F'} // IOCAF bits 7,6 un-implemented (read as 0) 1262 {$SET_UNIMP_BITS '397:3F'} // IOCCP bits 7,6 un-implemented (read as 0) 1263 {$SET_UNIMP_BITS '398:3F'} // IOCCN bits 7,6 un-implemented (read as 0) 1264 {$SET_UNIMP_BITS '399:3F'} // IOCCF bits 7,6 un-implemented (read as 0) 1265 {$SET_UNIMP_BITS '417:7F'} // T4CON bit 7 un-implemented (read as 0) 1266 {$SET_UNIMP_BITS '41E:7F'} // T6CON bit 7 un-implemented (read as 0) 1267 {$SET_UNIMP_BITS '511:D3'} // OPA1CON bits 5,3,2 un-implemented (read as 0) 1268 {$SET_UNIMP_BITS '515:D3'} // OPA2CON bits 5,3,2 un-implemented (read as 0) 1269 {$SET_UNIMP_BITS '617:C0'} // PWM3DCL bits 5,4,3,2,1,0 un-implemented (read as 0) 1270 {$SET_UNIMP_BITS '619:B0'} // PWM3CON bits 6,3,2,1,0 un-implemented (read as 0) 1271 {$SET_UNIMP_BITS '61A:C0'} // PWM4DCL bits 5,4,3,2,1,0 un-implemented (read as 0) 1272 {$SET_UNIMP_BITS '61C:B0'} // PWM4CON bits 6,3,2,1,0 un-implemented (read as 0) 1273 {$SET_UNIMP_BITS '691:3F'} // COG1PHR bits 7,6 un-implemented (read as 0) 1274 {$SET_UNIMP_BITS '692:3F'} // COG1PHF bits 7,6 un-implemented (read as 0) 1275 {$SET_UNIMP_BITS '693:3F'} // COG1BLKR bits 7,6 un-implemented (read as 0) 1276 {$SET_UNIMP_BITS '694:3F'} // COG1BLKF bits 7,6 un-implemented (read as 0) 1277 {$SET_UNIMP_BITS '695:3F'} // COG1DBR bits 7,6 un-implemented (read as 0) 1278 {$SET_UNIMP_BITS '696:3F'} // COG1DBF bits 7,6 un-implemented (read as 0) 1279 {$SET_UNIMP_BITS '697:DF'} // COG1CON0 bit 5 un-implemented (read as 0) 1280 {$SET_UNIMP_BITS '698:CF'} // COG1CON1 bits 5,4 un-implemented (read as 0) 1281 {$SET_UNIMP_BITS '699:7F'} // COG1RIS bit 7 un-implemented (read as 0) 1282 {$SET_UNIMP_BITS '69A:7F'} // COG1RSIM bit 7 un-implemented (read as 0) 1283 {$SET_UNIMP_BITS '69B:7F'} // COG1FIS bit 7 un-implemented (read as 0) 1284 {$SET_UNIMP_BITS '69C:7F'} // COG1FSIM bit 7 un-implemented (read as 0) 1285 {$SET_UNIMP_BITS '69D:FC'} // COG1ASD0 bits 1,0 un-implemented (read as 0) 1286 {$SET_UNIMP_BITS '69E:0F'} // COG1ASD1 bits 7,6,5,4 un-implemented (read as 0) 1287 {$SET_UNIMP_BITS 'E0F:01'} // PPSLOCK bits 7,6,5,4,3,2,1 un-implemented (read as 0) 1288 {$SET_UNIMP_BITS 'E10:1F'} // INTPPS bits 7,6,5 un-implemented (read as 0) 1289 {$SET_UNIMP_BITS 'E11:1F'} // T0CKIPPS bits 7,6,5 un-implemented (read as 0) 1290 {$SET_UNIMP_BITS 'E12:1F'} // T1CKIPPS bits 7,6,5 un-implemented (read as 0) 1291 {$SET_UNIMP_BITS 'E13:1F'} // T1GPPS bits 7,6,5 un-implemented (read as 0) 1292 {$SET_UNIMP_BITS 'E14:1F'} // CCP1PPS bits 7,6,5 un-implemented (read as 0) 1293 {$SET_UNIMP_BITS 'E15:1F'} // CCP2PPS bits 7,6,5 un-implemented (read as 0) 1294 {$SET_UNIMP_BITS 'E17:1F'} // COGINPPS bits 7,6,5 un-implemented (read as 0) 1295 {$SET_UNIMP_BITS 'E20:1F'} // SSPCLKPPS bits 7,6,5 un-implemented (read as 0) 1296 {$SET_UNIMP_BITS 'E21:1F'} // SSPDATPPS bits 7,6,5 un-implemented (read as 0) 1297 {$SET_UNIMP_BITS 'E22:1F'} // SSPSSPPS bits 7,6,5 un-implemented (read as 0) 1298 {$SET_UNIMP_BITS 'E24:1F'} // RXPPS bits 7,6,5 un-implemented (read as 0) 1299 {$SET_UNIMP_BITS 'E25:1F'} // CKPPS bits 7,6,5 un-implemented (read as 0) 1300 {$SET_UNIMP_BITS 'E28:1F'} // CLCIN0PPS bits 7,6,5 un-implemented (read as 0) 1301 {$SET_UNIMP_BITS 'E29:1F'} // CLCIN1PPS bits 7,6,5 un-implemented (read as 0) 1302 {$SET_UNIMP_BITS 'E2A:1F'} // CLCIN2PPS bits 7,6,5 un-implemented (read as 0) 1303 {$SET_UNIMP_BITS 'E2B:1F'} // CLCIN3PPS bits 7,6,5 un-implemented (read as 0) 1304 {$SET_UNIMP_BITS 'E90:1F'} // RA0PPS bits 7,6,5 un-implemented (read as 0) 1305 {$SET_UNIMP_BITS 'E91:1F'} // RA1PPS bits 7,6,5 un-implemented (read as 0) 1306 {$SET_UNIMP_BITS 'E92:1F'} // RA2PPS bits 7,6,5 un-implemented (read as 0) 1307 {$SET_UNIMP_BITS 'E94:1F'} // RA4PPS bits 7,6,5 un-implemented (read as 0) 1308 {$SET_UNIMP_BITS 'E95:1F'} // RA5PPS bits 7,6,5 un-implemented (read as 0) 1309 {$SET_UNIMP_BITS 'EA0:1F'} // RC0PPS bits 7,6,5 un-implemented (read as 0) 1310 {$SET_UNIMP_BITS 'EA1:1F'} // RC1PPS bits 7,6,5 un-implemented (read as 0) 1311 {$SET_UNIMP_BITS 'EA2:1F'} // RC2PPS bits 7,6,5 un-implemented (read as 0) 1312 {$SET_UNIMP_BITS 'EA3:1F'} // RC3PPS bits 7,6,5 un-implemented (read as 0) 1313 {$SET_UNIMP_BITS 'EA4:1F'} // RC4PPS bits 7,6,5 un-implemented (read as 0) 1314 {$SET_UNIMP_BITS 'EA5:1F'} // RC5PPS bits 7,6,5 un-implemented (read as 0) 1315 {$SET_UNIMP_BITS 'F0F:07'} // CLCDATA bits 7,6,5,4,3 un-implemented (read as 0) 1316 {$SET_UNIMP_BITS 'F10:BF'} // CLC1CON bit 6 un-implemented (read as 0) 1317 {$SET_UNIMP_BITS 'F11:8F'} // CLC1POL bits 6,5,4 un-implemented (read as 0) 1318 {$SET_UNIMP_BITS 'F12:1F'} // CLC1SEL0 bits 7,6,5 un-implemented (read as 0) 1319 {$SET_UNIMP_BITS 'F13:1F'} // CLC1SEL1 bits 7,6,5 un-implemented (read as 0) 1320 {$SET_UNIMP_BITS 'F14:1F'} // CLC1SEL2 bits 7,6,5 un-implemented (read as 0) 1321 {$SET_UNIMP_BITS 'F15:1F'} // CLC1SEL3 bits 7,6,5 un-implemented (read as 0) 1322 {$SET_UNIMP_BITS 'F1A:BF'} // CLC2CON bit 6 un-implemented (read as 0) 1323 {$SET_UNIMP_BITS 'F1B:8F'} // CLC2POL bits 6,5,4 un-implemented (read as 0) 1324 {$SET_UNIMP_BITS 'F1C:1F'} // CLC2SEL0 bits 7,6,5 un-implemented (read as 0) 1325 {$SET_UNIMP_BITS 'F1D:1F'} // CLC2SEL1 bits 7,6,5 un-implemented (read as 0) 1326 {$SET_UNIMP_BITS 'F1E:1F'} // CLC2SEL2 bits 7,6,5 un-implemented (read as 0) 1327 {$SET_UNIMP_BITS 'F1F:1F'} // CLC2SEL3 bits 7,6,5 un-implemented (read as 0) 1328 {$SET_UNIMP_BITS 'F24:BF'} // CLC3CON bit 6 un-implemented (read as 0) 1329 {$SET_UNIMP_BITS 'F25:8F'} // CLC3POL bits 6,5,4 un-implemented (read as 0) 1330 {$SET_UNIMP_BITS 'F26:1F'} // CLC3SEL0 bits 7,6,5 un-implemented (read as 0) 1331 {$SET_UNIMP_BITS 'F27:1F'} // CLC3SEL1 bits 7,6,5 un-implemented (read as 0) 1332 {$SET_UNIMP_BITS 'F28:1F'} // CLC3SEL2 bits 7,6,5 un-implemented (read as 0) 1333 {$SET_UNIMP_BITS 'F29:1F'} // CLC3SEL3 bits 7,6,5 un-implemented (read as 0) 1334 {$SET_UNIMP_BITS 'FE4:07'} // STATUS_SHAD bits 7,6,5,4,3 un-implemented (read as 0) 1335 {$SET_UNIMP_BITS 'FE6:1F'} // BSR_SHAD bits 7,6,5 un-implemented (read as 0) 1336 {$SET_UNIMP_BITS 'FE7:7F'} // PCLATH_SHAD bit 7 un-implemented (read as 0) 1337 {$SET_UNIMP_BITS 'FED:1F'} // STKPTR bits 7,6,5 un-implemented (read as 0) 1338 {$SET_UNIMP_BITS 'FEF:7F'} // TOSH bit 7 un-implemented (read as 0) 1339 1340 {$SET_UNIMP_BITS1 '192:80'} // PMADRH bit 7 un-implemented (read as 1) 1341 1342 1343 // -- PIN mapping -- 1344 1345 // Pin 1 : VDD 1346 // Pin 2 : RA5/SOSCI/CLKIN/OSC1 1347 // Pin 3 : RA4/AN3/SOSCO/CLKOUT/OSC2 1348 // Pin 4 : RA3/MCLR/VPP 1349 // Pin 5 : RC5/OPA2IN+ 1350 // Pin 6 : RC4/OPA2IN- 1351 // Pin 7 : RC3/AN7/C1IN3-/C2IN3-/OPA2OUT 1352 // Pin 8 : RC2/AN6/C1IN2-/C2IN2-/OPA1OUT 1353 // Pin 9 : RC1/AN5/C1IN1-/C2IN1-/OPA1IN- 1354 // Pin 10 : RC0/AN4/C2IN+/OPA1IN+ 1355 // Pin 11 : RA2/AN2/DAC1OUT2/ZCD 1356 // Pin 12 : RA1/AN1/CLC4IN1/VREF+/C1IN0-/C2IN0-/ICSPCLK/ICDCLK 1357 // Pin 13 : RA0/AN0/VREF-/C1IN+/DAC1OUT1/ICSPDAT/ICDDAT 1358 // Pin 14 : VSS 1359 1360 1361 // -- RAM to PIN mapping -- 1362 1363 {$MAP_RAM_TO_PIN '00C:0-13,1-12,2-11,3-4,4-3,5-2'} // PORTA 1364 {$MAP_RAM_TO_PIN '00E:0-10,1-9,2-8,3-7,4-6,5-5'} // PORTC 1365 1366 1367 // -- Bits Configuration -- 1368 1369 // FOSC : Oscillator Selection Bits 1370 {$define _FOSC_ECH = $3FFF} // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins 1371 {$define _FOSC_ECM = $3FFE} // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins 1372 {$define _FOSC_ECL = $3FFD} // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins 1373 {$define _FOSC_INTOSC = $3FFC} // INTOSC oscillator: I/O function on CLKIN pin 1374 {$define _FOSC_EXTRC = $3FFB} // EXTRC oscillator: External RC circuit connected to CLKIN pin 1375 {$define _FOSC_HS = $3FFA} // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins 1376 {$define _FOSC_XT = $3FF9} // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins 1377 {$define _FOSC_LP = $3FF8} // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins 1378 1379 // WDTE : Watchdog Timer Enable 1380 {$define _WDTE_ON = $3FFF} // WDT enabled 1381 {$define _WDTE_NSLEEP = $3FF7} // WDT enabled while running and disabled in Sleep 1382 {$define _WDTE_SWDTEN = $3FEF} // WDT controlled by the SWDTEN bit in the WDTCON register 1383 {$define _WDTE_OFF = $3FE7} // WDT disabled 1384 1385 // PWRTE : Power-up Timer Enable 1386 {$define _PWRTE_OFF = $3FFF} // PWRT disabled 1387 {$define _PWRTE_ON = $3FDF} // PWRT enabled 1388 1389 // MCLRE : MCLR Pin Function Select 1390 {$define _MCLRE_ON = $3FFF} // MCLR/VPP pin function is MCLR 1391 {$define _MCLRE_OFF = $3FBF} // MCLR/VPP pin function is digital input 1392 1393 // CP : Flash Program Memory Code Protection 1394 {$define _CP_OFF = $3FFF} // Program memory code protection is disabled 1395 {$define _CP_ON = $3F7F} // Program memory code protection is enabled 1396 1397 // BOREN : Brown-out Reset Enable 1398 {$define _BOREN_ON = $3FFF} // Brown-out Reset enabled 1399 {$define _BOREN_NSLEEP = $3DFF} // Brown-out Reset enabled while running and disabled in Sleep 1400 {$define _BOREN_SBODEN = $3BFF} // Brown-out Reset controlled by the SBOREN bit in the BORCON register 1401 {$define _BOREN_OFF = $39FF} // Brown-out Reset disabled 1402 1403 // CLKOUTEN : Clock Out Enable 1404 {$define _CLKOUTEN_OFF = $3FFF} // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin 1405 {$define _CLKOUTEN_ON = $37FF} // CLKOUT function is enabled on the CLKOUT pin 1406 1407 // IESO : Internal/External Switchover Mode 1408 {$define _IESO_ON = $3FFF} // Internal/External Switchover Mode is enabled 1409 {$define _IESO_OFF = $2FFF} // Internal/External Switchover Mode is disabled 1410 1411 // FCMEN : Fail-Safe Clock Monitor Enable 1412 {$define _FCMEN_ON = $3FFF} // Fail-Safe Clock Monitor is enabled 1413 {$define _FCMEN_OFF = $1FFF} // Fail-Safe Clock Monitor is disabled 1414 1415 // WRT : Flash Memory Self-Write Protection 1416 {$define _WRT_OFF = $3FFF} // Write protection off 1417 {$define _WRT_BOOT = $3FFE} // 000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control 1418 {$define _WRT_HALF = $3FFD} // 000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control 1419 {$define _WRT_ALL = $3FFC} // 000h to 1FFFh write protected, no addresses may be modified by EECON control 1420 1421 // PPS1WAY : Peripheral Pin Select one-way control 1422 {$define _PPS1WAY_ON = $3FFF} // The PPSLOCK bit cannot be cleared once it is set by software 1423 {$define _PPS1WAY_OFF = $3FFB} // The PPSLOCK bit can be set and cleared repeatedly by software 1424 1425 // ZCDDIS : Zero-cross detect disable 1426 {$define _ZCDDIS_ON = $3FFF} // Zero-cross detect circuit is disabled at POR 1427 {$define _ZCDDIS_OFF = $3F7F} // Zero-cross detect circuit is enabled at POR 1428 1429 // PLLEN : Phase Lock Loop enable 1430 {$define _PLLEN_ON = $3FFF} // 4x PLL is always enabled 1431 {$define _PLLEN_OFF = $3EFF} // 4x PLL is enabled when software sets the SPLLEN bit 1432 1433 // STVREN : Stack Overflow/Underflow Reset Enable 1434 {$define _STVREN_ON = $3FFF} // Stack Overflow or Underflow will cause a Reset 1435 {$define _STVREN_OFF = $3DFF} // Stack Overflow or Underflow will not cause a Reset 1436 1437 // BORV : Brown-out Reset Voltage Selection 1438 {$define _BORV_LO = $3FFF} // Brown-out Reset Voltage (Vbor), low trip point selected. 1439 {$define _BORV_HI = $3BFF} // Brown-out Reset Voltage (Vbor), high trip point selected. 1440 1441 // LPBOR : Low-Power Brown Out Reset 1442 {$define _LPBOR_OFF = $3FFF} // Low-Power BOR is disabled 1443 {$define _LPBOR_ON = $37FF} // Low-Power BOR is enabled 1444 1445 // LVP : Low-Voltage Programming Enable 1446 {$define _LVP_ON = $3FFF} // Low-voltage programming enabled 1447 {$define _LVP_OFF = $1FFF} // High-voltage on MCLR/VPP must be used for programming 1448 1449 implementation 1450 end. 1451