1 ///////////////////////////////////////////////////////////////////////// 2 // $Id: instrument.h 12655 2015-02-19 20:23:08Z sshwarts $ 3 ///////////////////////////////////////////////////////////////////////// 4 // 5 // Copyright (c) 2006-2015 Stanislav Shwartsman 6 // Written by Stanislav Shwartsman [sshwarts at sourceforge net] 7 // 8 // This library is free software; you can redistribute it and/or 9 // modify it under the terms of the GNU Lesser General Public 10 // License as published by the Free Software Foundation; either 11 // version 2 of the License, or (at your option) any later version. 12 // 13 // This library is distributed in the hope that it will be useful, 14 // but WITHOUT ANY WARRANTY; without even the implied warranty of 15 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 // Lesser General Public License for more details. 17 // 18 // You should have received a copy of the GNU Lesser General Public 19 // License along with this library; if not, write to the Free Software 20 // Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 21 22 #if BX_INSTRUMENTATION 23 24 class bxInstruction_c; 25 26 // define if you want to store instruction opcode bytes in bxInstruction_c 27 #define BX_INSTR_STORE_OPCODE_BYTES 28 29 void bx_instr_init_env(void); 30 void bx_instr_exit_env(void); 31 32 // called from the CPU core 33 34 void bx_instr_initialize(unsigned cpu); 35 void bx_instr_reset(unsigned cpu, unsigned type); 36 37 void bx_instr_cnear_branch_taken(unsigned cpu, bx_address branch_eip, bx_address new_eip); 38 void bx_instr_cnear_branch_not_taken(unsigned cpu, bx_address branch_eip); 39 void bx_instr_ucnear_branch(unsigned cpu, unsigned what, bx_address branch_eip, bx_address new_eip); 40 void bx_instr_far_branch(unsigned cpu, unsigned what, Bit16u prev_cs, bx_address prev_eip, Bit16u new_cs, bx_address new_eip); 41 42 void bx_instr_before_execution(unsigned cpu, bxInstruction_c *i); 43 void bx_instr_after_execution(unsigned cpu, bxInstruction_c *i); 44 45 void bx_instr_interrupt(unsigned cpu, unsigned vector); 46 void bx_instr_exception(unsigned cpu, unsigned vector, unsigned error_code); 47 void bx_instr_hwinterrupt(unsigned cpu, unsigned vector, Bit16u cs, bx_address eip); 48 49 void bx_instr_lin_access(unsigned cpu, bx_address lin, bx_phy_address phy, unsigned len, unsigned memtype, unsigned rw); 50 51 /* initialization/deinitialization of instrumentalization*/ 52 #define BX_INSTR_INIT_ENV() bx_instr_init_env() 53 #define BX_INSTR_EXIT_ENV() bx_instr_exit_env() 54 55 /* simulation init, shutdown, reset */ 56 #define BX_INSTR_INITIALIZE(cpu_id) bx_instr_initialize(cpu_id) 57 #define BX_INSTR_EXIT(cpu_id) 58 #define BX_INSTR_RESET(cpu_id, type) bx_instr_reset(cpu_id, type) 59 #define BX_INSTR_HLT(cpu_id) 60 #define BX_INSTR_MWAIT(cpu_id, addr, len, flags) 61 62 /* called from command line debugger */ 63 #define BX_INSTR_DEBUG_PROMPT() 64 #define BX_INSTR_DEBUG_CMD(cmd) 65 66 /* branch resolution */ 67 #define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, branch_eip, new_eip) bx_instr_cnear_branch_taken(cpu_id, branch_eip, new_eip) 68 #define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id, branch_eip) bx_instr_cnear_branch_not_taken(cpu_id, branch_eip) 69 #define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, branch_eip, new_eip) bx_instr_ucnear_branch(cpu_id, what, branch_eip, new_eip) 70 #define BX_INSTR_FAR_BRANCH(cpu_id, what, prev_cs, prev_eip, new_cs, new_eip) \ 71 bx_instr_far_branch(cpu_id, what, prev_cs, prev_eip, new_cs, new_eip) 72 73 /* decoding completed */ 74 #define BX_INSTR_OPCODE(cpu_id, i, opcode, len, is32, is64) 75 76 /* exceptional case and interrupt */ 77 #define BX_INSTR_EXCEPTION(cpu_id, vector, error_code) \ 78 bx_instr_exception(cpu_id, vector, error_code) 79 80 #define BX_INSTR_INTERRUPT(cpu_id, vector) bx_instr_interrupt(cpu_id, vector) 81 #define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) bx_instr_hwinterrupt(cpu_id, vector, cs, eip) 82 83 /* TLB/CACHE control instruction executed */ 84 #define BX_INSTR_CLFLUSH(cpu_id, laddr, paddr) 85 #define BX_INSTR_CACHE_CNTRL(cpu_id, what) 86 #define BX_INSTR_TLB_CNTRL(cpu_id, what, new_cr3) 87 #define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) 88 89 /* execution */ 90 #define BX_INSTR_BEFORE_EXECUTION(cpu_id, i) bx_instr_before_execution(cpu_id, i) 91 #define BX_INSTR_AFTER_EXECUTION(cpu_id, i) bx_instr_after_execution(cpu_id, i) 92 #define BX_INSTR_REPEAT_ITERATION(cpu_id, i) 93 94 /* memory access */ 95 #define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, memtype, rw) \ 96 bx_instr_lin_access(cpu_id, lin, phy, len, memtype, rw) 97 98 #define BX_INSTR_PHY_ACCESS(cpu_id, phy, len, memtype, rw) 99 100 /* feedback from device units */ 101 #define BX_INSTR_INP(addr, len) 102 #define BX_INSTR_INP2(addr, len, val) 103 #define BX_INSTR_OUTP(addr, len, val) 104 105 /* wrmsr callback */ 106 #define BX_INSTR_WRMSR(cpu_id, addr, value) 107 108 /* vmexit callback */ 109 #define BX_INSTR_VMEXIT(cpu_id, reason, qualification) 110 111 #else // BX_INSTRUMENTATION 112 113 /* initialization/deinitialization of instrumentalization */ 114 #define BX_INSTR_INIT_ENV() 115 #define BX_INSTR_EXIT_ENV() 116 117 /* simulation init, shutdown, reset */ 118 #define BX_INSTR_INITIALIZE(cpu_id) 119 #define BX_INSTR_EXIT(cpu_id) 120 #define BX_INSTR_RESET(cpu_id, type) 121 #define BX_INSTR_HLT(cpu_id) 122 #define BX_INSTR_MWAIT(cpu_id, addr, len, flags) 123 124 /* called from command line debugger */ 125 #define BX_INSTR_DEBUG_PROMPT() 126 #define BX_INSTR_DEBUG_CMD(cmd) 127 128 /* branch resolution */ 129 #define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, branch_eip, new_eip) 130 #define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id, branch_eip) 131 #define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, branch_eip, new_eip) 132 #define BX_INSTR_FAR_BRANCH(cpu_id, what, prev_cs, prev_eip, new_cs, new_eip) 133 134 /* decoding completed */ 135 #define BX_INSTR_OPCODE(cpu_id, i, opcode, len, is32, is64) 136 137 /* exceptional case and interrupt */ 138 #define BX_INSTR_EXCEPTION(cpu_id, vector, error_code) 139 #define BX_INSTR_INTERRUPT(cpu_id, vector) 140 #define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) 141 142 /* TLB/CACHE control instruction executed */ 143 #define BX_INSTR_CLFLUSH(cpu_id, laddr, paddr) 144 #define BX_INSTR_CACHE_CNTRL(cpu_id, what) 145 #define BX_INSTR_TLB_CNTRL(cpu_id, what, new_cr3) 146 #define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) 147 148 /* execution */ 149 #define BX_INSTR_BEFORE_EXECUTION(cpu_id, i) 150 #define BX_INSTR_AFTER_EXECUTION(cpu_id, i) 151 #define BX_INSTR_REPEAT_ITERATION(cpu_id, i) 152 153 /* linear memory access */ 154 #define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, memtype, rw) 155 156 /* physical memory access */ 157 #define BX_INSTR_PHY_ACCESS(cpu_id, phy, len, memtype, rw) 158 159 /* feedback from device units */ 160 #define BX_INSTR_INP(addr, len) 161 #define BX_INSTR_INP2(addr, len, val) 162 #define BX_INSTR_OUTP(addr, len, val) 163 164 /* wrmsr callback */ 165 #define BX_INSTR_WRMSR(cpu_id, addr, value) 166 167 /* vmexit callback */ 168 #define BX_INSTR_VMEXIT(cpu_id, reason, qualification) 169 170 #endif // BX_INSTRUMENTATION 171