1# APBP 2 3## MMIO Layout 4 5``` 6Command/Reply registers 7+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 8|+0x00C0 | REPLY0 | 9+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 10|+0x00C2 | CMD0 | 11+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 12|+0x00C4 | REPLY1 | 13+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 14|+0x00C6 | CMD1 | 15+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 16|+0x00C8 | REPLY2 | 17+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 18|+0x00CA | CMD2 | 19+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 20 21REPLY0..2: data sent from DSP to CPU 22CMD0..2: data received from CPU to DSP 23 24Semaphore registers 25+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 26|+0x00CC | SET_SEMAPHORE | 27+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 28|+0x00CE | MASK_SEMAPHORE | 29+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 30|+0x00D0 | ACK_SEMAPHORE | 31+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 32|+0x00D2 | GET_SEMAPHORE | 33+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 34 35SET_SEMAPHORE: sets semaphore sent from DSP to CPU 36MASK_SEMAPHORE: masks semaphore interrupt received from CPU to DSP 37ACK_SEMAPHORE: acknowledges/clears semaphore received from CPU to DSP 38GET_SEMAPHORE: semaphore received from CPU to DSP 39 40Config/status registers 41+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 42|+0x00D4 | |CI2|CI1| |CI0| |END| | 43+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 44|+0x00D6 | | | C2| C1| | | S | C0| R2| R1| R0| | | | | | 45+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 46|+0x00D8 | C2| C1| C0| R2| R1| R0| S'|WEM|WFL|RNE|RFL| |PRS|WTU|RTU| 47+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 48 49END: CPU-side registers endianness. 1 to swap byte order of CPU-side registers 50R0..R2: 1 when there is data in REPLY0..2 51C0..C2: 1 when there is data in CMD0..2 52CI0...CI2: 1 to disable interrupt when CMD0..2 is written by CPU 53S: 1 when (GET_SEMAPHORE & ~MASK_SEMAPHORE) is non-zero 54S': similar to S, but for CPU side 55RTU: CPU-side read transfer underway flag 56WTU: CPU-side write transfer underway flag 57PRS: peripheral reset flag 58RFL: CPU-side read FIFO full flag 59RNE: CPU-side read FIFO non-empty flag 60WFL: CPU-side write FIFO full flag 61WEM: CPU-side write FIFO empty flag 62* Note 0x00D8 is a mirror of CPU-side register DSP_PSTS 63``` 64 65## CPU-DSP communication 66 67APBP is an important port for CPU and DSP to communicate with each other. It mainly contains 3 pairs of symmetrical data channels and a pair of 16-bit symmetrical semaphore channel. 68 69### Data channels 70 71When one side writes to a data channel, it sets the 1 to the "data ready" bit (`R0..R2` or `C0..C2`), and fires interrupt on the other side if enabled. When the othersides read from the channel register, it automatically clears the "data ready" bit. If new data is written before the previous one is read, the new data will overwrite the old data and fires another interrupt. 72 73### Semaphore channels 74 75There are two 16-bit semaphore channels for two directions, `CPU->DSP` and `DSP->CPU`. Writing to `SET_SEMAPHORE` from side A or `ACK_SEMAPHORE` from side B changes the semaphore value of direction `A->B`. Semaphore value change also changes the corresponding `S` bit (See the calculation above). Changing in mask is also reflected in the `S` bit immediately. Whenever a `0->1` transition for `S` is detected, interrupt is fired on B side. 76 77## CPU side MMIO 78 79``` 80Command/Reply registers 81+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 82|+0x0000 | PDATA | 83+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 84|+0x0004 | PADDR | 85+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 86|+0x0008 | DATA_SPACE |RI2|RI1|RI0|IWE|IWF|IRE|IRF|STR| BURST |INC|RST| 87+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 88|+0x000C | C2| C1| C0| R2| R1| R0| S'|WEM|WFL|RNE|RFL| |PRS|WTU|RTU| 89+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 90|+0x0010 | SET_SEMAPHORE' | 91+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 92|+0x0014 | MASK_SEMAPHORE' | 93+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 94|+0x0018 | ACK_SEMAPHORE' | 95+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 96|+0x001C | GET_SEMAPHORE' | 97+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 98|+0x0020 | CMD0 | 99+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 100|+0x0024 | REPLY0 | 101+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 102|+0x0028 | CMD1 | 103+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 104|+0x002C | REPLY1 | 105+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 106|+0x0030 | CMD2 | 107+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 108|+0x0034 | REPLY2 | 109+-----------#---+---+---+---#---+---+---+---#---+---+---+---#---+---+---+---# 110``` 111