1 /* gngb, a game boy color emulator 2 * Copyright (C) 2001 Peponas Thomas & Peponas Mathieu 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU Library General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 17 */ 18 19 20 #ifndef _MEMORY_H 21 #define _MEMORY_H 22 23 #include "global.h" 24 #include <SDL.h> 25 26 /* mbc1 mem mode type */ 27 28 #define MBC1_16_8_MEM_MODE 0 29 #define MBC1_4_32_MEM_MODE 1 30 31 extern Uint8 rom_mask; 32 extern Uint16 nb_rom_page; 33 extern Uint16 nb_ram_page; 34 extern Uint16 nb_vram_page; 35 extern Uint16 nb_wram_page; 36 extern Uint16 active_rom_page; 37 extern Uint16 active_ram_page; 38 extern Uint16 active_vram_page; 39 extern Uint16 active_wram_page; 40 41 extern Uint8 **rom_page; // 0000 - 4000 bank #0 4000 - 8000 bank #n 42 extern Uint8 **ram_page; // a000 - c000 43 extern Uint8 **vram_page; // 8000 - a000 44 extern Uint8 **wram_page; // c000 - fe00 45 extern Uint8 oam_space[0xa0]; // fe00 - fea0 46 extern Uint8 himem[0x160]; // fea0 - ffff 47 48 extern Uint8 mbc1_mem_mode; 49 extern Uint8 mbc1_line; 50 51 extern Uint8 mbc5_lower; 52 extern Uint8 mbc5_upper; 53 54 extern Uint8 ram_mask; 55 56 // REGISTER 57 58 #define GB_PAD (himem[0x60]) 59 #define SB (himem[0x61]) 60 #define SC (himem[0x62]) 61 #define DIVID (himem[0x64]) 62 #define TIME_COUNTER (himem[0x65]) 63 #define TIME_MOD (himem[0x66]) 64 #define TIME_CONTROL (himem[0x67]) 65 #define INT_FLAG (himem[0x6f]) 66 #define INT_ENABLE (himem[0x15f]) 67 #define LCDCCONT (himem[0xa0]) 68 #define LCDCSTAT (himem[0xa1]) 69 #define CURLINE (himem[0xa4]) 70 #define CMP_LINE (himem[0xa5]) 71 #define SCRX (himem[0xa3]) 72 #define SCRY (himem[0xa2]) 73 #define WINX (himem[0xab]) 74 #define WINY (himem[0xaa]) 75 #define DMA (himem[0xa6]) 76 #define BGPAL (himem[0xa7]) 77 #define OBJ0PAL (himem[0xa8]) 78 #define OBJ1PAL (himem[0xa9]) 79 80 #define NR10 (himem[0x70]) 81 #define NR11 (himem[0x71]) 82 #define NR12 (himem[0x72]) 83 #define NR13 (himem[0x73]) 84 #define NR14 (himem[0x74]) 85 86 #define NR21 (himem[0x76]) 87 #define NR22 (himem[0x77]) 88 #define NR23 (himem[0x78]) 89 #define NR24 (himem[0x79]) 90 91 #define NR30 (himem[0x7a]) 92 #define NR31 (himem[0x7b]) 93 #define NR32 (himem[0x7c]) 94 #define NR33 (himem[0x7d]) 95 #define NR34 (himem[0x7e]) 96 97 #define NR41 (himem[0x80]) 98 #define NR42 (himem[0x81]) 99 #define NR43 (himem[0x82]) 100 #define NR44 (himem[0x83]) 101 102 #define NR50 (himem[0x84]) 103 #define NR51 (himem[0x85]) 104 #define NR52 (himem[0x86]) 105 106 // COLOR GAMEBOY 107 108 #define CPU_SPEED (himem[0xad]) 109 #define VRAM_BANK (himem[0xaf]) 110 #define HDMA_CTRL1 (himem[0xb1]) 111 #define HDMA_CTRL2 (himem[0xb2]) 112 #define HDMA_CTRL3 (himem[0xb3]) 113 #define HDMA_CTRL4 (himem[0xb4]) 114 #define HDMA_CTRL5 (himem[0xb5]) 115 #define IR_PORT (himem[0xb6]) 116 #define BGPAL_SPE (himem[0xc8]) 117 #define BGPAL_DATA (himem[0xc9]) 118 #define OBJPAL_SPE (himem[0xca]) 119 #define OBJPAL_DATA (himem[0xcb]) 120 #define WRAM_BANK (himem[0xd0]) 121 122 Uint8 **alloc_mem_page(Uint16 nb_page,Uint32 size); 123 void free_mem_page(Uint8 **page,Uint16 nb_page); 124 125 void gbmemory_init(void); 126 void gbmemory_reset(void); 127 128 /* Mem Read/Write */ 129 130 #define MEM_DIRECT_ACCESS 1 131 #define MEM_FUN_ACCESS 2 132 133 typedef struct { 134 Uint32 type; 135 Uint8 *b; 136 Uint8 (*f)(Uint16 adr); 137 }MEM_READ_ENTRY; 138 139 extern MEM_READ_ENTRY mem_read_tab[0x10]; 140 141 typedef struct { 142 Uint32 type; 143 Uint8 *b; 144 void (*f)(Uint16 adr,Uint8 v); 145 }MEM_WRITE_ENTRY; 146 147 extern MEM_WRITE_ENTRY mem_write_tab[0x10]; 148 149 Uint8 mem_read_default(Uint16 adr); 150 void mem_write_default(Uint16 adr,Uint8 v); 151 Uint8 mem_read_ff(Uint16 adr); 152 void mem_write_ff(Uint16 adr,Uint8 v); 153 154 #define mem_write mem_write_default 155 #define mem_read mem_read_default 156 157 /* To use this macro you don't have to use autoincrementation in argument */ 158 #define mem_read_fast(a,v) {\ 159 if (mem_read_tab[((a)>>12)&0xff].type!=MEM_DIRECT_ACCESS) {\ 160 (v)=mem_read_tab[((a)>>12)&0xff].f((a));\ 161 } else {\ 162 (v)=mem_read_tab[((a)>>12)&0xff].b[(a)&0xfff];\ 163 }\ 164 } 165 166 #define mem_write_fast(a,v) {\ 167 if (mem_write_tab[((a)>>12)&0xff].type!=MEM_DIRECT_ACCESS) {\ 168 mem_write_tab[((a)>>12)&0xff].f((a),(v));\ 169 } else {\ 170 mem_write_tab[((a)>>12)&0xff].b[(a)&0xfff]=(v);\ 171 }\ 172 } 173 174 void push_stack_word(Uint16 v); 175 176 /* DMA Function */ 177 178 void do_gdma(void); 179 void do_hdma(void); 180 181 #define NO_DMA 0 182 #define SPRITE_DMA 1 183 #define HDMA 2 184 #define GDMA 3 185 186 typedef struct { 187 Sint32 gdma_cycle; 188 Uint16 src,dest; 189 Uint16 lg; 190 Uint8 type; 191 }DMA_INFO; 192 193 extern DMA_INFO dma_info; 194 195 #endif 196 197 198 199 200