1 // license:BSD-3-Clause
2 // copyright-holders:Roberto Fresca
3 /******************************************************************************
4
5 AMERICAN MUSIC POKER V1.4
6 1987 AMUSCO.
7
8 Preliminary driver by Roberto Fresca.
9
10 *******************************************************************************
11
12 Hardware Notes:
13
14 1x Empty 40 pin socket (U57) Suspected 8085/8086/8088 Processor (due to the D8259AC presence).
15
16 1x NEC D8259AC Programmable Interrupt Controller (PIC).
17 1x AMD D8284A Clock Generator and Driver for 8086/8088 Processors.
18 1x M5L8253P-5 Programmable general-purpose timer device.
19
20 1x MOS 6845 (U27) CRT Controller.
21 2x P8255 Programmable Peripheral Interface (I/O).
22
23 2x SRM2264 8k X 8 CMOS Static RAM.
24
25 1x 27128 (U35) ROM. Handwritten sticker: Char A U35.
26 1x 27128 (U36) ROM. Handwritten sticker: Char B U36.
27 1x 27128 (U37) ROM. Handwritten sticker: Char C U37.
28 1x 27256 (U42) ROM. Handwritten sticker: PK V1.4 U42.
29
30 1x TI SN76489AN Digital Complex Sound Generator (DCSG).
31
32 3x MMI PAL16L8ACN (U47, U48, U50)
33 1x MMI PAL16R4 (U49) <-- couldn't get a consistent read
34
35 22.1184 MHz. Crystal
36 15.000 MHz. Crystal
37
38 An unidentified but similar Amusco PCB auctioned on eBay had an AMD P8088 filling the
39 CPU socket. Some of the other chips on this board were replaced with clones (e.g.
40 AMD P8253, SY6545-1).
41
42 The program code reads from and writes to a 40-column line printer and a RTC
43 (probably a MSM5832), though neither is present on the main board. The I/O write
44 patterns also suggest that each or both of these devices are accessed through an
45 Intel 8155 or compatible interface chip. The printer uses NCR-style control codes.
46
47 *****************************************************************************************
48
49 DRIVER UPDATES:
50
51 [2014-03-14]
52
53 - Initial release.
54 - Decoded graphics.
55 - Preliminary memory map.
56 - Added the CRTC 6845.
57 - Added the SN76489 PSG.
58 - Added technical notes.
59
60
61 TODO:
62
63 - Proper tile colors.
64 - Determine PIT clocks for proper IRQ timing.
65 - Make the 6845 transparent videoram addressing actually transparent.
66 (IRQ1 changes the 6845 address twice but neither reads nor writes data?)
67 - Add NVRAM in a way that won't trigger POST error message (needs NMI on shutdown?)
68 - Identify remaining outputs from first PPI (button lamps are identified and implemented)
69 - Draw 88 Poker fails POST memory test for some weird reason (IRQ interference?)
70
71 *******************************************************************************/
72
73 #include "emu.h"
74 #include "cpu/i86/i86.h"
75 #include "machine/i8155.h"
76 #include "machine/i8255.h"
77 #include "machine/msm5832.h"
78 #include "machine/pic8259.h"
79 #include "machine/pit8253.h"
80 #include "machine/ticket.h"
81 #include "sound/sn76496.h"
82 #include "video/mc6845.h"
83 #include "emupal.h"
84 #include "screen.h"
85 #include "speaker.h"
86 #include "tilemap.h"
87
88 #include "amusco.lh"
89
90
91 #define MASTER_CLOCK 22.1184_MHz_XTAL /* confirmed */
92 #define SECOND_CLOCK 15_MHz_XTAL /* confirmed */
93
94 #define CPU_CLOCK MASTER_CLOCK / 4 /* guess */
95 #define CRTC_CLOCK SECOND_CLOCK / 8 /* guess */
96 #define SND_CLOCK SECOND_CLOCK / 8 /* guess */
97 #define PIT_CLOCK0 SECOND_CLOCK / 8 /* guess */
98 #define PIT_CLOCK1 SECOND_CLOCK / 8 /* guess */
99
100 #define COIN_IMPULSE 3
101
102
103 class amusco_state : public driver_device
104 {
105 public:
amusco_state(const machine_config & mconfig,device_type type,const char * tag)106 amusco_state(const machine_config &mconfig, device_type type, const char *tag) :
107 driver_device(mconfig, type, tag),
108 m_maincpu(*this, "maincpu"),
109 m_gfxdecode(*this, "gfxdecode"),
110 m_pit(*this, "pit8253"),
111 m_pic(*this, "pic8259"),
112 m_rtc(*this, "rtc"),
113 m_crtc(*this, "crtc"),
114 m_screen(*this, "screen"),
115 m_hopper(*this, "hopper"),
116 m_lamps(*this, "lamp%u", 0U)
117 { }
118
119 void amusco(machine_config &config);
120 void draw88pkr(machine_config &config);
121
122 DECLARE_WRITE_LINE_MEMBER(coin_irq);
123
124 protected:
125 virtual void video_start() override;
126 virtual void machine_start() override;
127
128 private:
129 TILE_GET_INFO_MEMBER(get_bg_tile_info);
130 uint8_t mc6845_r(offs_t offset);
131 void mc6845_w(offs_t offset, uint8_t data);
132 void output_a_w(uint8_t data);
133 void output_b_w(uint8_t data);
134 void output_c_w(uint8_t data);
135 void vram_w(offs_t offset, uint8_t data);
136 uint8_t lpt_status_r();
137 void lpt_data_w(uint8_t data);
138 void rtc_control_w(uint8_t data);
139 MC6845_ON_UPDATE_ADDR_CHANGED(crtc_addr);
140 MC6845_UPDATE_ROW(update_row);
141 void amusco_palette(palette_device &palette) const;
142
143 void mem_map(address_map &map);
144 void io_map(address_map &map);
145
146 std::unique_ptr<uint8_t []> m_videoram;
147 tilemap_t *m_bg_tilemap;
148
149 required_device<cpu_device> m_maincpu;
150 required_device<gfxdecode_device> m_gfxdecode;
151 required_device<pit8253_device> m_pit;
152 required_device<pic8259_device> m_pic;
153 required_device<msm5832_device> m_rtc;
154 required_device<mc6845_device> m_crtc;
155 required_device<screen_device> m_screen;
156 required_device<ticket_dispenser_device> m_hopper;
157 output_finder<8> m_lamps;
158
159 uint8_t m_mc6845_address;
160 uint16_t m_video_update_address;
161 bool m_blink_state;
162 static constexpr uint32_t videoram_size = 0x10000;
163 };
164
165
166 /*************************
167 * Video Hardware *
168 *************************/
169
TILE_GET_INFO_MEMBER(amusco_state::get_bg_tile_info)170 TILE_GET_INFO_MEMBER(amusco_state::get_bg_tile_info)
171 {
172 /* - bits -
173 7654 3210
174 ---- ---- bank select.
175 ---- ---- color code.
176 ---- ---- seems unused.
177 */
178 int code = m_videoram[tile_index * 2] | (m_videoram[tile_index * 2 + 1] << 8);
179 int color = (code & 0x7000) >> 12;
180
181 if (BIT(code, 15) && !m_blink_state)
182 code = 0;
183
184 tileinfo.set(
185 0 /* bank */,
186 code & 0x3ff,
187 color,
188 0
189 );
190 }
191
video_start()192 void amusco_state::video_start()
193 {
194 m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(amusco_state::get_bg_tile_info)), TILEMAP_SCAN_ROWS, 8, 10, 74, 24);
195 m_blink_state = false;
196
197 m_videoram = std::make_unique<uint8_t []>(videoram_size);
198 std::fill_n(m_videoram.get(), videoram_size, 0);
199
200 save_pointer(NAME(m_videoram), videoram_size);
201 }
202
machine_start()203 void amusco_state::machine_start()
204 {
205 m_lamps.resolve();
206 }
207
208
209 /*************************
210 * Memory Map Information *
211 *************************/
212
mem_map(address_map & map)213 void amusco_state::mem_map(address_map &map)
214 {
215 map(0x00000, 0x0ffff).ram();
216 map(0xf8000, 0xfffff).rom().region("maincpu", 0);
217 }
218
mc6845_r(offs_t offset)219 uint8_t amusco_state::mc6845_r(offs_t offset)
220 {
221 if(offset & 1)
222 return m_crtc->register_r();
223
224 return m_crtc->status_r(); // not a plain 6845, requests update bit here ...
225 }
226
mc6845_w(offs_t offset,uint8_t data)227 void amusco_state::mc6845_w(offs_t offset, uint8_t data)
228 {
229 if(offset & 1)
230 {
231 m_crtc->register_w(data);
232 if(m_mc6845_address == 0x12)
233 m_video_update_address = ((data & 0xff) << 8) | (m_video_update_address & 0x00ff);
234 if(m_mc6845_address == 0x13)
235 m_video_update_address = ((data & 0xff) << 0) | (m_video_update_address & 0xff00);
236 }
237 else
238 {
239 m_crtc->address_w(data);
240 m_mc6845_address = data;
241 }
242 }
243
output_a_w(uint8_t data)244 void amusco_state::output_a_w(uint8_t data)
245 {
246 /* Lamps from port A
247
248 7654 3210
249 ---- ---x Bet lamp.
250 ---- --x- Hold/Discard 5 lamp.
251 ---- -x-- Hold/Discard 3 lamp.
252 ---- x--- Hold/Discard 1 lamp.
253 ---x ---- Hold/Discard 2 lamp.
254 --x- ---- Hold/Discard 4 lamp.
255 xx-- ---- Unknown.
256
257 */
258 for (int i = 0; i < 6; i++)
259 m_lamps[i] = BIT(data, i);
260
261 // logerror("Writing %02Xh to PPI output A\n", data);
262 }
263
output_b_w(uint8_t data)264 void amusco_state::output_b_w(uint8_t data)
265 {
266 /* Lamps and counters from port B
267
268 7654 3210
269 ---- --x- Unknown lamp (lits when all holds/disc are ON. Could be a Cancel lamp in an inverted Hold system).
270 ---- -x-- Start/Draw lamp.
271 ---- x--x Unknown.
272 ---x ---- Special: low when sound data queued.
273 --x- ---- Special: set by NMI routine (trigger shutdown?)
274 -x-- ---- Special: cleared in NMI routine (safe to shutdown?)
275 x--- ---- Special: NMI enable (cleared and set along with CPU interrupt flag).
276
277 */
278 m_lamps[6] = BIT(data, 2); // Lamp 6 (Start/Draw)
279 m_lamps[7] = BIT(data, 1); // Lamp 7 (Unknown)
280
281 m_pit->write_gate0(!BIT(data, 4));
282
283 // logerror("Writing %02Xh to PPI output B\n", data);
284 }
285
output_c_w(uint8_t data)286 void amusco_state::output_c_w(uint8_t data)
287 {
288 /* Lamps and counters from port C
289
290 7654 3210
291 ---- ---x Unknown (used by Draw 88 Poker only?)
292 ---- --x- Coin counter (bills not included).
293 ---- -x-- Unknown counter (points won?)
294 ---- x--- Unknown counter (points played?)
295 ---x ---- Coin out pulse.
296 xxx- ---- Unused.
297 */
298 if (!data)
299 return;
300
301 machine().bookkeeping().coin_counter_w(0, !BIT(data, 1));
302 m_hopper->motor_w(BIT(data, 4));
303
304 // logerror("Writing %02Xh to PPI output C\n", data);
305 }
306
vram_w(offs_t offset,uint8_t data)307 void amusco_state::vram_w(offs_t offset, uint8_t data)
308 {
309 m_videoram[m_video_update_address * 2 + offset] = data;
310 m_bg_tilemap->mark_tile_dirty(m_video_update_address);
311 // printf("%04x %04x\n",m_video_update_address,data);
312 }
313
lpt_status_r()314 uint8_t amusco_state::lpt_status_r()
315 {
316 // Bit 0 = busy
317 // Bit 1 = paper jam (active low)
318 // Bit 3 = out of paper
319 // Bit 4 = low paper
320 return 2;
321 }
322
lpt_data_w(uint8_t data)323 void amusco_state::lpt_data_w(uint8_t data)
324 {
325 switch (data)
326 {
327 case 0x10: // NCR: Clear all printer and interface functions
328 logerror("Writing DLE to printer\n");
329 break;
330
331 case 0x11:
332 logerror("Writing DC1 to printer\n");
333 break;
334
335 case 0x12: // NCR: Select double-wide characters for one line
336 logerror("Writing DC2 to printer\n");
337 break;
338
339 case 0x14: // NCR: Feed n print lines (where n is following byte)
340 logerror("Writing DC4 to printer\n");
341 break;
342
343 case 0x17: // NCR: Print buffer contents; advance one line
344 logerror("Writing ETB to printer\n");
345 break;
346
347 case 0x19: // NCR: Perform full knife cut
348 logerror("Writing EM to printer\n");
349 break;
350
351 default:
352 if (data >= 0x20 && data < 0x7f)
353 logerror("Writing '%c' to printer\n", data);
354 else
355 logerror("Writing %02Xh to printer\n", data);
356 break;
357 }
358 }
359
rtc_control_w(uint8_t data)360 void amusco_state::rtc_control_w(uint8_t data)
361 {
362 m_rtc->address_w(data & 0x0f);
363 m_rtc->cs_w(BIT(data, 6));
364 m_rtc->hold_w(BIT(data, 6));
365 m_rtc->write_w(BIT(data, 5));
366 m_rtc->read_w(BIT(data, 4));
367 }
368
io_map(address_map & map)369 void amusco_state::io_map(address_map &map)
370 {
371 map(0x0000, 0x0001).rw(FUNC(amusco_state::mc6845_r), FUNC(amusco_state::mc6845_w));
372 map(0x0010, 0x0011).w(m_pic, FUNC(pic8259_device::write));
373 map(0x0020, 0x0023).w(m_pit, FUNC(pit8253_device::write));
374 map(0x0030, 0x0033).rw("ppi_outputs", FUNC(i8255_device::read), FUNC(i8255_device::write));
375 map(0x0040, 0x0043).rw("ppi_inputs", FUNC(i8255_device::read), FUNC(i8255_device::write));
376 map(0x0060, 0x0060).w("sn", FUNC(sn76489a_device::write));
377 map(0x0070, 0x0071).w(FUNC(amusco_state::vram_w));
378 map(0x0280, 0x0283).rw("lpt_interface", FUNC(i8155_device::io_r), FUNC(i8155_device::io_w));
379 map(0x0380, 0x0383).rw("rtc_interface", FUNC(i8155_device::io_r), FUNC(i8155_device::io_w));
380 }
381
382 /* I/O byte R/W
383
384 0000 writes CRTC register (high nibble) screen size: 88*8 27*10 - visible scr: 74*8 24*10
385 0000 writes CRTC address (low nibble) reg values: 57, 4a, 4b, 0b, 1a, 08, 18, 19, 48, 09, 40, 00, 00, 00, 00, 00, 00.
386
387 -----------------
388
389 unknown writes:
390
391
392 */
393
394 /*************************
395 * Input Ports *
396 *************************/
397
398 static INPUT_PORTS_START( amusco )
399 PORT_START("IN0")
400 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_NAME("Play Credit")
401 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 ) // actual name uncertain; next screen in service mode
402 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // decrement in service mode
403 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK )
404 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Draw") // previous screen in service mode
405 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_STAND ) // actual name uncertain; increment in service mode
406 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) // move left in service mode
407 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_POKER_HOLD2 ) // move right in service mode
408
409 PORT_START("IN1")
PORT_CODE(KEYCODE_Q)410 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_Q) PORT_NAME("Cash Door")
411 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE )
412 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
413 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
414 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_T) PORT_NAME("Logic Door")
415 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_POKER_HOLD5 )
416 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) // move down in service mode
417 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) // move up in service mode
418
419 PORT_START("IN2")
420 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(COIN_IMPULSE) PORT_WRITE_LINE_DEVICE_MEMBER(":", amusco_state, coin_irq)
421 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(COIN_IMPULSE) PORT_WRITE_LINE_DEVICE_MEMBER(":", amusco_state, coin_irq)
422 PORT_BIT( 0xf9, IP_ACTIVE_LOW, IPT_UNUSED )
423 INPUT_PORTS_END
424
425 static INPUT_PORTS_START( draw88pkr )
426 PORT_INCLUDE( amusco )
427
428 PORT_MODIFY("IN1") // Doors probably still exist, though code does nothing with them
429 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED )
430 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BILL1 ) PORT_IMPULSE(COIN_IMPULSE) PORT_WRITE_LINE_DEVICE_MEMBER(":", amusco_state, coin_irq)
431 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
432 INPUT_PORTS_END
433
434 WRITE_LINE_MEMBER(amusco_state::coin_irq)
435 {
436 m_pic->ir4_w(state ? CLEAR_LINE : HOLD_LINE);
437 }
438
439
440
441 /*************************
442 * Graphics Layouts *
443 *************************/
444
445 static const gfx_layout charlayout =
446 {
447 8, 10,
448 RGN_FRAC(1,3),
449 3,
450 { RGN_FRAC(2,3), RGN_FRAC(1,3), RGN_FRAC(0,3) },
451 { 7, 6, 5, 4, 3, 2, 1, 0 },
452 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 8*8, 9*8 },
453 16*8
454 };
455
456
457 /******************************
458 * Graphics Decode Information *
459 ******************************/
460
461 static GFXDECODE_START( gfx_amusco )
462 GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 8 ) // current palette has only 8 colors...
463 GFXDECODE_END
464
465
466 /***********************
467 * CRTC Interface *
468 ************************/
469
MC6845_ON_UPDATE_ADDR_CHANGED(amusco_state::crtc_addr)470 MC6845_ON_UPDATE_ADDR_CHANGED(amusco_state::crtc_addr)
471 {
472 // m_video_update_address = address;
473 }
474
MC6845_UPDATE_ROW(amusco_state::update_row)475 MC6845_UPDATE_ROW(amusco_state::update_row)
476 {
477 // Latch blink state at start of first line, where cursor is always positioned
478 if (y == 0 && ma == 0 && m_blink_state != (cursor_x == 0))
479 {
480 m_blink_state = (cursor_x == 0);
481 m_bg_tilemap->mark_all_dirty();
482 }
483
484 const rectangle rowrect(0, 8 * x_count - 1, y, y);
485 m_bg_tilemap->draw(*m_screen, bitmap, rowrect, 0, 0);
486 }
487
amusco_palette(palette_device & palette) const488 void amusco_state::amusco_palette(palette_device &palette) const
489 {
490 // add some templates first
491 for (int i = 0; i < 8; i++)
492 {
493 for (int j = 0; j < 8; j++)
494 palette.set_pen_color((i * 8) + j, pal1bit(i >> 2), pal1bit(i >> 1), pal1bit(i >> 0));
495 }
496
497 // override colors
498 /**/palette.set_pen_color(0, pal1bit(0), pal1bit(0), pal1bit(0));
499 /**/palette.set_pen_color(1, pal1bit(1), pal1bit(1), pal1bit(1));
500
501 /**/palette.set_pen_color(1*8+0, pal1bit(0), pal1bit(0), pal1bit(0));
502 /**/palette.set_pen_color(1*8+1, pal1bit(1), pal1bit(0), pal1bit(0));
503
504 /**/palette.set_pen_color(2*8+0, pal1bit(0), pal1bit(0), pal1bit(0));
505 /**/palette.set_pen_color(2*8+1, pal1bit(0), pal1bit(0), pal1bit(1));
506
507 /**/palette.set_pen_color(3*8+0, pal1bit(0), pal1bit(0), pal1bit(0));
508 /**/palette.set_pen_color(3*8+1, pal1bit(0), pal1bit(1), pal1bit(0));
509
510
511 palette.set_pen_color(5*8+0, pal1bit(0), pal1bit(0), pal1bit(0));
512 /**/palette.set_pen_color(5*8+1, pal2bit(0), pal2bit(0), pal2bit(1));
513 /**/palette.set_pen_color(5*8+2, pal1bit(1), pal1bit(1), pal1bit(0));
514 palette.set_pen_color(5*8+3, pal1bit(0), pal1bit(0), pal1bit(0));
515 palette.set_pen_color(5*8+4, pal1bit(1), pal1bit(1), pal1bit(1));
516 palette.set_pen_color(5*8+5, pal2bit(2), pal2bit(1), pal2bit(0));
517 /**/palette.set_pen_color(5*8+6, pal1bit(0), pal1bit(0), pal1bit(1));
518 /**/palette.set_pen_color(5*8+7, pal1bit(1), pal1bit(1), pal1bit(1));
519
520 palette.set_pen_color(6*8+0, pal1bit(0), pal1bit(0), pal1bit(0));
521 /**/palette.set_pen_color(6*8+1, pal2bit(1), pal2bit(0), pal2bit(0));
522 /**/palette.set_pen_color(6*8+2, pal1bit(1), pal1bit(1), pal1bit(0));
523 palette.set_pen_color(6*8+3, pal1bit(0), pal1bit(0), pal1bit(0));
524 palette.set_pen_color(6*8+4, pal1bit(1), pal1bit(1), pal1bit(1));
525 palette.set_pen_color(6*8+5, pal2bit(2), pal2bit(1), pal2bit(0));
526 /**/palette.set_pen_color(6*8+6, pal1bit(0), pal1bit(0), pal1bit(1));
527 /**/palette.set_pen_color(6*8+7, pal1bit(1), pal1bit(1), pal1bit(1));
528
529
530 }
531
532 /*************************
533 * Machine Drivers *
534 *************************/
535
amusco(machine_config & config)536 void amusco_state::amusco(machine_config &config)
537 {
538 /* basic machine hardware */
539 I8088(config, m_maincpu, CPU_CLOCK); // 5 MHz ?
540 m_maincpu->set_addrmap(AS_PROGRAM, &amusco_state::mem_map);
541 m_maincpu->set_addrmap(AS_IO, &amusco_state::io_map);
542 m_maincpu->set_irq_acknowledge_callback("pic8259", FUNC(pic8259_device::inta_cb));
543
544 PIC8259(config, m_pic, 0);
545 m_pic->out_int_callback().set_inputline(m_maincpu, 0);
546
547 PIT8253(config, m_pit, 0);
548 m_pit->set_clk<0>(PIT_CLOCK0);
549 m_pit->out_handler<0>().set(m_pic, FUNC(pic8259_device::ir0_w));
550 m_pit->set_clk<1>(PIT_CLOCK1);
551 m_pit->out_handler<1>().set(m_pic, FUNC(pic8259_device::ir2_w));
552
553 i8255_device &ppi_outputs(I8255(config, "ppi_outputs"));
554 ppi_outputs.out_pa_callback().set(FUNC(amusco_state::output_a_w));
555 ppi_outputs.out_pb_callback().set(FUNC(amusco_state::output_b_w));
556 ppi_outputs.out_pc_callback().set(FUNC(amusco_state::output_c_w));
557
558 i8255_device &ppi_inputs(I8255(config, "ppi_inputs"));
559 ppi_inputs.in_pa_callback().set_ioport("IN0");
560 ppi_inputs.in_pb_callback().set_ioport("IN1");
561 ppi_inputs.in_pc_callback().set_ioport("IN2");
562
563 i8155_device &i8155a(I8155(config, "lpt_interface", 0));
564 i8155a.out_pa_callback().set(FUNC(amusco_state::lpt_data_w));
565 i8155a.in_pb_callback().set(FUNC(amusco_state::lpt_status_r));
566 // Port C uses ALT 3 mode, which MAME does not currently emulate
567
568 MSM5832(config, m_rtc, 32.768_kHz_XTAL);
569
570 i8155_device &i8155b(I8155(config, "rtc_interface", 0));
571 i8155b.out_pa_callback().set(FUNC(amusco_state::rtc_control_w));
572 i8155b.in_pc_callback().set(m_rtc, FUNC(msm5832_device::data_r));
573 i8155b.out_pc_callback().set(m_rtc, FUNC(msm5832_device::data_w));
574
575 TICKET_DISPENSER(config, m_hopper, attotime::from_msec(30), TICKET_MOTOR_ACTIVE_LOW, TICKET_STATUS_ACTIVE_HIGH);
576
577 /* video hardware */
578 SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
579 m_screen->set_refresh_hz(60);
580 m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0));
581 m_screen->set_size(88*8, 27*10); // screen size: 88*8 27*10
582 m_screen->set_visarea(0*8, 74*8-1, 0*10, 24*10-1); // visible scr: 74*8 24*10
583 m_screen->set_screen_update("crtc", FUNC(mc6845_device::screen_update));
584
585 GFXDECODE(config, m_gfxdecode, "palette", gfx_amusco);
586 PALETTE(config, "palette", FUNC(amusco_state::amusco_palette), 8*8);
587
588 R6545_1(config, m_crtc, CRTC_CLOCK); /* guess */
589 m_crtc->set_screen(m_screen);
590 m_crtc->set_show_border_area(false);
591 m_crtc->set_char_width(8);
592 m_crtc->set_on_update_addr_change_callback(FUNC(amusco_state::crtc_addr));
593 m_crtc->out_de_callback().set(m_pic, FUNC(pic8259_device::ir1_w)); // IRQ1 sets 0x918 bit 3
594 m_crtc->set_update_row_callback(FUNC(amusco_state::update_row));
595
596 /* sound hardware */
597 SPEAKER(config, "mono").front_center();
598 SN76489A(config, "sn", SND_CLOCK).add_route(ALL_OUTPUTS, "mono", 0.80);
599 }
600
draw88pkr(machine_config & config)601 void amusco_state::draw88pkr(machine_config &config)
602 {
603 amusco(config);
604 // TODO: Some bits of ppi_outputs are definitely different
605 }
606
607 /*************************
608 * Rom Load *
609 *************************/
610
611 ROM_START( amusco )
612 ROM_REGION( 0x8000, "maincpu", 0 )
613 ROM_LOAD( "pk_v1.4_u42.u42", 0x0000, 0x8000, CRC(bf57d7b1) SHA1(fc8b062b12c241c6c096325f728305316b80be8b) )
614
615 ROM_REGION( 0xc000, "gfx1", 0 )
616 ROM_LOAD( "char_a_u35.u35", 0x0000, 0x4000, CRC(ded67ef6) SHA1(da7326c190211e956e5a5f763d5045615bb8ffb3) )
617 ROM_LOAD( "char_b_u36.u36", 0x4000, 0x4000, CRC(55523513) SHA1(97fd221c298698628d4f6564389d96eb89e55927) )
618 ROM_LOAD( "char_c_u37.u37", 0x8000, 0x4000, CRC(d26f3b94) SHA1(e58af4f6f1a9091c23827997d03b91f02bb07856) )
619 // ROM_LOAD( "char_a_u35.u35", 0x8000, 0x4000, CRC(ded67ef6) SHA1(da7326c190211e956e5a5f763d5045615bb8ffb3) )
620 // ROM_LOAD( "char_b_u36.u36", 0x4000, 0x4000, CRC(55523513) SHA1(97fd221c298698628d4f6564389d96eb89e55927) )
621 // ROM_LOAD( "char_c_u37.u37", 0x0000, 0x4000, CRC(d26f3b94) SHA1(e58af4f6f1a9091c23827997d03b91f02bb07856) )
622
623 ROM_REGION( 0x0800, "plds", 0 )
624 ROM_LOAD( "pal16l8a.u47", 0x0000, 0x0104, CRC(554b4286) SHA1(26bc991f2cc58644cd2d9ce5c1867a94455b95a8) )
625 ROM_LOAD( "pal16l8a.u48", 0x0200, 0x0104, CRC(d8d1fb4b) SHA1(7a722420324d7efbe500279cbff6e08b7eeb4f22) )
626 ROM_LOAD( "pal16r4a.u49", 0x0400, 0x0104, CRC(97813a68) SHA1(be4c7f2d38b7c5eec13dd803b78293d8e5f1c2ff) )
627 ROM_LOAD( "pal16l8a.u50", 0x0600, 0x0104, CRC(f5d80001) SHA1(ba0e55ebb45eceec256d432aee6d4123365a0af2) )
628 ROM_END
629
630 /*
631 Draw 88 Poker (V2.0) ??
632
633 U35 - TMS 27C128
634 U36 - TMS 27C128
635 U37 - TMS 27C128
636 U42 - TMS 27C256
637
638 */
639 ROM_START( draw88pkr )
640 ROM_REGION( 0x8000, "maincpu", 0 )
641 ROM_LOAD( "u42.bin", 0x0000, 0x8000, CRC(e98a7cfd) SHA1(8dc581c3e0cfd78bd33fbbbafd40307cf66f154d) )
642
643 ROM_REGION( 0xc000, "gfx1", 0 )
644 ROM_LOAD( "u35.bin", 0x0000, 0x4000, CRC(f608019a) SHA1(f0c5e10a03f39976d9bc6e8bc9f78e30ffefa03e) )
645 ROM_LOAD( "u36.bin", 0x4000, 0x4000, CRC(57d42a97) SHA1(b53b6419a48ecd111faf87fd6e480d82861fe512) )
646 ROM_LOAD( "u37.bin", 0x8000, 0x4000, CRC(6e23b9f2) SHA1(6916828d84d1ecb44dc454e6786f97801a8550c7) )
647 ROM_END
648
649 /*************************
650 * Game Drivers *
651 *************************/
652
653 /* YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME FLAGS LAYOUT */
654 GAMEL( 1987, amusco, 0, amusco, amusco, amusco_state, empty_init, ROT0, "Amusco", "American Music Poker (V1.4)", MACHINE_IMPERFECT_COLORS | MACHINE_NODEVICE_PRINTER, layout_amusco ) // palette totally wrong
655 GAMEL( 1988, draw88pkr, 0, draw88pkr, draw88pkr, amusco_state, empty_init, ROT0, "BTE, Inc.", "Draw 88 Poker (V2.0)", MACHINE_IMPERFECT_COLORS | MACHINE_NODEVICE_PRINTER, layout_amusco ) // palette totally wrong
656