1 // license:BSD-3-Clause
2 // copyright-holders:Patrick Mackinlay
3
4 /*
5 * Sony NEWS R3000 systems.
6 *
7 * Sources:
8 * - https://github.com/robohack/ucb-csrg-bsd/blob/master/sys/news3400/
9 *
10 * TODO:
11 * - lcd controller
12 * - screen params
13 * - floppy density/eject
14 * - centronics port
15 * - sound
16 * - other models, including slots/cards
17 */
18
19 #include "emu.h"
20
21 #include "cpu/mips/mips1.h"
22
23 // memory
24 #include "machine/ram.h"
25
26 // various hardware
27 #include "machine/timekpr.h"
28 #include "machine/z80scc.h"
29 #include "machine/am79c90.h"
30 #include "machine/upd765.h"
31 #include "machine/dmac_0448.h"
32 #include "machine/news_hid.h"
33 #include "machine/cxd1185.h"
34
35 // video
36 #include "screen.h"
37
38 // audio
39 #include "sound/spkrdev.h"
40 #include "speaker.h"
41
42 // busses and connectors
43 #include "machine/nscsi_bus.h"
44 #include "bus/nscsi/cd.h"
45 #include "bus/nscsi/hd.h"
46 #include "bus/rs232/rs232.h"
47
48 #include "imagedev/floppy.h"
49 #include "formats/pc_dsk.h"
50
51 #include "debugger.h"
52
53 #define VERBOSE 0
54 #include "logmacro.h"
55
56 class news_r3k_state : public driver_device
57 {
58 public:
news_r3k_state(machine_config const & mconfig,device_type type,char const * tag)59 news_r3k_state(machine_config const &mconfig, device_type type, char const *tag)
60 : driver_device(mconfig, type, tag)
61 , m_cpu(*this, "cpu")
62 , m_ram(*this, "ram")
63 , m_dma(*this, "dma")
64 , m_rtc(*this, "rtc")
65 , m_scc(*this, "scc")
66 , m_net(*this, "net")
67 , m_fdc(*this, "fdc")
68 , m_lcd(*this, "lcd")
69 , m_hid(*this, "hid")
70 , m_scsi(*this, "scsi:7:cxd1185")
71 , m_serial(*this, "serial%u", 0U)
72 , m_scsibus(*this, "scsi")
73 , m_vram(*this, "vram")
74 , m_led(*this, "led%u", 0U)
75 {
76 }
77
78 protected:
79 // driver_device overrides
80 virtual void machine_start() override;
81 virtual void machine_reset() override;
82
83 // address maps
84 void cpu_map(address_map &map);
85
86 // machine config
87 void common(machine_config &config);
88
89 public:
90 void nws3260(machine_config &config);
91
92 void init_common();
93
94 protected:
95 u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, rectangle const &cliprect);
96
97 void inten_w(offs_t offset, u16 data, u16 mem_mask);
inten_r()98 u16 inten_r() { return m_inten; }
intst_r()99 u16 intst_r() { return m_intst; }
100 void intclr_w(offs_t offset, u16 data, u16 mem_mask);
101
102 enum irq_number : unsigned
103 {
104 EXT3 = 0,
105 EXT1 = 1,
106 SLOT3 = 2,
107 SLOT1 = 3,
108 DMA = 4,
109 LANCE = 5,
110 SCC = 6,
111 BEEP = 7,
112 CBSY = 8,
113 CFLT = 9,
114 MOUSE = 10,
115 KBD = 11,
116 TIMER = 12,
117 BERR = 13,
118 ABORT = 14,
119 PERR = 15,
120 };
121 template <irq_number Number> void irq_w(int state);
122 void int_check();
123
124 u32 bus_error();
125 void itimer_w(u8 data);
126 void itimer(void *ptr, s32 param);
debug_r()127 u8 debug_r() { return m_debug; }
128 void debug_w(u8 data);
129
130 DECLARE_FLOPPY_FORMATS(floppy_formats);
131
132 // devices
133 required_device<r3000a_device> m_cpu;
134 required_device<ram_device> m_ram;
135 required_device<dmac_0448_device> m_dma;
136 required_device<m48t02_device> m_rtc;
137 required_device<z80scc_device> m_scc;
138 required_device<am7990_device> m_net;
139 required_device<upd72067_device> m_fdc;
140
141 required_device<screen_device> m_lcd;
142 required_device<news_hid_hle_device> m_hid;
143 required_device<cxd1185_device> m_scsi;
144
145 required_device_array<rs232_port_device, 2> m_serial;
146 required_device<nscsi_bus_device> m_scsibus;
147
148 required_shared_ptr<u32> m_vram;
149 output_finder<4> m_led;
150
151 std::unique_ptr<u16[]> m_net_ram;
152
153 emu_timer *m_itimer;
154
155 u16 m_inten;
156 u16 m_intst;
157 u8 m_debug;
158
159 bool m_int_state[4];
160 bool m_lcd_enable;
161 bool m_lcd_dim;
162 };
163
FLOPPY_FORMATS_MEMBER(news_r3k_state::floppy_formats)164 FLOPPY_FORMATS_MEMBER(news_r3k_state::floppy_formats)
165 FLOPPY_PC_FORMAT
166 FLOPPY_FORMATS_END
167
168 void news_r3k_state::machine_start()
169 {
170 m_led.resolve();
171
172 m_net_ram = std::make_unique<u16[]>(8192);
173 save_pointer(NAME(m_net_ram), 8192);
174
175 save_item(NAME(m_inten));
176 save_item(NAME(m_intst));
177 save_item(NAME(m_debug));
178 save_item(NAME(m_int_state));
179 save_item(NAME(m_lcd_enable));
180 save_item(NAME(m_lcd_dim));
181
182 m_itimer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(news_r3k_state::itimer), this));
183
184 for (bool &int_state : m_int_state)
185 int_state = false;
186 m_lcd_enable = false;
187 m_lcd_dim = false;
188 }
189
machine_reset()190 void news_r3k_state::machine_reset()
191 {
192 }
193
init_common()194 void news_r3k_state::init_common()
195 {
196 // map the configured ram
197 m_cpu->space(0).install_ram(0x00000000, m_ram->mask(), m_ram->pointer());
198
199 // HACK: hardwire the rate until fdc is better understood
200 m_fdc->set_rate(500000);
201
202 // HACK: signal floppy density?
203 m_scsi->port_w(0x02);
204 }
205
cpu_map(address_map & map)206 void news_r3k_state::cpu_map(address_map &map)
207 {
208 map.unmap_value_high();
209
210 map(0x10000000, 0x101fffff).rom().region("krom", 0);
211 map(0x10000000, 0x10000003).lw32([this](u32 data) { m_lcd_enable = bool(data); }, "lcd_enable_w");
212 map(0x10100000, 0x10100003).lw32([this](u32 data) { m_lcd_dim = BIT(data, 0); }, "lcd_dim_w");
213 map(0x10200000, 0x1021ffff).ram().share("vram").mirror(0xa0000000);
214
215 map(0x18000000, 0x18ffffff).r(FUNC(news_r3k_state::bus_error));
216
217 map(0x1fc00000, 0x1fc1ffff).rom().region("eprom", 0);
218 //map(0x1fc40004, 0x1fc40007).w().umask32(0xff); ??
219 // 1fc40007 // power/reboot/PARK?
220 map(0x1fc80000, 0x1fc80001).rw(FUNC(news_r3k_state::inten_r), FUNC(news_r3k_state::inten_w));
221 map(0x1fc80002, 0x1fc80003).r(FUNC(news_r3k_state::intst_r));
222 map(0x1fc80004, 0x1fc80005).w(FUNC(news_r3k_state::intclr_w));
223 map(0x1fc80006, 0x1fc80006).w(FUNC(news_r3k_state::itimer_w));
224 // 1fcc0000 // cstrobe?
225 // 1fcc0002 // sccstatus0?
226 map(0x1fcc0003, 0x1fcc0003).rw(FUNC(news_r3k_state::debug_r), FUNC(news_r3k_state::debug_w));
227 // 1fcc0007 // sccvect?
228
229 map(0x1fd00000, 0x1fd00007).m(m_hid, FUNC(news_hid_hle_device::map));
230 map(0x1fd40000, 0x1fd40003).noprw(); // FIXME: ignore buzzer for now
231
232 map(0x1fe00000, 0x1fe0000f).m(m_dma, FUNC(dmac_0448_device::map));
233 map(0x1fe00100, 0x1fe0010f).m(m_scsi, FUNC(cxd1185_device::map));
234 map(0x1fe00200, 0x1fe00203).m(m_fdc, FUNC(upd72067_device::map));
235 map(0x1fe00300, 0x1fe00300).lr8([]() { return 0xff; }, "sound_r"); // HACK: disable sound
236 //map(0x1fe00300, 0x1fe00307); // sound
237 map(0x1fe40000, 0x1fe40003).portr("SW2");
238 //map(0x1fe70000, 0x1fe9ffff).ram(); // ??
239 map(0x1fe80000, 0x1fe800ff).rom().region("idrom", 0).mirror(0x0003ff00);
240 map(0x1fec0000, 0x1fec0003).rw(m_scc, FUNC(z80scc_device::ab_dc_r), FUNC(z80scc_device::ab_dc_w));
241
242 map(0x1ff40000, 0x1ff407ff).rw(m_rtc, FUNC(m48t02_device::read), FUNC(m48t02_device::write));
243 map(0x1ff60000, 0x1ff6001b).lw8([this](offs_t offset, u8 data) { LOG("crtc offset %x 0x%02x\n", offset, data); }, "lfbm_crtc_w"); // TODO: HD64646FS
244 map(0x1ff80000, 0x1ff80003).rw(m_net, FUNC(am7990_device::regs_r), FUNC(am7990_device::regs_w));
245 map(0x1ffc0000, 0x1ffc3fff).lrw16(
246 [this](offs_t offset) { return m_net_ram[offset]; }, "net_ram_r",
247 [this](offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_net_ram[offset]); }, "net_ram_w");
248 }
249
250 static INPUT_PORTS_START(nws3260)
251 PORT_START("SW2")
252 // TODO: other combinations of switches 1-3 may be valid
253 PORT_DIPNAME(0x07000000, 0x02000000, "Display") PORT_DIPLOCATION("SW2:1,2,3")
254 PORT_DIPSETTING(0x00000000, "Console")
255 PORT_DIPSETTING(0x02000000, "LCD")
256 PORT_DIPNAME(0x08000000, 0x00000000, "Boot Device") PORT_DIPLOCATION("SW2:4")
257 PORT_DIPSETTING(0x00000000, "Disk")
258 PORT_DIPSETTING(0x08000000, "Network")
259 PORT_DIPNAME(0x10000000, 0x00000000, "Automatic Boot") PORT_DIPLOCATION("SW2:5")
DEF_STR(Off)260 PORT_DIPSETTING(0x00000000, DEF_STR(Off))
261 PORT_DIPSETTING(0x10000000, DEF_STR(On))
262 PORT_DIPNAME(0x20000000, 0x00000000, "Diagnostic Mode") PORT_DIPLOCATION("SW2:6")
263 PORT_DIPSETTING(0x00000000, DEF_STR(Off))
264 PORT_DIPSETTING(0x20000000, DEF_STR(On))
265 // TODO: not completely clear what this switch does
266 PORT_DIPNAME(0x40000000, 0x00000000, "RAM") PORT_DIPLOCATION("SW2:7")
267 PORT_DIPSETTING(0x00000000, "Enabled")
268 PORT_DIPSETTING(0x40000000, "Disabled")
269 PORT_DIPNAME(0x80000000, 0x00000000, "Console Baud") PORT_DIPLOCATION("SW2:8")
270 PORT_DIPSETTING(0x00000000, "9600")
271 PORT_DIPSETTING(0x80000000, "1200")
272
273 PORT_START("SW3")
274 PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
275 PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
276 PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
277 PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
278 INPUT_PORTS_END
279
280 u32 news_r3k_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, rectangle const &cliprect)
281 {
282 if (!m_lcd_enable)
283 return 0;
284
285 rgb_t const black = rgb_t::black();
286 rgb_t const white = m_lcd_dim ? rgb_t(191, 191, 191) : rgb_t::white();
287
288 u32 const *pixel_pointer = m_vram;
289
290 for (int y = screen.visible_area().min_y; y <= screen.visible_area().max_y; y++)
291 {
292 for (int x = screen.visible_area().min_x; x <= screen.visible_area().max_x; x += 32)
293 {
294 u32 const pixel_data = *pixel_pointer++;
295
296 for (unsigned i = 0; i < 32; i++)
297 bitmap.pix(y, x + i) = BIT(pixel_data, 31 - i) ? black : white;
298 }
299 }
300
301 return 0;
302 }
303
inten_w(offs_t offset,u16 data,u16 mem_mask)304 void news_r3k_state::inten_w(offs_t offset, u16 data, u16 mem_mask)
305 {
306 COMBINE_DATA(&m_inten);
307
308 int_check();
309 }
310
irq_w(int state)311 template <news_r3k_state::irq_number Number> void news_r3k_state::irq_w(int state)
312 {
313 LOG("irq number %d state %d\n", Number, state);
314
315 if (state)
316 m_intst |= 1U << Number;
317 else
318 m_intst &= ~(1U << Number);
319
320 int_check();
321 }
322
intclr_w(offs_t offset,u16 data,u16 mem_mask)323 void news_r3k_state::intclr_w(offs_t offset, u16 data, u16 mem_mask)
324 {
325 m_intst &= ~(data & mem_mask);
326
327 int_check();
328 }
329
int_check()330 void news_r3k_state::int_check()
331 {
332 // TODO: assume 44422222 11100000
333 static int const int_line[] = { INPUT_LINE_IRQ0, INPUT_LINE_IRQ1, INPUT_LINE_IRQ2, INPUT_LINE_IRQ4 };
334 static u16 const int_mask[] = { 0x001f, 0x00e0, 0x1f00, 0xe000 };
335
336 for (unsigned i = 0; i < ARRAY_LENGTH(m_int_state); i++)
337 {
338 bool const int_state = m_intst & m_inten & int_mask[i];
339
340 if (m_int_state[i] != int_state)
341 {
342 m_int_state[i] = int_state;
343 m_cpu->set_input_line(int_line[i], int_state);
344 }
345 }
346 }
347
bus_error()348 u32 news_r3k_state::bus_error()
349 {
350 if (!machine().side_effects_disabled())
351 irq_w<BERR>(ASSERT_LINE);
352
353 return 0;
354 }
355
itimer_w(u8 data)356 void news_r3k_state::itimer_w(u8 data)
357 {
358 LOG("itimer_w 0x%02x (%s)\n", data, machine().describe_context());
359
360 // TODO: assume 0xff stops the timer
361 u8 const ticks = data + 1;
362
363 m_itimer->adjust(attotime::from_ticks(ticks, 800), 0, attotime::from_ticks(ticks, 800));
364 }
365
itimer(void * ptr,s32 param)366 void news_r3k_state::itimer(void *ptr, s32 param)
367 {
368 irq_w<TIMER>(ASSERT_LINE);
369 }
370
debug_w(u8 data)371 void news_r3k_state::debug_w(u8 data)
372 {
373 /*
374 * The low four bits of this register control the diagnostic LEDs labelled 1-4
375 * with bit 0 correspondig to LED #1, and a 0 value enabling the LED. A non-
376 * exhaustive list of diagnostic codes produced by the PROM follows:
377 *
378 * 4321 Stage
379 * ...x EPROM checksum
380 * ..x. NVRAM test (byte)
381 * ..xx NVRAM test (word)
382 * .x.. NVRAM test (dword)
383 * .x.x read dip-switch SW2
384 * .xx. write test 0x1fe70000-1fe9ffff?
385 * .xxx address decode
386 * x... NVRAM test (dword)
387 * x..x RAM sizing
388 * x.x. inventory/boot
389 *
390 */
391 LOG("debug_w 0x%02x (%s)\n", data, machine().describe_context());
392
393 for (unsigned i = 0; i < 4; i++)
394 if (BIT(data, i + 4))
395 m_led[i] = BIT(data, i);
396
397 m_debug = data;
398 }
399
news_scsi_devices(device_slot_interface & device)400 static void news_scsi_devices(device_slot_interface &device)
401 {
402 device.option_add("harddisk", NSCSI_HARDDISK);
403 device.option_add("cdrom", NSCSI_CDROM);
404 }
405
common(machine_config & config)406 void news_r3k_state::common(machine_config &config)
407 {
408 R3000A(config, m_cpu, 20_MHz_XTAL, 32768, 32768);
409 m_cpu->set_addrmap(AS_PROGRAM, &news_r3k_state::cpu_map);
410 m_cpu->set_fpu(mips1_device_base::MIPS_R3010Av4);
411
412 // 3 banks of 4x30-pin SIMMs with parity, first bank is soldered
413 RAM(config, m_ram);
414 m_ram->set_default_size("16M");
415 // TODO: confirm each bank supports 4x1M or 4x4M
416 m_ram->set_extra_options("4M,8M,12M,20M,24M,32M,36M,48M");
417
418 DMAC_0448(config, m_dma, 0);
419 m_dma->set_bus(m_cpu, 0);
420 m_dma->out_int_cb().set(FUNC(news_r3k_state::irq_w<DMA>));
421 m_dma->dma_r_cb<1>().set(m_fdc, FUNC(upd72067_device::dma_r));
422 m_dma->dma_w_cb<1>().set(m_fdc, FUNC(upd72067_device::dma_w));
423 // TODO: channel 2 audio
424 // TODO: channel 3 video
425
426 M48T02(config, m_rtc);
427
428 SCC85C30(config, m_scc, 4.9152_MHz_XTAL);
429 m_scc->out_int_callback().set(FUNC(news_r3k_state::irq_w<SCC>));
430
431 // scc channel A
432 RS232_PORT(config, m_serial[0], default_rs232_devices, nullptr);
433 m_serial[0]->cts_handler().set(m_scc, FUNC(z80scc_device::ctsa_w));
434 m_serial[0]->dcd_handler().set(m_scc, FUNC(z80scc_device::dcda_w));
435 m_serial[0]->rxd_handler().set(m_scc, FUNC(z80scc_device::rxa_w));
436 m_scc->out_rtsa_callback().set(m_serial[0], FUNC(rs232_port_device::write_rts));
437 m_scc->out_txda_callback().set(m_serial[0], FUNC(rs232_port_device::write_txd));
438
439 // scc channel B
440 RS232_PORT(config, m_serial[1], default_rs232_devices, nullptr);
441 m_serial[1]->cts_handler().set(m_scc, FUNC(z80scc_device::ctsb_w));
442 m_serial[1]->dcd_handler().set(m_scc, FUNC(z80scc_device::dcdb_w));
443 m_serial[1]->rxd_handler().set(m_scc, FUNC(z80scc_device::rxb_w));
444 m_scc->out_rtsb_callback().set(m_serial[1], FUNC(rs232_port_device::write_rts));
445 m_scc->out_txdb_callback().set(m_serial[1], FUNC(rs232_port_device::write_txd));
446
447 AM7990(config, m_net);
448 m_net->intr_out().set(FUNC(news_r3k_state::irq_w<LANCE>)).invert();
449 m_net->dma_in().set([this](offs_t offset) { return m_net_ram[offset >> 1]; });
450 m_net->dma_out().set([this](offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_net_ram[offset >> 1]); });
451
452 UPD72067(config, m_fdc, 16_MHz_XTAL);
453 m_fdc->intrq_wr_callback().set(m_dma, FUNC(dmac_0448_device::irq<1>));
454 m_fdc->drq_wr_callback().set(m_dma, FUNC(dmac_0448_device::drq<1>));
455 FLOPPY_CONNECTOR(config, "fdc:0", "35hd", FLOPPY_35_HD, true, floppy_formats).enable_sound(false);
456
457 // scsi bus and devices
458 NSCSI_BUS(config, m_scsibus);
459 // inquiry content for hard disk is "HITACHI DK312C CS01"
460 NSCSI_CONNECTOR(config, "scsi:0", news_scsi_devices, "harddisk");
461 NSCSI_CONNECTOR(config, "scsi:1", news_scsi_devices, nullptr);
462 NSCSI_CONNECTOR(config, "scsi:2", news_scsi_devices, nullptr);
463 NSCSI_CONNECTOR(config, "scsi:3", news_scsi_devices, nullptr);
464 NSCSI_CONNECTOR(config, "scsi:4", news_scsi_devices, nullptr);
465 NSCSI_CONNECTOR(config, "scsi:5", news_scsi_devices, nullptr);
466 NSCSI_CONNECTOR(config, "scsi:6", news_scsi_devices, nullptr);
467
468 // scsi host adapter
469 NSCSI_CONNECTOR(config, "scsi:7").option_set("cxd1185", CXD1185).clock(16_MHz_XTAL).machine_config(
470 [this](device_t *device)
471 {
472 cxd1185_device &adapter = downcast<cxd1185_device &>(*device);
473
474 adapter.irq_out_cb().set(m_dma, FUNC(dmac_0448_device::irq<0>));
475 adapter.drq_out_cb().set(m_dma, FUNC(dmac_0448_device::drq<0>));
476 adapter.port_out_cb().set(
477 [this](u8 data)
478 {
479 LOG("floppy %s\n", BIT(data, 0) ? "mount" : "eject");
480 });
481
482 subdevice<dmac_0448_device>(":dma")->dma_r_cb<0>().set(adapter, FUNC(cxd1185_device::dma_r));
483 subdevice<dmac_0448_device>(":dma")->dma_w_cb<0>().set(adapter, FUNC(cxd1185_device::dma_w));
484 });
485
486 SCREEN(config, m_lcd, SCREEN_TYPE_LCD);
487 m_lcd->set_raw(52416000, 1120, 0, 1120, 780, 0, 780);
488 m_lcd->set_screen_update(FUNC(news_r3k_state::screen_update));
489
490 NEWS_HID_HLE(config, m_hid);
491 m_hid->irq_out<news_hid_hle_device::KEYBOARD>().set(FUNC(news_r3k_state::irq_w<KBD>));
492 m_hid->irq_out<news_hid_hle_device::MOUSE>().set(FUNC(news_r3k_state::irq_w<MOUSE>));
493 }
494
nws3260(machine_config & config)495 void news_r3k_state::nws3260(machine_config &config)
496 {
497 common(config);
498 }
499
500 ROM_START(nws3260)
501 ROM_REGION32_BE(0x20000, "eprom", 0)
502 ROM_SYSTEM_BIOS(0, "nws3260", "NWS-3260 v2.0A")
503 ROMX_LOAD("mpu-16__ver.2.0a__1990_sony.ic64", 0x00000, 0x20000, CRC(61222991) SHA1(076fab0ad0682cd7dacc7094e42efe8558cbaaa1), ROM_BIOS(0))
504
505 // 2 x MB834200A-20 (4Mb mask ROM)
506 ROM_REGION32_BE(0x200000, "krom", ROMREGION_ERASEFF)
507 ROM_LOAD64_WORD("051_aa.ic109", 0x00000, 0x80000, CRC(1411cbcb) SHA1(793394cd3919034f85bfb015d6d3c504f83b6626))
508 ROM_LOAD64_WORD("052_aa.ic110", 0x00004, 0x80000, CRC(df0f39da) SHA1(076881da022a3fe6731de0ead217285293c25dc7))
509
510 /*
511 * This is probably a 4-bit device: only the low 4 bits in each location
512 * are used, and are merged together into bytes when copied into RAM, with
513 * the most-significant bits at the lower address. The sum of resulting
514 * big-endian 32-bit words must be zero.
515 *
516 * offset purpose
517 * 0x00 magic number (0x0f 0x0f)
518 * 0x10 ethernet mac address (low 4 bits of 12 bytes)
519 * 0x28 machine identification (low 4 bits of 8 bytes)
520 * 0x60 model number (null-terminated string)
521 */
522 ROM_REGION32_BE(0x100, "idrom", 0)
523 ROM_LOAD("idrom.bin", 0x000, 0x100, CRC(17a3d9c6) SHA1(d300e6908210f540951211802c38ad7f8037aa15) BAD_DUMP)
524 ROM_END
525
526 /* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
527 COMP(1991, nws3260, 0, 0, nws3260, nws3260, news_r3k_state, init_common, "Sony", "NWS-3260", MACHINE_NO_SOUND)
528