1 // license:LGPL-2.1+ 2 // copyright-holders:Angelo Salese, R. Belmont, Juergen Buchmueller 3 /****************************************************************************** 4 * 5 * Acorn Archimedes custom chips (IOC, MEMC, VIDC) 6 * 7 *****************************************************************************/ 8 9 #ifndef MAME_INCLUDES_ARCHIMEDES_H 10 #define MAME_INCLUDES_ARCHIMEDES_H 11 12 #include "cpu/arm/arm.h" 13 #include "imagedev/floppy.h" 14 #include "machine/aakart.h" 15 #include "machine/i2cmem.h" 16 #include "machine/wd_fdc.h" 17 #include "machine/acorn_vidc.h" 18 19 // interrupt definitions. these are for the real Archimedes computer - arcade 20 // and gambling knockoffs likely are a bit different. 21 22 #define ARCHIMEDES_IRQA_PRINTER_BUSY (0x01) 23 #define ARCHIMEDES_IRQA_SERIAL_RING (0x02) 24 #define ARCHIMEDES_IRQA_PRINTER_ACK (0x04) 25 #define ARCHIMEDES_IRQA_VBL (0x08) 26 #define ARCHIMEDES_IRQA_RESET (0x10) 27 #define ARCHIMEDES_IRQA_TIMER0 (0x20) 28 #define ARCHIMEDES_IRQA_TIMER1 (0x40) 29 #define ARCHIMEDES_IRQA_FORCE (0x80) 30 31 #define ARCHIMEDES_IRQB_PODULE_FIQ (0x01) 32 #define ARCHIMEDES_IRQB_SOUND_EMPTY (0x02) 33 #define ARCHIMEDES_IRQB_SERIAL (0x04) 34 #define ARCHIMEDES_IRQB_HDD (0x08) 35 #define ARCHIMEDES_IRQB_DISC_CHANGE (0x10) 36 #define ARCHIMEDES_IRQB_PODULE_IRQ (0x20) 37 #define ARCHIMEDES_IRQB_KBD_XMIT_EMPTY (0x40) 38 #define ARCHIMEDES_IRQB_KBD_RECV_FULL (0x80) 39 40 #define ARCHIMEDES_FIQ_FLOPPY_DRQ (0x01) 41 #define ARCHIMEDES_FIQ_FLOPPY (0x02) 42 #define ARCHIMEDES_FIQ_ECONET (0x04) 43 #define ARCHIMEDES_FIQ_PODULE (0x40) 44 #define ARCHIMEDES_FIQ_FORCE (0x80) 45 46 class archimedes_state : public driver_device 47 { 48 public: archimedes_state(const machine_config & mconfig,device_type type,const char * tag)49 archimedes_state(const machine_config &mconfig, device_type type, const char *tag) 50 : driver_device(mconfig, type, tag), 51 m_kart(*this, "kart"), 52 m_maincpu(*this, "maincpu"), 53 m_i2cmem(*this, "i2cmem"), 54 m_vidc(*this, "vidc"), 55 m_fdc(*this, "fdc"), 56 m_floppy0(*this, "fdc:0"), 57 m_floppy1(*this, "fdc:1"), 58 m_region_maincpu(*this, "maincpu"), 59 m_joy(*this, "joy_p%u",1) 60 { } 61 62 optional_device<aakart_device> m_kart; 63 void archimedes_init(); 64 void archimedes_reset(); 65 void archimedes_driver_init(); 66 67 void archimedes_request_irq_a(int mask); 68 void archimedes_request_irq_b(int mask); 69 void archimedes_request_fiq(int mask); 70 void archimedes_clear_irq_a(int mask); 71 void archimedes_clear_irq_b(int mask); 72 void archimedes_clear_fiq(int mask); 73 74 uint32_t aristmk5_drame_memc_logical_r(offs_t offset); 75 uint32_t archimedes_memc_logical_r(offs_t offset); 76 void archimedes_memc_logical_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); 77 void archimedes_memc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); 78 void archimedes_memc_page_w(uint32_t data); 79 uint32_t archimedes_ioc_r(offs_t offset, uint32_t mem_mask = ~0); 80 void archimedes_ioc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); 81 DECLARE_WRITE_LINE_MEMBER( a310_kart_rx_w ); 82 DECLARE_WRITE_LINE_MEMBER( a310_kart_tx_w ); 83 84 uint8_t m_i2c_clk; 85 int16_t m_memc_pages[0x2000]; // the logical RAM area is 32 megs, and the smallest page size is 4k 86 uint8_t m_ioc_regs[0x80/4]; 87 88 uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); 89 virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; 90 91 protected: 92 required_device<arm_cpu_device> m_maincpu; 93 optional_device<i2cmem_device> m_i2cmem; 94 required_device<acorn_vidc10_device> m_vidc; 95 optional_device<wd1772_device> m_fdc; 96 optional_device<floppy_connector> m_floppy0; 97 optional_device<floppy_connector> m_floppy1; 98 required_memory_region m_region_maincpu; 99 optional_ioport_array<2> m_joy; 100 101 DECLARE_WRITE_LINE_MEMBER( vblank_irq ); 102 DECLARE_WRITE_LINE_MEMBER( sound_drq ); 103 104 private: 105 106 static const device_timer_id TIMER_IOC = 3; 107 108 // void vidc_vblank(); 109 void vidc_video_tick(); 110 void vidc_audio_tick(); 111 void ioc_timer(int param); 112 113 void latch_timer_cnt(int tmr); 114 void a310_set_timer(int tmr); 115 uint32_t ioc_ctrl_r(offs_t offset); 116 void ioc_ctrl_w(offs_t offset, uint32_t data); 117 118 uint32_t *m_archimedes_memc_physmem; 119 uint32_t m_memc_pagesize; 120 int m_memc_latchrom; 121 uint32_t m_ioc_timercnt[4], m_ioc_timerout[4]; 122 uint32_t m_vidc_vidstart, m_vidc_vidend, m_vidc_vidinit, m_vidc_vidcur, m_vidc_cinit; 123 uint32_t m_vidc_sndstart, m_vidc_sndend, m_vidc_sndcur, m_vidc_sndendcur; 124 uint8_t m_video_dma_on,m_audio_dma_on; 125 bool m_cursor_enabled; 126 emu_timer *m_timer[4]; 127 uint8_t m_floppy_select; 128 bool check_floppy_ready(); 129 uint8_t m_joy_serial_data; 130 }; 131 132 /* IOC registers */ 133 134 #define CONTROL 0x00/4 135 #define KART 0x04/4 // Keyboard Asynchronous Receiver Transmitter 136 137 #define IRQ_STATUS_A 0x10/4 138 #define IRQ_REQUEST_A 0x14/4 139 #define IRQ_MASK_A 0x18/4 140 #define IRQ_STATUS_B 0x20/4 141 #define IRQ_REQUEST_B 0x24/4 142 #define IRQ_MASK_B 0x28/4 143 144 #define FIQ_STATUS 0x30/4 145 #define FIQ_REQUEST 0x34/4 146 #define FIQ_MASK 0x38/4 147 148 #define T0_LATCH_LO 0x40/4 149 #define T0_LATCH_HI 0x44/4 150 #define T0_GO 0x48/4 151 #define T0_LATCH 0x4c/4 152 153 #define T1_LATCH_LO 0x50/4 154 #define T1_LATCH_HI 0x54/4 155 #define T1_GO 0x58/4 156 #define T1_LATCH 0x5c/4 157 158 #define T2_LATCH_LO 0x60/4 159 #define T2_LATCH_HI 0x64/4 160 #define T2_GO 0x68/4 161 #define T2_LATCH 0x6c/4 162 163 #define T3_LATCH_LO 0x70/4 164 #define T3_LATCH_HI 0x74/4 165 #define T3_GO 0x78/4 166 #define T3_LATCH 0x7c/4 167 168 #endif // MAME_INCLUDES_ARCHIMEDES_H 169