1 // license:BSD-3-Clause
2 // copyright-holders:Pierpaolo Prazzoli
3 #ifndef MAME_CPU_E132XS_E132XS_H
4 #define MAME_CPU_E132XS_E132XS_H
5
6 #pragma once
7
8 #include "32xsdasm.h"
9 #include "cpu/drcfe.h"
10 #include "cpu/drcuml.h"
11 #include "cpu/drcumlsh.h"
12
13 /*
14 A note about clock multipliers and dividers:
15
16 E1-16[T] and E1-32[T] accept a straight clock
17
18 E1-16X[T|N] and E1-32X[T|N] accept a clock and multiply it
19 internally by 4; in the emulator, you MUST specify 4 * XTAL
20 to achieve the correct speed
21
22 E1-16XS[R] and E1-32XS[R] accept a clock and multiply it
23 internally by 8; in the emulator, you MUST specify 8 * XTAL
24 to achieve the correct speed
25 */
26
27
28
29 /***************************************************************************
30 CONSTANTS
31 ***************************************************************************/
32
33 /* map variables */
34 #define MAPVAR_PC M0
35 #define MAPVAR_CYCLES M1
36
37 #define E132XS_STRICT_VERIFY 0x0001 /* verify all instructions */
38
39 #define SINGLE_INSTRUCTION_MODE (1)
40
41 #define ENABLE_E132XS_DRC (1)
42
43 #define E132XS_LOG_DRC_REGS (0)
44 #define E132XS_LOG_INTERPRETER_REGS (0)
45 #define E132XS_COUNT_INSTRUCTIONS (0)
46
47 //**************************************************************************
48 // TYPE DEFINITIONS
49 //**************************************************************************
50
51 class e132xs_frontend;
52
53 // ======================> hyperstone_device
54
55 enum
56 {
57 E132XS_PC = 1,
58 E132XS_SR,
59 E132XS_FER,
60 E132XS_G3,
61 E132XS_G4,
62 E132XS_G5,
63 E132XS_G6,
64 E132XS_G7,
65 E132XS_G8,
66 E132XS_G9,
67 E132XS_G10,
68 E132XS_G11,
69 E132XS_G12,
70 E132XS_G13,
71 E132XS_G14,
72 E132XS_G15,
73 E132XS_G16,
74 E132XS_G17,
75 E132XS_SP,
76 E132XS_UB,
77 E132XS_BCR,
78 E132XS_TPR,
79 E132XS_TCR,
80 E132XS_TR,
81 E132XS_WCR,
82 E132XS_ISR,
83 E132XS_FCR,
84 E132XS_MCR,
85 E132XS_G28,
86 E132XS_G29,
87 E132XS_G30,
88 E132XS_G31,
89 E132XS_CL0, E132XS_CL1, E132XS_CL2, E132XS_CL3,
90 E132XS_CL4, E132XS_CL5, E132XS_CL6, E132XS_CL7,
91 E132XS_CL8, E132XS_CL9, E132XS_CL10, E132XS_CL11,
92 E132XS_CL12, E132XS_CL13, E132XS_CL14, E132XS_CL15,
93 E132XS_L0, E132XS_L1, E132XS_L2, E132XS_L3,
94 E132XS_L4, E132XS_L5, E132XS_L6, E132XS_L7,
95 E132XS_L8, E132XS_L9, E132XS_L10, E132XS_L11,
96 E132XS_L12, E132XS_L13, E132XS_L14, E132XS_L15,
97 E132XS_L16, E132XS_L17, E132XS_L18, E132XS_L19,
98 E132XS_L20, E132XS_L21, E132XS_L22, E132XS_L23,
99 E132XS_L24, E132XS_L25, E132XS_L26, E132XS_L27,
100 E132XS_L28, E132XS_L29, E132XS_L30, E132XS_L31,
101 E132XS_L32, E132XS_L33, E132XS_L34, E132XS_L35,
102 E132XS_L36, E132XS_L37, E132XS_L38, E132XS_L39,
103 E132XS_L40, E132XS_L41, E132XS_L42, E132XS_L43,
104 E132XS_L44, E132XS_L45, E132XS_L46, E132XS_L47,
105 E132XS_L48, E132XS_L49, E132XS_L50, E132XS_L51,
106 E132XS_L52, E132XS_L53, E132XS_L54, E132XS_L55,
107 E132XS_L56, E132XS_L57, E132XS_L58, E132XS_L59,
108 E132XS_L60, E132XS_L61, E132XS_L62, E132XS_L63
109 };
110
111 // Used by core CPU interface
112 class hyperstone_device : public cpu_device, public hyperstone_disassembler::config
113 {
114 friend class e132xs_frontend;
115
116 public:
117 virtual ~hyperstone_device() override;
118
119 inline void ccfunc_unimplemented();
120 inline void ccfunc_print();
121 inline void ccfunc_total_cycles();
122 inline void ccfunc_standard_irq_callback();
123
124 #if E132XS_LOG_DRC_REGS || E132XS_LOG_INTERPRETER_REGS
125 void dump_registers();
126 #endif
127 void update_timer_prescale();
128 void compute_tr();
129 void adjust_timer_interrupt();
130
131 void e116_16k_iram_map(address_map &map);
132 void e116_4k_iram_map(address_map &map);
133 void e116_8k_iram_map(address_map &map);
134 void e132_16k_iram_map(address_map &map);
135 void e132_4k_iram_map(address_map &map);
136 void e132_8k_iram_map(address_map &map);
137
138 static uint32_t imm_length(uint16_t op);
139
140 protected:
141 // compilation boundaries -- how far back/forward does the analysis extend?
142 enum : u32
143 {
144 COMPILE_BACKWARDS_BYTES = 128,
145 COMPILE_FORWARDS_BYTES = 512,
146 COMPILE_MAX_INSTRUCTIONS = (COMPILE_BACKWARDS_BYTES / 4) + (COMPILE_FORWARDS_BYTES / 4),
147 COMPILE_MAX_SEQUENCE = 64
148 };
149
150 // exit codes
151 enum : int
152 {
153 EXECUTE_OUT_OF_CYCLES = 0,
154 EXECUTE_MISSING_CODE = 1,
155 EXECUTE_UNMAPPED_CODE = 2,
156 EXECUTE_RESET_CACHE = 3
157 };
158
159 struct internal_hyperstone_state
160 {
161 // CPU registers
162 uint32_t global_regs[32];
163 uint32_t local_regs[64];
164 uint8_t fl_lut[16];
165
166 /* internal stuff */
167 uint32_t trap_entry; // entry point to get trap address
168
169 uint8_t clock_scale_mask;
170 uint8_t clck_scale;
171 uint32_t clock_cycles_1;
172 uint32_t clock_cycles_2;
173 uint32_t clock_cycles_3;
174 uint32_t clock_cycles_4;
175 uint32_t clock_cycles_6;
176 uint32_t clock_cycles_36;
177
178 uint64_t tr_base_cycles;
179 uint32_t tr_base_value;
180 uint32_t tr_result;
181 uint32_t tr_clocks_per_tick;
182 uint32_t timer_int_pending;
183
184 uint64_t numcycles;
185
186 uint32_t delay_pc;
187 uint32_t delay_slot;
188 uint32_t delay_slot_taken;
189
190 int32_t intblock;
191
192 uint32_t arg0;
193 uint32_t arg1;
194
195 // other internal state
196 int icount;
197 };
198
199 enum reg_bank
200 {
201 LOCAL = 0,
202 GLOBAL = 1
203 };
204
205 enum imm_size
206 {
207 SIMM = 0,
208 LIMM = 1
209 };
210
211 enum shift_type
212 {
213 N_LO = 0,
214 N_HI = 1
215 };
216
217 enum sign_mode
218 {
219 IS_UNSIGNED = 0,
220 IS_SIGNED = 1
221 };
222
223 enum branch_condition
224 {
225 COND_V = 0,
226 COND_Z = 1,
227 COND_C = 2,
228 COND_CZ = 3,
229 COND_N = 4,
230 COND_NZ = 5
231 };
232
233 enum condition_set
234 {
235 IS_CLEAR = 0,
236 IS_SET = 1
237 };
238
239 enum trap_exception_or_int
240 {
241 IS_TRAP = 0,
242 IS_INT = 1,
243 IS_EXCEPTION = 2
244 };
245
246 enum is_timer
247 {
248 NO_TIMER = 0,
249 IS_TIMER = 1
250 };
251
252 enum
253 {
254 EXCEPTION_IO2 = 48,
255 EXCEPTION_IO1 = 49,
256 EXCEPTION_INT4 = 50,
257 EXCEPTION_INT3 = 51,
258 EXCEPTION_INT2 = 52,
259 EXCEPTION_INT1 = 53,
260 EXCEPTION_IO3 = 54,
261 EXCEPTION_TIMER = 55,
262 EXCEPTION_RESERVED1 = 56,
263 EXCEPTION_TRACE = 57,
264 EXCEPTION_PARITY_ERROR = 58,
265 EXCEPTION_EXTENDED_OVERFLOW = 59,
266 EXCEPTION_RANGE_ERROR = 60,
267 EXCEPTION_PRIVILEGE_ERROR = EXCEPTION_RANGE_ERROR,
268 EXCEPTION_FRAME_ERROR = EXCEPTION_RANGE_ERROR,
269 EXCEPTION_RESERVED2 = 61,
270 EXCEPTION_RESET = 62, // reserved if not mapped @ MEM3
271 EXCEPTION_ERROR_ENTRY = 63, // for instruction code of all ones
272 EXCEPTION_COUNT
273 };
274
275 // construction/destruction
276 hyperstone_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
277 const device_type type, uint32_t prg_data_width, uint32_t io_data_width, address_map_constructor internal_map);
278
279 void init(int scale_mask);
280
281 // device-level overrides
282 virtual void device_start() override;
283 virtual void device_reset() override;
284 virtual void device_stop() override;
285
286 // device_execute_interface overrides
287 virtual uint32_t execute_min_cycles() const noexcept override;
288 virtual uint32_t execute_max_cycles() const noexcept override;
289 virtual uint32_t execute_input_lines() const noexcept override;
290 virtual void execute_run() override;
291 virtual void execute_set_input(int inputnum, int state) override;
292
293 // device_memory_interface overrides
294 virtual space_config_vector memory_space_config() const override;
295
296 // device_disasm_interface overrides
297 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
298 virtual u8 get_fp() const override;
299 virtual bool get_h() const override;
300
301 // device_state_interface overrides
302 virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
303
304 // address spaces
305 const address_space_config m_program_config;
306 const address_space_config m_io_config;
307 address_space *m_program;
308 memory_access<32, 1, 0, ENDIANNESS_BIG>::cache m_cache16;
309 memory_access<32, 2, 0, ENDIANNESS_BIG>::cache m_cache32;
310
311 std::function<u16 (offs_t)> m_pr16;
312 std::function<const void * (offs_t)> m_prptr;
313 address_space *m_io;
314
315 uint16_t m_op; // opcode
316
317 /* core state */
318 internal_hyperstone_state *m_core;
319
320 int32_t m_instruction_length;
321 bool m_instruction_length_valid;
322
323 emu_timer *m_timer;
324
325 static const uint32_t s_trap_entries[8];
326 static const int32_t s_immediate_values[16];
327
328 uint32_t m_op_counts[256];
329 uint32_t get_trap_addr(uint8_t trapno);
330
331 private:
332 // internal functions
333 template <hyperstone_device::is_timer TIMER> void check_interrupts();
334
335 void set_global_register(uint8_t code, uint32_t val);
336 void set_local_register(uint8_t code, uint32_t val);
337
338 uint32_t get_global_register(uint8_t code);
339
340 uint32_t get_emu_code_addr(uint8_t num);
341 int32_t get_instruction_length(uint16_t op);
342
343 TIMER_CALLBACK_MEMBER(timer_callback);
344
345 uint32_t decode_const();
346 uint32_t decode_immediate_s();
347 void ignore_immediate_s();
348 int32_t decode_pcrel();
349 void ignore_pcrel();
350
351 void hyperstone_br();
352 void execute_trap(uint32_t addr);
353 void execute_int(uint32_t addr);
354 void execute_exception(uint32_t addr);
355 void execute_software();
356
357 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_chk();
358 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_movd();
359 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void hyperstone_divsu();
360 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_xm();
361 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_mask();
362 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_sum();
363 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_sums();
364 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_cmp();
365 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_mov();
366 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_add();
367 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_adds();
368 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_cmpb();
369 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_subc();
370 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_sub();
371 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_subs();
372 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_addc();
373 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_neg();
374 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_negs();
375 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_and();
376 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_andn();
377 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_or();
378 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_xor();
379 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_not();
380 template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void hyperstone_cmpi();
381 template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void hyperstone_movi();
382 template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void hyperstone_addi();
383 template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void hyperstone_addsi();
384 template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void hyperstone_cmpbi();
385 template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void hyperstone_andni();
386 template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void hyperstone_ori();
387 template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void hyperstone_xori();
388 template <shift_type HI_N> void hyperstone_shrdi();
389 void hyperstone_shrd();
390 void hyperstone_shr();
391 template <shift_type HI_N, reg_bank DST_GLOBAL> void hyperstone_shri();
392 template <shift_type HI_N> void hyperstone_sardi();
393 void hyperstone_sard();
394 void hyperstone_sar();
395 template <shift_type HI_N, reg_bank DST_GLOBAL> void hyperstone_sari();
396 template <shift_type HI_N> void hyperstone_shldi();
397 void hyperstone_shld();
398 void hyperstone_shl();
399 template <shift_type HI_N, reg_bank DST_GLOBAL> void hyperstone_shli();
400 void hyperstone_testlz();
401 void hyperstone_rol();
402 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_ldxx1();
403 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_ldxx2();
404 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_stxx1();
405 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_stxx2();
406
407 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void hyperstone_mulsu();
408 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_mul();
409
410 template <shift_type HI_N, reg_bank DST_GLOBAL> void hyperstone_set();
411
412 template <reg_bank SRC_GLOBAL> void hyperstone_ldwr();
413 template <reg_bank SRC_GLOBAL> void hyperstone_lddr();
414 template <reg_bank SRC_GLOBAL> void hyperstone_ldwp();
415 template <reg_bank SRC_GLOBAL> void hyperstone_lddp();
416
417 template <reg_bank SRC_GLOBAL> void hyperstone_stwr();
418 template <reg_bank SRC_GLOBAL> void hyperstone_stdr();
419 template <reg_bank SRC_GLOBAL> void hyperstone_stwp();
420 template <reg_bank SRC_GLOBAL> void hyperstone_stdp();
421
422 template <branch_condition CONDITION, condition_set COND_SET> void hyperstone_b();
423 template <branch_condition CONDITION, condition_set COND_SET> void hyperstone_db();
424 void hyperstone_dbr();
425
426 void hyperstone_frame();
427 template <hyperstone_device::reg_bank SRC_GLOBAL> void hyperstone_call();
428
429 void hyperstone_trap();
430 void hyperstone_extend();
431
432 void hyperstone_reserved();
433 void hyperstone_do();
434
435 #if E132XS_LOG_DRC_REGS || E132XS_LOG_INTERPRETER_REGS
436 FILE *m_trace_log;
437 #endif
438
439 drc_cache m_cache;
440 std::unique_ptr<drcuml_state> m_drcuml;
441 std::unique_ptr<e132xs_frontend> m_drcfe;
442 uint32_t m_drcoptions;
443 uint8_t m_cache_dirty;
444
445 uml::code_handle *m_entry;
446 uml::code_handle *m_nocode;
447 uml::code_handle *m_interrupt_checks;
448 uml::code_handle *m_out_of_cycles;
449
450 uml::code_handle *m_mem_read8;
451 uml::code_handle *m_mem_write8;
452 uml::code_handle *m_mem_read16;
453 uml::code_handle *m_mem_write16;
454 uml::code_handle *m_mem_read32;
455 uml::code_handle *m_mem_write32;
456 uml::code_handle *m_io_read32;
457 uml::code_handle *m_io_write32;
458 uml::code_handle *m_exception[EXCEPTION_COUNT];
459
460 bool m_enable_drc;
461
462 /* internal compiler state */
463 struct compiler_state
464 {
465 compiler_state(compiler_state const &) = delete;
466 compiler_state &operator=(compiler_state const &) = delete;
467
468 uint32_t m_cycles; /* accumulated cycles */
469 uint8_t m_checkints; /* need to check interrupts before next instruction */
470 uml::code_label m_labelnum; /* index for local labels */
471 };
472
473 void execute_run_drc();
474 void flush_drc_cache();
475 void code_flush_cache();
476 void code_compile_block(offs_t pc);
477 //void load_fast_iregs(drcuml_block &block);
478 //void save_fast_iregs(drcuml_block &block);
479 void static_generate_entry_point();
480 void static_generate_nocode_handler();
481 void static_generate_out_of_cycles();
482 void static_generate_exception(uint32_t exception, const char *name);
483 void static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, uml::code_handle *&handleptr);
484 void static_generate_interrupt_checks();
485 void generate_interrupt_checks_no_timer(drcuml_block &block, uml::code_label &labelnum);
486 void generate_interrupt_checks_with_timer(drcuml_block &block, uml::code_label &labelnum);
487 void generate_branch(drcuml_block &block, uml::parameter targetpc, const opcode_desc *desc, bool update_cycles = true);
488 void generate_update_cycles(drcuml_block &block, bool check_interrupts = true);
489 void generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
490 void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
491 void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op);
492 bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
493
494 void generate_get_trap_addr(drcuml_block &block, uml::code_label &label, uint32_t trapno);
495 void generate_check_delay_pc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
496 void generate_decode_const(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
497 void generate_decode_immediate_s(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
498 void generate_ignore_immediate_s(drcuml_block &block, const opcode_desc *desc);
499 void generate_decode_pcrel(drcuml_block &block, const opcode_desc *desc);
500 void generate_ignore_pcrel(drcuml_block &block, const opcode_desc *desc);
501
502 void generate_get_global_register(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
503 void generate_set_global_register(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
504
505 template <trap_exception_or_int TYPE> void generate_trap_exception_or_int(drcuml_block &block);
506 void generate_int(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t addr);
507 void generate_exception(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t addr);
508 void generate_software(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
509
510 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_chk(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
511 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_movd(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
512 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void generate_divsu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
513 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_xm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
514 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_mask(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
515 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_sum(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
516 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_sums(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
517 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_cmp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
518 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_mov(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
519 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_add(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
520 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_adds(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
521 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_cmpb(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
522 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_subc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
523 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_sub(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
524 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_subs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
525 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_addc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
526 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_neg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
527 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_negs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
528 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_and(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
529 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_andn(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
530 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_or(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
531 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_xor(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
532 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_not(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
533 template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_cmpi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
534 template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_movi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
535 template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_addi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
536 template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_addsi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
537 template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_cmpbi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
538 template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_andni(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
539 template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_ori(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
540 template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_xori(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
541 template <shift_type HI_N> void generate_shrdi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
542 void generate_shrd(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
543 void generate_shr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
544 template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_shri(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
545 template <shift_type HI_N> void generate_sardi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
546 void generate_sard(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
547 void generate_sar(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
548 template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_sari(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
549 template <shift_type HI_N> void generate_shldi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
550 void generate_shld(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
551 void generate_shl(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
552 template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_shli(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
553 void generate_testlz(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
554 void generate_rol(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
555 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_ldxx1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
556 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_ldxx2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
557 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_stxx1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
558 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_stxx2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
559
560 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void generate_mulsu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
561 template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_mul(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
562
563 template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_set(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
564
565 template <reg_bank SRC_GLOBAL> void generate_ldwr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
566 template <reg_bank SRC_GLOBAL> void generate_lddr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
567 template <reg_bank SRC_GLOBAL> void generate_ldwp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
568 template <reg_bank SRC_GLOBAL> void generate_lddp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
569
570 template <reg_bank SRC_GLOBAL> void generate_stwr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
571 template <reg_bank SRC_GLOBAL> void generate_stdr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
572 template <reg_bank SRC_GLOBAL> void generate_stwp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
573 template <reg_bank SRC_GLOBAL> void generate_stdp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
574
575 template <branch_condition CONDITION, condition_set COND_SET> void generate_b(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
576 void generate_br(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
577 template <branch_condition CONDITION, condition_set COND_SET> void generate_db(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
578 void generate_dbr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
579
580 void generate_frame(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
581 template <hyperstone_device::reg_bank SRC_GLOBAL> void generate_call(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
582
583 void generate_trap_op(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
584 void generate_extend(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
585
586 void generate_reserved(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
587 void generate_do(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
588 };
589
590 // device type definition
DECLARE_DEVICE_TYPE(E116T,e116t_device)591 DECLARE_DEVICE_TYPE(E116T, e116t_device)
592 DECLARE_DEVICE_TYPE(E116XT, e116xt_device)
593 DECLARE_DEVICE_TYPE(E116XS, e116xs_device)
594 DECLARE_DEVICE_TYPE(E116XSR, e116xsr_device)
595 DECLARE_DEVICE_TYPE(E132N, e132n_device)
596 DECLARE_DEVICE_TYPE(E132T, e132t_device)
597 DECLARE_DEVICE_TYPE(E132XN, e132xn_device)
598 DECLARE_DEVICE_TYPE(E132XT, e132xt_device)
599 DECLARE_DEVICE_TYPE(E132XS, e132xs_device)
600 DECLARE_DEVICE_TYPE(E132XSR, e132xsr_device)
601 DECLARE_DEVICE_TYPE(GMS30C2116, gms30c2116_device)
602 DECLARE_DEVICE_TYPE(GMS30C2132, gms30c2132_device)
603 DECLARE_DEVICE_TYPE(GMS30C2216, gms30c2216_device)
604 DECLARE_DEVICE_TYPE(GMS30C2232, gms30c2232_device)
605
606
607 // ======================> e116t_device
608
609 class e116t_device : public hyperstone_device
610 {
611 public:
612 // construction/destruction
613 e116t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
614
615 protected:
616 virtual void device_start() override;
617 };
618
619
620 // ======================> e116xt_device
621
622 class e116xt_device : public hyperstone_device
623 {
624 public:
625 // construction/destruction
626 e116xt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
627
628 protected:
629 virtual void device_start() override;
630 };
631
632
633 // ======================> e116xs_device
634
635 class e116xs_device : public hyperstone_device
636 {
637 public:
638 // construction/destruction
639 e116xs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
640
641 protected:
642 virtual void device_start() override;
643 };
644
645
646 // ======================> e116xsr_device
647
648 class e116xsr_device : public hyperstone_device
649 {
650 public:
651 // construction/destruction
652 e116xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
653
654 protected:
655 virtual void device_start() override;
656 };
657
658
659 // ======================> e132n_device
660
661 class e132n_device : public hyperstone_device
662 {
663 public:
664 // construction/destruction
665 e132n_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
666
667 protected:
668 virtual void device_start() override;
669 };
670
671
672 // ======================> e132t_device
673
674 class e132t_device : public hyperstone_device
675 {
676 public:
677 // construction/destruction
678 e132t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
679
680 protected:
681 virtual void device_start() override;
682 };
683
684
685 // ======================> e132xn_device
686
687 class e132xn_device : public hyperstone_device
688 {
689 public:
690 // construction/destruction
691 e132xn_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
692
693 protected:
694 virtual void device_start() override;
695 };
696
697
698 // ======================> e132xt_device
699
700 class e132xt_device : public hyperstone_device
701 {
702 public:
703 // construction/destruction
704 e132xt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
705
706 protected:
707 virtual void device_start() override;
708 };
709
710
711 // ======================> e132xs_device
712
713 class e132xs_device : public hyperstone_device
714 {
715 public:
716 // construction/destruction
717 e132xs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
718
719 protected:
720 virtual void device_start() override;
721 };
722
723
724 // ======================> e132xsr_device
725
726 class e132xsr_device : public hyperstone_device
727 {
728 public:
729 // construction/destruction
730 e132xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
731
732 protected:
733 virtual void device_start() override;
734 };
735
736
737 // ======================> gms30c2116_device
738
739 class gms30c2116_device : public hyperstone_device
740 {
741 public:
742 // construction/destruction
743 gms30c2116_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
744
745 protected:
746 virtual void device_start() override;
747 };
748
749
750 // ======================> gms30c2132_device
751
752 class gms30c2132_device : public hyperstone_device
753 {
754 public:
755 // construction/destruction
756 gms30c2132_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
757
758 protected:
759 virtual void device_start() override;
760 };
761
762
763 // ======================> gms30c2216_device
764
765 class gms30c2216_device : public hyperstone_device
766 {
767 public:
768 // construction/destruction
769 gms30c2216_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
770
771 protected:
772 virtual void device_start() override;
773 };
774
775
776 // ======================> gms30c2232_device
777
778 class gms30c2232_device : public hyperstone_device
779 {
780 public:
781 // construction/destruction
782 gms30c2232_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
783
784 protected:
785 virtual void device_start() override;
786 };
787
788
789 #endif // MAME_CPU_E132XS_E132XS_H
790