1 // license:BSD-3-Clause
2 // copyright-holders:Olivier Galibert, R. Belmont
3 /***************************************************************************
4 
5     mcs96.h
6 
7     MCS96
8 
9 ***************************************************************************/
10 
11 #ifndef MAME_CPU_MCS96_MCS96_H
12 #define MAME_CPU_MCS96_MCS96_H
13 
14 #pragma once
15 
16 class mcs96_device : public cpu_device {
17 public:
18 	enum {
19 		MCS96_PC = 1,
20 		MCS96_PSW,
21 		MCS96_INT_PENDING,
22 		MCS96_SP,
23 		MCS96_AX, MCS96_AL, MCS96_AH,
24 		MCS96_DX, MCS96_DL, MCS96_DH,
25 		MCS96_BX, MCS96_BL, MCS96_BH,
26 		MCS96_CX, MCS96_CL, MCS96_CH,
27 		MCS96_LAST_REG = MCS96_CH
28 	};
29 
30 protected:
31 	enum {
32 		STATE_FETCH = 0x200,
33 		STATE_FETCH_NOIRQ = 0x201
34 	};
35 
36 	enum {
37 		F_ST = 0x0100,
38 		F_I  = 0x0200,
39 		F_C  = 0x0800,
40 		F_VT = 0x1000,
41 		F_V  = 0x2000,
42 		F_N  = 0x4000,
43 		F_Z  = 0x8000
44 	};
45 
46 
47 	mcs96_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int data_width, address_map_constructor regs_map);
48 
49 	// device-level overrides
50 	virtual void device_start() override;
51 	virtual void device_reset() override;
52 
53 	// device_execute_interface overrides
54 	virtual uint32_t execute_min_cycles() const noexcept override;
55 	virtual uint32_t execute_max_cycles() const noexcept override;
56 	virtual void execute_run() override;
57 
58 	// device_memory_interface overrides
59 	virtual space_config_vector memory_space_config() const override;
60 
61 	// device_state_interface overrides
62 	virtual void state_import(const device_state_entry &entry) override;
63 	virtual void state_export(const device_state_entry &entry) override;
64 	virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
65 
66 	address_space_config program_config, regs_config;
67 	address_space *program, *regs;
68 	memory_access<16, 0, 0, ENDIANNESS_LITTLE>::cache m_cache8;
69 	memory_access<16, 1, 0, ENDIANNESS_LITTLE>::cache m_cache16;
70 	std::function<u8 (offs_t address)> m_pr8;
71 	required_shared_ptr<u16> register_file;
72 
73 	int icount, bcount, inst_state, cycles_scaling;
74 	uint8_t pending_irq;
75 	uint16_t PC, PPC, PSW;
76 	uint16_t OP1;
77 	uint8_t OP2, OP3, OPI;
78 	uint32_t TMP;
79 	bool irq_requested;
80 
81 	virtual void do_exec_full() = 0;
82 	virtual void do_exec_partial() = 0;
83 	virtual void internal_update(uint64_t current_time) = 0;
84 
85 	void recompute_bcount(uint64_t event_time);
86 
next(int cycles)87 	inline void next(int cycles) { icount -= cycles_scaling*cycles; inst_state = STATE_FETCH; }
next_noirq(int cycles)88 	inline void next_noirq(int cycles) { icount -= cycles_scaling*cycles; inst_state = STATE_FETCH_NOIRQ; }
89 	void check_irq();
read_pc()90 	inline uint8_t read_pc() { return m_pr8(PC++); }
91 
92 	void int_mask_w(u8 data);
93 	u8 int_mask_r();
94 	void int_pending_w(u8 data);
95 	u8 int_pending_r();
96 
97 	void reg_w8(uint8_t adr, uint8_t data);
98 	void reg_w16(uint8_t adr, uint16_t data);
99 	void any_w8(uint16_t adr, uint8_t data);
100 	void any_w16(uint16_t adr, uint16_t data);
101 
102 	uint8_t reg_r8(uint8_t adr);
103 	uint16_t reg_r16(uint8_t adr);
104 	uint8_t any_r8(uint16_t adr);
105 	uint16_t any_r16(uint16_t adr);
106 
107 	uint8_t do_addb(uint8_t v1, uint8_t v2);
108 	uint16_t do_add(uint16_t v1, uint16_t v2);
109 	uint8_t do_subb(uint8_t v1, uint8_t v2);
110 	uint16_t do_sub(uint16_t v1, uint16_t v2);
111 
112 	uint8_t do_addcb(uint8_t v1, uint8_t v2);
113 	uint16_t do_addc(uint16_t v1, uint16_t v2);
114 	uint8_t do_subcb(uint8_t v1, uint8_t v2);
115 	uint16_t do_subc(uint16_t v1, uint16_t v2);
116 
117 	void set_nz8(uint8_t v);
118 	void set_nz16(uint16_t v);
119 
120 #define O(o) void o ## _full(); void o ## _partial()
121 
122 	O(add_direct_2w); O(add_direct_3w); O(add_immed_2w); O(add_immed_3w); O(add_indexed_2w); O(add_indexed_3w); O(add_indirect_2w); O(add_indirect_3w);
123 	O(addb_direct_2b); O(addb_direct_3b); O(addb_immed_2b); O(addb_immed_3b); O(addb_indexed_2b); O(addb_indexed_3b); O(addb_indirect_2b); O(addb_indirect_3b);
124 	O(addc_direct_2w); O(addc_immed_2w); O(addc_indexed_2w); O(addc_indirect_2w);
125 	O(addcb_direct_2b); O(addcb_immed_2b); O(addcb_indexed_2b); O(addcb_indirect_2b);
126 	O(and_direct_2w); O(and_direct_3w); O(and_immed_2w); O(and_immed_3w); O(and_indexed_2w); O(and_indexed_3w); O(and_indirect_2w); O(and_indirect_3w);
127 	O(andb_direct_2b); O(andb_direct_3b); O(andb_immed_2b); O(andb_immed_3b); O(andb_indexed_2b); O(andb_indexed_3b); O(andb_indirect_2b); O(andb_indirect_3b);
128 	O(br_indirect_1n);
129 	O(clr_direct_1w);
130 	O(clrb_direct_1b);
131 	O(clrc_none);
132 	O(clrvt_none);
133 	O(cmp_direct_2w); O(cmp_immed_2w); O(cmp_indexed_2w); O(cmp_indirect_2w);
134 	O(cmpb_direct_2b); O(cmpb_immed_2b); O(cmpb_indexed_2b); O(cmpb_indirect_2b);
135 	O(dec_direct_1w);
136 	O(decb_direct_1b);
137 	O(di_none);
138 	O(div_direct_2w); O(div_immed_2w); O(div_indexed_2w); O(div_indirect_2w);
139 	O(divb_direct_2e); O(divb_immed_2e); O(divb_indexed_2w); O(divb_indirect_2w);
140 	O(divu_direct_2w); O(divu_immed_2w); O(divu_indexed_2w); O(divu_indirect_2w);
141 	O(divub_direct_2e); O(divub_immed_2e); O(divub_indexed_2w); O(divub_indirect_2w);
142 	O(djnz_rrel8);
143 	O(djnzw_wrrel8);
144 	O(ei_none);
145 	O(ext_direct_1w);
146 	O(extb_direct_1b);
147 	O(idlpd_none);
148 	O(inc_direct_1w);
149 	O(incb_direct_1b);
150 	O(jbc_brrel8);
151 	O(jbs_brrel8);
152 	O(jc_rel8);
153 	O(je_rel8);
154 	O(jge_rel8);
155 	O(jgt_rel8);
156 	O(jh_rel8);
157 	O(jle_rel8);
158 	O(jlt_rel8);
159 	O(jnc_rel8);
160 	O(jne_rel8);
161 	O(jnh_rel8);
162 	O(jnst_rel8);
163 	O(jnv_rel8);
164 	O(jnvt_rel8);
165 	O(jst_rel8);
166 	O(jv_rel8);
167 	O(jvt_rel8);
168 	O(lcall_rel16);
169 	O(ld_direct_2w); O(ld_immed_2w); O(ld_indexed_2w); O(ld_indirect_2w);
170 	O(ldb_direct_2b); O(ldb_immed_2b); O(ldb_indexed_2b); O(ldb_indirect_2b);
171 	O(ldbse_direct_2e); O(ldbse_immed_2e); O(ldbse_indexed_2w); O(ldbse_indirect_2w);
172 	O(ldbze_direct_2e); O(ldbze_immed_2e); O(ldbze_indexed_2w); O(ldbze_indirect_2w);
173 	O(ljmp_rel16);
174 	O(mul_direct_2w); O(mul_direct_3w); O(mul_immed_2w); O(mul_immed_3w); O(mul_indexed_2w); O(mul_indexed_3w); O(mul_indirect_2w); O(mul_indirect_3w);
175 	O(mulb_direct_2b); O(mulb_direct_3e); O(mulb_immed_2b); O(mulb_immed_3e); O(mulb_indexed_2b); O(mulb_indexed_3e); O(mulb_indirect_2b); O(mulb_indirect_3e);
176 	O(mulu_direct_2w); O(mulu_direct_3w); O(mulu_immed_2w); O(mulu_immed_3w); O(mulu_indexed_2w); O(mulu_indexed_3w); O(mulu_indirect_2w); O(mulu_indirect_3w);
177 	O(mulub_direct_2b); O(mulub_direct_3e); O(mulub_immed_2b); O(mulub_immed_3e); O(mulub_indexed_2b); O(mulub_indexed_3e); O(mulub_indirect_2b); O(mulub_indirect_3e);
178 	O(neg_direct_1w);
179 	O(negb_direct_1b);
180 	O(nop_none);
181 	O(norml_direct_2e);
182 	O(not_direct_1w);
183 	O(notb_direct_1b);
184 	O(or_direct_2w); O(or_immed_2w); O(or_indexed_2w); O(or_indirect_2w);
185 	O(orb_direct_2b); O(orb_immed_2b); O(orb_indexed_2b); O(orb_indirect_2b);
186 	O(pop_direct_1w); O(pop_indexed_1w); O(pop_indirect_1w);
187 	O(popf_none);
188 	O(push_direct_1w); O(push_immed_1w); O(push_indexed_1w); O(push_indirect_1w);
189 	O(pushf_none);
190 	O(ret_none);
191 	O(rst_none);
192 	O(scall_rel11);
193 	O(setc_none);
194 	O(shl_immed_or_reg_2w);
195 	O(shlb_immed_or_reg_2b);
196 	O(shll_immed_or_reg_2w);
197 	O(shr_immed_or_reg_2w);
198 	O(shra_immed_or_reg_2w);
199 	O(shrab_immed_or_reg_2b);
200 	O(shral_immed_or_reg_2w);
201 	O(shrb_immed_or_reg_2b);
202 	O(shrl_immed_or_reg_2w);
203 	O(sjmp_rel11);
204 	O(skip_immed_1b);
205 	O(st_direct_2w); O(st_indexed_2w); O(st_indirect_2w);
206 	O(stb_direct_2b); O(stb_indexed_2b); O(stb_indirect_2b);
207 	O(sub_direct_2w); O(sub_direct_3w); O(sub_immed_2w); O(sub_immed_3w); O(sub_indexed_2w); O(sub_indexed_3w); O(sub_indirect_2w); O(sub_indirect_3w);
208 	O(subb_direct_2b); O(subb_direct_3b); O(subb_immed_2b); O(subb_immed_3b); O(subb_indexed_2b); O(subb_indexed_3b); O(subb_indirect_2b); O(subb_indirect_3b);
209 	O(subc_direct_2w); O(subc_immed_2w); O(subc_indexed_2w); O(subc_indirect_2w);
210 	O(subcb_direct_2b); O(subcb_immed_2b); O(subcb_indexed_2b); O(subcb_indirect_2b);
211 	O(trap_none);
212 	O(xch_direct_2w);
213 	O(xchb_direct_2b);
214 	O(xor_direct_2w); O(xor_immed_2w); O(xor_indexed_2w); O(xor_indirect_2w);
215 	O(xorb_direct_2b); O(xorb_immed_2b); O(xorb_indexed_2b); O(xorb_indirect_2b);
216 
217 	O(fetch);
218 	O(fetch_noirq);
219 
220 #undef O
221 };
222 
223 #endif // MAME_CPU_MCS96_MCS96_H
224