1 // license:BSD-3-Clause
2 // copyright-holders:ElSemi
3 #include "emu.h"
4 #include "se3208dis.h"
5
6 #define FLAG_E 0x0800
7
8 #define CLRFLAG(f) SR&=~(f);
9 #define SETFLAG(f) SR|=(f);
10 #define TESTFLAG(f) (SR&(f))
11
12 #define EXTRACT(val,sbit,ebit) (((val)>>sbit)&((1<<((ebit-sbit)+1))-1))
13 #define SEX8(val) ((val&0x80)?(val|0xFFFFFF00):(val&0xFF))
14 #define SEX16(val) ((val&0x8000)?(val|0xFFFF0000):(val&0xFFFF))
15 #define ZEX8(val) ((val)&0xFF)
16 #define ZEX16(val) ((val)&0xFFFF)
17 #define SEX(bits,val) ((val)&(1<<(bits-1))?((val)|(~((1<<bits)-1))):(val&((1<<bits)-1)))
18
19 #define INST(a) uint32_t se3208_disassembler::a(uint16_t Opcode, std::ostream &stream)
20
21
22
INST(INVALIDOP)23 INST(INVALIDOP)
24 {
25 util::stream_format(stream, "INVALID");
26 return 0;
27 }
28
INST(LDB)29 INST(LDB)
30 {
31 uint32_t Offset=EXTRACT(Opcode,0,4);
32 uint32_t Index=EXTRACT(Opcode,5,7);
33 uint32_t SrcDst=EXTRACT(Opcode,8,10);
34
35 if(TESTFLAG(FLAG_E))
36 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
37
38 if(Index)
39 util::stream_format(stream, "LDB (%%R%d,0x%x),%%R%d",Index,Offset,SrcDst);
40 else
41 util::stream_format(stream, "LDB (0x%x),%%R%d",Index+Offset,SrcDst);
42
43 CLRFLAG(FLAG_E);
44 return 0;
45 }
46
INST(STB)47 INST(STB)
48 {
49 uint32_t Offset=EXTRACT(Opcode,0,4);
50 uint32_t Index=EXTRACT(Opcode,5,7);
51 uint32_t SrcDst=EXTRACT(Opcode,8,10);
52
53 if(TESTFLAG(FLAG_E))
54 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
55
56 if(Index)
57 util::stream_format(stream, "STB %%R%d,(%%R%d,0x%x)",SrcDst,Index,Offset);
58 else
59 util::stream_format(stream, "STB %%R%d,(0x%x)",SrcDst,Index+Offset);
60
61 CLRFLAG(FLAG_E);
62 return 0;
63 }
64
INST(LDS)65 INST(LDS)
66 {
67 uint32_t Offset=EXTRACT(Opcode,0,4);
68 uint32_t Index=EXTRACT(Opcode,5,7);
69 uint32_t SrcDst=EXTRACT(Opcode,8,10);
70
71 Offset<<=1;
72
73 if(TESTFLAG(FLAG_E))
74 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
75
76 if(Index)
77 util::stream_format(stream, "LDS (%%R%d,0x%x),%%R%d",Index,Offset,SrcDst);
78 else
79 util::stream_format(stream, "LDS (0x%x),%%R%d",Index+Offset,SrcDst);
80
81 CLRFLAG(FLAG_E);
82 return 0;
83 }
84
INST(STS)85 INST(STS)
86 {
87 uint32_t Offset=EXTRACT(Opcode,0,4);
88 uint32_t Index=EXTRACT(Opcode,5,7);
89 uint32_t SrcDst=EXTRACT(Opcode,8,10);
90
91 Offset<<=1;
92
93 if(TESTFLAG(FLAG_E))
94 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
95
96 if(Index)
97 util::stream_format(stream, "STS %%R%d,(%%R%d,0x%x)",SrcDst,Index,Offset);
98 else
99 util::stream_format(stream, "STS %%R%d,(0x%x)",SrcDst,Index+Offset);
100
101 CLRFLAG(FLAG_E);
102 return 0;
103 }
104
INST(LD)105 INST(LD)
106 {
107 uint32_t Offset=EXTRACT(Opcode,0,4);
108 uint32_t Index=EXTRACT(Opcode,5,7);
109 uint32_t SrcDst=EXTRACT(Opcode,8,10);
110
111 Offset<<=2;
112
113 if(TESTFLAG(FLAG_E))
114 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
115
116 if(Index)
117 util::stream_format(stream, "LD (%%R%d,0x%x),%%R%d",Index,Offset,SrcDst);
118 else
119 util::stream_format(stream, "LD (0x%x),%%R%d",Index+Offset,SrcDst);
120
121 CLRFLAG(FLAG_E);
122 return 0;
123 }
124
INST(ST)125 INST(ST)
126 {
127 uint32_t Offset=EXTRACT(Opcode,0,4);
128 uint32_t Index=EXTRACT(Opcode,5,7);
129 uint32_t SrcDst=EXTRACT(Opcode,8,10);
130
131 Offset<<=2;
132
133 if(TESTFLAG(FLAG_E))
134 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
135
136 if(Index)
137 util::stream_format(stream, "ST %%R%d,(%%R%d,0x%x)",SrcDst,Index,Offset);
138 else
139 util::stream_format(stream, "ST %%R%d,(0x%x)",SrcDst,Index+Offset);
140
141 CLRFLAG(FLAG_E);
142 return 0;
143 }
144
INST(LDBU)145 INST(LDBU)
146 {
147 uint32_t Offset=EXTRACT(Opcode,0,4);
148 uint32_t Index=EXTRACT(Opcode,5,7);
149 uint32_t SrcDst=EXTRACT(Opcode,8,10);
150
151 if(TESTFLAG(FLAG_E))
152 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
153
154 if(Index)
155 util::stream_format(stream, "LDBU (%%R%d,0x%x),%%R%d",Index,Offset,SrcDst);
156 else
157 util::stream_format(stream, "LDBU (0x%x),%%R%d",Index+Offset,SrcDst);
158
159 CLRFLAG(FLAG_E);
160 return 0;
161 }
162
INST(LDSU)163 INST(LDSU)
164 {
165 uint32_t Offset=EXTRACT(Opcode,0,4);
166 uint32_t Index=EXTRACT(Opcode,5,7);
167 uint32_t SrcDst=EXTRACT(Opcode,8,10);
168
169 Offset<<=1;
170
171 if(TESTFLAG(FLAG_E))
172 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
173
174 if(Index)
175 util::stream_format(stream, "LDSU (%%R%d,0x%x),%%R%d",Index,Offset,SrcDst);
176 else
177 util::stream_format(stream, "LDSU (0x%x),%%R%d",Index+Offset,SrcDst);
178
179 CLRFLAG(FLAG_E);
180 return 0;
181 }
182
183
INST(LERI)184 INST(LERI)
185 {
186 uint32_t Imm=EXTRACT(Opcode,0,13);
187
188 if(TESTFLAG(FLAG_E))
189 ER=(EXTRACT(ER,0,17)<<14)|Imm;
190 else
191 ER=SEX(14,Imm);
192
193 //util::stream_format(stream, "LERI 0x%x\t\tER=%08X",Imm,ER);
194 util::stream_format(stream, "LERI 0x%x",Imm/*,ER*/);
195
196 SETFLAG(FLAG_E);
197 return 0;
198 }
199
INST(LDSP)200 INST(LDSP)
201 {
202 uint32_t Offset=EXTRACT(Opcode,0,7);
203 uint32_t SrcDst=EXTRACT(Opcode,8,10);
204
205 Offset<<=2;
206
207 if(TESTFLAG(FLAG_E))
208 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
209
210 util::stream_format(stream, "LD (%%SP,0x%x),%%R%d",Offset,SrcDst);
211
212 CLRFLAG(FLAG_E);
213 return 0;
214 }
215
INST(STSP)216 INST(STSP)
217 {
218 uint32_t Offset=EXTRACT(Opcode,0,7);
219 uint32_t SrcDst=EXTRACT(Opcode,8,10);
220
221 Offset<<=2;
222
223 if(TESTFLAG(FLAG_E))
224 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
225
226 util::stream_format(stream, "ST %%R%d,(%%SP,0x%x)",SrcDst,Offset);
227
228 CLRFLAG(FLAG_E);
229 return 0;
230 }
231
INST(PUSH)232 INST(PUSH)
233 {
234 uint32_t Set=EXTRACT(Opcode,0,10);
235 stream << "PUSH ";
236 if(Set&(1<<10))
237 stream << "%PC-";
238 if(Set&(1<<9))
239 stream << "%SR-";
240 if(Set&(1<<8))
241 stream << "%ER-";
242 if(Set&(1<<7))
243 stream << "%R7-";
244 if(Set&(1<<6))
245 stream << "%R6-";
246 if(Set&(1<<5))
247 stream << "%R5-";
248 if(Set&(1<<4))
249 stream << "%R4-";
250 if(Set&(1<<3))
251 stream << "%R3-";
252 if(Set&(1<<2))
253 stream << "%R2-";
254 if(Set&(1<<1))
255 stream << "%R1-";
256 if(Set&(1<<0))
257 stream << "%R0-";
258 return 0;
259 }
260
INST(POP)261 INST(POP)
262 {
263 uint32_t Set=EXTRACT(Opcode,0,10);
264 int Ret=0;
265 stream << "POP ";
266 if(Set&(1<<0))
267 stream << "%R0-";
268 if(Set&(1<<1))
269 stream << "%R1-";
270 if(Set&(1<<2))
271 stream << "%R2-";
272 if(Set&(1<<3))
273 stream << "%R3-";
274 if(Set&(1<<4))
275 stream << "%R4-";
276 if(Set&(1<<5))
277 stream << "%R5-";
278 if(Set&(1<<6))
279 stream << "%R6-";
280 if(Set&(1<<7))
281 stream << "%R7-";
282 if(Set&(1<<8))
283 stream << "%ER-";
284 if(Set&(1<<9))
285 stream << "%SR-";
286 if(Set&(1<<10))
287 {
288 stream << "%PC-";
289 CLRFLAG(FLAG_E); //Clear the flag, this is a ret so disassemble will start a new E block
290 Ret=1;
291 }
292 return Ret ? STEP_OUT : 0;
293 }
294
INST(LEATOSP)295 INST(LEATOSP)
296 {
297 uint32_t Offset=EXTRACT(Opcode,9,12);
298 uint32_t Index=EXTRACT(Opcode,3,5);
299
300 if(TESTFLAG(FLAG_E))
301 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
302 else
303 Offset=SEX(4,Offset);
304
305 if(Index)
306 util::stream_format(stream, "LEA (%%R%d,0x%x),%%SP",Index,Offset);
307 else
308 util::stream_format(stream, "LEA (0x%x),%%SP",Index+Offset);
309
310 CLRFLAG(FLAG_E);
311 return 0;
312 }
313
INST(LEAFROMSP)314 INST(LEAFROMSP)
315 {
316 uint32_t Offset=EXTRACT(Opcode,9,12);
317 uint32_t Index=EXTRACT(Opcode,3,5);
318
319 if(TESTFLAG(FLAG_E))
320 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
321 else
322 Offset=SEX(4,Offset);
323
324 util::stream_format(stream, "LEA (%%SP,0x%x),%%R%d",Offset,Index);
325
326 CLRFLAG(FLAG_E);
327 return 0;
328 }
329
INST(LEASPTOSP)330 INST(LEASPTOSP)
331 {
332 uint32_t Offset=EXTRACT(Opcode,0,7);
333
334 Offset<<=2;
335
336 if(TESTFLAG(FLAG_E))
337 Offset=(EXTRACT(ER,0,23)<<8)|(Offset&0xff);
338 else
339 Offset=SEX(10,Offset);
340
341
342 util::stream_format(stream, "LEA (%%SP,0x%x),%%SP",Offset);
343
344 CLRFLAG(FLAG_E);
345 return 0;
346 }
347
INST(MOV)348 INST(MOV)
349 {
350 uint32_t Src=EXTRACT(Opcode,3,5);
351 uint32_t Dst=EXTRACT(Opcode,9,11);
352
353 if(Src==0 && Dst==0)
354 util::stream_format(stream, "NOP");
355 else
356 util::stream_format(stream, "MOV %%SR%d,%%DR%d",Src,Dst);
357 return 0;
358 }
359
INST(LDI)360 INST(LDI)
361 {
362 uint32_t Dst=EXTRACT(Opcode,8,10);
363 uint32_t Imm=EXTRACT(Opcode,0,7);
364
365 if(TESTFLAG(FLAG_E))
366 Imm=(EXTRACT(ER,0,27)<<4)|(Imm&0xf);
367 else
368 Imm=SEX8(Imm);
369
370 util::stream_format(stream, "LDI 0x%x,%%R%d",Imm,Dst);
371
372 CLRFLAG(FLAG_E);
373 return 0;
374 }
375
INST(LDBSP)376 INST(LDBSP)
377 {
378 uint32_t Offset=EXTRACT(Opcode,0,3);
379 uint32_t SrcDst=EXTRACT(Opcode,4,6);
380
381 if(TESTFLAG(FLAG_E))
382 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
383
384 util::stream_format(stream, "LDB (%%SP,0x%x),%%R%d",Offset,SrcDst);
385
386 CLRFLAG(FLAG_E);
387 return 0;
388 }
389
INST(STBSP)390 INST(STBSP)
391 {
392 uint32_t Offset=EXTRACT(Opcode,0,3);
393 uint32_t SrcDst=EXTRACT(Opcode,4,6);
394
395 if(TESTFLAG(FLAG_E))
396 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
397
398 util::stream_format(stream, "STB %%R%d,(%%SP,0x%x)",SrcDst,Offset);
399
400 CLRFLAG(FLAG_E);
401 return 0;
402 }
403
INST(LDSSP)404 INST(LDSSP)
405 {
406 uint32_t Offset=EXTRACT(Opcode,0,3);
407 uint32_t SrcDst=EXTRACT(Opcode,4,6);
408
409 Offset<<=1;
410
411 if(TESTFLAG(FLAG_E))
412 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
413
414 util::stream_format(stream, "LDS (%%SP,0x%x),%%R%d",Offset,SrcDst);
415
416 CLRFLAG(FLAG_E);
417 return 0;
418 }
419
INST(STSSP)420 INST(STSSP)
421 {
422 uint32_t Offset=EXTRACT(Opcode,0,3);
423 uint32_t SrcDst=EXTRACT(Opcode,4,6);
424
425 Offset<<=1;
426
427 if(TESTFLAG(FLAG_E))
428 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
429
430 util::stream_format(stream, "STS %%R%d,(%%SP,0x%x)",SrcDst,Offset);
431
432 CLRFLAG(FLAG_E);
433 return 0;
434 }
435
INST(LDBUSP)436 INST(LDBUSP)
437 {
438 uint32_t Offset=EXTRACT(Opcode,0,3);
439 uint32_t SrcDst=EXTRACT(Opcode,4,6);
440
441 if(TESTFLAG(FLAG_E))
442 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
443
444 util::stream_format(stream, "LDBU (%%SP,0x%x),%%R%d",Offset,SrcDst);
445
446 CLRFLAG(FLAG_E);
447 return 0;
448 }
449
INST(LDSUSP)450 INST(LDSUSP)
451 {
452 uint32_t Offset=EXTRACT(Opcode,0,3);
453 uint32_t SrcDst=EXTRACT(Opcode,4,6);
454
455 Offset<<=1;
456
457 if(TESTFLAG(FLAG_E))
458 Offset=(EXTRACT(ER,0,27)<<4)|(Offset&0xf);
459
460 util::stream_format(stream, "LDSU (%%SP,0x%x),%%R%d",Offset,SrcDst);
461
462 CLRFLAG(FLAG_E);
463 return 0;
464 }
465
INST(ADDI)466 INST(ADDI)
467 {
468 uint32_t Imm=EXTRACT(Opcode,9,12);
469 uint32_t Src=EXTRACT(Opcode,3,5);
470 uint32_t Dst=EXTRACT(Opcode,0,2);
471 uint32_t Imm2=Imm;
472
473 if(TESTFLAG(FLAG_E))
474 Imm2=(EXTRACT(ER,0,27)<<4)|(Imm2&0xf);
475 else
476 Imm2=SEX(4,Imm2);
477
478 util::stream_format(stream, "ADD %%SR%d,0x%x,%%DR%d",Src,Imm2,Dst/*,Imm2*/);
479
480 CLRFLAG(FLAG_E);
481 return 0;
482 }
483
INST(SUBI)484 INST(SUBI)
485 {
486 uint32_t Imm=EXTRACT(Opcode,9,12);
487 uint32_t Src=EXTRACT(Opcode,3,5);
488 uint32_t Dst=EXTRACT(Opcode,0,2);
489 uint32_t Imm2=Imm;
490
491 if(TESTFLAG(FLAG_E))
492 Imm2=(EXTRACT(ER,0,27)<<4)|(Imm2&0xf);
493 else
494 Imm2=SEX(4,Imm2);
495
496 util::stream_format(stream, "SUB %%SR%d,0x%x,%%DR%d",Src,Imm2,Dst/*,Imm2*/);
497
498 CLRFLAG(FLAG_E);
499
500 return 0;
501 }
502
INST(ADCI)503 INST(ADCI)
504 {
505 uint32_t Imm=EXTRACT(Opcode,9,12);
506 uint32_t Src=EXTRACT(Opcode,3,5);
507 uint32_t Dst=EXTRACT(Opcode,0,2);
508 uint32_t Imm2=Imm;
509
510 if(TESTFLAG(FLAG_E))
511 Imm2=(EXTRACT(ER,0,27)<<4)|(Imm2&0xf);
512 else
513 Imm2=SEX(4,Imm2);
514
515 util::stream_format(stream, "ADC %%SR%d,0x%x,%%DR%d",Src,Imm2,Dst/*,Imm2*/);
516
517 CLRFLAG(FLAG_E);
518 return 0;
519 }
520
INST(SBCI)521 INST(SBCI)
522 {
523 uint32_t Imm=EXTRACT(Opcode,9,12);
524 uint32_t Src=EXTRACT(Opcode,3,5);
525 uint32_t Dst=EXTRACT(Opcode,0,2);
526 uint32_t Imm2=Imm;
527
528 if(TESTFLAG(FLAG_E))
529 Imm2=(EXTRACT(ER,0,27)<<4)|(Imm2&0xf);
530 else
531 Imm2=SEX(4,Imm2);
532
533 util::stream_format(stream, "SBC %%SR%d,0x%x,%%DR%d",Src,Imm2,Dst/*,Imm2*/);
534
535 CLRFLAG(FLAG_E);
536 return 0;
537 }
538
INST(ANDI)539 INST(ANDI)
540 {
541 uint32_t Imm=EXTRACT(Opcode,9,12);
542 uint32_t Src=EXTRACT(Opcode,3,5);
543 uint32_t Dst=EXTRACT(Opcode,0,2);
544 uint32_t Imm2=Imm;
545
546 if(TESTFLAG(FLAG_E))
547 Imm2=(EXTRACT(ER,0,27)<<4)|(Imm2&0xf);
548 else
549 Imm2=SEX(4,Imm2);
550
551 util::stream_format(stream, "AND %%SR%d,0x%x,%%DR%d",Src,Imm2,Dst/*,Imm2*/);
552
553 CLRFLAG(FLAG_E);
554 return 0;
555 }
556
INST(ORI)557 INST(ORI)
558 {
559 uint32_t Imm=EXTRACT(Opcode,9,12);
560 uint32_t Src=EXTRACT(Opcode,3,5);
561 uint32_t Dst=EXTRACT(Opcode,0,2);
562 uint32_t Imm2=Imm;
563
564 if(TESTFLAG(FLAG_E))
565 Imm2=(EXTRACT(ER,0,27)<<4)|(Imm2&0xf);
566 else
567 Imm2=SEX(4,Imm2);
568
569 util::stream_format(stream, "OR %%SR%d,0x%x,%%DR%d",Src,Imm2,Dst/*,Imm2*/);
570
571 CLRFLAG(FLAG_E);
572 return 0;
573 }
574
INST(XORI)575 INST(XORI)
576 {
577 uint32_t Imm=EXTRACT(Opcode,9,12);
578 uint32_t Src=EXTRACT(Opcode,3,5);
579 uint32_t Dst=EXTRACT(Opcode,0,2);
580 uint32_t Imm2=Imm;
581
582 if(TESTFLAG(FLAG_E))
583 Imm2=(EXTRACT(ER,0,27)<<4)|(Imm2&0xf);
584 else
585 Imm2=SEX(4,Imm2);
586
587 util::stream_format(stream, "XOR %%SR%d,0x%x,%%DR%d",Src,Imm2,Dst/*,Imm2*/);
588
589 CLRFLAG(FLAG_E);
590 return 0;
591 }
592
INST(CMPI)593 INST(CMPI)
594 {
595 uint32_t Imm=EXTRACT(Opcode,9,12);
596 uint32_t Src=EXTRACT(Opcode,3,5);
597 uint32_t Imm2=Imm;
598
599 if(TESTFLAG(FLAG_E))
600 Imm2=(EXTRACT(ER,0,27)<<4)|(Imm2&0xf);
601 else
602 Imm2=SEX(4,Imm2);
603
604 util::stream_format(stream, "CMP %%SR%d,0x%x",Src,Imm2/*,Imm2*/);
605
606 CLRFLAG(FLAG_E);
607 return 0;
608 }
609
INST(TSTI)610 INST(TSTI)
611 {
612 uint32_t Imm=EXTRACT(Opcode,9,12);
613 uint32_t Src=EXTRACT(Opcode,3,5);
614 uint32_t Imm2=Imm;
615
616 if(TESTFLAG(FLAG_E))
617 Imm2=(EXTRACT(ER,0,27)<<4)|(Imm2&0xf);
618 else
619 Imm2=SEX(4,Imm2);
620
621 util::stream_format(stream, "TST %%SR%d,0x%x",Src,Imm2/*,Imm2*/);
622
623 CLRFLAG(FLAG_E);
624 return 0;
625 }
626
INST(ADD)627 INST(ADD)
628 {
629 uint32_t Src2=EXTRACT(Opcode,9,11);
630 uint32_t Src1=EXTRACT(Opcode,3,5);
631 uint32_t Dst=EXTRACT(Opcode,0,2);
632
633 util::stream_format(stream, "ADD %%SR%d,%%SR%d,%%DR%d",Src1,Src2,Dst);
634 return 0;
635 }
636
INST(SUB)637 INST(SUB)
638 {
639 uint32_t Src2=EXTRACT(Opcode,9,11);
640 uint32_t Src1=EXTRACT(Opcode,3,5);
641 uint32_t Dst=EXTRACT(Opcode,0,2);
642
643 util::stream_format(stream, "SUB %%SR%d,%%SR%d,%%DR%d",Src1,Src2,Dst);
644 return 0;
645 }
646
INST(ADC)647 INST(ADC)
648 {
649 uint32_t Src2=EXTRACT(Opcode,9,11);
650 uint32_t Src1=EXTRACT(Opcode,3,5);
651 uint32_t Dst=EXTRACT(Opcode,0,2);
652
653 util::stream_format(stream, "ADC %%SR%d,%%SR%d,%%DR%d",Src1,Src2,Dst);
654 return 0;
655 }
656
INST(SBC)657 INST(SBC)
658 {
659 uint32_t Src2=EXTRACT(Opcode,9,11);
660 uint32_t Src1=EXTRACT(Opcode,3,5);
661 uint32_t Dst=EXTRACT(Opcode,0,2);
662
663 util::stream_format(stream, "SBC %%SR%d,%%SR%d,%%DR%d",Src1,Src2,Dst);
664 return 0;
665 }
666
INST(AND)667 INST(AND)
668 {
669 uint32_t Src2=EXTRACT(Opcode,9,11);
670 uint32_t Src1=EXTRACT(Opcode,3,5);
671 uint32_t Dst=EXTRACT(Opcode,0,2);
672
673 util::stream_format(stream, "AND %%SR%d,%%SR%d,%%DR%d",Src1,Src2,Dst);
674 return 0;
675 }
676
INST(OR)677 INST(OR)
678 {
679 uint32_t Src2=EXTRACT(Opcode,9,11);
680 uint32_t Src1=EXTRACT(Opcode,3,5);
681 uint32_t Dst=EXTRACT(Opcode,0,2);
682
683 util::stream_format(stream, "OR %%SR%d,%%SR%d,%%DR%d",Src1,Src2,Dst);
684 return 0;
685 }
686
INST(XOR)687 INST(XOR)
688 {
689 uint32_t Src2=EXTRACT(Opcode,9,11);
690 uint32_t Src1=EXTRACT(Opcode,3,5);
691 uint32_t Dst=EXTRACT(Opcode,0,2);
692
693 util::stream_format(stream, "XOR %%SR%d,%%SR%d,%%DR%d",Src1,Src2,Dst);
694 return 0;
695 }
696
INST(CMP)697 INST(CMP)
698 {
699 uint32_t Src2=EXTRACT(Opcode,9,11);
700 uint32_t Src1=EXTRACT(Opcode,3,5);
701
702 util::stream_format(stream, "CMP %%SR%d,%%SR%d",Src1,Src2);
703 return 0;
704 }
705
INST(TST)706 INST(TST)
707 {
708 uint32_t Src2=EXTRACT(Opcode,9,11);
709 uint32_t Src1=EXTRACT(Opcode,3,5);
710
711 util::stream_format(stream, "TST %%SR%d,%%SR%d",Src1,Src2);
712 return 0;
713 }
714
INST(MULS)715 INST(MULS)
716 {
717 uint32_t Src2=EXTRACT(Opcode,6,8);
718 uint32_t Src1=EXTRACT(Opcode,3,5);
719 uint32_t Dst=EXTRACT(Opcode,0,2);
720
721 util::stream_format(stream, "MUL %%SR%d,%%SR%d,%%DR%d",Src1,Src2,Dst);
722
723 CLRFLAG(FLAG_E);
724 return 0;
725 }
726
INST(NEG)727 INST(NEG)
728 {
729 uint32_t Dst=EXTRACT(Opcode,9,11);
730 uint32_t Src=EXTRACT(Opcode,3,5);
731
732 util::stream_format(stream, "NEG %%SR%d,%%DR%d",Src,Dst);
733 return 0;
734 }
735
INST(CALL)736 INST(CALL)
737 {
738 uint32_t Offset=EXTRACT(Opcode,0,7);
739 uint32_t Offset2;
740
741 if(TESTFLAG(FLAG_E))
742 Offset2=(EXTRACT(ER,0,22)<<8)|Offset;
743 else
744 Offset2=SEX(8,Offset);
745 Offset2<<=1;
746 util::stream_format(stream, "CALL 0x%x",PC+2+Offset2);
747
748 CLRFLAG(FLAG_E);
749 return STEP_OVER;
750 }
751
INST(JV)752 INST(JV)
753 {
754 uint32_t Offset=EXTRACT(Opcode,0,7);
755 uint32_t Offset2;
756
757 if(TESTFLAG(FLAG_E))
758 Offset2=(EXTRACT(ER,0,22)<<8)|Offset;
759 else
760 Offset2=SEX(8,Offset);
761 Offset2<<=1;
762 util::stream_format(stream, "JV 0x%x",PC+2+Offset2);
763
764 CLRFLAG(FLAG_E);
765 return 0;
766 }
767
INST(JNV)768 INST(JNV)
769 {
770 uint32_t Offset=EXTRACT(Opcode,0,7);
771 uint32_t Offset2;
772
773 if(TESTFLAG(FLAG_E))
774 Offset2=(EXTRACT(ER,0,22)<<8)|Offset;
775 else
776 Offset2=SEX(8,Offset);
777 Offset2<<=1;
778 util::stream_format(stream, "JNV 0x%x",PC+2+Offset2);
779
780 CLRFLAG(FLAG_E);
781 return 0;
782 }
783
INST(JC)784 INST(JC)
785 {
786 uint32_t Offset=EXTRACT(Opcode,0,7);
787 uint32_t Offset2;
788
789 if(TESTFLAG(FLAG_E))
790 Offset2=(EXTRACT(ER,0,22)<<8)|Offset;
791 else
792 Offset2=SEX(8,Offset);
793 Offset2<<=1;
794 util::stream_format(stream, "JC 0x%x",PC+2+Offset2);
795
796 CLRFLAG(FLAG_E);
797 return 0;
798 }
799
INST(JNC)800 INST(JNC)
801 {
802 uint32_t Offset=EXTRACT(Opcode,0,7);
803 uint32_t Offset2;
804
805 if(TESTFLAG(FLAG_E))
806 Offset2=(EXTRACT(ER,0,22)<<8)|Offset;
807 else
808 Offset2=SEX(8,Offset);
809 Offset2<<=1;
810 util::stream_format(stream, "JNC 0x%x",PC+2+Offset2);
811
812 CLRFLAG(FLAG_E);
813 return 0;
814 }
815
INST(JP)816 INST(JP)
817 {
818 uint32_t Offset=EXTRACT(Opcode,0,7);
819 uint32_t Offset2;
820
821 if(TESTFLAG(FLAG_E))
822 Offset2=(EXTRACT(ER,0,22)<<8)|Offset;
823 else
824 Offset2=SEX(8,Offset);
825 Offset2<<=1;
826 util::stream_format(stream, "JP 0x%x",PC+2+Offset2);
827
828 CLRFLAG(FLAG_E);
829 return 0;
830 }
831
INST(JM)832 INST(JM)
833 {
834 uint32_t Offset=EXTRACT(Opcode,0,7);
835 uint32_t Offset2;
836
837 if(TESTFLAG(FLAG_E))
838 Offset2=(EXTRACT(ER,0,22)<<8)|Offset;
839 else
840 Offset2=SEX(8,Offset);
841 Offset2<<=1;
842 util::stream_format(stream, "JM 0x%x",PC+2+Offset2);
843
844 CLRFLAG(FLAG_E);
845 return 0;
846 }
847
INST(JNZ)848 INST(JNZ)
849 {
850 uint32_t Offset=EXTRACT(Opcode,0,7);
851 uint32_t Offset2;
852
853 if(TESTFLAG(FLAG_E))
854 Offset2=(EXTRACT(ER,0,22)<<8)|Offset;
855 else
856 Offset2=SEX(8,Offset);
857 Offset2<<=1;
858 util::stream_format(stream, "JNZ 0x%x",PC+2+Offset2);
859
860 CLRFLAG(FLAG_E);
861 return 0;
862 }
863
INST(JZ)864 INST(JZ)
865 {
866 uint32_t Offset=EXTRACT(Opcode,0,7);
867 uint32_t Offset2;
868
869 if(TESTFLAG(FLAG_E))
870 Offset2=(EXTRACT(ER,0,22)<<8)|Offset;
871 else
872 Offset2=SEX(8,Offset);
873 Offset2<<=1;
874 util::stream_format(stream, "JZ 0x%x",PC+2+Offset2);
875
876 CLRFLAG(FLAG_E);
877 return 0;
878 }
879
INST(JGE)880 INST(JGE)
881 {
882 uint32_t Offset=EXTRACT(Opcode,0,7);
883 uint32_t Offset2;
884
885 if(TESTFLAG(FLAG_E))
886 Offset2=(EXTRACT(ER,0,22)<<8)|Offset;
887 else
888 Offset2=SEX(8,Offset);
889 Offset2<<=1;
890 util::stream_format(stream, "JGE 0x%x",PC+2+Offset2);
891
892 CLRFLAG(FLAG_E);
893 return 0;
894 }
895
INST(JLE)896 INST(JLE)
897 {
898 uint32_t Offset=EXTRACT(Opcode,0,7);
899 uint32_t Offset2;
900
901 if(TESTFLAG(FLAG_E))
902 Offset2=(EXTRACT(ER,0,22)<<8)|Offset;
903 else
904 Offset2=SEX(8,Offset);
905 Offset2<<=1;
906 util::stream_format(stream, "JLE 0x%x",PC+2+Offset2);
907
908 CLRFLAG(FLAG_E);
909 return 0;
910 }
911
INST(JHI)912 INST(JHI)
913 {
914 uint32_t Offset=EXTRACT(Opcode,0,7);
915 uint32_t Offset2;
916
917 if(TESTFLAG(FLAG_E))
918 Offset2=(EXTRACT(ER,0,22)<<8)|Offset;
919 else
920 Offset2=SEX(8,Offset);
921 Offset2<<=1;
922 util::stream_format(stream, "JHI 0x%x",PC+2+Offset2);
923
924 CLRFLAG(FLAG_E);
925 return 0;
926 }
927
INST(JLS)928 INST(JLS)
929 {
930 uint32_t Offset=EXTRACT(Opcode,0,7);
931 uint32_t Offset2;
932
933 if(TESTFLAG(FLAG_E))
934 Offset2=(EXTRACT(ER,0,22)<<8)|Offset;
935 else
936 Offset2=SEX(8,Offset);
937 Offset2<<=1;
938 util::stream_format(stream, "JLS 0x%x",PC+2+Offset2);
939
940 CLRFLAG(FLAG_E);
941 return 0;
942 }
943
INST(JGT)944 INST(JGT)
945 {
946 uint32_t Offset=EXTRACT(Opcode,0,7);
947 uint32_t Offset2;
948
949 if(TESTFLAG(FLAG_E))
950 Offset2=(EXTRACT(ER,0,22)<<8)|Offset;
951 else
952 Offset2=SEX(8,Offset);
953 Offset2<<=1;
954 util::stream_format(stream, "JGT 0x%x",PC+2+Offset2);
955
956 CLRFLAG(FLAG_E);
957 return 0;
958 }
959
INST(JLT)960 INST(JLT)
961 {
962 uint32_t Offset=EXTRACT(Opcode,0,7);
963 uint32_t Offset2;
964
965 if(TESTFLAG(FLAG_E))
966 Offset2=(EXTRACT(ER,0,22)<<8)|Offset;
967 else
968 Offset2=SEX(8,Offset);
969 Offset2<<=1;
970 util::stream_format(stream, "JLT 0x%x",PC+2+Offset2);
971
972 CLRFLAG(FLAG_E);
973 return 0;
974 }
975
976
977
INST(JMP)978 INST(JMP)
979 {
980 uint32_t Offset=EXTRACT(Opcode,0,7);
981 uint32_t Offset2;
982
983 if(TESTFLAG(FLAG_E))
984 Offset2=(EXTRACT(ER,0,22)<<8)|Offset;
985 else
986 Offset2=SEX(8,Offset);
987 Offset2<<=1;
988 util::stream_format(stream, "JMP 0x%x",PC+2+Offset2);
989
990 CLRFLAG(FLAG_E);
991 return 0;
992 }
993
INST(JR)994 INST(JR)
995 {
996 uint32_t Src=EXTRACT(Opcode,0,3);
997
998 util::stream_format(stream, "JR %%R%d",Src);
999
1000 CLRFLAG(FLAG_E);
1001 return 0;
1002 }
1003
INST(CALLR)1004 INST(CALLR)
1005 {
1006 uint32_t Src=EXTRACT(Opcode,0,3);
1007
1008 util::stream_format(stream, "CALLR %%R%d",Src);
1009
1010 CLRFLAG(FLAG_E);
1011 return STEP_OVER;
1012 }
1013
INST(ASR)1014 INST(ASR)
1015 {
1016 uint32_t CS=Opcode&(1<<10);
1017 uint32_t Dst=EXTRACT(Opcode,0,2);
1018 uint32_t Imm=EXTRACT(Opcode,5,9);
1019 uint32_t Cnt=EXTRACT(Opcode,5,7);
1020
1021 if(CS)
1022 util::stream_format(stream, "ASR %%R%d,%%R%d",Cnt,Dst);
1023 else
1024 util::stream_format(stream, "ASR %x,%%R%d",Imm,Dst);
1025
1026 CLRFLAG(FLAG_E);
1027 return 0;
1028 }
1029
INST(LSR)1030 INST(LSR)
1031 {
1032 uint32_t CS=Opcode&(1<<10);
1033 uint32_t Dst=EXTRACT(Opcode,0,2);
1034 uint32_t Imm=EXTRACT(Opcode,5,9);
1035 uint32_t Cnt=EXTRACT(Opcode,5,7);
1036
1037 if(CS)
1038 util::stream_format(stream, "LSR %%R%d,%%R%d",Cnt,Dst);
1039 else
1040 util::stream_format(stream, "LSR %x,%%R%d",Imm,Dst);
1041
1042 CLRFLAG(FLAG_E);
1043 return 0;
1044 }
1045
INST(ASL)1046 INST(ASL)
1047 {
1048 uint32_t CS=Opcode&(1<<10);
1049 uint32_t Dst=EXTRACT(Opcode,0,2);
1050 uint32_t Imm=EXTRACT(Opcode,5,9);
1051 uint32_t Cnt=EXTRACT(Opcode,5,7);
1052
1053 if(CS)
1054 util::stream_format(stream, "ASL %%R%d,%%R%d",Cnt,Dst);
1055 else
1056 util::stream_format(stream, "ASL %x,%%R%d",Imm,Dst);
1057
1058 CLRFLAG(FLAG_E);
1059 return 0;
1060 }
1061
INST(EXTB)1062 INST(EXTB)
1063 {
1064 uint32_t Dst=EXTRACT(Opcode,0,3);
1065
1066 util::stream_format(stream, "EXTB %%R%d",Dst);
1067
1068 CLRFLAG(FLAG_E);
1069 return 0;
1070 }
1071
INST(EXTS)1072 INST(EXTS)
1073 {
1074 uint32_t Dst=EXTRACT(Opcode,0,3);
1075
1076 util::stream_format(stream, "EXTS %%R%d",Dst);
1077
1078 CLRFLAG(FLAG_E);
1079 return 0;
1080 }
1081
INST(SET)1082 INST(SET)
1083 {
1084 uint32_t Imm=EXTRACT(Opcode,0,3);
1085
1086 util::stream_format(stream, "SET 0x%x",Imm);
1087 return 0;
1088 }
1089
INST(CLR)1090 INST(CLR)
1091 {
1092 uint32_t Imm=EXTRACT(Opcode,0,3);
1093
1094 util::stream_format(stream, "CLR 0x%x",Imm);
1095 return 0;
1096 }
1097
INST(SWI)1098 INST(SWI)
1099 {
1100 uint32_t Imm=EXTRACT(Opcode,0,3);
1101
1102 util::stream_format(stream, "SWI 0x%x",Imm);
1103 return 0;
1104 }
1105
INST(HALT)1106 INST(HALT)
1107 {
1108 uint32_t Imm=EXTRACT(Opcode,0,3);
1109
1110 util::stream_format(stream, "HALT 0x%x",Imm);
1111 return 0;
1112 }
1113
INST(MVTC)1114 INST(MVTC)
1115 {
1116 uint32_t Imm=EXTRACT(Opcode,0,3);
1117
1118 util::stream_format(stream, "MVTC %%R0,%%CR%d",Imm);
1119 return 0;
1120 }
1121
INST(MVFC)1122 INST(MVFC)
1123 {
1124 uint32_t Imm=EXTRACT(Opcode,0,3);
1125
1126 util::stream_format(stream, "MVFC %%CR0%d,%%R0",Imm);
1127 return 0;
1128 }
1129
DecodeOp(uint16_t Opcode)1130 se3208_disassembler::_OP se3208_disassembler::DecodeOp(uint16_t Opcode)
1131 {
1132 switch(EXTRACT(Opcode,14,15))
1133 {
1134 case 0x0:
1135 {
1136 uint8_t Op=EXTRACT(Opcode,11,13);
1137 switch(Op)
1138 {
1139 case 0x0:
1140 return &se3208_disassembler::LDB;
1141 case 0x1:
1142 return &se3208_disassembler::LDS;
1143 case 0x2:
1144 return &se3208_disassembler::LD;
1145 case 0x3:
1146 return &se3208_disassembler::LDBU;
1147 case 0x4:
1148 return &se3208_disassembler::STB;
1149 case 0x5:
1150 return &se3208_disassembler::STS;
1151 case 0x6:
1152 return &se3208_disassembler::ST;
1153 case 0x7:
1154 return &se3208_disassembler::LDSU;
1155 }
1156 }
1157 break;
1158 case 0x1:
1159 return &se3208_disassembler::LERI;
1160 case 0x2:
1161 {
1162 switch(EXTRACT(Opcode,11,13))
1163 {
1164 case 0:
1165 return &se3208_disassembler::LDSP;
1166 case 1:
1167 return &se3208_disassembler::STSP;
1168 case 2:
1169 return &se3208_disassembler::PUSH;
1170 case 3:
1171 return &se3208_disassembler::POP;
1172 case 4:
1173 case 5:
1174 case 6:
1175 case 7:
1176 case 8: //arith
1177 case 9:
1178 case 10:
1179 case 11:
1180 case 12:
1181 case 13:
1182 case 14:
1183 case 15:
1184 switch(EXTRACT(Opcode,6,8))
1185 {
1186 case 0:
1187 return &se3208_disassembler::ADDI;
1188 case 1:
1189 return &se3208_disassembler::ADCI;
1190 case 2:
1191 return &se3208_disassembler::SUBI;
1192 case 3:
1193 return &se3208_disassembler::SBCI;
1194 case 4:
1195 return &se3208_disassembler::ANDI;
1196 case 5:
1197 return &se3208_disassembler::ORI;
1198 case 6:
1199 return &se3208_disassembler::XORI;
1200 case 7:
1201 switch(EXTRACT(Opcode,0,2))
1202 {
1203 case 0:
1204 return &se3208_disassembler::CMPI;
1205 case 1:
1206 return &se3208_disassembler::TSTI;
1207 case 2:
1208 return &se3208_disassembler::LEATOSP;
1209 case 3:
1210 return &se3208_disassembler::LEAFROMSP;
1211 }
1212 break;
1213 }
1214 break;
1215 }
1216 }
1217 break;
1218 case 3:
1219 switch(EXTRACT(Opcode,12,13))
1220 {
1221 case 0:
1222 switch(EXTRACT(Opcode,6,8))
1223 {
1224 case 0:
1225 return &se3208_disassembler::ADD;
1226 case 1:
1227 return &se3208_disassembler::ADC;
1228 case 2:
1229 return &se3208_disassembler::SUB;
1230 case 3:
1231 return &se3208_disassembler::SBC;
1232 case 4:
1233 return &se3208_disassembler::AND;
1234 case 5:
1235 return &se3208_disassembler::OR;
1236 case 6:
1237 return &se3208_disassembler::XOR;
1238 case 7:
1239 switch(EXTRACT(Opcode,0,2))
1240 {
1241 case 0:
1242 return &se3208_disassembler::CMP;
1243 case 1:
1244 return &se3208_disassembler::TST;
1245 case 2:
1246 return &se3208_disassembler::MOV;
1247 case 3:
1248 return &se3208_disassembler::NEG;
1249 }
1250 break;
1251 }
1252 break;
1253 case 1: //Jumps
1254 switch(EXTRACT(Opcode,8,11))
1255 {
1256 case 0x0:
1257 return &se3208_disassembler::JNV;
1258 case 0x1:
1259 return &se3208_disassembler::JV;
1260 case 0x2:
1261 return &se3208_disassembler::JP;
1262 case 0x3:
1263 return &se3208_disassembler::JM;
1264 case 0x4:
1265 return &se3208_disassembler::JNZ;
1266 case 0x5:
1267 return &se3208_disassembler::JZ;
1268 case 0x6:
1269 return &se3208_disassembler::JNC;
1270 case 0x7:
1271 return &se3208_disassembler::JC;
1272 case 0x8:
1273 return &se3208_disassembler::JGT;
1274 case 0x9:
1275 return &se3208_disassembler::JLT;
1276 case 0xa:
1277 return &se3208_disassembler::JGE;
1278 case 0xb:
1279 return &se3208_disassembler::JLE;
1280 case 0xc:
1281 return &se3208_disassembler::JHI;
1282 case 0xd:
1283 return &se3208_disassembler::JLS;
1284 case 0xe:
1285 return &se3208_disassembler::JMP;
1286 case 0xf:
1287 return &se3208_disassembler::CALL;
1288 }
1289 break;
1290 case 2:
1291 if(Opcode&(1<<11))
1292 return &se3208_disassembler::LDI;
1293 else //SP Ops
1294 {
1295 if(Opcode&(1<<10))
1296 {
1297 switch(EXTRACT(Opcode,7,9))
1298 {
1299 case 0:
1300 return &se3208_disassembler::LDBSP;
1301 case 1:
1302 return &se3208_disassembler::LDSSP;
1303 case 3:
1304 return &se3208_disassembler::LDBUSP;
1305 case 4:
1306 return &se3208_disassembler::STBSP;
1307 case 5:
1308 return &se3208_disassembler::STSSP;
1309 case 7:
1310 return &se3208_disassembler::LDSUSP;
1311 }
1312 }
1313 else
1314 {
1315 if(Opcode&(1<<9))
1316 {
1317 return &se3208_disassembler::LEASPTOSP;
1318 }
1319 else
1320 {
1321 if(Opcode&(1<<8))
1322 {
1323 }
1324 else
1325 {
1326 switch(EXTRACT(Opcode,4,7))
1327 {
1328 case 0:
1329 return &se3208_disassembler::EXTB;
1330 case 1:
1331 return &se3208_disassembler::EXTS;
1332 case 8:
1333 return &se3208_disassembler::JR;
1334 case 9:
1335 return &se3208_disassembler::CALLR;
1336 case 10:
1337 return &se3208_disassembler::SET;
1338 case 11:
1339 return &se3208_disassembler::CLR;
1340 case 12:
1341 return &se3208_disassembler::SWI;
1342 case 13:
1343 return &se3208_disassembler::HALT;
1344 }
1345 }
1346 }
1347 }
1348 }
1349 break;
1350 case 3:
1351 switch(EXTRACT(Opcode,9,11))
1352 {
1353 case 0:
1354 case 1:
1355 case 2:
1356 case 3:
1357 switch(EXTRACT(Opcode,3,4))
1358 {
1359 case 0:
1360 return &se3208_disassembler::ASR;
1361 case 1:
1362 return &se3208_disassembler::LSR;
1363 case 2:
1364 return &se3208_disassembler::ASL;
1365 //case 3:
1366 // return &se3208_disassembler::LSL;
1367 }
1368 break;
1369 case 4:
1370 return &se3208_disassembler::MULS;
1371 case 6:
1372 if(Opcode&(1<<3))
1373 return &se3208_disassembler::MVFC;
1374 else
1375 return &se3208_disassembler::MVTC;
1376 }
1377 break;
1378 }
1379 break;
1380
1381 }
1382 return &se3208_disassembler::INVALIDOP;
1383 }
1384
1385
opcode_alignment() const1386 u32 se3208_disassembler::opcode_alignment() const
1387 {
1388 return 2;
1389 }
1390
disassemble(std::ostream & stream,offs_t pc,const data_buffer & opcodes,const data_buffer & params)1391 offs_t se3208_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms)
1392 {
1393 uint16_t Opcode;
1394
1395 CLRFLAG(FLAG_E);
1396 ER=0;
1397
1398 PC=pc;
1399 Opcode=opcodes.r16(pc);
1400 return 2 | ((this->*DecodeOp(Opcode))(Opcode, stream)) | SUPPORTED;
1401 }
1402