1 // license:BSD-3-Clause 2 // copyright-holders:Curt Coder 3 #ifndef MAME_INCLUDES_ABC800_H 4 #define MAME_INCLUDES_ABC800_H 5 6 #pragma once 7 8 #include "bus/abcbus/abcbus.h" 9 #include "bus/rs232/rs232.h" 10 #include "cpu/z80/z80.h" 11 #include "machine/z80daisy.h" 12 #include "cpu/mcs48/mcs48.h" 13 #include "imagedev/cassette.h" 14 #include "imagedev/snapquik.h" 15 #include "bus/abckb/abckb.h" 16 #include "bus/abckb/abc800kb.h" 17 #include "machine/e0516.h" 18 #include "machine/z80ctc.h" 19 #include "machine/z80sio.h" 20 #include "machine/ram.h" 21 #include "machine/timer.h" 22 #include "sound/discrete.h" 23 #include "video/mc6845.h" 24 #include "video/saa5050.h" 25 #include "emupal.h" 26 #include "softlist.h" 27 #include "speaker.h" 28 29 //************************************************************************** 30 // MACROS / CONSTANTS 31 //************************************************************************** 32 33 #define ABC800_X01 XTAL(12'000'000) 34 #define ABC806_X02 XTAL(32'768) 35 36 #define ABC802_AT0 0x01 37 #define ABC802_AT1 0x02 38 #define ABC802_ATD 0x40 39 #define ABC802_ATE 0x80 40 #define ABC802_INV 0x80 41 42 #define ABC800C_CHAR_RAM_SIZE 0x400 43 #define ABC800M_CHAR_RAM_SIZE 0x800 44 #define ABC800_VIDEO_RAM_SIZE 0x4000 45 #define ABC802_CHAR_RAM_SIZE 0x800 46 #define ABC806_CHAR_RAM_SIZE 0x800 47 #define ABC806_VIDEO_RAM_SIZE 0x20000 48 49 #define ABC800_CHAR_WIDTH 6 50 #define ABC800_CCLK ABC800_X01/ABC800_CHAR_WIDTH 51 52 #define SCREEN_TAG "screen" 53 #define Z80_TAG "z80" 54 #define E0516_TAG "j13" 55 #define MC6845_TAG "b12" 56 #define SAA5052_TAG "5c" 57 #define Z80CTC_TAG "z80ctc" 58 #define Z80SIO_TAG "z80sio" 59 #define Z80DART_TAG "z80dart" 60 #define DISCRETE_TAG "discrete" 61 #define CASSETTE_TAG "cassette" 62 #define RS232_A_TAG "rs232a" 63 #define RS232_B_TAG "rs232b" 64 #define ABC_KEYBOARD_PORT_TAG "kb" 65 #define TIMER_CTC_TAG "timer_ctc" 66 #define TIMER_CASSETTE_TAG "timer_cass" 67 68 69 70 //************************************************************************** 71 // TYPE DEFINITIONS 72 //************************************************************************** 73 74 // ======================> abc800_state 75 76 class abc800_state : public driver_device 77 { 78 public: abc800_state(const machine_config & mconfig,device_type type,const char * tag,size_t char_ram_size)79 abc800_state(const machine_config &mconfig, device_type type, const char *tag, size_t char_ram_size) : 80 driver_device(mconfig, type, tag), 81 m_maincpu(*this, Z80_TAG), 82 m_ctc(*this, Z80CTC_TAG), 83 m_dart(*this, Z80DART_TAG), 84 m_sio(*this, Z80SIO_TAG), 85 m_discrete(*this, DISCRETE_TAG), 86 m_cassette(*this, CASSETTE_TAG), 87 m_ram(*this, RAM_TAG), 88 m_rom(*this, Z80_TAG), 89 m_video_ram(*this, "video_ram"), 90 m_char_ram(*this, "char_ram"), 91 m_io_sb(*this, "SB"), 92 m_ctc_z0(0), 93 m_sio_txcb(0), 94 m_sio_txdb(1), 95 m_sio_rtsb(1), 96 m_dfd_out(0), 97 m_tape_ctr(4), 98 m_char_ram_size(char_ram_size) 99 { } 100 101 required_device<z80_device> m_maincpu; 102 required_device<z80ctc_device> m_ctc; 103 required_device<z80dart_device> m_dart; 104 required_device<z80sio_device> m_sio; 105 optional_device<discrete_sound_device> m_discrete; 106 optional_device<cassette_image_device> m_cassette; 107 required_device<ram_device> m_ram; 108 required_memory_region m_rom; 109 optional_shared_ptr<uint8_t> m_video_ram; 110 optional_shared_ptr<uint8_t> m_char_ram; 111 required_ioport m_io_sb; 112 113 virtual void machine_start() override; 114 virtual void machine_reset() override; 115 virtual void video_start() override; 116 117 void cassette_output_tick(int state); 118 119 uint8_t read(offs_t offset); 120 void write(offs_t offset, uint8_t data); 121 virtual uint8_t m1_r(offs_t offset); 122 uint8_t pling_r(); 123 void hrs_w(uint8_t data); 124 void hrc_w(uint8_t data); 125 DECLARE_WRITE_LINE_MEMBER( ctc_z0_w ); 126 DECLARE_WRITE_LINE_MEMBER( ctc_z1_w ); 127 DECLARE_WRITE_LINE_MEMBER( sio_txdb_w ); 128 DECLARE_WRITE_LINE_MEMBER( sio_dtrb_w ); 129 DECLARE_WRITE_LINE_MEMBER( sio_rtsb_w ); 130 DECLARE_WRITE_LINE_MEMBER( keydtr_w ); 131 TIMER_DEVICE_CALLBACK_MEMBER( ctc_tick ); 132 TIMER_DEVICE_CALLBACK_MEMBER( cassette_input_tick ); 133 134 DECLARE_QUICKLOAD_LOAD_MEMBER(quickload_cb); 135 136 // memory state 137 int m_keydtr; // keyboard DTR 138 bool m_fetch_charram; // opcode fetched from character RAM region (0x7800-0x7fff) 139 140 // serial state 141 uint8_t m_sb; 142 int m_ctc_z0; 143 int m_sio_txcb; 144 int m_sio_txdb; 145 int m_sio_rtsb; 146 int m_dfd_out; 147 int m_dfd_in; 148 int m_tape_ctr; 149 150 // video state 151 size_t m_char_ram_size; 152 uint8_t m_hrs; // HR picture start scanline 153 uint8_t m_fgctl; // HR foreground control 154 155 // timers 156 emu_timer *m_cassette_timer; 157 void common(machine_config &config); 158 void abc800_m1(address_map &map); 159 void abc800_mem(address_map &map); 160 void abc800_io(address_map &map); 161 void abc800m_io(address_map &map); 162 void abc800c_io(address_map &map); 163 }; 164 165 166 // ======================> abc800m_state 167 168 class abc800m_state : public abc800_state 169 { 170 public: 171 abc800m_state(const machine_config &mconfig, device_type type, const char *tag) : 172 abc800_state(mconfig, type, tag, ABC800M_CHAR_RAM_SIZE), 173 m_crtc(*this, MC6845_TAG), 174 m_palette(*this, "palette"), 175 m_fgctl_prom(*this, "hru2"), 176 m_char_rom(*this, MC6845_TAG) 177 { } 178 179 required_device<mc6845_device> m_crtc; 180 required_device<palette_device> m_palette; 181 required_memory_region m_fgctl_prom; 182 required_memory_region m_char_rom; 183 184 uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); 185 186 void hr_update(bitmap_rgb32 &bitmap, const rectangle &cliprect); 187 188 MC6845_UPDATE_ROW( abc800m_update_row ); 189 void abc800m(machine_config &config); 190 void abc800m_video(machine_config &config); 191 }; 192 193 194 // ======================> abc800c_state 195 196 class abc800c_state : public abc800_state 197 { 198 public: 199 abc800c_state(const machine_config &mconfig, device_type type, const char *tag) : 200 abc800_state(mconfig, type, tag, ABC800C_CHAR_RAM_SIZE), 201 m_trom(*this, SAA5052_TAG), 202 m_palette(*this, "palette"), 203 m_fgctl_prom(*this, "hru2") 204 { } 205 206 required_device<saa5052_device> m_trom; 207 required_device<palette_device> m_palette; 208 required_memory_region m_fgctl_prom; 209 210 uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); 211 212 void hr_update(bitmap_rgb32 &bitmap, const rectangle &cliprect); 213 214 uint8_t char_ram_r(offs_t offset); 215 void abc800c_palette(palette_device &palette) const; 216 void abc800c(machine_config &config); 217 void abc800c_video(machine_config &config); 218 }; 219 220 221 // ======================> abc802_state 222 223 class abc802_state : public abc800_state 224 { 225 public: 226 abc802_state(const machine_config &mconfig, device_type type, const char *tag) : 227 abc800_state(mconfig, type, tag, ABC802_CHAR_RAM_SIZE), 228 m_crtc(*this, MC6845_TAG), 229 m_palette(*this, "palette"), 230 m_char_rom(*this, MC6845_TAG), 231 m_config(*this, "CONFIG") 232 { } 233 234 required_device<mc6845_device> m_crtc; 235 required_device<palette_device> m_palette; 236 required_memory_region m_char_rom; 237 required_ioport m_config; 238 239 virtual void machine_start() override; 240 virtual void machine_reset() override; 241 virtual void video_start() override; 242 243 uint8_t read(offs_t offset); 244 void write(offs_t offset, uint8_t data); 245 DECLARE_WRITE_LINE_MEMBER( lrs_w ); 246 DECLARE_WRITE_LINE_MEMBER( mux80_40_w ); 247 DECLARE_WRITE_LINE_MEMBER( vs_w ); 248 MC6845_UPDATE_ROW( abc802_update_row ); 249 250 // cpu state 251 int m_lrs; // low RAM select 252 253 // video state 254 int m_flshclk_ctr; // flash clock counter 255 int m_flshclk; // flash clock 256 int m_80_40_mux; // 40/80 column mode 257 258 void abc802(machine_config &config); 259 void abc802_video(machine_config &config); 260 void abc802_m1(address_map &map); 261 void abc802_mem(address_map &map); 262 void abc802_io(address_map &map); 263 }; 264 265 266 // ======================> abc806_state 267 268 class abc806_state : public abc800_state 269 { 270 public: 271 abc806_state(const machine_config &mconfig, device_type type, const char *tag) : 272 abc800_state(mconfig, type, tag, ABC806_CHAR_RAM_SIZE), 273 m_crtc(*this, MC6845_TAG), 274 m_palette(*this, "palette"), 275 m_rtc(*this, E0516_TAG), 276 m_rad_prom(*this, "rad"), 277 m_hru2_prom(*this, "hru"), 278 m_char_rom(*this, MC6845_TAG), 279 m_attr_ram(*this, "attr_ram") 280 { } 281 282 required_device<mc6845_device> m_crtc; 283 required_device<palette_device> m_palette; 284 required_device<e0516_device> m_rtc; 285 required_memory_region m_rad_prom; 286 required_memory_region m_hru2_prom; 287 required_memory_region m_char_rom; 288 optional_shared_ptr<uint8_t> m_attr_ram; 289 290 virtual void machine_start() override; 291 virtual void machine_reset() override; 292 virtual void video_start() override; 293 294 uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); 295 296 void read_pal_p4(offs_t offset, bool m1l, bool xml, offs_t &m, bool &romd, bool &ramd, bool &hre, bool &vr); 297 void hr_update(bitmap_rgb32 &bitmap, const rectangle &cliprect); 298 299 uint8_t read(offs_t offset); 300 void write(offs_t offset, uint8_t data); 301 uint8_t m1_r(offs_t offset) override; 302 uint8_t mai_r(offs_t offset); 303 void mao_w(offs_t offset, uint8_t data); 304 void hrs_w(uint8_t data); 305 void hrc_w(offs_t offset, uint8_t data); 306 uint8_t charram_r(offs_t offset); 307 void charram_w(offs_t offset, uint8_t data); 308 uint8_t ami_r(); 309 void amo_w(uint8_t data); 310 uint8_t cli_r(offs_t offset); 311 void sso_w(uint8_t data); 312 uint8_t sti_r(); 313 void sto_w(uint8_t data); 314 DECLARE_WRITE_LINE_MEMBER( hs_w ); 315 DECLARE_WRITE_LINE_MEMBER( vs_w ); 316 void abc806_palette(palette_device &palette) const; 317 MC6845_UPDATE_ROW( abc806_update_row ); 318 319 // memory state 320 int m_eme; // extended memory enable 321 uint8_t m_map[16]; // memory page register 322 323 // video state 324 int m_txoff; // text display enable 325 int m_40; // 40/80 column mode 326 int m_flshclk_ctr; // flash clock counter 327 int m_flshclk; // flash clock 328 uint8_t m_attr_data; // attribute data latch 329 uint8_t m_hrc[16]; // HR palette 330 uint8_t m_sync; // line synchronization delay 331 uint8_t m_v50_addr; // vertical sync PROM address 332 int m_hru2_a8; // HRU II PROM address line 8 333 uint32_t m_vsync_shift; // vertical sync shift register 334 int m_vsync; // vertical sync 335 int m_d_vsync; // delayed vertical sync 336 337 void abc806(machine_config &config); 338 void abc806_video(machine_config &config); 339 void abc806_io(address_map &map); 340 void abc806_mem(address_map &map); 341 }; 342 343 #endif 344