1 // license:BSD-3-Clause
2 // copyright-holders:Tim Schuerewegen
3 
4 #ifndef MAME_INCLUDES_GP32_H
5 #define MAME_INCLUDES_GP32_H
6 
7 #include "machine/smartmed.h"
8 #include "sound/dac.h"
9 #include "machine/nvram.h"
10 #include "emupal.h"
11 #include "screen.h"
12 
13 #define INT_ADC       31
14 #define INT_RTC       30
15 #define INT_UTXD1     29
16 #define INT_UTXD0     28
17 #define INT_IIC       27
18 #define INT_USBH      26
19 #define INT_USBD      25
20 #define INT_URXD1     24
21 #define INT_URXD0     23
22 #define INT_SPI       22
23 #define INT_MMC       21
24 #define INT_DMA3      20
25 #define INT_DMA2      19
26 #define INT_DMA1      18
27 #define INT_DMA0      17
28 #define INT_RESERVED  16
29 #define INT_UERR      15
30 #define INT_TIMER4    14
31 #define INT_TIMER3    13
32 #define INT_TIMER2    12
33 #define INT_TIMER1    11
34 #define INT_TIMER0    10
35 #define INT_WDT        9
36 #define INT_TICK       8
37 #define INT_EINT7      7
38 #define INT_EINT6      6
39 #define INT_EINT5      5
40 #define INT_EINT4      4
41 #define INT_EINT3      3
42 #define INT_EINT2      2
43 #define INT_EINT1      1
44 #define INT_EINT0      0
45 
46 struct s3c240x_lcd_t
47 {
48 	uint32_t vramaddr_cur;
49 	uint32_t vramaddr_max;
50 	uint32_t offsize;
51 	uint32_t pagewidth_cur;
52 	uint32_t pagewidth_max;
53 	uint32_t bppmode;
54 	uint32_t bswp, hwswp;
55 	uint32_t hozval, lineval;
56 	int vpos, hpos;
57 };
58 
59 struct smc_t
60 {
61 	int add_latch;
62 	int chip;
63 	int cmd_latch;
64 	int do_read;
65 	int do_write;
66 	int read;
67 	int wp;
68 	int busy;
69 	uint8_t datarx;
70 	uint8_t datatx;
71 };
72 
73 struct i2s_t
74 {
75 	int l3d;
76 	int l3m;
77 	int l3c;
78 };
79 
80 struct s3c240x_iic_t
81 {
82 	uint8_t data[4];
83 	int data_index;
84 	uint16_t address;
85 };
86 
87 struct s3c240x_iis_t
88 {
89 	uint16_t fifo[16/2];
90 	int fifo_index;
91 };
92 
93 
94 class gp32_state : public driver_device
95 {
96 public:
gp32_state(const machine_config & mconfig,device_type type,const char * tag)97 	gp32_state(const machine_config &mconfig, device_type type, const char *tag)
98 		: driver_device(mconfig, type, tag),
99 		m_s3c240x_ram(*this, "s3c240x_ram"),
100 		m_maincpu(*this, "maincpu"),
101 		m_smartmedia(*this, "smartmedia"),
102 		m_ldac(*this, "ldac"),
103 		m_rdac(*this, "rdac"),
104 		m_nvram(*this, "nvram"),
105 		m_io_in0(*this, "IN0"),
106 		m_io_in1(*this, "IN1"),
107 		m_screen(*this, "screen"),
108 		m_palette(*this, "palette")  { }
109 
110 	void gp32(machine_config &config);
111 
112 private:
113 	virtual void video_start() override;
114 
115 	required_shared_ptr<uint32_t> m_s3c240x_ram;
116 	std::unique_ptr<uint8_t[]> m_eeprom_data;
117 	uint32_t m_s3c240x_lcd_regs[0x400/4];
118 	emu_timer *m_s3c240x_lcd_timer;
119 	s3c240x_lcd_t m_s3c240x_lcd;
120 	uint32_t m_s3c240x_lcd_palette[0x400/4];
121 	uint32_t m_s3c240x_clkpow_regs[0x18/4];
122 	uint32_t m_s3c240x_irq_regs[0x18/4];
123 	emu_timer *m_s3c240x_pwm_timer[5];
124 	uint32_t m_s3c240x_pwm_regs[0x44/4];
125 	emu_timer *m_s3c240x_dma_timer[4];
126 	uint32_t m_s3c240x_dma_regs[0x7c/4];
127 	smc_t m_smc;
128 	i2s_t m_i2s;
129 	uint32_t m_s3c240x_gpio[0x60/4];
130 	uint32_t m_s3c240x_memcon_regs[0x34/4];
131 	uint32_t m_s3c240x_usb_host_regs[0x5C/4];
132 	uint32_t m_s3c240x_uart_0_regs[0x2C/4];
133 	uint32_t m_s3c240x_uart_1_regs[0x2C/4];
134 	uint32_t m_s3c240x_usb_device_regs[0xBC/4];
135 	uint32_t m_s3c240x_watchdog_regs[0x0C/4];
136 	s3c240x_iic_t m_s3c240x_iic;
137 	emu_timer *m_s3c240x_iic_timer;
138 	uint32_t m_s3c240x_iic_regs[0x10/4];
139 	s3c240x_iis_t m_s3c240x_iis;
140 	emu_timer *m_s3c240x_iis_timer;
141 	uint32_t m_s3c240x_iis_regs[0x14/4];
142 	uint32_t m_s3c240x_rtc_regs[0x4C/4];
143 	uint32_t m_s3c240x_adc_regs[0x08/4];
144 	uint32_t m_s3c240x_spi_regs[0x18/4];
145 	uint32_t m_s3c240x_mmc_regs[0x40/4];
146 	bitmap_rgb32 m_bitmap;
147 	uint32_t s3c240x_lcd_r(offs_t offset);
148 	void s3c240x_lcd_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
149 	uint32_t s3c240x_lcd_palette_r(offs_t offset);
150 	void s3c240x_lcd_palette_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
151 	uint32_t s3c240x_clkpow_r(offs_t offset);
152 	void s3c240x_clkpow_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
153 	uint32_t s3c240x_irq_r(offs_t offset);
154 	void s3c240x_irq_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
155 	uint32_t s3c240x_pwm_r(offs_t offset);
156 	void s3c240x_pwm_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
157 	uint32_t s3c240x_dma_r(offs_t offset);
158 	void s3c240x_dma_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
159 	uint32_t s3c240x_gpio_r(offs_t offset);
160 	void s3c240x_gpio_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
161 	uint32_t s3c240x_memcon_r(offs_t offset);
162 	void s3c240x_memcon_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
163 	uint32_t s3c240x_usb_host_r(offs_t offset);
164 	void s3c240x_usb_host_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
165 	uint32_t s3c240x_uart_0_r(offs_t offset);
166 	void s3c240x_uart_0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
167 	uint32_t s3c240x_uart_1_r(offs_t offset);
168 	void s3c240x_uart_1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
169 	uint32_t s3c240x_usb_device_r(offs_t offset);
170 	void s3c240x_usb_device_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
171 	uint32_t s3c240x_watchdog_r(offs_t offset);
172 	void s3c240x_watchdog_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
173 	uint32_t s3c240x_iic_r(offs_t offset);
174 	void s3c240x_iic_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
175 	uint32_t s3c240x_iis_r(offs_t offset);
176 	void s3c240x_iis_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
177 	uint32_t s3c240x_rtc_r(offs_t offset);
178 	void s3c240x_rtc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
179 	uint32_t s3c240x_adc_r(offs_t offset);
180 	void s3c240x_adc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
181 	uint32_t s3c240x_spi_r(offs_t offset);
182 	void s3c240x_spi_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
183 	uint32_t s3c240x_mmc_r(offs_t offset);
184 	void s3c240x_mmc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
185 	virtual void machine_start() override;
186 	virtual void machine_reset() override;
187 	uint32_t screen_update_gp32(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
188 	TIMER_CALLBACK_MEMBER(s3c240x_lcd_timer_exp);
189 	TIMER_CALLBACK_MEMBER(s3c240x_pwm_timer_exp);
190 	TIMER_CALLBACK_MEMBER(s3c240x_dma_timer_exp);
191 	TIMER_CALLBACK_MEMBER(s3c240x_iic_timer_exp);
192 	TIMER_CALLBACK_MEMBER(s3c240x_iis_timer_exp);
193 	void gp32_map(address_map &map);
194 
195 	required_device<cpu_device> m_maincpu;
196 	required_device<smartmedia_image_device> m_smartmedia;
197 	required_device<dac_word_interface> m_ldac;
198 	required_device<dac_word_interface> m_rdac;
199 	required_device<nvram_device> m_nvram;
200 	required_ioport m_io_in0;
201 	required_ioport m_io_in1;
202 	required_device<screen_device> m_screen;
203 	required_device<palette_device> m_palette;
204 
205 	uint32_t s3c240x_get_fclk(int reg);
206 	uint32_t s3c240x_get_hclk(int reg);
207 	uint32_t s3c240x_get_pclk(int reg);
208 	void s3c240x_lcd_dma_reload();
209 	void s3c240x_lcd_dma_init();
210 	void s3c240x_lcd_configure();
211 	void s3c240x_lcd_start();
212 	void s3c240x_lcd_stop();
213 	void s3c240x_lcd_recalc();
214 	void s3c240x_check_pending_irq();
215 	void s3c240x_request_irq(uint32_t int_type);
216 	void s3c240x_dma_reload(int dma);
217 	void s3c240x_dma_trigger(int dma);
218 	void s3c240x_dma_request_iis();
219 	void s3c240x_dma_request_pwm();
220 	void s3c240x_dma_start(int dma);
221 	void s3c240x_dma_stop(int dma);
222 	void s3c240x_dma_recalc(int dma);
223 	void s3c240x_pwm_start(int timer);
224 	void s3c240x_pwm_stop(int timer);
225 	void s3c240x_pwm_recalc(int timer);
226 	void s3c240x_iis_start();
227 	void s3c240x_iis_stop();
228 	void s3c240x_iis_recalc();
229 	void smc_reset();
230 	void smc_init();
231 	uint8_t smc_read();
232 	void smc_write(uint8_t data);
233 	void smc_update();
234 	void i2s_reset();
235 	void i2s_init();
236 	void i2s_write(int line, int data);
237 	uint8_t eeprom_read(uint16_t address);
238 	void eeprom_write(uint16_t address, uint8_t data);
239 	void iic_start();
240 	void iic_stop();
241 	void iic_resume();
242 	void s3c240x_machine_start();
243 	void s3c240x_machine_reset();
244 	inline rgb_t s3c240x_get_color_5551( uint16_t data);
245 	uint32_t s3c240x_lcd_dma_read( );
246 	void s3c240x_lcd_render_01( );
247 	void s3c240x_lcd_render_02( );
248 	void s3c240x_lcd_render_04( );
249 	void s3c240x_lcd_render_08( );
250 	void s3c240x_lcd_render_16( );
251 };
252 
253 
254 #endif
255