1 // license:BSD-3-Clause 2 // copyright-holders:K.Wilkins 3 /*************************************************************************** 4 5 namcos2.h 6 7 Common functions & declarations for the Namco System 2 driver 8 9 ***************************************************************************/ 10 #ifndef MAME_INCLUDES_NAMCOS2_H 11 #define MAME_INCLUDES_NAMCOS2_H 12 13 #pragma once 14 15 #include "machine/namco_c139.h" 16 #include "machine/namco_c148.h" 17 #include "machine/timer.h" 18 #include "sound/c140.h" 19 #include "video/c45.h" 20 #include "video/namco_c116.h" 21 #include "machine/namco65.h" 22 #include "machine/namco68.h" 23 #include "video/namco_c169roz.h" 24 #include "video/namco_c355spr.h" 25 #include "video/namco_c123tmap.h" 26 #include "video/namcos2_sprite.h" 27 #include "video/namcos2_roz.h" 28 #include "screen.h" 29 30 /*********************************************/ 31 /* IF GAME SPECIFIC HACKS ARE REQUIRED THEN */ 32 /* USE THE m_gametype MEMBER TO FIND */ 33 /* OUT WHAT GAME IS RUNNING */ 34 /*********************************************/ 35 36 class namcos2_state : public driver_device 37 { 38 public: namcos2_state(const machine_config & mconfig,device_type type,const char * tag)39 namcos2_state(const machine_config &mconfig, device_type type, const char *tag) : 40 driver_device(mconfig, type, tag), 41 m_gametype(0), 42 m_maincpu(*this, "maincpu"), 43 m_slave(*this, "slave"), 44 m_audiocpu(*this, "audiocpu"), 45 m_c65(*this, "c65mcu"), 46 m_c68(*this, "c68mcu"), 47 m_c140(*this, "c140"), 48 m_c116(*this, "c116"), 49 m_c123tmap(*this, "c123tmap"), 50 m_master_intc(*this, "master_intc"), 51 m_slave_intc(*this, "slave_intc"), 52 m_sci(*this, "sci"), 53 m_c169roz(*this, "c169roz"), 54 m_c355spr(*this, "c355spr"), 55 m_gfxdecode(*this, "gfxdecode"), 56 m_screen(*this, "screen"), 57 m_audiobank(*this, "audiobank"), 58 m_c140_region(*this, "c140"), 59 m_dpram(*this, "dpram"), 60 m_spriteram(*this, "spriteram"), 61 m_c45_road(*this, "c45_road"), 62 m_ns2sprite(*this, "s2sprite"), 63 m_ns2roz(*this, "s2roz") 64 { } 65 66 void configure_c116_standard(machine_config &config); 67 void configure_c148_standard(machine_config &config); 68 void configure_c65_standard(machine_config &config); 69 void configure_c68_standard(machine_config &config); 70 void configure_c123tmap_standard(machine_config &config); 71 void configure_c169roz_standard(machine_config &config); 72 void configure_c355spr_standard(machine_config &config); 73 void configure_c45road_standard(machine_config &config); 74 void configure_common_standard(machine_config &config); 75 void configure_namcos2_sprite_standard(machine_config &config); 76 void configure_namcos2_roz_standard(machine_config &config); 77 void metlhawk(machine_config &config); 78 void gollygho(machine_config &config); 79 void assaultp(machine_config &config); 80 void sgunner2(machine_config &config); 81 void base2(machine_config &config); 82 void finallap_noio(machine_config &config); 83 void finallap(machine_config &config); 84 void finallap_c68(machine_config &config); 85 void finalap2(machine_config &config); 86 void finalap3(machine_config &config); 87 void suzuka8h(machine_config &config); 88 void luckywld(machine_config &config); 89 void base3(machine_config &config); 90 void sgunner(machine_config &config); 91 void base_noio(machine_config &config); 92 void base(machine_config &config); 93 void base_c68(machine_config &config); 94 95 void init_cosmogng(); 96 void init_sgunner2(); 97 void init_kyukaidk(); 98 void init_bubbletr(); 99 void init_suzuk8h2(); 100 void init_burnforc(); 101 void init_gollygho(); 102 void init_rthun2j(); 103 void init_sws(); 104 void init_finehour(); 105 void init_finallap(); 106 void init_dirtfoxj(); 107 void init_marvlanj(); 108 void init_sws92(); 109 void init_dsaber(); 110 void init_assault(); 111 void init_mirninja(); 112 void init_finalap2(); 113 void init_valkyrie(); 114 void init_fourtrax(); 115 void init_finalap3(); 116 void init_luckywld(); 117 void init_assaultj(); 118 void init_dsaberj(); 119 void init_suzuka8h(); 120 void init_phelios(); 121 void init_sws93(); 122 void init_metlhawk(); 123 void init_sws92g(); 124 void init_assaultp(); 125 void init_ordyne(); 126 void init_marvland(); 127 void init_rthun2(); 128 129 protected: 130 virtual void machine_start() override; 131 virtual void machine_reset() override; 132 virtual void video_start() override; 133 134 private: 135 136 enum 137 { 138 /* Namco System 2 */ 139 NAMCOS2_ASSAULT = 0x1000, 140 NAMCOS2_ASSAULT_JP, 141 NAMCOS2_ASSAULT_PLUS, 142 NAMCOS2_BUBBLE_TROUBLE, 143 NAMCOS2_BURNING_FORCE, 144 NAMCOS2_COSMO_GANG, 145 NAMCOS2_COSMO_GANG_US, 146 NAMCOS2_DIRT_FOX, 147 NAMCOS2_DIRT_FOX_JP, 148 NAMCOS2_DRAGON_SABER, 149 NAMCOS2_FINAL_LAP, 150 NAMCOS2_FINAL_LAP_2, 151 NAMCOS2_FINAL_LAP_3, 152 NAMCOS2_FINEST_HOUR, 153 NAMCOS2_FOUR_TRAX, 154 NAMCOS2_GOLLY_GHOST, 155 NAMCOS2_LUCKY_AND_WILD, 156 NAMCOS2_MARVEL_LAND, 157 NAMCOS2_METAL_HAWK, 158 NAMCOS2_MIRAI_NINJA, 159 NAMCOS2_ORDYNE, 160 NAMCOS2_PHELIOS, 161 NAMCOS2_ROLLING_THUNDER_2, 162 NAMCOS2_STEEL_GUNNER, 163 NAMCOS2_STEEL_GUNNER_2, 164 NAMCOS2_SUPER_WSTADIUM, 165 NAMCOS2_SUPER_WSTADIUM_92, 166 NAMCOS2_SUPER_WSTADIUM_92T, 167 NAMCOS2_SUPER_WSTADIUM_93, 168 NAMCOS2_SUZUKA_8_HOURS, 169 NAMCOS2_SUZUKA_8_HOURS_2, 170 NAMCOS2_VALKYRIE, 171 NAMCOS2_KYUUKAI_DOUCHUUKI, 172 }; 173 174 int m_gametype; 175 required_device<cpu_device> m_maincpu; 176 required_device<cpu_device> m_slave; 177 required_device<cpu_device> m_audiocpu; 178 optional_device<namcoc65_device> m_c65; 179 optional_device<namcoc68_device> m_c68; 180 required_device<c140_device> m_c140; 181 required_device<namco_c116_device> m_c116; 182 required_device<namco_c123tmap_device> m_c123tmap; 183 required_device<namco_c148_device> m_master_intc; 184 required_device<namco_c148_device> m_slave_intc; 185 required_device<namco_c139_device> m_sci; 186 optional_device<namco_c169roz_device> m_c169roz; 187 optional_device<namco_c355spr_device> m_c355spr; 188 optional_device<gfxdecode_device> m_gfxdecode; 189 required_device<screen_device> m_screen; 190 required_memory_bank m_audiobank; 191 required_region_ptr<u16> m_c140_region; 192 193 std::unique_ptr<uint8_t[]> m_eeprom; 194 195 uint16_t dpram_word_r(offs_t offset); 196 void dpram_word_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); 197 uint8_t dpram_byte_r(offs_t offset); 198 void dpram_byte_w(offs_t offset, uint8_t data); 199 200 void eeprom_w(offs_t offset, uint8_t data); 201 uint8_t eeprom_r(offs_t offset); 202 203 uint16_t c140_rom_r(offs_t offset); 204 void sound_bankselect_w(uint8_t data); 205 206 void sound_reset_w(uint8_t data); 207 void system_reset_w(uint8_t data); 208 void reset_all_subcpus(int state); 209 210 void video_start_luckywld(); 211 void video_start_metlhawk(); 212 void video_start_sgunner(); 213 214 uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); 215 uint32_t screen_update_finallap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); 216 uint32_t screen_update_luckywld(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); 217 uint32_t screen_update_metlhawk(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); 218 uint32_t screen_update_sgunner(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); 219 220 uint8_t c116_r(offs_t offset); 221 222 uint16_t gfx_ctrl_r(); 223 void gfx_ctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); 224 225 void create_shadow_table(); 226 void apply_clip( rectangle &clip, const rectangle &cliprect ); 227 get_pos_irq_scanline()228 int get_pos_irq_scanline() { return (m_c116->get_reg(5) - 32) & 0xff; } 229 TIMER_DEVICE_CALLBACK_MEMBER(screen_scanline); 230 231 required_shared_ptr<uint8_t> m_dpram; /* 2Kx8 */ 232 optional_shared_ptr<uint16_t> m_spriteram; 233 uint16_t m_gfx_ctrl; 234 unsigned m_finallap_prot_count; 235 int m_sendval; 236 237 optional_device<namco_c45_road_device> m_c45_road; 238 optional_device<namcos2_sprite_device> m_ns2sprite; 239 optional_device<namcos2_roz_device> m_ns2roz; 240 241 uint16_t namcos2_68k_key_r(offs_t offset); 242 void namcos2_68k_key_w(offs_t offset, uint16_t data); 243 uint16_t namcos2_finallap_prot_r(offs_t offset); 244 void GollyGhostUpdateLED_c4(int data); 245 void GollyGhostUpdateLED_c6(int data); 246 void GollyGhostUpdateLED_c8(int data); 247 void GollyGhostUpdateLED_ca(int data); 248 void GollyGhostUpdateDiorama_c0(int data); 249 void TilemapCB(uint16_t code, int *tile, int *mask); 250 void TilemapCB_finalap2(uint16_t code, int *tile, int *mask); 251 void RozCB_luckywld(uint16_t code, int *tile, int *mask, int which); 252 void RozCB_metlhawk(uint16_t code, int *tile, int *mask, int which); 253 254 void c140_default_am(address_map &map); 255 void common_default_am(address_map &map); 256 void common_finallap_am(address_map &map); 257 void common_suzuka8h_am(address_map &map); 258 void common_suzuka8h_roz_am(address_map &map); 259 void common_luckywld_roz_am(address_map &map); 260 void common_metlhawk_am(address_map &map); 261 void common_sgunner_am(address_map &map); 262 void master_common_am(address_map &map); 263 void master_default_am(address_map &map); 264 void master_finallap_am(address_map &map); 265 void master_suzuka8h_am(address_map &map); 266 void master_luckywld_am(address_map &map); 267 void master_metlhawk_am(address_map &map); 268 void master_sgunner_am(address_map &map); 269 270 void namcos2_68k_default_cpu_board_am(address_map &map); 271 void slave_common_am(address_map &map); 272 void slave_default_am(address_map &map); 273 void slave_finallap_am(address_map &map); 274 void slave_suzuka8h_am(address_map &map); 275 void slave_luckywld_am(address_map &map); 276 void slave_metlhawk_am(address_map &map); 277 void slave_sgunner_am(address_map &map); 278 void sound_default_am(address_map &map); 279 }; 280 281 /**************************************************************/ 282 /* Non-shared memory custom IO device - IRQ/Inputs/Outputs */ 283 /**************************************************************/ 284 285 #define NAMCOS2_C148_0 0 /* 0x1c0000 */ 286 #define NAMCOS2_C148_1 1 /* 0x1c2000 */ 287 #define NAMCOS2_C148_2 2 /* 0x1c4000 */ 288 #define NAMCOS2_C148_CPUIRQ 3 /* 0x1c6000 */ 289 #define NAMCOS2_C148_EXIRQ 4 /* 0x1c8000 */ 290 #define NAMCOS2_C148_POSIRQ 5 /* 0x1ca000 */ 291 #define NAMCOS2_C148_SERIRQ 6 /* 0x1cc000 */ 292 #define NAMCOS2_C148_VBLANKIRQ 7 /* 0x1ce000 */ 293 294 #endif // MAME_INCLUDES_NAMCOS2_H 295