1 // license:BSD-3-Clause 2 // copyright-holders:Olivier Galibert 3 #pragma once 4 5 #ifndef MAME_INCLUDES_NEXT_H 6 #define MAME_INCLUDES_NEXT_H 7 8 #include "cpu/m68000/m68000.h" 9 #include "imagedev/floppy.h" 10 #include "machine/nscsi_bus.h" 11 #include "machine/mccs1850.h" 12 #include "machine/8530scc.h" 13 #include "machine/nextkbd.h" 14 #include "machine/upd765.h" 15 #include "machine/ncr5390.h" 16 #include "machine/mb8795.h" 17 #include "machine/nextmo.h" 18 #include "imagedev/chd_cd.h" 19 #include "imagedev/harddriv.h" 20 21 class next_state : public driver_device 22 { 23 public: next_state(const machine_config & mconfig,device_type type,const char * tag)24 next_state(const machine_config &mconfig, device_type type, const char *tag) 25 : driver_device(mconfig, type, tag), 26 maincpu(*this, "maincpu"), 27 rtc(*this, "rtc"), 28 scc(*this, "scc"), 29 keyboard(*this, "keyboard"), 30 scsibus(*this, "scsibus"), 31 scsi(*this, "scsibus:7:ncr5390"), 32 net(*this, "net"), 33 mo(*this, "mo"), 34 fdc(*this, "fdc"), 35 floppy0(*this, "fdc:0"), 36 vram(*this, "vram") { } 37 38 void next_base(machine_config &config); 39 void next_fdc_base(machine_config &config); 40 void nextst(machine_config &config); 41 void nextsc(machine_config &config); 42 void nextct(machine_config &config); 43 void nexts2(machine_config &config); 44 void nextctc(machine_config &config); 45 void next(machine_config &config); 46 void nextstc(machine_config &config); 47 void nexts(machine_config &config); 48 49 void init_nexts2(); 50 void init_next(); 51 void init_nextsc(); 52 void init_nextst(); 53 void init_nextct(); 54 void init_nextstc(); 55 void init_nextctc(); 56 void init_nexts(); 57 58 private: 59 required_device<cpu_device> maincpu; 60 required_device<mccs1850_device> rtc; 61 required_device<scc8530_legacy_device> scc; 62 required_device<nextkbd_device> keyboard; 63 required_device<nscsi_bus_device> scsibus; 64 required_device<ncr5390_device> scsi; 65 required_device<mb8795_device> net; 66 required_device<nextmo_device> mo; 67 optional_device<n82077aa_device> fdc; // 040 only 68 optional_device<floppy_connector> floppy0; // 040 only 69 70 uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); 71 72 void setup(uint32_t scr1, int size_x, int size_y, int skip, bool color); 73 74 uint32_t rom_map_r(); 75 uint32_t scr2_r(); 76 void scr2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); 77 uint32_t scr1_r(); 78 uint32_t irq_status_r(); 79 uint32_t irq_mask_r(); 80 void irq_mask_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); 81 uint32_t event_counter_r(offs_t offset, uint32_t mem_mask = ~0); 82 uint32_t dsp_r(); 83 uint32_t fdc_control_r(); 84 void fdc_control_w(uint32_t data); 85 uint32_t dma_ctrl_r(offs_t offset); 86 void dma_ctrl_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); 87 uint32_t dma_regs_r(offs_t offset); 88 void dma_regs_w(offs_t offset, uint32_t data); 89 uint32_t scsictrl_r(offs_t offset, uint32_t mem_mask = ~0); 90 void scsictrl_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); 91 uint32_t phy_r(offs_t offset); 92 void phy_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); 93 uint32_t timer_data_r(); 94 void timer_data_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); 95 uint32_t timer_ctrl_r(); 96 void timer_ctrl_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); 97 void ramdac_w(offs_t offset, uint8_t data); 98 99 uint32_t scr1; 100 uint32_t scr2; 101 uint32_t irq_status; 102 uint32_t irq_mask; 103 int irq_level; 104 required_shared_ptr<uint32_t> vram; 105 uint8_t scsictrl, scsistat; 106 107 uint32_t phy[2]; 108 109 attotime timer_tbase; 110 uint16_t timer_vbase; 111 uint32_t timer_data, timer_next_data; 112 uint32_t timer_ctrl; 113 emu_timer *timer_tm; 114 115 uint32_t eventc_latch; 116 117 DECLARE_WRITE_LINE_MEMBER(scc_irq); 118 DECLARE_WRITE_LINE_MEMBER(keyboard_irq); 119 DECLARE_WRITE_LINE_MEMBER(power_irq); 120 DECLARE_WRITE_LINE_MEMBER(nmi_irq); 121 122 DECLARE_WRITE_LINE_MEMBER(scsi_irq); 123 DECLARE_WRITE_LINE_MEMBER(scsi_drq); 124 125 DECLARE_WRITE_LINE_MEMBER(fdc_irq); 126 DECLARE_WRITE_LINE_MEMBER(fdc_drq); 127 128 DECLARE_WRITE_LINE_MEMBER(net_tx_irq); 129 DECLARE_WRITE_LINE_MEMBER(net_rx_irq); 130 DECLARE_WRITE_LINE_MEMBER(net_tx_drq); 131 DECLARE_WRITE_LINE_MEMBER(net_rx_drq); 132 133 DECLARE_WRITE_LINE_MEMBER(mo_irq); 134 DECLARE_WRITE_LINE_MEMBER(mo_drq); 135 136 DECLARE_FLOPPY_FORMATS( floppy_formats ); 137 DECLARE_WRITE_LINE_MEMBER(vblank_w); 138 139 void ncr5390(device_t *device); 140 void next_0b_m_mem(address_map &map); 141 void next_0b_m_nofdc_mem(address_map &map); 142 void next_0c_c_mem(address_map &map); 143 void next_0c_m_mem(address_map &map); 144 void next_2c_c_mem(address_map &map); 145 void next_fdc_mem(address_map &map); 146 void next_mem(address_map &map); 147 148 struct dma_slot { 149 uint32_t start, limit, chain_start, chain_limit, current; 150 uint8_t state; 151 bool supdate, restart, drq; 152 }; 153 154 enum { 155 // write bits 156 DMA_SETENABLE = 0x01, 157 DMA_SETSUPDATE = 0x02, 158 DMA_SETREAD = 0x04, 159 DMA_CLRCOMPLETE = 0x08, 160 DMA_RESET = 0x10, 161 DMA_INITBUF = 0x20, 162 DMA_INITBUFTURBO = 0x40, 163 164 // read bits 165 DMA_ENABLE = 0x01, 166 DMA_SUPDATE = 0x02, 167 DMA_READ = 0x04, 168 DMA_COMPLETE = 0x08, 169 DMA_BUSEXC = 0x10 170 }; 171 172 static char const *const dma_targets[0x20]; 173 static int const dma_irqs[0x20]; 174 static bool const dma_has_saved[0x20]; 175 static int const scsi_clocks[4]; 176 177 dma_slot dma_slots[0x20]; 178 uint32_t esp; 179 180 int screen_sx, screen_sy, screen_skip; 181 bool screen_color; 182 bool vbl_enabled; 183 184 virtual void machine_start() override; 185 virtual void machine_reset() override; 186 187 virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; 188 void timer_start(); 189 void timer_update(); 190 191 void irq_set(int id, bool raise); 192 void irq_check(); 193 const char *dma_name(int slot); 194 void dma_do_ctrl_w(int slot, uint8_t data); 195 void dma_drq_w(int slot, bool state); 196 void dma_read(int slot, uint8_t &val, bool &eof, bool &err); 197 void dma_write(int slot, uint8_t val, bool eof, bool &err); 198 void dma_check_update(int slot); 199 void dma_check_end(int slot, bool eof); 200 void dma_end(int slot); 201 }; 202 203 #endif 204