1 // license:BSD-3-Clause
2 // copyright-holders:Aaron Giles
3 /***************************************************************************
4 
5     Sega Outrun hardware
6 
7 ***************************************************************************/
8 
9 #include "cpu/m68000/m68000.h"
10 #include "cpu/z80/z80.h"
11 #include "machine/315_5195.h"
12 #include "machine/adc0804.h"
13 #include "machine/i8255.h"
14 #include "machine/nvram.h"
15 #include "machine/timer.h"
16 #include "machine/watchdog.h"
17 #include "video/segaic16.h"
18 #include "video/segaic16_road.h"
19 #include "video/sega16sp.h"
20 #include "screen.h"
21 
22 
23 // ======================> segaorun_state
24 
25 class segaorun_state : public sega_16bit_common_base
26 {
27 public:
28 	// construction/destruction
segaorun_state(const machine_config & mconfig,device_type type,const char * tag)29 	segaorun_state(const machine_config &mconfig, device_type type, const char *tag) :
30 		sega_16bit_common_base(mconfig, type, tag),
31 		m_mapper(*this, "mapper"),
32 		m_maincpu(*this, "maincpu"),
33 		m_subcpu(*this, "subcpu"),
34 		m_soundcpu(*this, "soundcpu"),
35 		m_i8255(*this, "i8255"),
36 		m_adc(*this, "adc"),
37 		m_nvram(*this, "nvram"),
38 		m_watchdog(*this, "watchdog"),
39 		m_screen(*this, "screen"),
40 		m_sprites(*this, "sprites"),
41 		m_segaic16vid(*this, "segaic16vid"),
42 		m_segaic16road(*this, "segaic16road"),
43 		m_bankmotor_timer(*this, "bankmotor"),
44 		m_digital_ports(*this, { { "SERVICE", "UNKNOWN", "COINAGE", "DSW" } }),
45 		m_adc_ports(*this, "ADC.%u", 0),
46 		m_workram(*this, "workram"),
47 		m_custom_io_r(*this),
48 		m_custom_io_w(*this),
49 		m_custom_map(nullptr),
50 		m_shangon_video(false),
51 		m_scanline_timer(nullptr),
52 		m_irq2_state(0),
53 		m_adc_select(0),
54 		m_vblank_irq_state(0),
55 		m_bankmotor_pos(0x8000),
56 		m_bankmotor_delta(0)
57 	{ }
58 
59 	void shangon_fd1089b(machine_config &config);
60 	void outrun_fd1094(machine_config &config);
61 	void outrundx(machine_config &config);
62 	void shangon(machine_config &config);
63 	void outrun_fd1089a(machine_config &config);
64 	void outrun(machine_config &config);
65 	void outrun_base(machine_config &config);
66 
67 	// game-specific driver init
68 	void init_generic();
69 	void init_outrun();
70 	void init_outrunb();
71 	void init_shangon();
72 
73 	CUSTOM_INPUT_MEMBER( bankmotor_pos_r );
74 
75 protected:
76 	// PPI read/write handlers
77 	uint8_t unknown_porta_r();
78 	uint8_t unknown_portb_r();
79 	uint8_t unknown_portc_r();
80 	void unknown_porta_w(uint8_t data);
81 	void unknown_portb_w(uint8_t data);
82 	void video_control_w(uint8_t data);
83 	uint8_t bankmotor_limit_r();
84 	void bankmotor_control_w(uint8_t data);
85 
86 	// memory mapping
87 	void memory_mapper(sega_315_5195_mapper_device &mapper, uint8_t index);
88 
89 	// main CPU read/write handlers
90 	uint16_t misc_io_r(address_space &space, offs_t offset, uint16_t mem_mask = ~0);
91 	void misc_io_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
92 	void nop_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
93 
94 	// video updates
95 	uint32_t screen_update_outrun(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
96 	uint32_t screen_update_shangon(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
97 
98 	void tileram_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { m_segaic16vid->tileram_w(offset,data,mem_mask); };
99 	void textram_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { m_segaic16vid->textram_w(offset,data,mem_mask); };
100 	uint16_t sega_road_control_0_r(address_space &space, offs_t offset, uint16_t mem_mask = ~0) { return m_segaic16road->segaic16_road_control_0_r(); };
101 	void sega_road_control_0_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { m_segaic16road->segaic16_road_control_0_w(offset,data,mem_mask); };
102 
103 	TIMER_DEVICE_CALLBACK_MEMBER(bankmotor_update);
104 
105 	void decrypted_opcodes_map(address_map &map);
106 	void outrun_map(address_map &map);
107 	void sound_map(address_map &map);
108 	void sound_portmap(address_map &map);
109 	void sub_map(address_map &map);
110 
111 	// timer IDs
112 	enum
113 	{
114 		TID_SCANLINE,
115 		TID_IRQ2_GEN,
116 		TID_SOUND_WRITE
117 	};
118 
119 	// device overrides
120 	virtual void machine_reset() override;
121 	virtual void video_start() override;
122 	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
123 
124 	// internal helpers
125 	void update_main_irqs();
126 	DECLARE_WRITE_LINE_MEMBER(m68k_reset_callback);
127 
128 	// custom I/O
129 	uint16_t outrun_custom_io_r(address_space &space, offs_t offset);
130 	void outrun_custom_io_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
131 	uint16_t shangon_custom_io_r(address_space &space, offs_t offset);
132 	void shangon_custom_io_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
133 	uint8_t analog_r();
134 
135 	// devices
136 	required_device<sega_315_5195_mapper_device> m_mapper;
137 	required_device<m68000_device> m_maincpu;
138 	required_device<m68000_device> m_subcpu;
139 	required_device<z80_device> m_soundcpu;
140 	required_device<i8255_device> m_i8255;
141 	required_device<adc0804_device> m_adc;
142 	optional_device<nvram_device> m_nvram;
143 	required_device<watchdog_timer_device> m_watchdog;
144 	required_device<screen_device> m_screen;
145 	required_device<sega_16bit_sprite_device> m_sprites;
146 	required_device<segaic16_video_device> m_segaic16vid;
147 	required_device<segaic16_road_device> m_segaic16road;
148 	optional_device<timer_device> m_bankmotor_timer;
149 
150 	// input ports
151 	required_ioport_array<4> m_digital_ports;
152 	optional_ioport_array<8> m_adc_ports;
153 
154 	// memory
155 	required_shared_ptr<uint16_t> m_workram;
156 
157 	// configuration
158 	read16m_delegate   m_custom_io_r;
159 	write16s_delegate   m_custom_io_w;
160 	const uint8_t *     m_custom_map;
161 	bool                m_shangon_video;
162 
163 	// internal state
164 	emu_timer *         m_scanline_timer;
165 	emu_timer *         m_irq2_gen_timer;
166 	uint8_t             m_irq2_state;
167 	uint8_t             m_adc_select;
168 	uint8_t             m_vblank_irq_state;
169 	int                 m_bankmotor_pos;
170 	int                 m_bankmotor_delta;
171 };
172