1 // license:BSD-3-Clause
2 // copyright-holders:Krzysztof Strzecha,Jon Sturm
3 /*****************************************************************************
4  *
5  * includes/ti85.h
6  *
7  ****************************************************************************/
8 
9 #ifndef MAME_INCLUDES_TI85_H
10 #define MAME_INCLUDES_TI85_H
11 
12 #pragma once
13 
14 #include "bus/ti8x/ti8x.h"
15 #include "imagedev/snapquik.h"
16 #include "machine/bankdev.h"
17 #include "machine/intelfsh.h"
18 #include "machine/nvram.h"
19 #include "video/t6a04.h"
20 #include "emupal.h"
21 
22 
23 /* model */
24 enum ti85_model {
25 	TI81,
26 	TI81v2,
27 	TI82,
28 	TI83,
29 	TI85,
30 	TI86,
31 	TI83P,
32 	TI83PSE,
33 	TI84P,
34 	TI84PSE
35 };
36 
37 typedef struct
38 {
39 	uint8_t loop;
40 	uint8_t setup;
41 	float divsor;
42 	bool interrupt;
43 	uint8_t max;
44 	uint8_t count;
45 } ti83pse_timer;
46 
47 typedef enum TI83PSE_CTIMER
48 {
49 	CRYSTAL_TIMER1 = 0,
50 	CRYSTAL_TIMER2,
51 	CRYSTAL_TIMER3,
52 	HW_TIMER1,
53 	HW_TIMER2
54 } ti83pse_ctimers;
55 
56 class ti85_state : public driver_device
57 {
58 public:
ti85_state(const machine_config & mconfig,device_type type,const char * tag)59 	ti85_state(const machine_config &mconfig, device_type type, const char *tag)
60 		: driver_device(mconfig, type, tag)
61 		, m_maincpu(*this, "maincpu")
62 		, m_link_port(*this, "linkport")
63 		, m_nvram(*this, "nvram")
64 		, m_flash(*this, "flash")
65 		, m_membank(*this, "membank%u", 0U)
66 	{
67 	}
68 
69 	void ti83(machine_config &config);
70 	void ti82(machine_config &config);
71 	void ti83p(machine_config &config);
72 	void ti81v2(machine_config &config);
73 	void ti73(machine_config &config);
74 	void ti85d(machine_config &config);
75 	void ti83pse(machine_config &config);
76 	void ti84pse(machine_config &config);
77 	void ti86(machine_config &config);
78 	void ti81(machine_config &config);
79 	void ti85(machine_config &config);
80 	void ti84p(machine_config &config);
81 
82 private:
83 	required_device<cpu_device> m_maincpu;
84 	optional_device<ti8x_link_port_device> m_link_port;
85 	optional_shared_ptr<uint8_t> m_nvram;
86 	optional_device<intelfsh8_device> m_flash;
87 	optional_device_array<address_map_bank_device, 4> m_membank;
88 
89 	ti85_model m_model;
90 
91 	uint8_t m_LCD_memory_base;
92 	uint8_t m_LCD_contrast;
93 	uint8_t m_LCD_status;
94 	uint8_t m_timer_interrupt_mask;
95 	uint8_t m_timer_interrupt_status;
96 	uint8_t m_ctimer_interrupt_status;
97 	uint8_t m_ON_interrupt_mask;
98 	uint8_t m_ON_interrupt_status;
99 	uint8_t m_ON_pressed;
100 	uint8_t m_flash_unlocked;
101 	uint8_t m_ti8x_memory_page_1;
102 	uint8_t m_ti8x_memory_page_2;
103 	uint8_t m_ti8x_memory_page_3;
104 	bool m_booting;
105 	uint8_t m_LCD_mask;
106 	uint8_t m_power_mode;
107 	uint8_t m_cpu_speed;
108 	uint8_t m_keypad_mask;
109 	uint8_t m_video_buffer_width;
110 	uint8_t m_interrupt_speed;
111 	uint8_t m_port4_bit0;
112 	uint8_t m_ti81_port_7_data;
113 	std::unique_ptr<uint8_t[]> m_ti8x_ram;
114 	uint8_t m_PCR;
115 	uint8_t m_ti8x_port2;
116 	uint8_t m_ti83p_port4;
117 	uint8_t m_ti83pse_port21;
118 	int m_ti_video_memory_size;
119 	int m_ti_screen_x_size;
120 	int m_ti_screen_y_size;
121 	int m_ti_number_of_frames;
122 	std::unique_ptr<uint8_t[]> m_frames;
123 	uint8_t * m_bios;
124 	emu_timer *m_ti85_timer;
125 	emu_timer *m_ti83_1st_timer;
126 	emu_timer *m_ti83_2nd_timer;
127 	uint8_t ti85_port_0000_r();
128 	uint8_t ti8x_keypad_r();
129 	uint8_t ti85_port_0006_r();
130 	uint8_t ti8x_serial_r();
131 	uint8_t ti86_port_0005_r();
132 	uint8_t ti83_port_0000_r();
133 	uint8_t ti8x_plus_serial_r();
134 	void ti81_port_0007_w(uint8_t data);
135 	void ti85_port_0000_w(uint8_t data);
136 	void ti8x_keypad_w(uint8_t data);
137 	void ti85_port_0002_w(uint8_t data);
138 	void ti85_port_0003_w(uint8_t data);
139 	void ti85_port_0004_w(uint8_t data);
140 	void ti85_port_0005_w(uint8_t data);
141 	void ti85_port_0006_w(uint8_t data);
142 	void ti8x_serial_w(uint8_t data);
143 	void ti86_port_0005_w(uint8_t data);
144 	void ti86_port_0006_w(uint8_t data);
145 	void ti82_port_0002_w(uint8_t data);
146 	void ti83_port_0000_w(uint8_t data);
147 	void ti83_port_0002_w(uint8_t data);
148 	void ti83_port_0003_w(uint8_t data);
149 	void ti8x_plus_serial_w(uint8_t data);
150 	void ti83p_int_mask_w(uint8_t data);
151 	void ti83p_port_0004_w(uint8_t data);
152 	void ti83p_port_0006_w(uint8_t data);
153 	void ti83p_port_0007_w(uint8_t data);
154 	void ti83pse_int_ack_w(uint8_t data);
155 	void ti83pse_port_0004_w(uint8_t data);
156 	void ti83pse_port_0005_w(uint8_t data);
157 	void ti83pse_port_0006_w(uint8_t data);
158 	void ti83pse_port_0007_w(uint8_t data);
159 	void ti83p_port_0014_w(uint8_t data);
160 	void ti83pse_port_0020_w(uint8_t data);
161 	void ti83pse_port_0021_w(uint8_t data);
162 	uint8_t ti85_port_0002_r();
163 	uint8_t ti85_port_0003_r();
164 	uint8_t ti85_port_0004_r();
165 	uint8_t ti85_port_0005_r();
166 	uint8_t ti86_port_0006_r();
167 	uint8_t ti82_port_0002_r();
168 	uint8_t ti83_port_0002_r();
169 	uint8_t ti83_port_0003_r();
170 	uint8_t ti83p_port_0002_r();
171 	uint8_t ti83p_port_0004_r();
172 	uint8_t ti83pse_port_0002_r();
173 	uint8_t ti83pse_port_0005_r();
174 	uint8_t ti83pse_port_0009_r();
175 	uint8_t ti83pse_port_0015_r();
176 	uint8_t ti83pse_port_0020_r();
177 	uint8_t ti83pse_port_0021_r();
178 	uint8_t ti84pse_port_0055_r();
179 	uint8_t ti84pse_port_0056_r();
180 	virtual void machine_start() override;
181 	virtual void video_start() override;
182 	void ti85_palette(palette_device &palette);
183 	DECLARE_MACHINE_RESET(ti85);
184 	DECLARE_MACHINE_RESET(ti83p);
185 	void ti82_palette(palette_device &palette) const;
186 	DECLARE_MACHINE_START(ti86);
187 	DECLARE_MACHINE_START(ti83p);
188 	DECLARE_MACHINE_START(ti83pse);
189 	DECLARE_MACHINE_START(ti84pse);
190 	DECLARE_MACHINE_START(ti84p);
191 	void ti8xpse_init_common();
192 
193 	uint32_t screen_update_ti85(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
194 	TIMER_CALLBACK_MEMBER(ti85_timer_callback);
195 	TIMER_CALLBACK_MEMBER(ti83_timer1_callback);
196 	TIMER_CALLBACK_MEMBER(ti83_timer2_callback);
197 
198 	//crystal timers
199 	virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
200 	void ti83pse_count(uint8_t timer, uint8_t data);
201 
202 	emu_timer *m_crystal_timer1;
203 	emu_timer *m_crystal_timer2;
204 	emu_timer *m_crystal_timer3;
205 	uint8_t ti83pse_ctimer1_setup_r();
206 	void ti83pse_ctimer1_setup_w(uint8_t data);
207 	uint8_t ti83pse_ctimer1_loop_r();
208 	void ti83pse_ctimer1_loop_w(uint8_t data);
209 	uint8_t ti83pse_ctimer1_count_r();
210 	void ti83pse_ctimer1_count_w(uint8_t data);
211 	uint8_t ti83pse_ctimer2_setup_r();
212 	void ti83pse_ctimer2_setup_w(uint8_t data);
213 	uint8_t ti83pse_ctimer2_loop_r();
214 	void ti83pse_ctimer2_loop_w(uint8_t data);
215 	uint8_t ti83pse_ctimer2_count_r();
216 	void ti83pse_ctimer2_count_w(uint8_t data);
217 	uint8_t ti83pse_ctimer3_setup_r();
218 	void ti83pse_ctimer3_setup_w(uint8_t data);
219 	uint8_t ti83pse_ctimer3_loop_r();
220 	void ti83pse_ctimer3_loop_w(uint8_t data);
221 	uint8_t ti83pse_ctimer3_count_r();
222 	void ti83pse_ctimer3_count_w(uint8_t data);
223 	uint8_t ti83p_membank2_r(offs_t offset);
224 	uint8_t ti83p_membank3_r(offs_t offset);
225 
226 	void ti8x_update_bank(address_space &space, uint8_t bank, uint8_t *base, uint8_t page, bool is_ram);
227 	void update_ti85_memory();
228 	void update_ti83p_memory();
229 	void update_ti83pse_memory();
230 	void update_ti86_memory();
231 	void ti8x_snapshot_setup_registers(uint8_t *data);
232 	void ti85_setup_snapshot(uint8_t *data);
233 	void ti86_setup_snapshot(uint8_t *data);
234 	DECLARE_SNAPSHOT_LOAD_MEMBER(snapshot_cb);
235 
236 	ti83pse_timer m_ctimer[3];
237 
238 	void ti81_io(address_map &map);
239 	void ti81_mem(address_map &map);
240 	void ti81v2_io(address_map &map);
241 	void ti82_io(address_map &map);
242 	void ti83_io(address_map &map);
243 	void ti83p_asic_mem(address_map &map);
244 	void ti83p_banked_mem(address_map &map);
245 	void ti83p_io(address_map &map);
246 	void ti83pse_banked_mem(address_map &map);
247 	void ti83pse_io(address_map &map);
248 	void ti84p_banked_mem(address_map &map);
249 	void ti85_io(address_map &map);
250 	void ti86_io(address_map &map);
251 	void ti86_mem(address_map &map);
252 	//address_space &asic;
253 };
254 
255 #endif // MAME_INCLUDES_TI85_H
256