1 // license:BSD-3-Clause 2 // copyright-holders:Mathis Rosenhauer 3 /************************************************************************* 4 5 Exidy Vertigo hardware 6 7 *************************************************************************/ 8 #ifndef MAME_INCLUDES_VERTIGO_H 9 #define MAME_INCLUDES_VERTIGO_H 10 11 #pragma once 12 13 #include "audio/exidy440.h" 14 #include "machine/74148.h" 15 #include "machine/adc0808.h" 16 #include "video/vector.h" 17 18 /************************************* 19 * 20 * Typedefs 21 * 22 *************************************/ 23 24 #define MC_LENGTH 512 25 26 27 class vertigo_state : public driver_device 28 { 29 public: vertigo_state(const machine_config & mconfig,device_type type,const char * tag)30 vertigo_state(const machine_config &mconfig, device_type type, const char *tag) : 31 driver_device(mconfig, type, tag), 32 m_maincpu(*this, "maincpu"), 33 m_custom(*this, "440audio"), 34 m_ttl74148(*this, "74148"), 35 m_vector(*this, "vector"), 36 m_adc(*this, "adc"), 37 m_vectorram(*this, "vectorram") 38 { } 39 40 void vertigo(machine_config &config); 41 42 private: 43 DECLARE_WRITE_LINE_MEMBER(adc_eoc_w); 44 uint16_t vertigo_io_convert(offs_t offset); 45 uint16_t vertigo_coin_r(); 46 void vertigo_wsot_w(uint16_t data); 47 void vertigo_audio_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); 48 uint16_t vertigo_sio_r(); 49 void vertigo_motor_w(uint16_t data); 50 INTERRUPT_GEN_MEMBER(vertigo_interrupt); 51 TIMER_CALLBACK_MEMBER(sound_command_w); 52 DECLARE_WRITE_LINE_MEMBER(v_irq4_w); 53 DECLARE_WRITE_LINE_MEMBER(v_irq3_w); 54 void update_irq(uint8_t data); 55 56 virtual void machine_start() override; 57 virtual void machine_reset() override; 58 void exidy440_audio(machine_config &config); 59 void vertigo_map(address_map &map); 60 void vertigo_motor(address_map &map); 61 void exidy440_audio_map(address_map &map); 62 63 struct am2901 64 { 65 uint32_t ram[16]; /* internal ram */ 66 uint32_t d; /* direct data D input */ 67 uint32_t q; /* Q register */ 68 uint32_t f; /* F ALU result */ 69 uint32_t y; /* Y output */ 70 }; 71 72 class vector_generator 73 { 74 public: 75 uint32_t sreg; /* shift register */ 76 uint32_t l1; /* latch 1 adder operand only */ 77 uint32_t l2; /* latch 2 adder operand only */ 78 uint32_t c_v; /* vertical position counter */ 79 uint32_t c_h; /* horizontal position counter */ 80 uint32_t c_l; /* length counter */ 81 uint32_t adder_s; /* slope generator result and B input */ 82 uint32_t adder_a; /* slope generator A input */ 83 uint32_t color; /* color */ 84 uint32_t intensity; /* intensity */ 85 uint32_t brez; /* h/v-counters enable */ 86 uint32_t vfin; /* drawing yes/no */ 87 uint32_t hud1; /* h-counter up or down (stored in L1) */ 88 uint32_t hud2; /* h-counter up or down (stored in L2) */ 89 uint32_t vud1; /* v-counter up or down (stored in L1) */ 90 uint32_t vud2; /* v-counter up or down (stored in L2) */ 91 uint32_t hc1; /* use h- or v-counter in L1 mode */ 92 uint32_t ven; /* vector intensity enable */ 93 }; 94 95 struct microcode 96 { 97 uint32_t x; 98 uint32_t a; 99 uint32_t b; 100 uint32_t inst; 101 uint32_t dest; 102 uint32_t cn; 103 uint32_t mreq; 104 uint32_t rsel; 105 uint32_t rwrite; 106 uint32_t of; 107 uint32_t iif; 108 uint32_t oa; 109 uint32_t jpos; 110 uint32_t jmp; 111 uint32_t jcon; 112 uint32_t ma; 113 }; 114 115 struct vproc 116 { 117 uint16_t sram[64]; /* external sram */ 118 uint16_t ramlatch; /* latch between 2901 and sram */ 119 uint16_t rom_adr; /* vector ROM/RAM address latch */ 120 uint32_t pc; /* program counter */ 121 uint32_t ret; /* return address */ 122 123 }; 124 125 void am2901x4(am2901 &bsp, microcode const &mc); 126 void vertigo_vgen(vector_generator &vg); 127 void vertigo_vproc_init(); 128 void vertigo_vproc_reset(); 129 void vertigo_vproc(int cycles, int irq4); 130 void update_irq_encoder(int line, int state); 131 132 required_device<cpu_device> m_maincpu; 133 required_device<exidy440_sound_device> m_custom; 134 required_device<ttl74148_device> m_ttl74148; 135 required_device<vector_device> m_vector; 136 required_device<adc0808_device> m_adc; 137 required_shared_ptr<uint16_t> m_vectorram; 138 attotime m_irq4_time; 139 uint8_t m_irq_state; 140 vproc m_vs; 141 am2901 m_bsp; 142 vector_generator m_vgen; 143 uint16_t *m_vectorrom; 144 microcode m_mc[MC_LENGTH]; 145 }; 146 147 #endif // MAME_INCLUDES_VERTIGO_H 148