1 // license:BSD-3-Clause
2 // copyright-holders:Olivier Galibert
3 #ifndef MAME_MACHINE_NAOMIGD_H
4 #define MAME_MACHINE_NAOMIGD_H
5 
6 #pragma once
7 
8 #include "machine/naomibd.h"
9 #include "cpu/pic16c62x/pic16c62x.h"
10 #include "machine/i2cmem.h"
11 #include "machine/eepromser.h"
12 #include "machine/315-6154.h"
13 #include "machine/idectrl.h"
14 #include "machine/gdrom.h"
15 
16 // For ide gdrom controller
17 
18 class idegdrom_device : public pci_device {
19 public:
20 	idegdrom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const char *image_tag, const char *space_tag, int space_id);
21 	idegdrom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
22 
irq_callback()23 	auto irq_callback() { return irq_cb.bind(); }
24 
25 	virtual void device_add_mconfig(machine_config &config) override;
26 
27 	void map_command(address_map &map);
28 	void map_control(address_map &map);
29 	void map_dma(address_map &map);
30 
31 	uint32_t ide_cs0_r(offs_t offset, uint32_t mem_mask = ~0);
32 	uint32_t ide_cs1_r(offs_t offset, uint32_t mem_mask = ~0);
33 	void ide_cs0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
34 	void ide_cs1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
35 	DECLARE_WRITE_LINE_MEMBER(ide_irq);
36 
37 protected:
38 	virtual void device_start() override;
39 	virtual void device_reset() override;
40 
41 	virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space,
42 		uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override;
43 
44 private:
45 	required_device<bus_master_ide_controller_device> m_ide;
46 	devcb_write_line irq_cb;
47 	const char *space_owner_tag;
48 	int space_owner_id;
49 };
50 
DECLARE_DEVICE_TYPE(IDE_GDROM,idegdrom_device)51 DECLARE_DEVICE_TYPE(IDE_GDROM, idegdrom_device)
52 
53 class naomi_gdrom_board : public naomi_board
54 {
55 public:
56 	template <typename T, typename U>
57 	naomi_gdrom_board(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&eeprom_tag, const char *_image_tag, U &&picregion_tag)
58 		: naomi_gdrom_board(mconfig, tag, owner, clock)
59 	{
60 		eeprom.set_tag(std::forward<T>(eeprom_tag));
61 		set_image_tag(_image_tag);
62 		picdata.set_tag(std::forward<U>(picregion_tag));
63 	}
64 
65 	template <typename T>
66 	naomi_gdrom_board(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const char *_image_tag, T &&picregion_tag)
67 		: naomi_gdrom_board(mconfig, tag, owner, clock)
68 	{
69 		picdata.set_tag(std::forward<T>(picregion_tag));
70 		set_image_tag(_image_tag);
71 	}
72 
73 	naomi_gdrom_board(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
74 
75 	virtual void device_add_mconfig(machine_config &config) override;
76 	virtual void submap(address_map &map) override;
77 	void sh4_map(address_map &map);
78 	void sh4_io_map(address_map &map);
79 	void pic_map(address_map &map);
80 	void pci_map(address_map &map);
81 	void pci_config_map(address_map &map);
82 
83 	void set_image_tag(const char *_image_tag)
84 	{
85 		image_tag = _image_tag;
86 	}
87 
88 	uint8_t *memory(uint32_t &size) { size = dimm_data_size; return dimm_data; }
89 
90 	virtual const tiny_rom_entry *device_rom_region() const override;
91 
92 	void dimm_command_w(uint16_t data);     // 5f703c
93 	uint16_t dimm_command_r();
94 	void dimm_offsetl_w(uint16_t data);     // 5f7040
95 	uint16_t dimm_offsetl_r();
96 	void dimm_parameterl_w(uint16_t data);  // 5f7044
97 	uint16_t dimm_parameterl_r();
98 	void dimm_parameterh_w(uint16_t data);  // 5f7048
99 	uint16_t dimm_parameterh_r();
100 	void dimm_status_w(uint16_t data);      // 5f704c
101 	uint16_t dimm_status_r();
102 
103 	void sh4_unknown_w(uint32_t data);      // 14000000
104 	uint32_t sh4_unknown_r();
105 	void sh4_command_w(uint32_t data);      // 14000014
106 	uint32_t sh4_command_r();
107 	void sh4_offsetl_w(uint32_t data);      // 14000018
108 	uint32_t sh4_offsetl_r();
109 	void sh4_parameterl_w(uint32_t data);   // 1400001c
110 	uint32_t sh4_parameterl_r();
111 	void sh4_parameterh_w(uint32_t data);   // 14000020
112 	uint32_t sh4_parameterh_r();
113 	void sh4_status_w(uint32_t data);       // 14000024
114 	uint32_t sh4_status_r();
115 	void sh4_control_w(uint32_t data);      // 14000028
116 	uint32_t sh4_control_r();
117 	void sh4_sdramconfig_w(uint32_t data);  // 1400002c
118 	uint32_t sh4_sdramconfig_r();
119 	void sh4_des_keyl_w(uint32_t data);     // 14000030
120 	uint32_t sh4_des_keyl_r();
121 	void sh4_des_keyh_w(uint32_t data);     // 14000034
122 	uint32_t sh4_des_keyh_r();
123 
124 	uint64_t i2cmem_dimm_r();
125 	void i2cmem_dimm_w(uint64_t data);
126 	uint8_t pic_dimm_r(offs_t offset);
127 	void pic_dimm_w(offs_t offset, uint8_t data);
128 
129 protected:
130 	virtual void device_start() override;
131 	virtual void device_reset() override;
132 	virtual ioport_constructor device_input_ports() const override;
133 
134 	virtual void board_setup_address(uint32_t address, bool is_dma) override;
135 	virtual void board_get_buffer(uint8_t *&base, uint32_t &limit) override;
136 	virtual void board_advance(uint32_t size) override;
137 
138 private:
139 	enum { FILENAME_LENGTH=24 };
140 	int work_mode; // set it different from 0 to enable the cpus and full dimm board emulation
141 
142 	required_device<sh4_device> m_maincpu;
143 	required_device<pic16c622_device> m_securitycpu;
144 	required_device<i2cmem_device> m_i2c0;
145 	required_device<i2cmem_device> m_i2c1;
146 	required_device<eeprom_serial_93cxx_device> m_eeprom;
147 	required_device<sega_315_6154_device> m_315_6154;
148 	required_device<idegdrom_device> m_idegdrom;
149 	required_ioport m_debug_dipswitches;
150 
151 	const char *image_tag;
152 	optional_region_ptr<uint8_t> picdata;
153 
154 	uint32_t dimm_cur_address;
155 	uint8_t picbus;
156 	uint8_t picbus_pullup;
157 	uint8_t picbus_io[2]; // 0 for sh4, 1 for pic
158 	bool picbus_used;
159 	uint32_t dimm_command;
160 	uint32_t dimm_offsetl;
161 	uint32_t dimm_parameterl;
162 	uint32_t dimm_parameterh;
163 	uint32_t dimm_status;
164 	uint32_t dimm_control;
165 	uint32_t dimm_sdramconfig;
166 	uint32_t sh4_unknown;
167 	uint64_t dimm_des_key;
168 
169 	// Note: voluntarily not saved into the state
170 	uint8_t *dimm_des_data;
171 	uint8_t *dimm_data;
172 	uint32_t dimm_data_size;
173 
174 	static const uint32_t DES_LEFTSWAP[];
175 	static const uint32_t DES_RIGHTSWAP[];
176 	static const uint32_t DES_SBOX1[];
177 	static const uint32_t DES_SBOX2[];
178 	static const uint32_t DES_SBOX3[];
179 	static const uint32_t DES_SBOX4[];
180 	static const uint32_t DES_SBOX5[];
181 	static const uint32_t DES_SBOX6[];
182 	static const uint32_t DES_SBOX7[];
183 	static const uint32_t DES_SBOX8[];
184 	static const uint32_t DES_MASK_TABLE[];
185 	static const uint8_t DES_ROTATE_TABLE[16];
186 
187 	void find_file(const char *name, const uint8_t *dir_sector, uint32_t &file_start, uint32_t &file_size);
188 
189 	inline void permutate(uint32_t &a, uint32_t &b, uint32_t m, int shift);
190 	void des_generate_subkeys(const uint64_t key, uint32_t *subkeys);
191 	uint64_t des_encrypt_decrypt(bool decrypt, uint64_t src, const uint32_t *des_subkeys);
192 	uint64_t rev64(uint64_t src);
193 	uint64_t read_to_qword(const uint8_t *region);
194 	void write_from_qword(uint8_t *region, uint64_t qword);
195 };
196 
197 DECLARE_DEVICE_TYPE(NAOMI_GDROM_BOARD, naomi_gdrom_board)
198 
199 
200 #endif // MAME_MACHINE_NAOMIGD_H
201