1 /* Copyright (c) 2013-2016 Jeffrey Pfau 2 * 3 * This Source Code Form is subject to the terms of the Mozilla Public 4 * License, v. 2.0. If a copy of the MPL was not distributed with this 5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ 6 #ifndef GBA_MEMORY_H 7 #define GBA_MEMORY_H 8 9 #include <mgba-util/common.h> 10 11 CXX_GUARD_START 12 13 #include <mgba/core/timing.h> 14 15 #include <mgba/internal/arm/arm.h> 16 #include <mgba/internal/gba/dma.h> 17 #include <mgba/internal/gba/hardware.h> 18 #include <mgba/internal/gba/savedata.h> 19 #include <mgba/internal/gba/vfame.h> 20 #include <mgba/internal/gba/matrix.h> 21 22 enum GBAMemoryRegion { 23 REGION_BIOS = 0x0, 24 REGION_WORKING_RAM = 0x2, 25 REGION_WORKING_IRAM = 0x3, 26 REGION_IO = 0x4, 27 REGION_PALETTE_RAM = 0x5, 28 REGION_VRAM = 0x6, 29 REGION_OAM = 0x7, 30 REGION_CART0 = 0x8, 31 REGION_CART0_EX = 0x9, 32 REGION_CART1 = 0xA, 33 REGION_CART1_EX = 0xB, 34 REGION_CART2 = 0xC, 35 REGION_CART2_EX = 0xD, 36 REGION_CART_SRAM = 0xE, 37 REGION_CART_SRAM_MIRROR = 0xF 38 }; 39 40 enum GBAMemoryBase { 41 BASE_BIOS = 0x00000000, 42 BASE_WORKING_RAM = 0x02000000, 43 BASE_WORKING_IRAM = 0x03000000, 44 BASE_IO = 0x04000000, 45 BASE_PALETTE_RAM = 0x05000000, 46 BASE_VRAM = 0x06000000, 47 BASE_OAM = 0x07000000, 48 BASE_CART0 = 0x08000000, 49 BASE_CART0_EX = 0x09000000, 50 BASE_CART1 = 0x0A000000, 51 BASE_CART1_EX = 0x0B000000, 52 BASE_CART2 = 0x0C000000, 53 BASE_CART2_EX = 0x0D000000, 54 BASE_CART_SRAM = 0x0E000000, 55 BASE_CART_SRAM_MIRROR = 0x0F000000 56 }; 57 58 enum { 59 SIZE_BIOS = 0x00004000, 60 SIZE_WORKING_RAM = 0x00040000, 61 SIZE_WORKING_IRAM = 0x00008000, 62 SIZE_IO = 0x00000400, 63 SIZE_PALETTE_RAM = 0x00000400, 64 SIZE_VRAM = 0x00018000, 65 SIZE_OAM = 0x00000400, 66 SIZE_CART0 = 0x02000000, 67 SIZE_CART1 = 0x02000000, 68 SIZE_CART2 = 0x02000000, 69 SIZE_CART_SRAM = 0x00008000, 70 SIZE_CART_FLASH512 = 0x00010000, 71 SIZE_CART_FLASH1M = 0x00020000, 72 SIZE_CART_EEPROM = 0x00002000, 73 SIZE_CART_EEPROM512 = 0x00000200, 74 75 SIZE_AGB_PRINT = 0x10000 76 }; 77 78 enum { 79 OFFSET_MASK = 0x00FFFFFF, 80 BASE_OFFSET = 24 81 }; 82 83 enum { 84 AGB_PRINT_BASE = 0x00FD0000, 85 AGB_PRINT_TOP = 0x00FE0000, 86 AGB_PRINT_PROTECT = 0x00FE2FFE, 87 AGB_PRINT_STRUCT = 0x00FE20F8, 88 AGB_PRINT_FLUSH_ADDR = 0x00FE209C, 89 }; 90 91 mLOG_DECLARE_CATEGORY(GBA_MEM); 92 93 struct GBAPrintContext { 94 uint16_t request; 95 uint16_t bank; 96 uint16_t get; 97 uint16_t put; 98 }; 99 100 struct GBAMemory { 101 uint32_t* bios; 102 uint32_t* wram; 103 uint32_t* iwram; 104 uint32_t* rom; 105 uint16_t io[512]; 106 107 struct GBACartridgeHardware hw; 108 struct GBASavedata savedata; 109 struct GBAVFameCart vfame; 110 struct GBAMatrix matrix; 111 size_t romSize; 112 uint32_t romMask; 113 uint16_t romID; 114 int fullBios; 115 116 char waitstatesSeq32[256]; 117 char waitstatesSeq16[256]; 118 char waitstatesNonseq32[256]; 119 char waitstatesNonseq16[256]; 120 int activeRegion; 121 bool prefetch; 122 uint32_t lastPrefetchedPc; 123 uint32_t biosPrefetch; 124 125 struct GBADMA dma[4]; 126 struct mTimingEvent dmaEvent; 127 int activeDMA; 128 uint32_t dmaTransferRegister; 129 130 uint32_t agbPrintBase; 131 uint16_t agbPrintProtect; 132 struct GBAPrintContext agbPrintCtx; 133 uint16_t* agbPrintBuffer; 134 uint16_t agbPrintProtectBackup; 135 struct GBAPrintContext agbPrintCtxBackup; 136 uint32_t agbPrintFuncBackup; 137 uint16_t* agbPrintBufferBackup; 138 139 bool mirroring; 140 }; 141 142 struct GBA; 143 void GBAMemoryInit(struct GBA* gba); 144 void GBAMemoryDeinit(struct GBA* gba); 145 146 void GBAMemoryReset(struct GBA* gba); 147 148 uint32_t GBALoad32(struct ARMCore* cpu, uint32_t address, int* cycleCounter); 149 uint32_t GBALoad16(struct ARMCore* cpu, uint32_t address, int* cycleCounter); 150 uint32_t GBALoad8(struct ARMCore* cpu, uint32_t address, int* cycleCounter); 151 152 uint32_t GBALoadBad(struct ARMCore* cpu); 153 154 void GBAStore32(struct ARMCore* cpu, uint32_t address, int32_t value, int* cycleCounter); 155 void GBAStore16(struct ARMCore* cpu, uint32_t address, int16_t value, int* cycleCounter); 156 void GBAStore8(struct ARMCore* cpu, uint32_t address, int8_t value, int* cycleCounter); 157 158 uint32_t GBAView32(struct ARMCore* cpu, uint32_t address); 159 uint16_t GBAView16(struct ARMCore* cpu, uint32_t address); 160 uint8_t GBAView8(struct ARMCore* cpu, uint32_t address); 161 162 void GBAPatch32(struct ARMCore* cpu, uint32_t address, int32_t value, int32_t* old); 163 void GBAPatch16(struct ARMCore* cpu, uint32_t address, int16_t value, int16_t* old); 164 void GBAPatch8(struct ARMCore* cpu, uint32_t address, int8_t value, int8_t* old); 165 166 uint32_t GBALoadMultiple(struct ARMCore*, uint32_t baseAddress, int mask, enum LSMDirection direction, 167 int* cycleCounter); 168 uint32_t GBAStoreMultiple(struct ARMCore*, uint32_t baseAddress, int mask, enum LSMDirection direction, 169 int* cycleCounter); 170 171 void GBAAdjustWaitstates(struct GBA* gba, uint16_t parameters); 172 173 struct GBASerializedState; 174 void GBAMemorySerialize(const struct GBAMemory* memory, struct GBASerializedState* state); 175 void GBAMemoryDeserialize(struct GBAMemory* memory, const struct GBASerializedState* state); 176 177 void GBAPrintFlush(struct GBA* gba); 178 179 CXX_GUARD_END 180 181 #endif 182